A decoding method and a signal receiver

By adding a storage structure to the frequency domain processing unit, the problem that the 802.11 OFDM wireless communication baseband chip is difficult to ensure the signal processing time when the area is reduced, and the processing time that meets the requirements of the WIFI protocol while reducing the area is achieved.

CN119094305BActive Publication Date: 2025-02-07ALTO BEAM (CHINA) INC
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Patent Information

Application Number
CN202411563820.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-11-05
Publication Date
2025-02-07
Estimated Expiration
2044-11-05

AI Technical Summary

Technical Problem

The existing 802.11 OFDM wireless communication baseband chip is difficult to ensure that the signal processing time (such as decoding time) is within the specified time while reducing the area size.

Method used

By adding the storage structures of the first memory and the second memory to the frequency domain processing unit, the frequency domain processing unit acquires the Fourier transform result from the first memory when the second memory has free storage space and the first memory is not read-free. The equalization process is performed and the results are stored in the second memory to speed up the data output.

Benefits of technology

It is realized that while reducing the area of ​​the frequency domain processing unit, it ensures that the processing time of the Fourier transform result meets the requirements of the WIFI protocol.

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Abstract

The present application provides a decoding method and a signal receiver, wherein the method is applied to a signal receiver; the signal receiver includes a frequency domain processing unit and a decoder; the frequency domain processing unit includes a first memory, an equalization processing unit and a second memory connected in sequence; the first memory is used to store Fourier transform results; the second memory is used to store equalization processing results; in this embodiment, as long as there is free storage space in the second memory and the first memory is not empty, the frequency domain processing unit will obtain a corresponding number of Fourier transform results from the first memory, thereby speeding up the output of the Fourier transform results stored in the first memory, and further ensuring that the frequency domain processing unit completes an OFDM Symbol processing time in accordance with the WIFI protocol requirements.
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Description

Technical Field

[0001] The present application relates to the field of communication technology, and in particular to a decoding method and a signal receiver. Background Art

[0002] The ‌802.11 OFDM (Orthogonal Frequency Division Multiplexing) system is a wireless communication technology. The ‌802.11 OFDM system usually includes a signal transmitter and a signal receiver. The 802.11 OFDM wireless communication baseband chip is the signal receiver in the ‌802.11 OFDM system. The 802.11 OFDM wireless communication baseband chip is used to receive the wireless signal transmitted by the signal transmitter and convert it into a digital signal, and then perform signal processing such as downsampling, time domain synchronization, FFT (Fourier transform) windowing and FFT, channel estimation, frequency domain equalization, demodulation, decoding, etc. on the digital signal.

[0003] At present, while meeting the signal processing performance of the 802.11 OFDM wireless communication baseband chip, the area size of the 802.11 OFDM wireless communication baseband chip determines the competitiveness of the product. Generally speaking, the area size of the 802.11 OFDM wireless communication baseband chip is negatively correlated with the signal processing time of the 802.11 OFDM wireless communication baseband chip, that is, the larger the area of ​​the 802.11 OFDM wireless communication baseband chip, the shorter its signal processing time; conversely, the smaller the area of ​​the 802.11 OFDM wireless communication baseband chip, the longer its signal processing time. Therefore, the prior art urgently needs a method to ensure that the signal processing time (such as decoding time) is within the specified time while reducing the area size of the 802.11 OFDM wireless communication baseband chip. Summary of the invention

[0004] In view of this, the purpose of the present application is to provide a decoding method and a signal receiver, so as to ensure that the signal processing time (such as decoding time) is within the specified time while reducing the area size of the 802.11 OFDM wireless communication baseband chip.

[0005] In a first aspect, an embodiment of the present application provides a decoding method, which is applied to a signal receiver; the signal receiver includes a frequency domain processing unit and a decoder; the frequency domain processing unit includes a first memory, an equalization processing unit, and a second memory connected in sequence; the first memory is used to store Fourier transform results; the second memory is used to store equalization processing results; the method includes:

[0006] When receiving the first acquisition request sent by the decoder, the frequency domain processing unit acquires the corresponding equalization processing result from the second memory according to the first data acquisition amount carried in the first acquisition request, performs soft decision calculation on the acquired equalization processing result to obtain a soft decision result, and sends the obtained soft decision result to the decoder, so that the decoder performs decoding processing on the received soft decision result;

[0007] When there is free storage space in the second storage and the first storage is not empty, the frequency domain processing unit obtains a Fourier transform result from the first storage according to the size of the free storage space, performs equalization processing on the obtained Fourier transform result to obtain an equalization processing result, and stores the obtained equalization processing result in the second storage;

[0008] When the amount of data stored in the first memory is empty, the frequency domain processing unit obtains the Fourier transform result of the next OFDMSymbol, and stores the obtained Fourier transform result in the first memory.

[0009] In combination with the first aspect, an embodiment of the present application provides a first possible implementation of the first aspect, wherein the decoder includes a splicing unit, a third memory and a fourth memory in parallel, and a core decoding unit; the third memory and the fourth memory are both used to store splicing processing results; and the method further includes:

[0010] When the core decoding unit completes decoding the splicing processing result stored in the third memory, the core decoding unit obtains the splicing processing result from the fourth memory, continues to decode the newly obtained splicing processing result, and the decoder sends the first data acquisition amount to the frequency domain processing unit, so that the splicing unit receives the soft decision result sent by the frequency domain processing unit;

[0011] The splicing unit performs a preset splicing process on the received soft decision result to obtain a splicing process result, and stores the obtained splicing process result in the fourth memory;

[0012] When the core decoding unit completes decoding the splicing processing result stored in the fourth memory, the core decoding unit obtains the splicing processing result from the third memory, continues to decode the newly obtained splicing processing result, and the decoder sends the first data acquisition amount to the frequency domain processing unit, so that the splicing unit receives the soft decision result sent by the frequency domain processing unit;

[0013] The splicing unit performs a preset splicing process on the received soft decision result to obtain a splicing process result, and stores the obtained splicing process result in the third memory.

[0014] In combination with the first possible implementation of the first aspect, the embodiment of the present application provides a second possible implementation of the first aspect, wherein the splicing unit performs a preset splicing process on the received soft decision result to obtain a splicing process result, including:

[0015] The splicing unit repeatedly splices the received soft decision results according to a preset number of repeated splicing times to obtain a splicing processing result; wherein the preset number of repeated splicing times for different soft decision results is not completely the same;

[0016] or,

[0017] The splicing unit deletes the soft decision results corresponding to the preset puncturing positions in the received soft decision results according to the preset puncturing positions, and uses the remaining soft decision results as splicing processing results; wherein the puncturing positions preset for different soft decision results are not completely the same.

[0018] In combination with the first aspect, the embodiment of the present application provides a third possible implementation of the first aspect, wherein the signal receiver further includes a time domain processing unit and a Fourier transform unit; the time domain processing unit is used to transmit the digital signal to the Fourier transform unit; when the amount of data stored in the first memory is empty, the frequency domain processing unit obtains the Fourier transform result of the next OFDM Symbol, including:

[0019] When the amount of data stored in the first memory is empty, according to the storage space size of the first memory, the Fourier transform unit obtains the digital signal from the time domain processing unit, and performs Fourier transform on the obtained digital signal to obtain a Fourier transform result;

[0020] The frequency domain processing unit obtains the Fourier transform result of the next OFDM Symbol from the Fourier transform unit.

[0021] In combination with the first aspect, an embodiment of the present application provides a fourth possible implementation of the first aspect, wherein the frequency domain processing unit includes a computing resource; the frequency domain processing unit performs a soft decision calculation on the obtained equalization processing result to obtain a soft decision result, including:

[0022] The frequency domain processing unit uses the computing resources to perform soft decision calculation on the obtained equalization processing result to obtain a soft decision result within every two clock cycles;

[0023] The frequency domain processing unit performs equalization processing on the acquired Fourier transform result to obtain an equalization processing result, including:

[0024] The frequency domain processing unit uses the computing resources to perform equalization processing on the acquired Fourier transform result within every two clock cycles to obtain an equalization processing result.

[0025] In a second aspect, an embodiment of the present application further provides a signal receiver, the signal receiver comprising a frequency domain processing unit and a decoder; the frequency domain processing unit comprises a first memory, an equalization processing unit and a second memory connected in sequence; the first memory is used to store Fourier transform results; the second memory is used to store equalization processing results; the frequency domain processing unit is used to:

[0026] When receiving a first acquisition request sent by the decoder, according to the first data acquisition amount carried in the first acquisition request, the corresponding equalization processing result is acquired from the second memory, and a soft decision calculation is performed on the acquired equalization processing result to obtain a soft decision result, and the obtained soft decision result is sent to the decoder, so that the decoder performs decoding processing on the received soft decision result;

[0027] When there is free storage space in the second storage and the first storage is not empty, obtaining a Fourier transform result from the first storage according to the size of the free storage space, performing equalization processing on the obtained Fourier transform result to obtain an equalization processing result, and storing the obtained equalization processing result in the second storage;

[0028] When the amount of data stored in the first memory is empty, the Fourier transform result of the next OFDM Symbol is obtained, and the obtained Fourier transform result is stored in the first memory.

[0029] In combination with the second aspect, the embodiment of the present application provides a first possible implementation of the second aspect, wherein the decoder includes a splicing unit, a third memory and a fourth memory in parallel, and a core decoding unit; the third memory and the fourth memory are both used to store splicing processing results;

[0030] The core decoding unit is configured to obtain the splicing processing result from the fourth memory when the core decoding unit completes decoding the splicing processing result stored in the third memory, continue decoding the newly obtained splicing processing result, and the decoder sends the first data acquisition amount to the frequency domain processing unit, so that the splicing unit receives the soft decision result sent by the frequency domain processing unit;

[0031] The splicing unit is used to perform a preset splicing process on the received soft decision results to obtain a splicing process result, and store the obtained splicing process result in the fourth memory;

[0032] The core decoding unit is further configured to, when the core decoding unit completes decoding of the splicing processing result stored in the fourth memory, obtain the splicing processing result from the third memory, continue decoding the newly obtained splicing processing result, and the decoder sends the first data acquisition amount to the frequency domain processing unit, so that the splicing unit receives the soft decision result sent by the frequency domain processing unit;

[0033] The splicing unit is used to perform a preset splicing process on the received soft decision results to obtain a splicing process result, and store the obtained splicing process result in the third memory.

[0034] In combination with the second possible implementation of the second aspect, an embodiment of the present application provides a second possible implementation of the second aspect, wherein the splicing unit, when used to perform a preset splicing process on the received soft decision result to obtain a splicing process result, is specifically used to:

[0035] Repeating splicing the received soft decision results according to a preset number of repeated splicing times to obtain a splicing processing result; wherein the preset number of repeated splicing times for different soft decision results is not completely the same;

[0036] or,

[0037] According to the preset puncturing position, the soft decision results corresponding to the preset puncturing position in the received soft decision results are deleted, and the remaining soft decision results are used as the splicing processing results; wherein the preset puncturing positions for different soft decision results are not completely the same.

[0038] In combination with the second aspect, the embodiment of the present application provides a third possible implementation of the second aspect, wherein the signal receiver further includes a time domain processing unit and a Fourier transform unit; the time domain processing unit is used to transmit the digital signal to the Fourier transform unit; the frequency domain processing unit is used to obtain the Fourier transform result of the next OFDM Symbol when the amount of data stored in the first memory is empty, specifically used to:

[0039] When the amount of data stored in the first memory is empty, according to the storage space size of the first memory, the Fourier transform unit obtains the digital signal from the time domain processing unit, and performs Fourier transform on the obtained digital signal to obtain a Fourier transform result;

[0040] The Fourier transform result of the next OFDM Symbol is obtained from the Fourier transform unit.

[0041] In combination with the second aspect, an embodiment of the present application provides a fourth possible implementation of the second aspect, wherein the frequency domain processing unit includes a computing resource; when the frequency domain processing unit is used to perform a soft decision calculation on the obtained equalization processing result to obtain a soft decision result, it is specifically used to:

[0042] In every two clock cycles, using the computing resources to perform soft decision calculation on the obtained equalization processing result to obtain a soft decision result;

[0043] When the frequency domain processing unit is used to perform equalization processing on the acquired Fourier transform result to obtain the equalization processing result, it is specifically used to:

[0044] In every two clock cycles, the computing resources are used to perform equalization processing on the acquired Fourier transform results to obtain equalization processing results.

[0045] A decoding method and a signal receiver provided in an embodiment of the present application, since a storage structure of a first memory and a second memory is added to a frequency domain processing unit, as long as there is free storage space in the second memory and the first memory is not empty, the frequency domain processing unit will obtain a corresponding number of Fourier transform results from the first memory, thereby speeding up the output of the Fourier transform results stored in the first memory, and further ensuring that the frequency domain processing unit completes an OFDM Symbol processing time in accordance with the WIFI protocol requirements.

[0046] In order to make the above-mentioned objects, features and advantages of the present application more obvious and easy to understand, preferred embodiments are specifically cited below and described in detail with reference to the attached drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0048] Figure 1 A schematic diagram of the structure of an 802.11 OFDM wireless communication baseband chip provided in an embodiment of the present application is shown;

[0049] Figure 2A schematic diagram showing a corresponding relationship between a processing time of a frequency domain processing unit and the number of computing resources provided in an embodiment of the present application;

[0050] Figure 3 A schematic diagram showing a corresponding relationship between the processing time and the number of computing resources of another frequency domain processing unit provided in an embodiment of the present application;

[0051] Figure 4 A schematic diagram of the structure of a signal receiver provided in an embodiment of the present application is shown;

[0052] Figure 5 A schematic structural diagram of a second signal receiver provided in an embodiment of the present application is shown. DETAILED DESCRIPTION

[0053] To make the purpose, technical scheme and advantages of the embodiments of the present application clearer, the technical scheme in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments. The components of the embodiments of the present application generally described and shown in the drawings here can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the application claimed for protection, but merely represents the selected embodiments of the present application. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without making creative work belong to the scope of protection of the present application.

[0054] like Figure 1 As shown, the 802.11 OFDM wireless communication baseband chip includes a time domain processing unit, a Fourier transform unit, a frequency domain processing unit, and an LDPC (Low Density Parity Check Code) decoder. The time domain processing unit is used to complete signal synchronization, and after synchronization, the digital signal is transmitted to the Fourier transform unit; the Fourier transform unit is used to perform Fourier transform on the digital signal to obtain the Fourier transform result; the frequency domain processing unit is used to perform equalization processing on the Fourier transform result to obtain the equalization processing result, and then perform soft decision calculation on the equalization processing result to obtain the soft decision result; the LDPC decoder is used to decode the soft decision result.

[0055] Among them, the area of ​​the frequency domain processing unit is positively correlated with the area of ​​the 802.11 OFDM wireless communication baseband chip. That is, the larger the area of ​​the frequency domain processing unit, the larger the 802.11 OFDM wireless communication baseband chip; the smaller the area of ​​the frequency domain processing unit, the smaller the 802.11 OFDM wireless communication baseband chip.

[0056] In this embodiment, the size of the area of ​​the frequency domain processing unit is determined by the number of computing resources (i.e., data processing hardware resources) in the frequency domain processing unit. The more computing resources there are in the frequency domain processing unit, the larger the area of ​​the frequency domain processing unit, and the shorter the processing time of the Fourier transform result. Conversely, the fewer computing resources there are in the frequency domain processing unit, the smaller the area of ​​the frequency domain processing unit, and the longer the processing time of the Fourier transform result.

[0057] For example, Figure 2 As shown in FIG. 1 , when there are two computing resources (computing resource 1 and computing resource 2) in the frequency domain processing unit, four Fourier transform results (i.e., FFT results, respectively) can be processed at four clock rising edges. Figure 2 Specifically, at each rising edge of the clock, the frequency domain processing unit receives a Fourier transform result (i.e., FFT result), and at each rising edge of the clock, uses computing resource 1 and computing resource 2 to process the received Fourier transform result. Figure 2 As shown, for each Fourier transform result, it is necessary to use both computing resource 1 and computing resource 2 in the frequency domain processing unit to process the Fourier transform result. At this time, although each rising edge of the clock can process a Fourier transform result, since two computing resources are set in the frequency domain processing unit, the area of ​​the frequency domain processing unit will be increased.

[0058] If the area of ​​the frequency domain processing unit is reduced, the processing time of the frequency domain processing unit will be prolonged. Specifically, Figure 3 As shown in FIG. 1 , when there is only one computing resource (i.e., computing resource 1) in the frequency domain processing unit, only two Fourier transform results (i.e., FFT results, respectively) can be processed at the four clock rising edges. Figure 3 Specifically, the frequency domain processing unit receives a Fourier transform result at every two clock rising edges, and then uses the computing resource 1 to process the Fourier transform result at these two clock rising edges. In this way, although the number of computing resources in the frequency domain processing unit is reduced, thereby reducing the area of ​​the frequency domain processing unit, it will cause the frequency domain processing unit to process each Fourier transform result for a longer time (that is, it becomes twice as long as before).

[0059] In view of the above problems, based on this, an embodiment of the present application provides a decoding method and a signal receiver, so as to reduce the area of ​​the frequency domain processing unit by reducing the number of computing resources in the frequency domain processing unit (for example, only one computing resource is set in the frequency domain processing unit), while ensuring that the processing time of the Fourier transform result by the frequency domain processing unit is within the specified time, which is described through an embodiment below.

[0060] To facilitate understanding of this embodiment, a decoding method disclosed in an embodiment of this application is first described in detail. Figure 4 As shown, the method is applied to a signal receiver; the signal receiver includes a frequency domain processing unit and a decoder; the frequency domain processing unit includes a first memory, an equalization processing unit and a second memory connected in sequence; the first memory is used to store Fourier transform results; the second memory is used to store equalization processing results.

[0061] In this embodiment, the ‌802.11 OFDM system generally includes a signal transmitting end (i.e., a signal transmitter) and a signal receiving end (i.e., a signal receiver). The 802.11 OFDM wireless communication baseband chip serves as a signal receiving end (i.e., a signal receiver) in the ‌802.11 OFDM system. The signal receiver includes a time domain processing unit, a Fourier transform unit, a frequency domain processing unit, and a decoder connected in sequence. The decoder may specifically be an LDPC (Low Density Parity Check Code) decoder. The time domain processing unit is used to complete signal synchronization, and after synchronization, transmits the digital signal to the Fourier transform unit; the Fourier transform unit is used to perform Fourier transform on the digital signal to obtain a Fourier transform result;

[0062] In this embodiment, the frequency domain processing unit specifically includes a first memory, an equalization processing unit, a second memory, and a soft decision calculation unit connected in sequence. The first memory is used to store the Fourier transform result; the equalization processing unit is used to perform equalization processing on the Fourier transform result to obtain the equalization processing result; the second memory is used to store the equalization processing result; the soft decision calculation unit is used to perform soft decision (Log Likelihood Ratio, LLR) calculation on the equalization processing result to obtain the soft decision result. The decoder is used to decode the soft decision result.

[0063] The method comprises the following steps:

[0064] S101: When the frequency domain processing unit receives the first acquisition request sent by the decoder, it obtains the corresponding equalization processing result from the second memory according to the first data acquisition amount carried in the first acquisition request, and performs soft decision calculation on the obtained equalization processing result to obtain a soft decision result, and sends the obtained soft decision result to the decoder, so that the decoder decodes the received soft decision result.

[0065] In this embodiment, the first acquisition request carries a first data acquisition amount, and the first data acquisition amount is used to represent the amount of data that the decoder currently needs to process.

[0066] S102: When there is free storage space in the second memory and the first memory is not empty, the frequency domain processing unit obtains the Fourier transform result from the first memory according to the size of the free storage space, uses the equalization processing unit to perform equalization processing on the obtained Fourier transform result, obtains the equalization processing result, and stores the obtained equalization processing result in the second memory.

[0067] In this embodiment, after the frequency domain processing unit obtains the corresponding equalization processing result from the second memory, the obtained equalization processing result will be released from the second memory. At this time, there will be free storage space in the second memory.

[0068] When there is free storage space in the second memory, the frequency domain processing unit obtains a corresponding number of Fourier transform results from the first memory in a timely manner according to the size of the free storage space, and then uses the equalization processing unit to perform equalization processing on the obtained Fourier transform results to obtain the equalization processing results, and stores the obtained equalization processing results in the second memory. At this time, the second memory will be full and there will be no free storage space.

[0069] S103: When the amount of data stored in the first memory is empty, the frequency domain processing unit obtains the Fourier transform result of the next OFDMSymbol, and stores the obtained Fourier transform result in the first memory.

[0070] That is to say, in the present application, as long as there is free storage space in the second memory and the first memory is not empty, the frequency domain processing unit will obtain a corresponding number of Fourier transform results from the first memory, and release the Fourier transform results obtained from the first memory from the first memory, thereby speeding up the release of space in the first memory.

[0071] In this embodiment, when the amount of data stored in the first memory is empty, it means that the Fourier transform results currently stored in the first memory are all acquired by the frequency domain processing unit. At this time, after the Fourier transform unit input is completed, the frequency domain processing unit will store the Fourier transform results in the first memory. Specifically, according to the storage space size of the first memory, the Fourier transform unit acquires the digital signal from the time domain processing unit, and performs Fourier transform on the acquired digital signal to obtain the Fourier transform result; the frequency domain processing unit acquires the Fourier transform result of the next OFDM Symbol from the Fourier transform unit, and then stores the obtained Fourier transform result in the first memory.

[0072] Among them, OFDM Symbol can be understood as a unit of measurement for capacity.

[0073] In a possible implementation, Figure 5As shown, the decoder includes a splicing unit, a third memory and a fourth memory in parallel, and a core decoding unit; the third memory and the fourth memory are both used to store the splicing processing results. The method also includes:

[0074] S1041: When the core decoding unit completes decoding the splicing processing result stored in the third memory, the core decoding unit obtains the splicing processing result from the fourth memory, continues to decode the newly obtained splicing processing result, and the decoder sends the first data acquisition amount to the frequency domain processing unit so that the splicing unit receives the soft decision result sent by the frequency domain processing unit.

[0075] In this embodiment, the splicing processing results stored in the third memory and the fourth memory are obtained by obtaining the equalization processing results from the second memory through a soft decision calculation unit, performing soft decision calculation on the obtained equalization processing results to obtain soft decision results, and then performing preset splicing processing on the soft decision results through the splicing unit.

[0076] In this embodiment, when the core decoding unit completes decoding the splicing processing result obtained from the third memory, the core decoding unit will then obtain the splicing processing result stored in the fourth memory from the fourth memory, and continue to decode the newly obtained splicing processing result.

[0077] When the core decoding unit obtains the splicing processing result from the fourth memory, the storage space corresponding to the splicing processing result obtained in the fourth memory will be released, that is, no data is stored in the fourth memory at this time. At this time, the decoder will send the first data acquisition amount to the frequency domain processing unit, so that the decision calculation unit in the frequency domain processing unit obtains the equalization processing result from the second memory, and performs soft decision calculation on the obtained equalization processing result to obtain a soft decision result, and then sends the obtained soft decision result to the splicing unit.

[0078] S1042: The splicing unit performs a preset splicing process on the received soft decision result to obtain a splicing process result, and stores the obtained splicing process result in a fourth memory.

[0079] At this time, the fourth memory stores a new splicing result for subsequent decoding by the core decoder.

[0080] S1043: When the core decoding unit completes decoding the splicing processing result stored in the fourth memory, the core decoding unit obtains the splicing processing result from the third memory, continues to decode the newly obtained splicing processing result, and the decoder sends the first data acquisition amount to the frequency domain processing unit so that the splicing unit receives the soft decision result sent by the frequency domain processing unit.

[0081] In this embodiment, when the core decoding unit completes decoding the splicing processing result obtained from the fourth memory, the core decoding unit will then obtain the splicing processing result stored in the third memory from the third memory, and continue to decode the newly obtained splicing processing result.

[0082] When the core decoding unit obtains the splicing processing result from the third memory, the storage space corresponding to the splicing processing result obtained from the third memory will be released, that is, no data is stored in the third memory at this time. At this time, the decoder will send the first data acquisition amount to the frequency domain processing unit, so that the decision calculation unit in the frequency domain processing unit obtains the equalization processing result from the second memory, and performs soft decision calculation on the obtained equalization processing result to obtain a soft decision result, and then sends the obtained soft decision result to the splicing unit.

[0083] S1044: The splicing unit performs a preset splicing process on the received soft decision result to obtain a splicing process result, and stores the obtained splicing process result in a third memory.

[0084] At this time, the third memory stores a new splicing result for subsequent decoding by the core decoder.

[0085] In a possible implementation manner, when the splicing unit in step S1042 and step S1044 performs a preset splicing process on the received soft decision result to obtain the splicing process result, the following steps may be specifically performed:

[0086] The splicing unit repeatedly splices the received soft decision results according to a preset number of repeated splicing times to obtain a splicing processing result; wherein the preset number of repeated splicing times for different soft decision results is not completely the same;

[0087] or,

[0088] The splicing unit deletes the soft decision results corresponding to the preset puncturing positions in the received soft decision results according to the preset puncturing positions, and uses the remaining soft decision results as the splicing processing results; wherein the preset puncturing positions for different soft decision results are not completely the same.

[0089] In this embodiment, the number of repeated splicing times preset for different soft decision results is not exactly the same, which means, for example, when repeated splicing is performed for the soft decision result received last time, the splicing is repeated 3 times; when repeated splicing is performed for the soft decision result received this time, the splicing is repeated 5 times; when repeated splicing is performed for the soft decision result received next time, the splicing is repeated 3 times.

[0090] In this embodiment, the soft decision result includes multiple data, and the puncturing position refers to the number of bits of each data in the soft decision result. For example, when the preset puncturing position is 1, the first data included in the received soft decision result is deleted from the soft decision result, and then the remaining data in the soft decision result is used as the splicing processing result.

[0091] The preset puncture positions for different soft decision results are not exactly the same, which means that the preset puncture position corresponding to the soft decision result received last time may be 1, the preset puncture position corresponding to the soft decision result received this time may be 3, and the preset puncture position corresponding to the soft decision result received next time may also be 3.

[0092] In a possible implementation manner, the frequency domain processing unit includes a computing resource; the frequency domain processing unit performs soft decision calculation on the obtained equalization processing result to obtain a soft decision result, including:

[0093] The frequency domain processing unit uses computing resources to perform soft decision calculation on the obtained equalization processing result in every two clock cycles to obtain a soft decision result;

[0094] The frequency domain processing unit performs equalization processing on the obtained Fourier transform result to obtain an equalization processing result, including:

[0095] The frequency domain processing unit uses computing resources to perform equalization processing on the acquired Fourier transform results within every two clock cycles to obtain an equalization processing result.

[0096] Based on the same technical concept, the embodiment of the present application also provides a signal receiver, such as Figure 4 As shown, the signal receiver includes a frequency domain processing unit and a decoder; the frequency domain processing unit includes a first memory, an equalization processing unit and a second memory connected in sequence; the first memory is used to store Fourier transform results; the second memory is used to store equalization processing results; the frequency domain processing unit is used to:

[0097] When receiving a first acquisition request sent by the decoder, according to the first data acquisition amount carried in the first acquisition request, the corresponding equalization processing result is acquired from the second memory, and a soft decision calculation is performed on the acquired equalization processing result to obtain a soft decision result, and the obtained soft decision result is sent to the decoder, so that the decoder performs decoding processing on the received soft decision result;

[0098] When there is free storage space in the second storage and the first storage is not empty, obtaining a Fourier transform result from the first storage according to the size of the free storage space, performing equalization processing on the obtained Fourier transform result to obtain an equalization processing result, and storing the obtained equalization processing result in the second storage;

[0099] When the amount of data stored in the first memory is empty, the Fourier transform result of the next OFDM Symbol is obtained, and the obtained Fourier transform result is stored in the first memory.

[0100] Optionally, the decoder comprises a splicing unit, a third memory and a fourth memory in parallel, and a core decoding unit; the third memory and the fourth memory are both used to store the splicing processing result;

[0101] The core decoding unit is configured to obtain the splicing processing result from the fourth memory when the core decoding unit completes decoding the splicing processing result stored in the third memory, continue decoding the newly obtained splicing processing result, and the decoder sends the first data acquisition amount to the frequency domain processing unit, so that the splicing unit receives the soft decision result sent by the frequency domain processing unit;

[0102] The splicing unit is used to perform a preset splicing process on the received soft decision results to obtain a splicing process result, and store the obtained splicing process result in the fourth memory;

[0103] The core decoding unit is further configured to, when the core decoding unit completes decoding of the splicing processing result stored in the fourth memory, obtain the splicing processing result from the third memory, continue decoding the newly obtained splicing processing result, and the decoder sends the first data acquisition amount to the frequency domain processing unit, so that the splicing unit receives the soft decision result sent by the frequency domain processing unit;

[0104] The splicing unit is used to perform a preset splicing process on the received soft decision results to obtain a splicing process result, and store the obtained splicing process result in the third memory.

[0105] Optionally, when the splicing unit is used to perform a preset splicing process on the received soft decision result to obtain a splicing process result, it is specifically used to:

[0106] Repeating splicing the received soft decision results according to a preset number of repeated splicing times to obtain a splicing processing result; wherein the preset number of repeated splicing times for different soft decision results is not completely the same;

[0107] or,

[0108] According to the preset puncturing position, the soft decision results corresponding to the preset puncturing position in the received soft decision results are deleted, and the remaining soft decision results are used as the splicing processing results; wherein the preset puncturing positions for different soft decision results are not completely the same.

[0109] Optionally, the signal receiver further includes a time domain processing unit and a Fourier transform unit; the time domain processing unit is used to transmit the digital signal to the Fourier transform unit; when the amount of data stored in the first memory is empty, the frequency domain processing unit is used to obtain the Fourier transform result of the next OFDM Symbol, specifically for:

[0110] When the amount of data stored in the first memory is empty, according to the storage space size of the first memory, the Fourier transform unit obtains the digital signal from the time domain processing unit, and performs Fourier transform on the obtained digital signal to obtain a Fourier transform result;

[0111] The Fourier transform result of the next OFDM Symbol is obtained from the Fourier transform unit.

[0112] Optionally, the frequency domain processing unit includes a computing resource; when the frequency domain processing unit is used to perform soft decision calculation on the obtained equalization processing result to obtain a soft decision result, it is specifically used to:

[0113] In every two clock cycles, using the computing resources to perform soft decision calculation on the obtained equalization processing result to obtain a soft decision result;

[0114] When the frequency domain processing unit is used to perform equalization processing on the acquired Fourier transform result to obtain the equalization processing result, it is specifically used to:

[0115] In every two clock cycles, the computing resources are used to perform equalization processing on the acquired Fourier transform results to obtain equalization processing results.

[0116] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working process of the signal receiver described above can refer to the corresponding process in the aforementioned method embodiment, and will not be repeated here.

[0117] In the several embodiments provided in the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are merely schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some communication interfaces, and the indirect coupling or communication connection of devices or units can be electrical, mechanical or other forms.

[0118] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0119] Finally, it should be noted that the above-described embodiments are only specific implementation methods of the present application, which are used to illustrate the technical solutions of the present application, rather than to limit them. The protection scope of the present application is not limited thereto. Although the present application is described in detail with reference to the above-described embodiments, ordinary technicians in the field should understand that any technician familiar with the technical field can still modify the technical solutions recorded in the above-described embodiments within the technical scope disclosed in the present application, or can easily think of changes, or make equivalent replacements for some of the technical features therein; and these modifications, changes or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application, and should be included in the protection scope of the present application. Therefore, the protection scope of the present application shall be based on the protection scope of the claims.

Claims

1. A decoding method, characterized in that: The method is applied to a signal receiver; the signal receiver comprises a frequency domain processing unit and a decoder; the frequency domain processing unit comprises a first memory, an equalization processing unit and a second memory connected in sequence; The first memory is used to store Fourier transform results; The second memory is used to store the equalization processing result; the method comprises: When receiving the first acquisition request sent by the decoder, the frequency domain processing unit acquires the corresponding equalization processing result from the second memory according to the first data acquisition amount carried in the first acquisition request, performs soft decision calculation on the acquired equalization processing result to obtain a soft decision result, and sends the obtained soft decision result to the decoder, so that the decoder performs decoding processing on the received soft decision result; When there is free storage space in the second memory and the first memory is not empty, the frequency domain processing unit obtains the Fourier transform result from the first memory according to the size of the free storage space, uses the equalization processing unit to perform equalization processing on the obtained Fourier transform result to obtain an equalization processing result, and stores the obtained equalization processing result in the second memory; When the amount of data stored in the first memory is empty, the frequency domain processing unit obtains the Fourier transform result of the next OFDMSymbol, and stores the obtained Fourier transform result in the first memory; The decoder comprises a splicing unit, a third memory and a fourth memory in parallel, and a core decoding unit; the third memory and the fourth memory are both used to store splicing processing results; the method further comprises: When the core decoding unit completes decoding the splicing processing result stored in the third memory, the core decoding unit obtains the splicing processing result from the fourth memory, continues to decode the newly obtained splicing processing result, and the decoder sends the first data acquisition amount to the frequency domain processing unit, so that the splicing unit receives the soft decision result sent by the frequency domain processing unit; The splicing unit performs a preset splicing process on the received soft decision result to obtain a splicing process result, and stores the obtained splicing process result in the fourth memory; When the core decoding unit completes decoding the splicing processing result stored in the fourth memory, the core decoding unit obtains the splicing processing result from the third memory, continues to decode the newly obtained splicing processing result, and the decoder sends the first data acquisition amount to the frequency domain processing unit, so that the splicing unit receives the soft decision result sent by the frequency domain processing unit; The splicing unit performs a preset splicing process on the received soft decision result to obtain a splicing process result, and stores the obtained splicing process result in the third memory.

2. The method according to claim 1, characterized in that: The splicing unit performs a preset splicing process on the received soft decision result to obtain a splicing process result, including: The splicing unit repeatedly splices the received soft decision results according to a preset number of repeated splicing times to obtain a splicing processing result; wherein the preset number of repeated splicing times for different soft decision results is not completely the same; or, The splicing unit deletes the soft decision results corresponding to the preset puncturing positions in the received soft decision results according to the preset puncturing positions, and uses the remaining soft decision results as splicing processing results; wherein the puncturing positions preset for different soft decision results are not completely the same.

3. The method according to claim 1, characterized in that: The signal receiver further includes a time domain processing unit and a Fourier transform unit; the time domain processing unit is used to transmit the digital signal to the Fourier transform unit; when the amount of data stored in the first memory is empty, the frequency domain processing unit obtains the Fourier transform result of the next OFDM Symbol, including: When the amount of data stored in the first memory is empty, according to the storage space size of the first memory, the Fourier transform unit obtains the digital signal from the time domain processing unit, and performs Fourier transform on the obtained digital signal to obtain a Fourier transform result; The frequency domain processing unit obtains the Fourier transform result of the next OFDM Symbol from the Fourier transform unit.

4. The method according to claim 1, characterized in that: The frequency domain processing unit includes a computing resource; the frequency domain processing unit performs soft decision calculation on the obtained equalization processing result to obtain a soft decision result, including: The frequency domain processing unit uses the computing resources to perform soft decision calculation on the obtained equalization processing result to obtain a soft decision result within every two clock cycles; The frequency domain processing unit performs equalization processing on the acquired Fourier transform result to obtain an equalization processing result, including: The frequency domain processing unit uses the computing resources to perform equalization processing on the acquired Fourier transform result within every two clock cycles to obtain an equalization processing result.

5. A signal receiver, characterized in that: The signal receiver includes a frequency domain processing unit and a decoder; the frequency domain processing unit includes a first memory, an equalization processing unit and a second memory connected in sequence; the first memory is used to store Fourier transform results; the second memory is used to store equalization processing results; the frequency domain processing unit is used to: When receiving a first acquisition request sent by the decoder, according to the first data acquisition amount carried in the first acquisition request, the corresponding equalization processing result is acquired from the second memory, and a soft decision calculation is performed on the acquired equalization processing result to obtain a soft decision result, and the obtained soft decision result is sent to the decoder, so that the decoder performs decoding processing on the received soft decision result; When there is free storage space in the second storage and the first storage is not empty, obtaining a Fourier transform result from the first storage according to the size of the free storage space, performing equalization processing on the obtained Fourier transform result to obtain an equalization processing result, and storing the obtained equalization processing result in the second storage; When the amount of data stored in the first memory is empty, obtaining a Fourier transform result of a next OFDM Symbol, and storing the obtained Fourier transform result in the first memory; The decoder comprises a splicing unit, a third memory and a fourth memory in parallel, and a core decoding unit; the third memory and the fourth memory are both used to store splicing processing results; The core decoding unit is configured to obtain the splicing processing result from the fourth memory when the core decoding unit completes decoding the splicing processing result stored in the third memory, continue decoding the newly obtained splicing processing result, and the decoder sends the first data acquisition amount to the frequency domain processing unit, so that the splicing unit receives the soft decision result sent by the frequency domain processing unit; The splicing unit is used to perform a preset splicing process on the received soft decision results to obtain a splicing process result, and store the obtained splicing process result in the fourth memory; The core decoding unit is further configured to, when the core decoding unit completes decoding of the splicing processing result stored in the fourth memory, obtain the splicing processing result from the third memory, continue decoding the newly obtained splicing processing result, and the decoder sends the first data acquisition amount to the frequency domain processing unit, so that the splicing unit receives the soft decision result sent by the frequency domain processing unit; The splicing unit is used to perform a preset splicing process on the received soft decision results to obtain a splicing process result, and store the obtained splicing process result in the third memory.

6. The signal receiver according to claim 5, characterized in that: When the splicing unit is used to perform a preset splicing process on the received soft decision result to obtain a splicing process result, it is specifically used to: Repeating splicing the received soft decision results according to a preset number of repeated splicing times to obtain a splicing processing result; wherein the preset number of repeated splicing times for different soft decision results is not completely the same; or, According to the preset puncturing position, the soft decision results corresponding to the preset puncturing position in the received soft decision results are deleted, and the remaining soft decision results are used as the splicing processing results; wherein the preset puncturing positions for different soft decision results are not completely the same.

7. The signal receiver according to claim 5, characterized in that: The signal receiver further includes a time domain processing unit and a Fourier transform unit; the time domain processing unit is used to transmit the digital signal to the Fourier transform unit; when the amount of data stored in the first memory is empty, the frequency domain processing unit is used to obtain the Fourier transform result of the next OFDM Symbol, specifically for: When the amount of data stored in the first memory is empty, according to the storage space size of the first memory, the Fourier transform unit obtains the digital signal from the time domain processing unit, and performs Fourier transform on the obtained digital signal to obtain a Fourier transform result; The Fourier transform result of the next OFDM Symbol is obtained from the Fourier transform unit.

8. The signal receiver according to claim 5, characterized in that: The frequency domain processing unit includes a computing resource; when the frequency domain processing unit is used to perform soft decision calculation on the obtained equalization processing result to obtain a soft decision result, it is specifically used to: In every two clock cycles, using the computing resources to perform soft decision calculation on the obtained equalization processing result to obtain a soft decision result; When the frequency domain processing unit is used to perform equalization processing on the acquired Fourier transform result to obtain the equalization processing result, it is specifically used to: In every two clock cycles, the computing resources are used to perform equalization processing on the acquired Fourier transform results to obtain equalization processing results.

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