Simulation test method and related device

Abstract

The invention provides a simulation test method and a related device. The simulation test method comprises the steps that an integrated simulation model is received, and the integrated simulation model comprises a simulation model of a controlled object and a simulation model of an input and output IO interface in hardware-in-loop HIL test equipment; first information is received, the first information indicates configuration information of the IO interface, and the configuration information of the IO interface is borne by a simulation model of the IO interface; and outputting the first model file, the first configuration file and the second configuration file for the HIL simulation test. According to the simulation test method provided by the invention, the HIL simulation test efficiency can be improved, and the simulation test cost can be reduced.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of testing, and in particular to simulation testing methods and related devices. Background Art

[0002] In the development process of some electronic control units such as automobiles and aerospace, it is usually necessary to continuously test each developed electronic control unit to understand the performance of the electronic control unit.

[0003] Hardware in the loop (HIL) simulation test is a test method that simulates the operating state of the controlled object through HIL test equipment, and communicates with the electronic control unit under test through the input and output (IO) interface in the HIL test equipment, so that the electronic control unit can run in a simulated environment to achieve functional testing of the electronic control unit.

[0004] However, when using HIL test equipment for simulation testing, there are problems such as low HIL simulation test efficiency and high test cost. Summary of the invention

[0005] The present application provides a simulation test method and related devices to improve HIL test efficiency and reduce the cost of HIL testing.

[0006] In a first aspect, the present application provides a simulation test method, comprising: receiving an integrated simulation model, the integrated simulation model comprising a simulation model of a controlled object and a simulation model of an input and output IO interface in a hardware-in-the-loop (HIL) test device; receiving first information, the first information indicating configuration information of the IO interface, the configuration information of the IO interface being carried by the simulation model of the IO interface; outputting a first model file, a first configuration file, and a second configuration file, wherein the first model file, the first configuration file, and the second configuration file are used for HIL simulation testing, the first model file is a model file derived based on the simulation model of the controlled object and can be recognized by the HIL test device, the first configuration file is a configuration file derived based on the configuration information of the IO interface and can be recognized by the HIL test device, and the second configuration file is a configuration file derived based on the connection relationship between the simulation model of the controlled object and the simulation model of the IO interface and can be recognized by the HIL test device.

[0007] Specifically, the simulation test method can be executed by the same test device (specifically the same physical modeling software).

[0008] Through this simulation test method, the tester can complete the integration of the simulation module of the controlled object and the simulation model of the IO interface in the same physical modeling software, and complete the configuration of the IO interface in the physical modeling software. It can be understood that compared with the current method in which the tester first builds a simulation model of the controlled object in the physical modeling software, and then imports the simulation model of the controlled object into the first software with the simulation model of the IO interface to build an integrated simulation model, this method can improve the efficiency of the tester in building the integrated simulation model, thereby improving the efficiency of the HIL simulation test.

[0009] On the other hand, since there is no need to download the first software additionally, the cost of performing the HIL simulation test is also reduced.

[0010] On the other hand, in the simulation test method, since the configuration information of the IO interface is carried by the simulation model of the IO interface, there is no need to configure the IO interface through the host computer software of a specific HIL test device, thereby improving flexibility.

[0011] In combination with the first aspect, in a possible implementation, the method also includes: simulating and verifying the configuration information of the IO interface; outputting a first model file, a first configuration file, and a second configuration file, including: when the simulation and verification of the configuration information of the IO interface is successful, outputting the first model file, the first configuration file, and the second configuration file.

[0012] In this implementation, since the configuration information of the IO interface is carried by the simulation model of the IO interface, and the configuration information of the IO interface is simulated and verified by the simulation method, and only when the simulation verification is successful, the first model file, the first configuration file, and the second configuration file are output for HIL simulation testing, the success rate of the HIL simulation test is improved. In addition, it should be understood that this method also reduces the occupation of HIL hardware by simulation verification, thereby further reducing the cost of HIL simulation testing.

[0013] In combination with the first aspect, in a possible implementation method, the simulation verification of the configuration information of the IO interface includes: receiving a first interface excitation model, the first interface excitation model is used to output a first electrical value; verifying whether the configuration information of the IO interface is correct according to whether the difference between the first electrical value and the second electrical value is within a first error range; wherein the second electrical value is the electrical value output by the simulation model of the IO interface after the first electrical value is input into the simulation model of the IO interface.

[0014] Exemplarily, the electrical value is in the form of a digital signal or an analog signal, including any one of the following: resistance, voltage, current, pulse width modulation PWM, digital input DI, and digital output DO.

[0015] In a specific implementation, when the difference between the first electrical value output by the first interface excitation model and the second electrical value output by the simulation model of the IO interface is within the first error range, the simulation verification of the configuration information of the IO interface is considered to be successful. Otherwise, when the difference between the first electrical value output by the first interface excitation model and the second electrical value output by the simulation model of the IO interface is not within the first error range, the simulation verification of the configuration information of the IO interface is considered to have failed.

[0016] In combination with the first aspect, in a possible implementation method, the configuration information of the IO interface is simulated and verified, including: receiving a second interface excitation model, the second interface excitation model is used to output a third electrical value and a first physical value; verifying whether the configuration information of the IO interface is correct according to whether the difference between the first physical value and the second physical value is within a second error range; wherein the second physical value is a physical value output by the simulation model of the controlled object after the fourth electrical value is input into the simulation model of the controlled object, and the fourth electrical value is an electrical value output by the simulation model of the IO interface after the third electrical value is input into the simulation model of the IO interface.

[0017] Exemplarily, the form of the physical value includes any one of the following: temperature value, displacement, torque.

[0018] In a specific implementation, when the difference between the first physical value output by the second interface excitation model and the second physical value output by the simulation model of the controlled object is within the second error range, the simulation verification of the configuration information of the IO interface is considered to be successful. Otherwise, when the difference between the first physical value output by the second interface excitation model and the second physical value output by the simulation model of the IO interface is not within the second error range, the simulation verification of the configuration information of the IO interface is considered to have failed.

[0019] Optionally, the first interface excitation model is the same as the second interface excitation model, and the first electrical value is the same as the third electrical value.

[0020] In combination with the first aspect, in a possible implementation method, if the configuration information of the verified IO interface is incorrect, the method also includes: receiving second information, the second information is used to adjust the configuration information of the IO interface; wherein, the configuration information of the IO interface is simulated and verified, including: simulating and verifying the configuration information of the adjusted IO interface.

[0021] That is to say, after the IO interface is configured, if the configuration information of the IO interface fails in simulation verification, the configuration information of the IO interface is reconfigured until the simulation verification succeeds.

[0022] In a second aspect, the present application provides a simulation test device, comprising: a modeling and simulation module, used to receive an integrated simulation model, the integrated simulation model including a simulation model of a controlled object and a simulation model of an input and output IO interface in a hardware-in-the-loop HIL test device; the modeling and simulation module, also used to receive first information, the first information indicating configuration information of the IO interface, the configuration information of the IO interface being carried by the simulation model of the IO interface; the modeling and simulation module, also used to derive a first model file that can be recognized by the HIL test device based on the simulation model of the controlled object; a configuration file generation module, used to derive a first configuration file that can be recognized by the HIL test device based on the configuration information of the IO interface; a connection relationship generation module, used to derive a second configuration file that can be recognized by the HIL test device based on the connection relationship between the simulation model of the controlled object and the simulation model of the IO interface; wherein the first model file, the first configuration file and the second configuration file are used for HIL simulation testing.

[0023] In combination with the second aspect, in a possible implementation method, the modeling and simulation module is also used to simulate and verify the configuration information of the IO interface; wherein, when the simulation and verification of the configuration information of the IO interface is successful, the modeling and simulation module outputs a first model file, the configuration file generation module outputs a first configuration file, and the connection relationship generation module outputs a second configuration file.

[0024] In combination with the second aspect, in a possible implementation method, the modeling and simulation module is specifically used to: receive a first interface excitation model, which is used to output a first electrical value; verify whether the configuration information of the IO interface is correct based on whether the difference between the first electrical value and the second electrical value is within a first error range; wherein the second electrical value is the electrical value output by the simulation model of the IO interface after the first electrical value is input into the simulation model of the IO interface.

[0025] In combination with the second aspect, in a possible implementation, the electrical value is in the form of a digital signal or an analog signal, including any one of the following: resistance, voltage, current, pulse width modulation PWM, digital input DI, and digital output DO.

[0026] In combination with the second aspect, in a possible implementation method, the modeling and simulation module is specifically used to: receive a second interface excitation model, the second interface excitation model is used to output a third electrical value and a first physical value; verify whether the configuration information of the IO interface is correct according to whether the difference between the first physical value and the second physical value is within a second error range; wherein the second physical value is the physical value output by the simulation model of the controlled object after the fourth electrical value is input into the simulation model of the controlled object, and the fourth electrical value is the electrical value output by the simulation model of the IO interface after the third electrical value is input into the simulation model of the IO interface.

[0027] In conjunction with the second aspect, in a possible implementation manner, the form of the physical value includes any one of the following: temperature value, displacement, torque.

[0028] In combination with the second aspect, in a possible implementation manner, the first interface excitation model is the same as the second interface excitation model, and the first electrical value is the same as the third electrical value.

[0029] In combination with the second aspect, in a possible implementation, if the configuration information of the verified IO interface is incorrect, the modeling and simulation module is also used to: receive second information, the second information is used to adjust the configuration information of the IO interface; and simulate and verify the adjusted configuration information of the IO interface.

[0030] In a third aspect, the present application provides a hardware-in-the-loop HIL simulation test system, comprising the simulation test device described in the second aspect or any possible implementation thereof.

[0031] In a fourth aspect, the present application provides a device for building a simulation model, comprising: a processor, the processor being coupled to a memory; the memory being used to store program instructions; the processor being used to call the program instructions in the memory to execute the method described in the first aspect or any possible implementation thereof.

[0032] In a fifth aspect, the present application provides a computer-readable medium, wherein the computer-readable medium stores a program code for computer execution, wherein the program code includes instructions for executing the method described in the first aspect or any possible implementation thereof.

[0033] In a sixth aspect, the present application provides a computer program product, which includes a computer program code. When the computer program code runs on a computer, the computer implements the method described in the first aspect or any possible implementation method thereof. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1 A schematic diagram of performing HIL simulation testing provided by this application;

[0035] Figure 2 A schematic diagram of a simulation test method provided in accordance with an embodiment of the present invention;

[0036] Figure 3 A schematic diagram of a configuration interface provided for an embodiment of the present application;

[0037] Figure 4 A schematic diagram of a signal output by a simulation model of an IO interface provided by an embodiment of the present application;

[0038] Figure 5 A schematic diagram of a signal output by a simulation model of an IO interface provided by another embodiment of the present application;

[0039] Figure 6 A schematic diagram of simulating and verifying the configuration information of an IO interface provided by an embodiment of the present application;

[0040] Figure 7 A schematic diagram of simulating and verifying the configuration information of an IO interface provided by another embodiment of the present application;

[0041] Figure 8 A schematic diagram of a simulation test device provided in one embodiment of the present application;

[0042] Fig. 9 A schematic diagram of a simulation test device provided in another embodiment of the present application. DETAILED DESCRIPTION

[0043] In the fields of automobile, aerospace, etc., during the development process of the controller, it is usually necessary to continuously test each developed controller to understand the performance of the controller.

[0044] Exemplarily, the controller is an electronic control unit (ECU). That is, during the development process of the ECU, the ECU is usually tested continuously to learn the performance of the ECU.

[0045] Hardware in the loop (HIL) simulation test is a test method that simulates the operating state of the controlled object through HIL test equipment, and communicates with the device under test through the input and output (IO) interface in the HIL test equipment, so that the device under test runs in a simulated environment to achieve functional testing of the device under test.

[0046] Taking the device under test as the ECU in a vehicle as an example, when performing HIL simulation testing on the ECU under test, the HIL test equipment can be used to simulate the operating status of the vehicle (in this scenario, the controlled object is the vehicle), and the IO interface (or IO board) in the HIL test equipment can be used to communicate with the ECU under test to achieve functional testing of the ECU under test.

[0047] Typically, the schematic diagram of HIL simulation test of the device under test can be referred to Figure 1 .like Figure 1 As shown, the HIL test equipment includes an IO interface and a real-time simulation system, and the HIL test equipment is connected to the device under test through a wiring harness.

[0048] When it is necessary to perform HIL testing on the device under test, the following process is included: configuring the IO interface in the upper computer software specific to the HIL test equipment; building a simulation model of the controlled object, a simulation model of the IO interface, and establishing a connection between the simulation model of the controlled object and the simulation model of the IO interface to obtain an integrated simulation model; exporting the integrated simulation model as a model file that can be recognized by the HIL test equipment and downloading it to the HIL test equipment; the HIL test equipment simulates the operating state of the controlled object based on the model file and the configuration information of the IO interface and communicates with the device under test, thereby building a closed-loop test environment and realizing the test of the device under test.

[0049] However, after analysis, it was found that the above test process has the following problems:

[0050] 1) Since the current simulation models of the IO interface only exist in the first software, if a simulation model of the controlled object is built using other physical modeling software other than the first software, the first software must be installed first, and then the simulation model of the controlled object built by the other physical modeling software is imported into the first software to obtain an integrated simulation model. That is, the simulation model of the controlled object and the simulation model of the IO interface can only be associated in the first software, which will increase the software cost.

[0051] 2) The verification of IO interface configuration can only rely on HIL test equipment, that is, the verification of IO interface configuration can only rely on hardware. If the IO interface configuration is incorrect, the HIL simulation test will fail and the HIL test equipment will be affected, resulting in high hardware costs.

[0052] In view of this, the present application proposes a simulation test method and related devices to improve the efficiency of HIL simulation test and reduce the cost of HIL simulation test.

[0053] The simulation test method provided by the present application is described below in conjunction with the accompanying drawings.

[0054] Figure 2 A flow chart of a simulation test method provided in this application. Figure 2 As shown, the method provided in the present application includes: S201, S202 and S203, and the method can be executed by a simulation test device.

[0055] Specifically, the simulation test device can be considered as a physical modeling software.

[0056] S201, receiving an integrated simulation model, wherein the integrated model includes a simulation model of a controlled object and a simulation model of an input and output IO interface in a hardware-in-the-loop (HIL) test device.

[0057] Exemplarily, the simulation test device provides a user interface (UI) for building a simulation model to the tester, and then the tester builds an integrated simulation model on the UI, so that the simulation test device receives the integrated simulation model built by the tester.

[0058] In this embodiment, the integrated simulation model includes a simulation model of the controlled object and a simulation model of an IO interface (also called an IO board) in the HIL test equipment.

[0059] Specifically, the integrated simulation model in this embodiment is a simulation model obtained after establishing a connection between the constructed simulation model of the controlled object and the simulation model of the IO interface in the HIL test equipment.

[0060] For example, when applied in the automotive field, the simulation model of the controlled object can be a vehicle model. In specific implementation, the tester can build a simulation model of the vehicle and a simulation model of the IO interface in the HIL test equipment on the UI, and then connect the simulation model of the vehicle and the simulation model of the IO interface in the HIL test equipment on the UI to obtain an integrated simulation model. Accordingly, the simulation test device receives the integrated simulation model built by the tester based on the UI.

[0061] It should be noted that the controlled object here is only taken as an example of a vehicle, but it does not constitute a limitation of the present application. For example, when applied in the aviation field, the simulation model of the controlled object can be a simulation model of an aircraft. At this time, in the specific implementation, the tester can respectively build a simulation model of the aircraft and a simulation model of the IO interface in the HIL test equipment on the UI, and then connect the simulation model of the aircraft and the simulation model of the IO interface in the HIL test equipment on the UI to obtain an integrated simulation model. Accordingly, the simulation test device receives the integrated simulation model built by the tester through the UI.

[0062] S202, receiving first information, where the first information indicates configuration information of the IO interface, and the configuration information of the IO interface is carried by a simulation model of the IO interface.

[0063] In this embodiment, the simulation model of the IO interface can carry the configuration information of the IO interface.

[0064] Specifically, the configuration information of the IO interface includes, for example, information such as configured channel selection and property settings.

[0065] The channel selection information can be understood as follows: an IO interface usually has one or more output channels. For example, an IO interface can output channels 1, 2, and 3. At this time, for example, channel 1 can be selected for output.

[0066] The configuration property setting information can be understood as follows: the characteristics of each channel may be different. When a channel is selected, the output is determined in what manner, such as voltage output, resistance output, pulse width modulation (PWM) output, or voltage source output. It should be noted that the voltage output, resistance output, PWM output, and voltage source output are only examples and do not constitute a limitation of this application.

[0067] It should be noted that the configuration information of the above-mentioned IO interface is only an example of channel selection, property setting, etc., and does not constitute a limitation of the present application.

[0068] For example, the configuration information of the IO interface may also include information on initial state settings, such as whether to pass 0V or 12V when performing the simulation test initially.

[0069] For another example, the configuration information of the IO interface may also include information for limiting the range of each output. For example, when it is a voltage output, the upper limit of the voltage output is configured not to exceed 5V, or the value of the voltage output is configured to be within a range. It should be noted that 5V here is only an example and does not constitute a limitation of the present application.

[0070] For another example, the configuration information of the IO interface may also include information for limiting the accuracy of each output.

[0071] It should be noted that this embodiment does not limit the method of receiving the first information.

[0072] In one implementation, after the tester has built a simulation model of the IO interface, he right-clicks to display a pop-up window 1, then selects an option that can configure the IO interface in the pop-up window 1, and clicks the option to display a configuration interface for configuring the IO interface. After that, the tester configures the IO interface on the configuration interface.

[0073] In another implementation, after the tester has built the simulation model of the IO interface, a configuration interface for configuring the IO interface appears directly by double-clicking it, and then the tester configures the IO interface on the configuration interface.

[0074] For example, Figure 3 A schematic diagram of a configuration interface provided by an embodiment of the present application. Testers can configure the IO interface on the configuration interface. Figure 3 As shown, the channels of the IO interface include channel 1, channel 2 and channel 3, the property selection options include resistance output, voltage output and PWM output, and the currently set channel is channel 2 and is resistance output.

[0075] It should be understood that after the IO interface is configured, the simulation model of the IO interface should provide physical signal simulation according to the configuration information of the IO interface, such as providing resistance, voltage, PWM and other type signals, and the output of the signal should be consistent with the characteristics of the IO interface, such as range, accuracy, etc.

[0076] For example, the simulation model of the IO interface built by the tester on the UI is the simulation model of the IO interface 1 (or IO board 1) in the HIL test equipment. At this time, if the tester configures the IO interface 1 on the configuration interface and sets the resistance output, then Figure 4 As shown in FIG. 1 , the simulation model of the IO interface 1 provides a resistance signal to the device under test. If the tester sets the voltage output when configuring the IO interface 1 on the configuration interface, then Figure 5 As shown, the simulation model of the IO interface 1 provides a voltage signal to the device under test. Figure 4 and Figure 5 As shown, the simulation model of the IO interface 1 is connected to the pin 1 of the device under test through the pin a, and is connected to the pin 2 of the device under test through the pin b, so as to provide a signal to the device under test.

[0077] Optionally, in this embodiment, the simulation test device may also have a HIL hardware board topology import function, and then after the hardware board information is imported, the simulation model of the IO interface can directly perform board selection, channel selection, property setting, initial state setting and other operations on the hardware.

[0078] S203, outputting a first model file, a first configuration file, and a second configuration file for HIL simulation testing; wherein the first model file is a model file that is derived based on the simulation model of the controlled object and can be recognized by the HIL test equipment, the first configuration file is a configuration file that is derived based on the configuration information of the IO interface and can be recognized by the HIL test equipment, and the second configuration file is a configuration file that is derived based on the connection relationship between the simulation model of the controlled object and the simulation model of the IO interface and can be recognized by the HIL test equipment.

[0079] Specifically, during implementation, it includes:

[0080] 1) Export the simulation model of the controlled object as a first model file that can be recognized by the HIL test equipment.

[0081] In this embodiment, when exporting the model, only the simulation model of the controlled object is exported, and the simulation model of the IO interface does not participate in the model export.

[0082] Exemplarily, the simulation model of the controlled object may be exported as a file in an FMU format that can be recognized by the HIL test equipment.

[0083] 2) Exporting the configuration information of the IO interface as a first configuration file that can be recognized by the HIL test equipment.

[0084] In this embodiment, the simulation test device can read the configuration information of the IO interface (the configuration information of the IO interface can be considered to indicate the configuration of the HIL hardware), and export the configuration information of the IO interface as a first configuration file that can be recognized by the HIL test device.

[0085] Optionally, exporting the configuration information of the IO interface as a first configuration file recognizable by the HIL test device may also be replaced by exporting the configuration information of the IO interface as a first script file recognizable by the HIL test device.

[0086] Specifically, exporting the configuration information of the IO interface as a first configuration / script file recognizable by the HIL test device means: generating the configuration information of the IO interface into a first configuration / script file recognizable by a host computer of the corresponding HIL test device.

[0087] Exemplarily, the simulation test device may generate a .vtcfg file that can be recognized by the HIL test equipment after reading the configuration information of the IO interface.

[0088] Optionally, when the simulation test device generates the first configuration / script file, it can check and count the configuration information of the interface, such as interface occupancy statistics, board conflicts, interface conflicts, etc.

[0089] Optionally, the simulation test device has a hardware board resource management function of the HIL test equipment: used for the management of the board resources of the HIL test equipment, such as creating, deleting, importing, exporting, statistics and the like.

[0090] 3) Obtaining a connection relationship between the simulation model of the controlled object and the simulation model of the IO interface, and generating a second configuration file that can be recognized by the HIL test device based on the connection relationship.

[0091] In this embodiment, after the tester builds the integrated simulation model, the simulation test device will obtain (or read) the connection relationship between the simulation model of the controlled object and the simulation model of the IO interface, and generate a second configuration file that can be recognized by the HIL test equipment.

[0092] Optionally, the second configuration file that is generated based on the connection relationship and that can be recognized by the HIL test device may also be replaced by the second script file that is generated based on the connection relationship and that can be recognized by the HIL test device.

[0093] Exemplarily, after reading the connection relationship between the simulation model of the controlled object and the simulation model of the IO interface, the simulation test device generates a .can file that can be recognized by the HIL test equipment.

[0094] 4) Performing HIL simulation test based on the model file, the first configuration file and the second configuration file.

[0095] Specifically, the simulation test apparatus may download the model file, the first configuration file and the second configuration file to the HIL test equipment, so that the HIL test equipment can perform HIL simulation test on the device under test based on information in the model file, the first configuration file and the second configuration file.

[0096] It can be seen that through the simulation test method provided in this embodiment, the tester can complete the integration of the simulation module of the controlled object and the simulation model of the IO interface in the same physical modeling software, and complete the configuration of the IO interface in the physical modeling software. It can be understood that compared with the current method in which the tester first builds a simulation model of the controlled object in the physical modeling software, and then imports the simulation model of the controlled object into the first software with the simulation model of the IO interface to build an integrated simulation model, this method can improve the efficiency of the tester in building the integrated simulation model, thereby improving the efficiency of the HIL simulation test.

[0097] On the other hand, since there is no need to download the first software additionally, the cost of performing the HIL simulation test is also reduced.

[0098] On the other hand, in the simulation test method, since the configuration information of the IO interface is carried by the simulation model of the IO interface, there is no need to configure the IO interface through the host computer software of a specific HIL test device, thereby improving flexibility.

[0099] As an optional embodiment, the simulation test method provided in the present application also includes: simulating and verifying the configuration information of the IO interface; when the simulation and verification of the configuration information of the IO interface is successful, outputting the first model file, the first configuration file and the second configuration file.

[0100] In this implementation, after the integrated simulation model is built and the first information is received, the first model file, the first configuration file, and the second configuration file are not directly output for HIL simulation testing. Instead, the configuration information of the IO interface carried on the simulation model of the IO interface is first simulated and verified. Then, when the simulation and verification of the configuration information of the IO interface is successful, the first model file, the first configuration file, and the second configuration file are output for HIL simulation testing.

[0101] In one implementation, the configuration information of the IO interface is simulated and verified, such as Figure 6 As shown, it includes: receiving a first interface excitation model built by a tester, the first interface excitation model is used to output a first electrical value; verifying whether the configuration information of the IO interface is correct according to whether the difference between the first electrical value and the second electrical value is within a first error range; wherein the second electrical value is the electrical value output by the simulation model of the IO interface after the first electrical value is input into the simulation model of the IO interface.

[0102] Exemplarily, the electrical value is in the form of a digital signal or an analog signal, including any of the following: resistance, voltage, current, PWM, digital input (DI), and digital output (DO). Taking resistance as an example, assuming that the first interface excitation model outputs a resistance value T1, if the configuration information of the simulation model of the IO interface is correct, then the simulation model of the IO interface should output a resistance, and the difference between the resistance value T2 output by the simulation model of the IO interface and the resistance value T1 output by the first interface excitation model should be within the allowable error range.

[0103] In another implementation, the configuration information of the IO interface is simulated and verified, such as Figure 7 As shown, it includes: receiving a second interface excitation model built by a tester, the second interface excitation model is used to output a third electrical value and a first physical value; verifying whether the configuration information of the IO interface is correct according to whether the difference between the first physical value and the second physical value is within a second error range; wherein the second physical value is a physical value output by the simulation model of the controlled object after the fourth electrical value is input into the simulation model of the controlled object, and the fourth electrical value is an electrical value output by the simulation model of the IO interface after the third electrical value is input into the simulation model of the IO interface.

[0104] Exemplarily, the form of physical values ​​includes temperature value, displacement, torque, etc. Taking temperature simulation as an example, assuming that the second interface excitation model outputs a temperature value T1, if the configuration information of the simulation model of the IO interface is correct, then the simulation model of the controlled object should output a temperature value after parsing the electrical value output by the simulation model of the IO interface, and the difference between the temperature value T2 output by the simulation model of the controlled object and the temperature value T1 output by the second interface excitation model should be within the allowable error range.

[0105] Optionally, the first interface excitation model is the same as the second interface excitation model, and the first electrical value is the same as the third electrical value.

[0106] Optionally, if the configuration information of the IO interface is incorrect, the method further includes: receiving second information, the second information being used to adjust the configuration information of the IO interface; accordingly, performing simulation verification on the configuration information of the IO interface, including: performing simulation verification on the adjusted configuration information of the IO interface. That is, after the IO interface is configured, if the simulation verification fails during the simulation verification of the configuration information of the IO interface, the configuration information of the IO interface is reconfigured until the simulation verification succeeds.

[0107] Above, combined Figures 3 to 7 The simulation test method provided by this application is introduced. Figure 8 Introducing a simulation test device provided by this application, and combining Figure 8 A simulation test device is given and a detailed simulation test method is presented.

[0108] like Figure 8 As shown, the simulation test device in this embodiment includes a modeling and simulation module, a configuration file generation module, and a connection relationship generation module.

[0109] Specifically, based on Figure 8 The simulation test device shown in the figure includes:

[0110] 1) The simulation test device obtains the information of the HIL hardware board through modeling and simulation models.

[0111] To put it another way, testers can import the information of HIL hardware boards through the modeling and simulation module.

[0112] 2) The simulation test device receives the integrated simulation model through the modeling and simulation module, wherein the integrated simulation model includes the simulation model of the controlled object and the simulation model of the input and output IO interface in the hardware-in-the-loop HIL test device.

[0113] To put it another way, the tester builds the simulation model of the IO interface and the simulation model of the controlled object through the modeling and simulation module, and establishes the relationship between the simulation model of the IO interface and the simulation model of the controlled object, so as to build an integrated simulation model in the modeling and simulation module.

[0114] 3) The simulation test device receives first information through the modeling and simulation module, where the first information indicates configuration information of the IO interface, and the configuration information of the IO interface is carried by the simulation model of the IO interface.

[0115] The detailed description of this step can be found in Figure 2 The description in the illustrated embodiment will not be repeated here.

[0116] 4) The simulation test device simulates and verifies the configuration information of the IO interface through the modeling and simulation modules.

[0117] Exemplarily, the modeling and simulation module receives a first interface excitation model input by a tester through a UI, and the first interface excitation model is used to output a first electrical value; based on whether the difference between the first electrical value and the second electrical value is within a first error range, it is verified whether the configuration information of the IO interface is correct; wherein the second electrical value is an electrical value output by the simulation model of the IO interface after the first electrical value is input into the simulation model of the IO interface.

[0118] Exemplarily, the modeling and simulation module receives a second interface excitation model input by a tester through a UI, and the second interface excitation model is used to output a third electrical value and a first physical value; based on whether the difference between the first physical value and the second physical value is within a second error range, verifies whether the configuration information of the IO interface is correct; wherein the second physical value is a physical value output by the simulation model of the controlled object after the fourth electrical value is input into the simulation model of the controlled object, and the fourth electrical value is an electrical value output by the simulation model of the IO interface after the third electrical value is input into the simulation model of the IO interface.

[0119] Optionally, if the configuration information of the verified IO interface is incorrect, the modeling and simulation module can also receive second information input by the tester through the UI, and the second information is used to adjust the configuration information of the IO interface; then the adjusted IO interface configuration information is simulated and verified.

[0120] Among them, the method of how to perform simulation verification can be referred to Figure 2 The description in the illustrated embodiment will not be repeated here.

[0121] 5) When the simulation verification is successful, the simulation test device exports the simulation model of the controlled object into a first model file that can be recognized by the HIL test equipment through the modeling and simulation module.

[0122] 6) The simulation test device exports the configuration information of the IO interface as a first configuration file that can be recognized by the HIL test equipment through the interface configuration generation module, and obtains the connection relationship between the simulation model of the controlled object and the simulation model of the IO interface through the connection relationship generation module, and generates a second configuration file that can be recognized by the HIL test equipment based on the connection relationship.

[0123] It can be seen that through the simulation test method provided in this embodiment, the construction of an integrated simulation model and the configuration of the IO interface can be realized in a block diagram modeling environment. At the same time, the configuration information of the IO interface can be verified without hardware, thereby improving the test success rate while reducing the dependence on HIL hardware and reducing the test cost.

[0124] Optionally, the modeling and simulation module, the configuration file generation module, and the connection relationship generation module can be integrated in other physical modeling software other than the first software. It should be understood that in this way, even without the first software, the construction of the integrated simulation model can be realized, thereby comparing the dependence of the simulation model of the controlled object built in other physical modeling software on the first software. Among them, the description of the first software can refer to the above description, which will not be repeated here.

[0125] Fig. 9 A structural schematic diagram of a simulation test device provided in another embodiment of the present application. Fig. 9 The device shown can be used to execute the method described in any of the above embodiments.

[0126] like Fig. 9 As shown, the device 900 of this embodiment includes: a memory 901 and a processor 902. Optionally, the device 900 also includes a communication interface 903 and a bus 904. The memory 901, the processor 902, and the communication interface 903 are connected to each other through the bus 904.

[0127] The memory 901 may be a read-only memory (ROM), a static storage device, a dynamic storage device or a random access memory (RAM). The memory 901 may store a program. When the program stored in the memory 901 is executed by the processor 902, the processor 902 is used to execute the program. Figure 2 The individual steps of the method are shown.

[0128] The processor 902 may be a general-purpose central processing unit (CPU), a microprocessor, an application specific integrated circuit (ASIC), or one or more integrated circuits for executing related programs to implement the present application. Figure 2 The method shown.

[0129] The processor 902 may also be an integrated circuit chip having the ability to process signals. Figure 2 Each step of the method can be completed by an integrated logic circuit of hardware in the processor 902 or an instruction in the form of software.

[0130] The processor 902 may also be a general purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, a discrete gate or transistor logic device, or a discrete hardware component. The methods, steps, and logic block diagrams disclosed in the embodiments of the present application may be implemented or executed. The general purpose processor may be a microprocessor or the processor may be any conventional processor, etc.

[0131] The steps of the method disclosed in the embodiment of the present application can be directly embodied as being executed by a hardware decoding processor, or by a combination of hardware and software modules in the decoding processor. The software module can be located in a storage medium mature in the art, such as a random access memory, a flash memory, a read-only memory, a programmable read-only memory, or an electrically erasable programmable memory, a register, etc. The storage medium is located in the memory 901, and the processor 902 reads the information in the memory 901 and completes the functions required to be executed by the units included in the device of the present application in combination with its hardware. For example, it can execute Figure 2 The various steps / functions of the illustrated embodiment.

[0132] The communication interface 903 may use, but is not limited to, a transceiver or other transceiver device to implement communication between the apparatus 900 and other devices or a communication network.

[0133] The bus 904 may include a path for transmitting information between various components of the device 900 (eg, the memory 901 , the processor 902 , and the communication interface 903 ).

[0134] The above embodiments can be implemented in whole or in part by software, hardware, firmware or any other combination. When implemented by software, the above embodiments can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions or computer programs. When the computer instructions or computer programs are loaded or executed on a computer, the process or function described in the embodiment of the present application is generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions can be transmitted from one website site, computer, server or data center to another website site, computer, server or data center by wired (e.g., infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that contains one or more available media sets. The available medium can be a magnetic medium (e.g., a floppy disk, a hard disk, a tape), an optical medium (e.g., a DVD), or a semiconductor medium. The semiconductor medium can be a solid-state hard disk.

[0135] It should be understood that the term "and / or" in this article is only a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. A and B can be singular or plural. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship, but it may also indicate an "and / or" relationship. Please refer to the context for specific understanding.

[0136] In this application, "at least one" means one or more, and "more than one" means two or more. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single or plural items. For example, at least one of a, b, or c can be represented by: a, b, c, ab, ac, bc, or abc, where a, b, c can be single or multiple.

[0137] It should be understood that in the various embodiments of the present application, the size of the serial numbers of the above-mentioned processes does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0138] Those of ordinary skill in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0139] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0140] In the several embodiments provided in the present application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0141] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0142] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0143] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application can be essentially or partly embodied in the form of a software product that contributes to the prior art. The computer software product is stored in a storage medium and includes several instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods described in the various embodiments of the present application. The aforementioned storage medium includes: various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory, a random access memory, a magnetic disk, or an optical disk.

Claims

1. A simulation test method, characterized in that: include: Receiving an integrated simulation model, wherein the integrated simulation model includes a simulation model of a controlled object and a simulation model of an input and output IO interface in a hardware-in-the-loop (HIL) test device; receiving first information, where the first information indicates configuration information of the IO interface, where the configuration information of the IO interface is carried by a simulation model of the IO interface; Outputting a first model file, a first configuration file, and a second configuration file; Among them, the first model file, the first configuration file and the second configuration file are used for HIL simulation testing, the first model file is a model file that is derived based on the simulation model of the controlled object and can be recognized by the HIL test equipment, the first configuration file is a configuration file that is derived based on the configuration information of the IO interface and can be recognized by the HIL test equipment, and the second configuration file is a configuration file that is derived based on the connection relationship between the simulation model of the controlled object and the simulation model of the IO interface and can be recognized by the HIL test equipment.

2. The method according to claim 1, characterized in that The method further comprises: Performing simulation verification on the configuration information of the IO interface; The outputting of the first model file, the first configuration file and the second configuration file comprises: When the simulation verification of the configuration information of the IO interface is successful, the first model file, the first configuration file and the second configuration file are output.

3. The method according to claim 2, characterized in that The emulation verification of the configuration information of the IO interface includes: receiving a first interface excitation model, wherein the first interface excitation model is used to output a first electrical value; Verifying whether the configuration information of the IO interface is correct according to whether the difference between the first electrical value and the second electrical value is within a first error range; The second electrical value is an electrical value output by the simulation model of the IO interface after the first electrical value is input into the simulation model of the IO interface.

4. The method according to claim 3, characterized in that The electrical value is in the form of a digital signal or an analog signal, including any of the following: resistance, voltage, current, pulse width modulation PWM, digital input DI, and digital output DO.

5. The method according to any one of claims 2 to 4, characterized in that The emulation verification of the configuration information of the IO interface includes: receiving a second interface excitation model, wherein the second interface excitation model is used to output a third electrical value and a first physical value; Verifying whether the configuration information of the IO interface is correct according to whether the difference between the first physical value and the second physical value is within a second error range; Among them, the second physical value is the physical value output by the simulation model of the controlled object after the fourth electrical value is input into the simulation model of the controlled object, and the fourth electrical value is the electrical value output by the simulation model of the IO interface after the third electrical value is input into the simulation model of the IO interface.

6. The method according to claim 5, characterized in that The form of the physical value includes any of the following: temperature value, displacement, torque.

7. The method according to claim 6, characterized in that The first interface excitation model is the same as the second interface excitation model, and the first electrical value is the same as the third electrical value.

8. The method according to any one of claims 2 to 7, characterized in that If it is verified that the configuration information of the IO connection is incorrect, the method further includes: receiving second information, where the second information is used to adjust configuration information of the IO interface; The emulation verification of the configuration information of the IO interface includes: The configuration information of the adjusted IO interface is simulated and verified.

9. A simulation test device, characterized in that: include: A modeling and simulation module, used for receiving an integrated simulation model, wherein the integrated simulation model includes a simulation model of a controlled object and a simulation model of an input and output IO interface in a hardware-in-the-loop HIL test device; The modeling and simulation module is further used to receive first information, where the first information indicates configuration information of the IO interface, and the configuration information of the IO interface is carried by the simulation model of the IO interface; The modeling and simulation module is further used to export a first model file that can be recognized by the HIL test equipment based on the simulation model of the controlled object; A configuration file generating module, used for deriving a first configuration file that can be recognized by the HIL test device based on the configuration information of the IO interface; A connection relationship generating module, used for deriving a second configuration file that can be recognized by the HIL test device based on the connection relationship between the simulation model of the controlled object and the simulation model of the IO interface; The first model file, the first configuration file and the second configuration file are used for HIL simulation testing.

10. The device according to claim 9, characterized in that The modeling and simulation module is also used to simulate and verify the configuration information of the IO interface; Wherein, when the simulation verification of the configuration information of the IO interface is successful, the modeling and simulation module outputs the first model file, the configuration file generation module outputs the first configuration file, and the connection relationship generation module outputs the second configuration file.

11. The device according to claim 10, characterized in that The modeling and simulation module is specifically used for: receiving a first interface excitation model, wherein the first interface excitation model is used to output a first electrical value; Verifying whether the configuration information of the IO interface is correct according to whether the difference between the first electrical value and the second electrical value is within a first error range; The second electrical value is an electrical value output by the simulation model of the IO interface after the first electrical value is input into the simulation model of the IO interface.

12. The device according to claim 11, characterized in that The electrical value is in the form of a digital signal or an analog signal, including any of the following: resistance, voltage, current, pulse width modulation PWM, digital input DI, and digital output DO.

13. The device according to any one of claims 10 to 12, characterized in that The modeling and simulation module is specifically used for: receiving a second interface excitation model, wherein the second interface excitation model is used to output a third electrical value and a first physical value; Verifying whether the configuration information of the IO interface is correct according to whether the difference between the first physical value and the second physical value is within a second error range; Among them, the second physical value is the physical value output by the simulation model of the controlled object after the fourth electrical value is input into the simulation model of the controlled object, and the fourth electrical value is the electrical value output by the simulation model of the IO interface after the third electrical value is input into the simulation model of the IO interface.

14. The device according to claim 13, characterized in that The form of the physical value includes any of the following: temperature value, displacement, torque.

15. The device according to claim 14, characterized in that The first interface excitation model is the same as the second interface excitation model, and the first electrical value is the same as the third electrical value.

16. The device according to any one of claims 10 to 15, characterized in that If it is verified that the configuration information of the IO connection is incorrect, the modeling and simulation module is further used to: receiving second information, where the second information is used to adjust configuration information of the IO interface; The configuration information of the adjusted IO interface is simulated and verified.

17. A hardware-in-the-loop (HIL) simulation test system, characterized in that: The method comprises the simulation test device as claimed in any one of claims 9 to 16.

18. A simulation test device, characterized in that: include: a processor coupled to the memory; The memory is used to store program instructions; The processor is configured to call the program instructions in the memory to execute the method according to any one of claims 1 to 8.

19. A computer readable medium, characterized in that The computer-readable medium stores a program code for computer execution, the program code including instructions for executing the method according to any one of claims 1 to 8.

20. A computer program product, characterized in that The computer program product includes computer program codes, and when the computer program codes are executed on a computer, the computer is enabled to implement the method according to any one of claims 1 to 8.

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