A method for preparing a TBC solar cell with a convex isolation region structure

Abstract

The present invention relates to the field of solar cells, and discloses a method for preparing a TBC solar cell with a convex isolation region structure. Firstly, the present invention can prepare a TBC solar cell with a convex isolation region structure through an ingenious preparation method, which can not only reduce the probability of short circuit between the p region (boron diffusion region) and the n region (phosphorus diffusion region), but also reduce the thickness of part of the boron diffusion layer or the phosphorus diffusion layer to reduce the influence of parasitic absorption; secondly, the present invention optimizes the process steps to achieve a TBC solar cell by depositing an intrinsic polysilicon layer once, which can effectively improve the performance and yield of the product, and at the same time significantly reduce the production cost.

Description

Technical Field

[0001] The invention relates to the field of solar cells, and in particular to a method for preparing a TBC solar cell with a convex isolation region structure. Background Art

[0002] TBC solar cells combine the excellent tunneling oxide layer / doped polysilicon passivation contact technology and back electrode contact characteristics of mainstream TOPCon cells. They are the representative of the next generation of mainstream cells, with characteristics such as high efficiency and strong aesthetics. In the preparation process of TBC solar cells, the insulation isolation measures of the p-region (boron diffusion region) and the n-region (phosphorus diffusion region) are particularly critical. The rationality of the isolation region structure is significantly related to the battery leakage value, and also affects the final battery conversion efficiency. For conventional isolation region structures, a "rectangular" isolation structure is often formed through physical + wet chemical forms. If the isolation region structure is large, although it can reduce the short circuit risk of the p-region and the n-region, it will cause the silicon substrate carrier transmission cross-section to the bottom poly-Si layer to decrease, resulting in a low FF value; if the isolation region structure is small, on the one hand, it will increase the conduction risk of the p-region and the n-region, and on the other hand, the poly-Si region is too large and the parasitic absorption is also serious, resulting in I sc The value is low.

[0003] In addition, first of all, the preparation of TBC solar cells usually requires the deposition of a boron diffusion layer and a phosphorus diffusion layer on the back of the cell in sequence, and then multiple laser grooving and wet processes. For example, patent CN116845140A discloses a method for preparing a TBC solar cell, the general steps of which are: depositing a first tunneling oxide layer and a first intrinsic polysilicon layer on the back of a silicon wafer, boron doping to form a BSG layer, grooving and cleaning for the first time, depositing a second tunneling oxide layer and a second intrinsic polysilicon layer on the back, phosphorus doping to form a PSG layer, grooving for the second time, cleaning and double-sided velveting, double-sided coating, screen printing, and sintering. However, including the above-mentioned patents and similar schemes, since the intrinsic polysilicon layer needs to be deposited twice on the back of the silicon wafer, it is easy to have uneven thermal stress distribution, which leads to abnormal problems such as warping and fragmentation of the silicon wafer, which will significantly affect the performance and yield of the product. In addition, depositing the intrinsic polysilicon layer twice will also greatly increase the amount of special gases used, thereby increasing costs.

[0004] In summary, the study on how to improve the isolation region structure of TBC solar cells to reduce the risk of battery leakage and improve the battery FF and I sc At the same time, it is of great significance to optimize the preparation process of TBC solar cells to improve product performance, yield and reduce costs. Summary of the invention

[0005] In order to solve the above technical problems, the present invention provides a method for preparing a TBC solar cell with a convex isolation region structure. First, the present invention can prepare a TBC solar cell with a convex isolation region structure through an ingenious preparation method, which can not only reduce the probability of short circuit between the p region (boron diffusion region) and the n region (phosphorus diffusion region), but also reduce the thickness of part of the boron diffusion layer or the phosphorus diffusion layer to reduce the parasitic absorption effect; secondly, the present invention optimizes the process steps to achieve a single deposition of an intrinsic polycrystalline silicon layer to obtain a TBC solar cell, which can effectively improve the performance and yield of the product, and at the same time significantly reduce the production cost.

[0006] The specific technical solution of the present invention is: a method for preparing a TBC solar cell with a convex isolation region structure, specifically comprising the following steps:

[0007] S1, double-sided polishing of silicon wafer.

[0008] S2. A tunneling oxide layer, an intrinsic polysilicon layer, and a mask layer are sequentially formed on the back of the silicon wafer.

[0009] The purpose of setting the intrinsic polysilicon layer is to provide a basis for subsequent boron diffusion and phosphorus diffusion, and the purpose of setting the mask layer is to block doping atoms from entering the intrinsic polysilicon layer at the bottom during the subsequent boron diffusion and phosphorus diffusion process.

[0010] S3, laser one-time patterning and grooving to remove the mask layer in the designed area of ​​the boron diffusion layer.

[0011] The laser once patterned slotted area is the pre-designed boron diffusion layer area. After removing the mask layer in this area, the boron atoms can diffuse into the intrinsic polysilicon layer in this area during the subsequent boron diffusion process.

[0012] S4, removing the residual mask layer in the grooved area by alkaline cleaning to fully expose the intrinsic polysilicon layer in the area.

[0013] S5. Boron diffusion is performed to convert the inner layer and the surface layer of the exposed intrinsic polysilicon layer into a boron diffusion layer and a BSG layer respectively.

[0014] In the above boron diffusion process, the ungrooved area of ​​S3 can effectively block boron atoms from entering the intrinsic polysilicon layer due to the protection of the mask layer, and only the inner layer and the surface layer of the exposed intrinsic polysilicon layer are converted into a boron diffusion layer and a BSG layer respectively.

[0015] S6, laser secondary patterning and grooving to remove the remaining mask layer.

[0016] The remaining mask layer area (i.e., the pre-designed phosphorus diffusion layer area) is grooved to facilitate subsequent alkaline cleaning and expose the surface of the remaining intrinsic polysilicon layer.

[0017] S7, alkaline cleaning to remove the residual mask layer in the slotted area in S6 so as to fully expose the intrinsic polysilicon layer in the area. The boron diffusion layer area can be protected from being damaged by alkaline corrosion because the surface is protected by the BSG layer.

[0018] S8. Phosphorus diffusion, so that the inner layer and the surface layer of the exposed intrinsic polysilicon layer are converted into a phosphorus diffusion layer and a PSG layer respectively.

[0019] In the phosphorus diffusion process, since the surface of the boron diffusion layer is protected by the BSG layer, phosphorus atoms cannot diffuse into the boron diffusion layer, and only the inner layer and the surface layer of the exposed remaining intrinsic polysilicon layer are converted into the phosphorus diffusion layer and the PSG layer respectively.

[0020] S9, three-time green laser patterning grooves are used to remove the BSG layer and PSG layer at the junction of the boron diffusion layer (p-region) and the phosphorus diffusion layer (n-region), and loosen the various deposited layers (tunneling oxide layer, boron diffusion layer, and phosphorus diffusion layer) in the grooved area.

[0021] The green laser three-time patterning groove area is the pre-designed isolation area (i.e., the insulating Gap area). After removing the BSG layer and PSG layer in this area, the isolation area can be formed after subsequent wet cleaning.

[0022] S10, using ultraviolet laser to pattern groove four times to remove the remaining BSG layer and the two side parts of the remaining PSG layer, and loosen the surface layer of the boron diffusion layer and the surface layer of the phosphorus diffusion layer in the grooved area.

[0023] The purpose of the four-time UV laser patterning grooving is to remove the two side portions of each remaining BSG layer and the remaining PSG layer, and to loosen the surface layer of the boron diffusion layer and the surface layer of the phosphorus diffusion layer at the bottom of the groove area, so as to pave the way for the formation of a convex isolation area structure after subsequent wet cleaning.

[0024] It should be noted that S9 of the present invention uses a green laser, while S10 uses an ultraviolet laser. The present invention cleverly utilizes the fact that the penetration depth of ultraviolet laser is shallower than that of green laser, and on the basis of ensuring the removal of BSG layer and PSG layer, the sedimentary layers at different depths at the bottom can be loosened. During the three-time patterning grooving of green laser, the sedimentary layers (tunneling oxide layer, boron diffusion layer, phosphorus diffusion layer) at the bottom of the grooved area can be loosened, so they can be completely removed during the subsequent wet cleaning process; while the depth of the four-time patterning grooving of ultraviolet laser is shallow, so only the surface layers of the boron diffusion layer and the phosphorus diffusion layer at the bottom of the grooved area can be loosened, so that in the subsequent wet cleaning process, only the surface layers of the boron diffusion layer and the phosphorus diffusion layer in the area are accurately controlled to be corroded and removed, thereby forming a convex isolation area structure.

[0025] S11, removing the coating on the front and side surfaces of the silicon wafer.

[0026] S12, cleaning and texturing: The silicon wafer is wet cleaned and texturing in alkaline. In the area covered by the BSG layer and the PSG layer, the bottom boron diffusion layer and the phosphorus diffusion layer are protected from being corroded by the alkali. For other areas, due to the different depths of laser loosening in S9 and S10, the alkali corrosion rate in different areas will be different. The wet etching rate is: V （激光三次图形化区域） >V （激光四次图形化区域） . Finally, by controlling the cleaning time, the deposition layer in the three-time patterning groove area of ​​the green laser on the back of the silicon wafer is removed, and the back of the silicon wafer is exposed. The surface layer of the boron diffusion layer and the surface layer of the phosphorus diffusion layer that are loosened in the four-time patterning groove area of ​​the ultraviolet laser are removed to form a convex isolation area structure. Among them, the width of the surface layer of the boron diffusion layer and the surface layer of the phosphorus diffusion layer that are removed on one side is 25-40% of the original whole layer, and the height is 30-80% of the original whole layer. At the same time, the surface of the isolation area on the front and back of the silicon wafer is textured to form a pyramid velvet surface; finally, the residual PSG layer and BSG layer on the back of the silicon wafer are removed by acid pickling.

[0027] S13, Double-sided coating: After double-sided coating, a passivation anti-reflection layer is generated on the front and back sides of the silicon wafer.

[0028] S14, screen printing, sintering, and light injection to obtain a TBC solar cell with a convex isolation region structure.

[0029] In summary, firstly, the present invention can produce a TBC solar cell with a convex isolation region structure through an ingenious preparation method. On the one hand, although the isolation size between the bottom p-region (boron diffusion region) and the n-region (phosphorus diffusion region) does not change significantly, the isolation size between the top p-region and the n-region becomes larger, which can reduce the probability of short circuit, which is beneficial to reduce the risk of battery leakage and improve the battery yield; on the other hand, the convex isolation region structure reduces the thickness of part of the boron diffusion layer or the phosphorus diffusion layer, which can reduce the influence of parasitic absorption.

[0030] Secondly, the present invention optimizes the process steps to achieve a TBC solar cell by depositing an intrinsic polysilicon layer only once, thereby avoiding problems such as uneven distribution of thermal stress caused by multiple depositions of the intrinsic polysilicon layer, which leads to reduced product performance and yield rate. In addition, the use of a single deposition of the intrinsic polysilicon layer can also significantly reduce the use of special gases and reduce production costs.

[0031] Preferably, in S9, the conditions for the three-time patterning grooving with the green laser are: laser wavelength of 477-592 nm, frequency of 500-700 KHz, marking speed of 40000-50000 mm / s, power of 40-100 W, and processing time of 1-5 s.

[0032] Preferably, in S10, the conditions for the ultraviolet laser four-time patterning grooving are: laser wavelength of 200-400 nm, frequency of 500-700 KHz, marking speed of 40000-50000 mm / s, power of 10-40 W, and processing time of 1-3 s.

[0033] In addition to cleverly utilizing the difference in penetration depth of laser wavelength to assist in constructing the convex isolation region structure in S9 and S10, the present invention also controls the power of the two laser treatments. Specifically, the power of the three-time patterning treatment of the green laser is higher and the time is longer, while the power of the four-time patterning treatment of the ultraviolet laser is relatively low and the time is shorter, so that the processing depth can be further differentiated.

[0034] Preferably, in S2, the mask layer is formed by LPCVD, and the conditions are: O2 flow rate is 20000~90000sccm, temperature is 500~700°C, time is 2000~5000 s, and mask layer thickness is 30~300 nm.

[0035] Preferably, in S2, the mask layer may also be formed by ultraviolet laser oxidation treatment:

[0036] First, a mask layer prototype is generated under the conditions of an oxygen concentration of 20-40% and an ultraviolet laser wavelength of 300-400 nm;

[0037] Then, a denser mask layer is formed under the conditions of oxygen concentration of 50~90% and ultraviolet laser wavelength of 200~300 nm.

[0038] The present invention has found in previous experiments that the density of the mask layer obtained by conventional LPCVD or conventional one-step ultraviolet laser oxidation process is not ideal, which will increase the risk of boron atoms and phosphorus atoms diffusing to the intrinsic polysilicon layer during subsequent boron diffusion and phosphorus diffusion, thereby causing battery leakage or performance degradation. To this end, the present invention has designed the above-mentioned special distributed differentiated ultraviolet laser oxidation process, the principle of which is: different laser wavelengths penetrate into the silicon interior at different depths. In the first step of the above process of the present invention, the wavelength is larger and the penetration depth is deeper, which can initially form a thicker mask layer prototype; the second step has a shorter wavelength and a shallower penetration depth, which can make the mask layer prototype more dense with almost unchanged thickness; at the same time, with different oxygen concentration processing environments, the formed mask layer can more effectively block the internal expansion of boron atoms and phosphorus atoms.

[0039] Further preferably, in S2, the conditions of the ultraviolet oxidation laser treatment are specifically:

[0040] First, a mask layer prototype is generated under the conditions of an O2 flow rate of 10-100 sccm, an ambient oxygen concentration of 20-40%, an ultraviolet laser wavelength of 300-400 nm, a power of 10-500 W, and a processing time of 1-30 s;

[0041] Then, under the conditions of O2 flow rate of 100-500 sccm, ambient oxygen concentration of 50-90%, ultraviolet laser wavelength of 200-300 nm, power of 2-50 W, and processing time of 1-30 s, a denser mask layer is formed; the thickness of the mask layer is 30-300 nm.

[0042] Preferably, in S2, the deposition conditions of the tunnel oxide layer are: O2 flow rate 10000-80000 sccm, reaction temperature 400-800°C, time 200-1000 s, and tunnel oxide layer thickness 2-10 nm.

[0043] Preferably, in S2, the deposition conditions of the intrinsic polysilicon layer are: SiH4 flow rate 300~2000 sccm, reaction temperature 500~700°C, time 2~4 h, working gas pressure 100~500 mTorr, and intrinsic polysilicon layer thickness 100~300 nm.

[0044] Preferably, in S5, the boron diffusion conditions are: temperature 800-900°C, diffusion time 5-50 min, BCl3 flow rate 50-500 sccm, O2 flow rate 500-2000 sccm; oxidation advancement temperature 900-1050°C, O2 flow rate 5000-30000 sccm, advancement time 30-80 min.

[0045] Preferably, in S5, the thickness of the BSG layer is 30-70 nm.

[0046] Preferably, in S8, the phosphorus diffusion conditions are: temperature 750-850°C, diffusion time 5-30 min, POCl3 is carried by nitrogen with a flow rate of 500-1200 sccm, and O2 flow rate 500-1000 sccm; oxidation advancement temperature 850-950°C, O2 flow rate 1000-10000 sccm, and advancement time 20-60 min.

[0047] Preferably, in S8, the thickness of the PSG layer is 30-70 nm.

[0048] Compared with the prior art, the beneficial effects of the present invention are:

[0049] (1) The present invention can produce a TBC solar cell with a convex isolation region structure through an ingenious preparation method, which can not only reduce the probability of short circuit between the p-region (boron diffusion region) and the n-region (phosphorus diffusion region), but also reduce the thickness of part of the boron diffusion layer or the phosphorus diffusion layer to reduce the parasitic absorption effect.

[0050] (2) The present invention optimizes the process steps to achieve a TBC solar cell by depositing an intrinsic polycrystalline silicon layer in a single step, which can effectively improve the performance and yield of the product and significantly reduce the production cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0051] Figure 1 Schematic diagram of the structure of the silicon wafer after double-sided polishing.

[0052] Figure 2 Schematic diagram of the structure after the tunnel oxide layer / intrinsic polysilicon layer / mask layer are deposited on the silicon wafer.

[0053] Figure 3 This is a schematic diagram of the structure of the silicon wafer after laser one-time patterning of the mask layer and alkaline cleaning.

[0054] Figure 4 Schematic diagram of the structure after boron diffusion of silicon wafer.

[0055] Figure 5 This is a schematic diagram of the structure of the silicon wafer laser secondary patterning slot mask layer + alkaline cleaning.

[0056] Figure 6 Schematic diagram of the structure of the silicon wafer after phosphorus diffusion.

[0057] Figure 7 Schematic diagram of the structure after laser three-time patterning of the junction between the p-region and the n-region + cleaning and texturing.

[0058] Figure 8 Schematic diagram of the structure of TBC solar cell.

[0059] The reference numerals are: N-type single crystal silicon wafer 1; tunnel oxide layer 2; intrinsic polysilicon layer 3; mask layer 4; boron diffusion layer 5; BSG layer 6; phosphorus diffusion layer 7; PSG layer 8; pyramid velvet surface 9; passivation anti-reflection layer 10; electrode layer 11. DETAILED DESCRIPTION

[0060] The present invention will be further described below in conjunction with the embodiments.

[0061] A method for preparing a TBC solar cell with a convex isolation region structure specifically comprises the following steps:

[0062] S1, double-sided polishing of silicon wafer.

[0063] In some specific implementation cases, an N-type single crystal silicon wafer 1 after diamond wire cutting is selected, with a thickness of ~150 μm and a size of 182.2 mm×186.7 mm. The silicon wafer is placed in an alkaline polishing tank, the temperature is maintained at 75~85°C, and the time is 6~8 min for double-sided polishing, the polishing thickness is 3~7 μm, and the thinning amount is 0.35~0.45 g. Figure 1 shown.

[0064] S2, forming a tunnel oxide layer 2 (using LPCVD), an intrinsic polysilicon layer 3 (using LPCVD), and a mask layer 4 on the back of the silicon wafer in sequence, such as Figure 2 shown.

[0065] In some specific implementation cases, the deposition conditions of the tunnel oxide layer are: O2 flow rate 10000~80000sccm, reaction temperature 400~800°C, time 200~1000 s, and tunnel oxide layer thickness 2~10 nm.

[0066] In some specific implementation cases, the deposition conditions of the intrinsic polysilicon layer are: SiH4 flow rate 300~2000sccm, reaction temperature 500~700℃, time 2~4h, working gas pressure 100~500mTorr, intrinsic polysilicon layer thickness 100~300nm.

[0067] In some specific implementation cases, the mask layer is formed by LPCVD, and the conditions are: O2 flow rate is 20000~90000 sccm, temperature is 500~700°C, time is 2000~5000 s, and the mask layer thickness is 30~300 nm.

[0068] In some more preferred implementation cases, the mask layer can also be formed by ultraviolet oxidation laser treatment: first, a mask layer prototype is generated under the conditions of an oxygen concentration of 20~40% and an ultraviolet laser wavelength of 300~400 nm; and then a denser mask layer is formed under the conditions of an oxygen concentration of 50~90% and an ultraviolet laser wavelength of 200~300 nm.

[0069] Further preferably, in S2, the conditions of the ultraviolet oxidation laser treatment are specifically as follows: first, a mask layer prototype is generated under the conditions of an O2 flow rate of 10-100 sccm, an ambient oxygen concentration of 20-40%, an ultraviolet laser wavelength of 300-400 nm, a power of 10-500 W, and a treatment time of 1-30 s; then, a denser mask layer is formed under the conditions of an O2 flow rate of 100-500 sccm, an ambient oxygen concentration of 50-90%, an ultraviolet laser wavelength of 200-300 nm, a power of 2-50 W, and a treatment time of 1-30 s; the thickness of the mask layer is 30-300 nm.

[0070] S3, laser one-time patterning and grooving to remove the mask layer in the designed area of ​​the boron diffusion layer. The laser one-time patterning and grooving area is the pre-designed boron diffusion layer area. After removing the mask layer in this area, boron atoms can diffuse to the intrinsic polysilicon layer in this area in the subsequent boron diffusion process.

[0071] In some specific implementation cases, a picosecond laser is used for patterning grooving, and the conditions are: laser wavelength 400~600 nm, frequency 500~700 KHz, marking speed 40000~50000 mm / s, power 10~50 W, and processing time 1~5 s.

[0072] S4, alkaline cleaning to remove the residual mask layer in the groove area so that the intrinsic polysilicon layer in the area is fully exposed, such as Figure 3 shown.

[0073] In some specific implementation cases, the silicon wafer is placed in an alkaline solution for cleaning at a temperature of 75~85°C. During the experiment, by adjusting different parameters such as cleaning time and using an ellipsometer to test the thickness of the mask layer after cleaning, the mask layer in the grooved area can be accurately removed to prevent excessive removal of the bottom intrinsic polysilicon layer during the alkaline cleaning process.

[0074] S5, boron diffusion, so that the inner layer and the surface layer of the exposed intrinsic polysilicon layer 3 are respectively converted into a boron diffusion layer 5 and a BSG layer 6. In the above boron diffusion process, the ungrooved area of ​​S3 can effectively block boron atoms from entering the intrinsic polysilicon layer 3 due to the protection of the mask layer 4, and only the inner layer and the surface layer of the exposed intrinsic polysilicon layer 3 are respectively converted into a boron diffusion layer 5 and a BSG layer 6. Figure 4 shown.

[0075] In some specific implementation cases, the boron diffusion conditions are: temperature 800-900°C, diffusion time 5-50 min, BCl3 flow rate 50-500 sccm, O2 flow rate 500-2000 sccm; oxidation push temperature 900-1050°C, O2 flow rate 5000-30000 sccm, push time 30-80 min. The thickness of the BSG layer is 30-70 nm.

[0076] S6, laser secondary patterning and grooving to remove the remaining mask layer. The remaining mask layer area (i.e., the pre-designed phosphorus diffusion layer area) is grooved to cooperate with the subsequent alkaline cleaning to expose the surface of the remaining intrinsic polysilicon layer.

[0077] In some specific implementation cases, picosecond laser is used for secondary patterning grooving, and the conditions are: laser wavelength 400~600 nm, frequency 500~700 KHz, marking speed 40000~50000 mm / s, power 10~50 W, and processing time 1~5 s.

[0078] S7, alkaline cleaning to remove the residual mask layer in the grooved area in S6 so that the intrinsic polysilicon layer in the area is fully exposed, such as Figure 5 shown.

[0079] In some specific implementation cases, the silicon wafer is placed in an alkaline solution for cleaning at a temperature of 75-85°C. During the experiment, by adjusting different parameters such as cleaning time, and using an ellipsometer to test the thickness of the mask layer after cleaning, the mask layer in the slotted area can be accurately removed, so that the bottom intrinsic polysilicon layer is not removed too much during the alkaline cleaning process. The boron diffusion layer area is protected by the BSG layer and is not damaged by the alkaline cleaning.

[0080] S8, phosphorus diffusion, so that the inner layer and the surface layer of the exposed intrinsic polysilicon layer 3 are respectively converted into the phosphorus diffusion layer 7 and the PSG layer 8. In the above phosphorus diffusion process, since the surface of the boron diffusion layer 5 is protected by the BSG layer 6, the phosphorus atoms cannot diffuse into the boron diffusion layer 5, and only the inner layer and the surface layer of the exposed remaining intrinsic polysilicon layer 3 are respectively converted into the phosphorus diffusion layer 7 and the PSG layer 8. Figure 6 shown.

[0081] In some specific implementation cases, the phosphorus diffusion conditions are: temperature 750-850°C, diffusion time 5-30 min, POCl3 carried by nitrogen with a flow rate of 500-1200 sccm, O2 flow rate 500-1000 sccm; oxidation advancement temperature 850-950°C, O2 flow rate 1000-10000 sccm, advancement time 20-60 min. The thickness of the PSG layer is 30-70 nm.

[0082] S9, three-time patterning of green laser to remove the BSG layer and PSG layer at the junction of the boron diffusion layer (p-region) and the phosphorus diffusion layer (n-region), and loosen the deposition layers (tunneling oxide layer, boron diffusion layer, phosphorus diffusion layer) in the grooved area. The three-time patterning of green laser is the pre-designed isolation area (i.e., insulating Gap area). After removing the BSG layer and PSG layer in this area, an isolation area can be formed after subsequent wet cleaning.

[0083] In some specific implementation cases, the conditions for the green laser three-time patterning grooving are: laser wavelength of 477~592 nm, frequency of 500~700 KHz, marking speed of 40000~50000 mm / s, power of 40~100 W, and processing time of 1~5s.

[0084] S10, ultraviolet laser four-time patterning groove to remove the remaining BSG layer and the remaining PSG layer on both sides, and loosen the surface of the boron diffusion layer and the surface of the phosphorus diffusion layer in the groove area. The purpose of the ultraviolet laser four-time patterning groove area is to remove the remaining BSG layer and the remaining PSG layer on both sides, and loosen the surface of the boron diffusion layer and the surface of the phosphorus diffusion layer at the bottom of the groove area, paving the way for the formation of a convex isolation area structure after subsequent wet cleaning.

[0085] In some specific implementation cases, the conditions for the ultraviolet laser four-time patterning grooving are: laser wavelength of 200~400 nm, frequency of 500~700 KHz, marking speed of 40000~50000 mm / s, power of 10~40 W, and processing time of 1~3 s.

[0086] The present invention uses green laser in S9, while ultraviolet laser is used in S10. The present invention cleverly utilizes the characteristic that the penetration depth of ultraviolet laser is shallower than that of green laser, and can loosen the sedimentary layers of different depths at the bottom thereof on the basis of ensuring the removal of BSG layer and PSG layer. In the process of three-time patterning grooving by green laser, the sedimentary layers (tunneling oxide layer, boron diffusion layer, phosphorus diffusion layer) at the bottom of the grooved area can be loosened, so they can be completely removed in the subsequent wet cleaning process; while the depth of four-time patterning grooving by ultraviolet laser is shallow, so only the surface layers of boron diffusion layer and phosphorus diffusion layer at the bottom of the grooved area can be loosened, so that in the subsequent wet cleaning process, only the surface layers of boron diffusion layer and phosphorus diffusion layer in the area are accurately controlled to be corroded and removed, thereby forming a convex isolation area structure.

[0087] In addition, in addition to cleverly utilizing the difference in penetration depth of laser wavelength to assist in constructing the convex isolation region structure in S9 and S10, the present invention also controls the power of the two laser treatments. Since the three-time patterning treatment of the green laser is deeper and the four-time patterning treatment of the ultraviolet laser is slightly shallower, the three-time patterning treatment of the green laser has a higher power and a longer time, while the four-time patterning treatment of the ultraviolet laser has a relatively lower power and a shorter time.

[0088] S11, removing the coating on the front and side surfaces of the silicon wafer.

[0089] In some specific implementation cases, a chain machine (acid etching) is used to remove the boron diffusion layer and phosphorus diffusion layer and other coating layers on the front and side surfaces of the silicon wafer.

[0090] S12, cleaning and texturing: The silicon wafer is wet cleaned and texturing in alkaline. In the area covered by the BSG layer and the PSG layer, the bottom boron diffusion layer and the phosphorus diffusion layer are protected from being corroded by the alkali. For other areas, due to the different depths of laser loosening in S9 and S10, the alkali corrosion rate in different areas will be different. The wet etching rate is: V （激光三次图形化区域） >V（激光四次图形化区域） Therefore, by controlling the reasonable cleaning time, the deposition layer in the green laser three-time patterning groove area on the back of the silicon wafer is removed to expose the back of the silicon wafer, and the surface layer of the boron diffusion layer 5 and the surface layer of the phosphorus diffusion layer 7 that are loosened in the ultraviolet laser four-time patterning groove area are removed to form a convex isolation area structure. Among them, the width of the surface layer of the boron diffusion layer 5 and the surface layer of the phosphorus diffusion layer 7 that are removed on one side is 25-40% of the original whole layer, and the height is 30-80% of the original whole layer. At the same time, the pyramid velvet surface 9 is formed after the isolation area on the front and back of the silicon wafer is textured; then the PSG layer 8 and the BSG layer 6 remaining on the back of the silicon wafer are removed by acid pickling, as shown in FIG. Figure 7 shown.

[0091] In some specific implementation cases, the silicon wafer after de-plating is placed in an alkaline texturing tank for wet cleaning and texturing integrated treatment, wherein the temperature is maintained at 75-85°C for 6-12 minutes.

[0092] S13, double-sided coating: after double-sided coating, a passivation anti-reflection layer 10 is generated on the front and back sides of the silicon wafer.

[0093] S14, screen printing, sintering to form electrode layer 11, light injection, to obtain a TBC solar cell with a convex isolation region structure, such as Figure 8 shown.

[0094] Specific examples and comparative examples.

[0095] Example 1

[0096] A method for preparing a TBC solar cell with a convex isolation region structure specifically comprises the following steps:

[0097] S1. Double-sided polishing of silicon wafer: Select N-type single crystal silicon wafer 1 cut by diamond wire, with a thickness of 150 μm and a size of 182.2 mm × 186.7 mm. Put the silicon wafer into the alkaline polishing tank, maintain the temperature at 75°C, and perform double-sided polishing for 6 min. The polishing thickness is 4 μm and the thinning amount is 0.42 g. Figure 1 shown.

[0098] S2, forming a tunnel oxide layer 2 (using LPCVD method), an intrinsic polysilicon layer 3 (using LPCVD method), and a mask layer 4 (using LPCVD method) on the back of the silicon wafer in sequence, such as Figure 2 As shown. Among them:

[0099] The deposition conditions of the tunneling oxide layer are: O2 flow rate 40000 sccm, reaction temperature 600℃, time 600 s, and the thickness of the tunneling oxide layer is about 3 nm.

[0100] The deposition conditions of the intrinsic polysilicon layer are: SiH4 flow rate 920 sccm, reaction temperature 550℃, time 3.3 h, working gas pressure 300 mTorr, and the thickness of the intrinsic polysilicon layer is about 290 nm.

[0101] The LPCVD deposition conditions of the mask layer are: O2 flow rate of 50000 sccm, temperature of 650℃, time of 3000 s, and the thickness of the mask layer is about 52 nm.

[0102] S3, laser one-time patterning grooving to remove the mask layer in the designed area of ​​the boron diffusion layer, the conditions are: laser wavelength 532nm, frequency 600KHz, marking speed 45000mm / s, power 25W, processing time 2.7s.

[0103] S4, alkaline cleaning to remove the residual mask layer 4 in the groove area so that the intrinsic polysilicon layer 3 in the area is fully exposed, such as Figure 3 The specific steps are as follows: put the silicon wafer into an alkaline solution for cleaning at a temperature of 75°C. During the experiment, by adjusting different parameters such as cleaning time, and using an ellipsometer to test the thickness of the mask layer after cleaning, the mask layer in the slotted area can be accurately removed, so that the bottom intrinsic polysilicon layer will not be removed too much during the alkaline cleaning process.

[0104] S5, boron diffusion, so that the inner layer and the surface layer of the exposed intrinsic polysilicon layer are converted into a boron diffusion layer and a BSG layer respectively. The conditions for boron diffusion are: temperature 850°C, diffusion time 10 min, BCl3 flow rate 200 sccm, O2 flow rate 1200 sccm; oxidation advancement temperature 950°C, O2 flow rate 7000 sccm, advancement time 30 min. The thickness of the BSG layer is about 45 nm. In the above-mentioned boron diffusion process, the ungrooved area of ​​S3 can effectively block boron atoms from entering the intrinsic polysilicon layer 3 due to the protection of the mask layer 4, and only the inner layer and the surface layer of the exposed intrinsic polysilicon layer 3 are converted into a boron diffusion layer 5 and a BSG layer 6 respectively, as shown in FIG. Figure 4 shown.

[0105] S6. Laser secondary patterning and grooving to remove the remaining mask layer. The conditions are: laser wavelength 532 nm, frequency 600 KHz, marking speed 45000 mm / s, power 25 W, and processing time 2.7 s.

[0106] S7, alkaline cleaning to remove the residual mask layer in the grooved area in S6 so that the intrinsic polysilicon layer in the area is fully exposed, such as Figure 5 The specific steps are as follows: put the silicon wafer into an alkaline solution for cleaning at a temperature of 75°C. During the experiment, by adjusting different parameters such as cleaning time, and using an ellipsometer to test the thickness of the mask layer after cleaning, the mask layer in the slotted area can be accurately removed, so that the bottom intrinsic polysilicon layer will not be removed too much during the alkaline cleaning process.

[0107] S8, phosphorus diffusion, so that the inner layer and the surface layer of the exposed intrinsic polysilicon layer are converted into a phosphorus diffusion layer and a PSG layer respectively. The conditions for phosphorus diffusion are: temperature 790°C, diffusion time 20 min, POCl3 carried by nitrogen with a flow rate of 1100 sccm, O2 flow rate 700 sccm; oxidation advancement temperature 890°C, O2 flow rate 3000 sccm, advancement time 40 min. The thickness of the PSG layer is about 42 nm. In the above phosphorus diffusion process, since the surface of the boron diffusion layer 5 is protected by the BSG layer 6, the phosphorus atoms cannot diffuse into the boron diffusion layer 5, and only the inner layer and the surface layer of the exposed remaining intrinsic polysilicon layer 3 are converted into a phosphorus diffusion layer 7 and a PSG layer 8 respectively, as shown Figure 6 shown.

[0108] S9, three-time patterning of green laser to remove the BSG layer and PSG layer at the junction of the boron diffusion layer (p-region) and the phosphorus diffusion layer (n-region), and loosen the deposited layers (tunneling oxide layer, boron diffusion layer, phosphorus diffusion layer) in the grooved area. The conditions are: laser wavelength of 532 nm, frequency of 600 KHz, marking speed of 45000 mm / s, power of 50 W, and processing time of 3 s. The area where the green laser is patterned three times is the pre-designed isolation area (i.e., the insulating Gap area). After removing the BSG layer and PSG layer in this area, an isolation area can be formed after subsequent wet cleaning.

[0109] S10, ultraviolet laser four-time patterning groove to remove the remaining BSG layer and the remaining PSG layer on both sides, and loosen the surface of the boron diffusion layer and the phosphorus diffusion layer in the groove area. The conditions are: laser wavelength of 355 nm, frequency of 600 KHz, marking speed of 45000 mm / s, power of 20 W, and processing time of 1.5 s. The purpose of the ultraviolet laser four-time patterning groove area is to remove the remaining BSG layer and the remaining PSG layer on both sides, and loosen the surface of the boron diffusion layer and the phosphorus diffusion layer at the bottom of the groove area, paving the way for the formation of a convex isolation area structure after subsequent wet cleaning.

[0110] S11. Removal of coatings on the front and side surfaces of silicon wafers: Use a chain machine (acid etching) to remove coatings such as the boron diffusion layer and the phosphorus diffusion layer on the front and side surfaces of the silicon wafers.

[0111] S12, cleaning and texturing: The silicon wafer is wet cleaned and texturized in alkaline environment, and the temperature is maintained at 82°C for 7 minutes. After the deposition layer in the green laser three-time patterning groove area on the back of the silicon wafer is removed, the back of the silicon wafer is exposed, and the surface layer of the boron diffusion layer and the surface layer of the phosphorus diffusion layer that are loosened in the ultraviolet laser four-time patterning groove area are removed to form a convex isolation area structure. Among them, the width of the surface layer of the boron diffusion layer and the surface layer of the phosphorus diffusion layer that are removed on one side is 30% of the original entire layer, and the height is 50% of the original entire layer. At the same time, after texturing, the isolation areas on the front and back of the silicon wafer form a pyramid velvet surface 9; then the PSG layer 8 and BSG layer 6 remaining on the back of the silicon wafer are removed by acid pickling, as shown in FIG. Figure 7 shown.

[0112] S13, double-sided coating: after double-sided coating, a passivation anti-reflection layer 10 is generated on the front and back sides of the silicon wafer. Specifically, the following steps are used: firstly, AlO is deposited on the front and back sides of the processed silicon wafer by atomic layer deposition (ALD) method. x The film is generated by the reaction of Al(CH3)3 and water vapor, with a thickness of 8 nm and a process temperature of 250°C. Then, SiN is deposited on both sides of the silicon wafer using a tubular PECVD device. x Film, front SiN x The thickness of the film is about 82 nm, and the refractive index is 2.1; the back SiN x The thickness of the film is about 90 nm and the refractive index is 2.0; the reaction gases in the tubular cavity are SiH4 and NH3, the working pressure is 1600 mTorr, the power is 12000 W, the temperature is 440℃, the SiH4 gas flow rate is 980 sccm, the NH3 gas flow rate is 8000 sccm, the silicon-nitrogen ratio is 1:5, and the deposition time is 10 min.

[0113] S14, screen printing the coated silicon wafer on the back to form a metal contact, then sintering at 770°C to form an Ag-Si ohmic contact (electrode layer 11), and finally light injection repair to obtain a TBC solar cell with a convex isolation region structure, such as Figure 8 shown.

[0114] Example 2

[0115] The difference between Example 2 and Example 1 is that the mask layer in S2 is formed by a one-step ultraviolet laser oxidation treatment: first, a mask layer with a thickness of about 52 nm is generated under the conditions of an O2 flow rate of 50 sccm, an ambient oxygen concentration of 26% (volume concentration), an ultraviolet laser wavelength of 355 nm, a power of 12 W, and a processing time of 10 s.

[0116] Example 3

[0117] The difference between Example 3 and Example 1 is that the mask layer in S2 is formed by two-step ultraviolet laser oxidation treatment:

[0118] First, a mask layer prototype with a thickness of about 52 nm was generated under the conditions of an O2 flow rate of 50 sccm, an ambient oxygen concentration of 26% (volume concentration), an ultraviolet laser wavelength of 355 nm, a power of 12 W, and a processing time of 10 s.

[0119] Then, under the conditions of O2 flow rate of 200 sccm, ambient oxygen concentration of 60% (volume concentration), UV laser wavelength of 266 nm, power of 3 W, and processing time of 18 s, a denser mask layer was formed.

[0120] Comparative Example 1 (using two intrinsic polysilicon layer deposition processes)

[0121] S1. Select N-type single crystal silicon wafers cut with diamond wire, with a thickness of 150 μm and a size of 182.2 mm×186.7 mm. Put the cut silicon wafers into an alkaline polishing tank, maintain the temperature at 75°C, and perform double-sided polishing for 6 min. The polishing thickness is 4 μm and the thinning amount is 0.42 g.

[0122] S2. Subsequently, a tunneling oxide layer is first grown on the back surface of the polished silicon wafer using LPCVD, with an O2 gas flow rate of 40,000 sccm, a temperature of 600°C, and a growth time of 600 s. The thickness of the grown tunneling oxide layer is about 3 nm. Then, an intrinsic polysilicon layer is grown again on the basis of the tunneling oxide layer, with an SiH4 gas flow rate of 920 sccm, a temperature of 550°C, a growth time of 3.3 h, a working pressure of 300 mTorr, and a thickness of the intrinsic polysilicon layer of about 290 nm.

[0123] S3. Then, a high-temperature boron diffusion method is used to transform the inner layer and the surface layer of the intrinsic polysilicon layer into a boron diffusion layer and a BSG layer, respectively. The boron diffusion temperature is 850°C, the diffusion time is 10 min, the BCl3 gas flow rate is 200 sccm, the O2 gas flow rate is 1200 sccm, the oxidation advancement temperature is 950°C, the O2 flow rate is 7000 sccm, the advancement time is 30 min, and the BSG layer thickness is about 45 nm.

[0124] S4. Use picosecond laser to perform a patterned grooving of the BSG layer. The laser wavelength used is 532 nm, the frequency is 600 KHZ, the marking speed is 45000 mm / s, the power is 50 W, and the processing time is 3 s.

[0125] S5. The silicon wafer after laser patterning and slotting is placed in an alkaline solution for cleaning at a temperature of 75°C for 360 s and a corrosion depth of 1.7 μm.

[0126] S6. Then, a tunneling oxide layer is grown for the second time on the back surface of the silicon wafer by LPCVD. The gas flow rate of O2 is 30,000 sccm, the temperature is 600°C, the time is 450 s, and the thickness of the grown tunneling oxide layer is about 2.5 nm. Then, an intrinsic polysilicon layer is grown again on the basis of the tunneling oxide layer. The gas flow rate of SiH4 is 920 sccm, the temperature is 550°C, the time is 1.5 h, the working pressure is 300 mTorr, and the thickness of the intrinsic polysilicon layer is about 180 nm.

[0127] S7. The inner layer and the surface layer of the intrinsic polysilicon layer are transformed into a phosphorus diffusion layer and a PSG layer respectively by the phosphorus diffusion method. The phosphorus diffusion temperature is 790°C, the diffusion time is 15 min, POCl3 is carried by nitrogen with a flow rate of 1000 sccm, the O2 flow rate is 650 sccm, the oxidation advancement temperature is 890°C, the O2 flow rate is 3000 sccm, the advancement time is 20 min, and the PSG layer thickness is about 39nm.

[0128] S8. Then, a picosecond laser is used to perform secondary patterning and grooving of the PSG layer to loosen the PSG layer corresponding to the bottom of the boron diffusion layer and the PSG layer at the junction of the p-region and the n-region. The laser wavelength is 532 nm, the frequency is 600 KHz, the marking speed is 45000 mm / s, the power is 25 W, and the processing time is 2.7 s.

[0129] S9. Use a chain machine to remove the boron diffusion layer and phosphorus diffusion layer plated on the front and side surfaces of the silicon wafer.

[0130] S10, put the silicon wafer that has been deplated into the alkaline texturing tank for wet cleaning and texturing of the laser slotted area on the back side, maintain the temperature at 82°C for 7 minutes, lose 0.36 g, and perform cleaning and texturing. Since the silicon wafer has been deplated and there is no oxidation area on the front side, an effective light-trapping velvet surface can be formed during the texturing process; and in the laser patterning area on the back side, the alkaline solution can effectively corrode the bottom deposition layer to form an isolated insulating structure. The subsequent acid cleaning tank of the texturing tank can further remove the PSG layer and BSG layer remaining on the silicon wafer.

[0131] S11, using ALD deposition method to deposit AlO on the front and back sides of the processed silicon wafer x The film is generated by the reaction of Al(CH3)3 and water vapor, with a thickness of 8 nm and a process temperature of 250°C. Then, SiN is deposited on both sides using a tubular PECVD device. x Film, front SiN x The thickness of the film is about 82 nm, and the refractive index is 2.1; the back SiN xThe thickness of the film is about 90 nm and the refractive index is 2.0; the reaction gases in the tubular cavity are SiH4 and NH3, the working pressure is 1600 mTorr, the power is 12000 W, the temperature is 440℃, the SiH4 gas flow rate is 980 sccm, the NH3 gas flow rate is 8000 sccm, the silicon-nitrogen ratio is 1:5, and the deposition time is 10 min.

[0132] S12. The coated sheet is screen-printed on the back to form a metal contact, and then sintered at 770°C to form an Ag-Si ohmic contact. Finally, the final TBC finished battery is obtained through light injection repair.

[0133] Comparative Example 2

[0134] The difference between Comparative Example 2 and Example 1 is that S10 is not included, that is, S11 to S14 are directly performed after S9 of Example 1, and the TBC solar cell finally obtained does not have a convex isolation region structure.

[0135] Performance comparison

[0136] Table 1: Electrical performance data of different batteries

[0137]

[0138] From the data in the above table, we can see that:

[0139] (1) Since Examples 1-3 all adopt a one-step deposition method for the intrinsic polysilicon layer, compared with Comparative Example 1, the poly-Si parasitic absorption of the battery is lower because it has a higher short-circuit current density.

[0140] (2) Since Examples 1-3 adopt a convex isolation region structure, the poly-Si parasitic absorption of the battery is further reduced compared with Comparative Example 2, and the battery leakage value is also further improved compared with Comparative Example 2.

[0141] (3) The difference between Examples 1-3 is that the preparation methods of the mask layer are different. Specifically: Example 1 adopts the more traditional LPCVD process, Example 2 adopts a one-step ultraviolet laser oxidation process, and Example 3 adopts a two-step differentiated ultraviolet laser oxidation process. The results show that the performance of the final product obtained by preparing the mask layer using the LPCVD process is not as good as that of the ultraviolet laser oxidation process. At the same time, the oxidation barrier layer formed by the one-step ultraviolet laser oxidation process in Example 2 is often not as dense as expected, which easily increases the risk of boron atoms and phosphorus atoms diffusing into the bottom intrinsic polysilicon layer during subsequent boron diffusion and phosphorus diffusion, thereby causing battery performance degradation or leakage. While Example 3 adopts a two-step differentiated ultraviolet laser oxidation process, the oxidation barrier layer can be made denser without almost increasing the thickness, so it can more effectively block the subsequent inward expansion of boron and phosphorus atoms, thereby improving battery performance.

[0142] The raw materials and equipment used in the present invention, unless otherwise specified, are all commonly used raw materials and equipment in the art; the methods used in the present invention, unless otherwise specified, are all conventional methods in the art.

[0143] The above description is only a preferred embodiment of the present invention and does not limit the present invention in any way. Any simple modification, change and equivalent transformation made to the above embodiment based on the technical essence of the present invention still falls within the protection scope of the technical solution of the present invention.

Claims

1. A method for preparing a TBC solar cell having a convex isolation region structure, characterized in that include: S1, double-sided polishing of silicon wafer; S2, forming a tunneling oxide layer, an intrinsic polysilicon layer, and a mask layer on the back side; The mask layer is formed by ultraviolet oxidation laser treatment: first, the mask layer prototype is generated by treating it for 1 to 30 s at an O2 flow rate of 10 to 100 sccm, an ambient oxygen concentration of 20 to 40%, a wavelength of 300 to 400 nm, and a power of 10 to 500 W; then, the mask layer is formed by treating it for 1 to 30 s at an O2 flow rate of 100 to 500 sccm, an ambient oxygen concentration of 50 to 90%, a wavelength of 200 to 300 nm, and a power of 2 to 50 W; S3, groove removal of the mask layer in the designed area of ​​the boron diffusion layer; S4, alkali cleaning; S5, boron diffusion, so that the exposed intrinsic polysilicon layer is converted into a boron diffusion layer and a BSG layer; S6, cutting and removing the remaining mask layer; S7, alkali cleaning; S8, phosphorus diffusion, converting the exposed intrinsic polysilicon layer into a phosphorus diffusion layer and a PSG layer; S9, green laser grooving to remove the BSG layer and PSG layer at the junction of the boron diffusion layer and the phosphorus diffusion layer, and loosen the deposited layers at the bottom; laser wavelength 477~592 nm, power 40~100 W, processing time 1~5 s; S10, ultraviolet laser grooving to remove the remaining BSG layer and the remaining PSG layer on both sides, and loosen the surface of the boron diffusion layer and the surface of the phosphorus diffusion layer at the bottom; the laser wavelength is 200~400 nm, the power is 10~40 W, and the processing time is 1~3 s; S11, removing the coating; S12, the silicon wafer is wet cleaned and textured synchronously under alkaline conditions, the deposition layer loosened by S9 and the surface layers of the boron diffusion layer and the phosphorus diffusion layer loosened by S10 are removed, the width of the surface layers of the boron diffusion layer and the phosphorus diffusion layer removed on one side is 25-40% of the entire layer, and the height is 30-80% of the entire layer, forming a convex isolation area structure; at the same time, a pyramid texture surface is formed in the isolation areas on the front and back of the silicon wafer; finally, the residual PSG layer and BSG layer are removed by pickling; S13, double-sided coating; S14, screen printing, sintering, light injection.

2. The preparation method according to claim 1, characterized in that: In S2, the thickness of the mask layer is 30-300 nm.

3. The preparation method according to claim 1, characterized in that: In S2, the thickness of the tunnel oxide layer is 2-10 nm.

4. The preparation method according to claim 3, characterized in that: In S2, the deposition conditions of the tunnel oxide layer are: O2 flow rate 10000~80000 sccm, reaction temperature 400~800°C, and time 200~1000 s.

5. The preparation method according to claim 1, characterized in that: In S2, the thickness of the intrinsic polysilicon layer is 100-300 nm.

6. The preparation method according to claim 5, characterized in that: In S2, the deposition conditions of the intrinsic polysilicon layer are: SiH4 flow rate 300~2000 sccm, reaction temperature 500~700°C, time 2~4 h, working gas pressure 100~500 mTorr, and intrinsic polysilicon layer thickness 100~300 nm.

7. The preparation method according to claim 1, characterized in that: In S5, the BSG layer has a thickness of 30-70 nm.

8. The preparation method according to claim 7, characterized in that: In S5, the boron diffusion conditions are: temperature 800-900°C, diffusion time 5-50 min, BCl3 flow rate 50-500 sccm, O2 flow rate 500-2000 sccm; oxidation advancement temperature 900-1050°C, O2 flow rate 5000-30000 sccm, advancement time 30-80 min.

9. The preparation method according to claim 1, characterized in that: In S8, the PSG layer has a thickness of 30-70 nm.

10. The preparation method according to claim 9, characterized in that: In S8, the conditions for phosphorus diffusion are: temperature 750-850°C, diffusion time 5-30 min, POCl3 is carried by nitrogen with a flow rate of 500-1200 sccm, and O2 flow rate 500-1000 sccm; oxidation advancement temperature 850-950°C, O2 flow rate 1000-10000 sccm, and advancement time 20-60 min.

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