Switching converter, integrated circuit controller device and control method thereof

Abstract

Disclosed are a switching converter, an integrated circuit control device and a control method thereof. The switching converter comprises a pre-stage circuit, a voltage dividing circuit, a current detecting circuit, a post-stage circuit and a voltage detecting circuit. The pre-stage circuit is coupled between a first node and a second node to generate a first output voltage. The voltage dividing circuit is coupled between the first node and a third node to receive a bus voltage and provide a first voltage signal representing the bus voltage at an output terminal. The current detecting circuit is coupled between the third node and the second node. The post-stage circuit is coupled between the first node and the third node to receive the bus voltage and convert the bus voltage into a second output voltage. The voltage detecting circuit is coupled to the output terminal of the voltage dividing circuit to receive the first voltage signal, coupled to the third node to receive a second voltage signal, and generates a voltage detecting signal representing the first output voltage based on the first voltage signal and the second voltage signal. The switching converter has a low standby power loss.

Description

Technical Field

[0001] Embodiments of the present invention relate to electronic circuits, and more particularly to switching converters and integrated circuit control devices and control methods thereof. Background Art

[0002] Figure 1 The schematic diagram of the structure of the existing switching converter 100 is shown. The front-stage circuit 10 generates a voltage Vbus at a node T1 based on the input voltage Vin, and the rear-stage circuit 13 generates an output voltage Vout based on the voltage Vbus to supply power to a load (not shown). In order to calculate the conduction time of the switch tube in the switching converter 100 and perform overvoltage protection, the front-stage circuit 10 and the rear-stage circuit 13 both need to detect the voltage Vbus. However, due to the presence of the resistor Rcs, the front-stage circuit 10 and the rear-stage circuit 13 do not share a common ground. For example, the front-stage circuit 10 has a reference ground GND1, and the rear-stage circuit 13 has a reference ground GND2. Therefore, the front-stage circuit 10 and the rear-stage circuit 13 usually require different circuits to detect the voltage Vbus. As Figure 1 As shown, the front-stage circuit 10 uses a first voltage divider circuit 11 to generate a first voltage detection signal Vs1 representing the voltage of the voltage Vbus relative to the reference ground GND1, and the back-stage circuit 13 uses a second voltage divider circuit 12 to generate a second voltage detection signal Vs2 representing the voltage of the voltage Vbus relative to the reference ground GND2. However, using different voltage divider circuits to detect the voltage Vbus results in significant power loss in the switching converter 100. This power loss is unacceptable, especially under light load or no-load conditions, and cannot meet the light load or no-load power consumption requirements of some applications. Summary of the Invention

[0003] In view of the problems existing in the prior art, the present invention proposes a switching converter and an integrated circuit control device and a control method thereof, so as to reduce the power loss of the switching converter under light load or no load.

[0004] According to one embodiment of the present invention, a switching converter is disclosed, including: a front-stage circuit, which generates a first output voltage at a first node and a second node; a voltage divider circuit, coupled between the first node and a third node to receive a bus voltage, and provides a first voltage signal representing the bus voltage at an output end; a current detection circuit, coupled between the third node and the second node; a rear-stage circuit, coupled between the first node and the third node to receive the bus voltage, and converting the bus voltage into a second output voltage; and a voltage detection circuit, coupled to the output end of the voltage divider circuit to receive the first voltage signal, and coupled to the third node to receive the second voltage signal, and based on the first voltage signal and the second voltage signal, the voltage detection circuit generates a voltage detection signal representing the first output voltage.

[0005] According to another embodiment of the present invention, an integrated circuit control device for a switching converter is disclosed, which switching converter includes a front-stage circuit that generates a first output voltage at a first node and a second node, a voltage divider circuit coupled between the first node and a third node, a current detection circuit coupled between the third node and the second node, and a post-stage circuit coupled between the first node and the third node to receive a bus voltage. The integrated circuit control device includes: a first pin, coupled to the output end of the voltage divider circuit to receive a first voltage signal representing the bus voltage; a second pin, coupled to the third node to receive a second voltage signal; a third pin, providing a switch control signal to control the front-stage circuit to generate a first output voltage; a voltage detection circuit, coupled to the first pin to receive the first voltage signal, coupled to the second pin to receive the second voltage signal, based on the first voltage signal and the second voltage signal, the voltage detection circuit generates a voltage detection signal representing the first output voltage; and a switch control circuit, receiving the voltage detection signal and generating a switch control signal based on the voltage detection signal.

[0006] According to another embodiment of the present invention, a control method for a switching converter is disclosed, wherein the switching converter includes a front-stage circuit that generates a first output voltage at a first node and a second node, a voltage divider circuit coupled between the first node and a third node, a current detection circuit coupled between the third node and the second node, and a rear-stage circuit coupled between the first node and the third node to receive a bus voltage. The control method includes: coupling to the output end of the voltage divider circuit to receive a first voltage signal representing the bus voltage; coupling to the third node to receive a second voltage signal; generating a voltage detection signal representing the first output voltage based on the first voltage signal and the second voltage signal; and generating a switch control signal based on the voltage detection signal to control the front-stage circuit to generate the first output voltage.

[0007] According to the embodiment of the present invention, the front-stage circuit and the rear-stage circuit can share the same voltage divider circuit to perform voltage detection, thereby reducing the power loss of the switching converter. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] In order to better understand the present invention, the present invention will be described in detail with reference to the following drawings:

[0009] Figure 1 1 shows a schematic diagram of the circuit structure of an existing switching converter 100;

[0010] Figure 2 FIG. 2 shows a circuit block diagram of a switching converter 200 according to an embodiment of the present invention;

[0011] Figure 3 FIG2 shows a circuit structure diagram of a switching converter 200A according to another embodiment of the present invention;

[0012] Figure 4 FIG. 1 shows a working state diagram of the switches S1 to S4 of the front-stage circuit 20A according to an embodiment of the present invention;

[0013] Figure 5 FIG2 shows a circuit structure diagram of a switching converter 200B according to another embodiment of the present invention;

[0014] Figure 6 FIG. 6 is a flow chart of a control method 600 for a switching converter according to an embodiment of the present invention. DETAILED DESCRIPTION

[0015] Specific embodiments of the present invention will be described in detail below. It should be noted that the embodiments described herein are for illustrative purposes only and are not intended to limit the present invention. In the following description, numerous specific details are set forth to provide a thorough understanding of the present invention. However, it will be apparent to one of ordinary skill in the art that these specific details are not necessarily required to practice the present invention. In other instances, well-known circuits, materials, or methods are not described in detail to avoid obscuring the present invention.

[0016] Throughout this specification, references to "one embodiment," "an embodiment," "an example," or "an example" mean that a particular feature, structure, or characteristic described in connection with that embodiment or example is included in at least one embodiment of the present invention. Therefore, the phrases "in one embodiment," "in an embodiment," "an example," or "an example" that appear in various places throughout this specification do not necessarily all refer to the same embodiment or example. Furthermore, particular features, structures, or characteristics may be combined in one or more embodiments or examples in any suitable combinations and / or subcombinations. Furthermore, those skilled in the art will appreciate that the figures provided herein are for illustrative purposes only and are not necessarily drawn to scale. Identical reference numerals indicate identical elements. It should be understood that when an "element" is referred to as being "connected to" or "coupled to" another element, it can be directly connected or coupled to the other element or intervening elements may be present. In contrast, when an element is referred to as being "directly connected to" or "directly coupled to" another element, there are no intervening elements. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0017] Throughout this specification, relative terms such as first and second, etc. may be used solely to distinguish one entity or action from another entity or action, and do not necessarily or imply the existence of such an order between these entities or actions. Numerical sequences such as "first," "second," "third," etc. refer only to different individuals in a plurality and do not imply any order or sequence unless specifically defined by the claim language. The order of the text in any claim does not mean that the processing steps must be performed in this order or logical order unless specifically provided by the claim language. These processing steps may be interchanged in any order without departing from the scope of the invention, as long as such interchange does not cause the claim language to be inconsistent and does not appear logically absurd.

[0018] Figure 2 FIG. 1 shows a circuit block diagram of a switching converter 200 according to an embodiment of the present invention. Figure 2 As shown, the switching converter 200 includes a front-stage circuit 20 , a voltage divider circuit 21 , a current detection circuit 22 , and a rear-stage circuit 23 .

[0019] The front-stage circuit 20 is coupled between the node T1 and the node T2 to receive the input voltage Vin, and generates a first output voltage Vout1 at the node T3 and the node T4 based on the input voltage Vin. The voltage divider circuit 21 is coupled between the node T3 and the node T5, and generates a first voltage signal Vfb at the output terminal. The current detection circuit 22 is coupled between the node T5 and the node T4, and provides a second voltage signal Vcs at the node T5. The rear-stage circuit 23 is coupled between the node T3 and the node T5, takes the bus voltage Vbus between the node T3 and the node T5 as the input voltage, and converts the input voltage into a second output voltage Vout to power the load (not shown). Figure 2 In the illustrated embodiment, the node T4 is the reference ground GND1 of the front-stage circuit 20 , and the node T5 is the reference ground GND2 of the back-stage circuit 23 .

[0020] exist Figure 2 In the embodiment shown, the voltage divider circuit 21 and the subsequent circuit 23 are coupled in parallel between the node T3 and the node T5. The subsequent circuit 23 can directly detect the bus voltage VBus using the voltage divider circuit 21. In one embodiment, the first voltage signal Vfb represents the bus voltage Vbus.

[0021] Those skilled in the art will appreciate that the post-stage circuit 23 is not essential. In other embodiments, the post-stage circuit 23 may be omitted, that is, a load (not shown) may be directly coupled between the node T3 and the node T5, and the bus voltage Vbus between the nodes T3 and T5 may be used to power the load.

[0022] The switching converter 200 further includes a voltage detection circuit 24. Figure 2 In the illustrated embodiment, the voltage detection circuit 24 is integrated into the integrated circuit control device IC1. The integrated circuit control device IC1 has multiple pins, including a pin FB for receiving feedback voltage information, a pin CS for receiving current information, a reference ground pin GND, and a pin G1 for providing a switch control signal. Pin FB is coupled to the output of the voltage divider circuit 21 to receive the first voltage signal Vfb. Pin CS is coupled to node T5 to receive the second voltage signal Vcs. Pin GND is coupled to the reference ground GND1 of the preceding circuit 20. The voltage detection circuit 24 uses GND1 as a reference ground to detect the first output voltage Vout1.

[0023] The voltage detection circuit 24 has a first input terminal, a second input terminal, and an output terminal. The first input terminal is coupled to pin FB to receive a first voltage signal Vfb, and the second input terminal is coupled to pin CS to receive a second voltage signal Vcs. Based on the first voltage signal Vfb and the second voltage signal Vcs, the voltage detection circuit 24 generates a voltage detection signal Vsen at the output terminal representing the first output voltage Vout1. In one embodiment, the voltage detection circuit 24 generates the voltage detection signal Vsen based on the power operation status of the preceding stage circuit 20. In one embodiment, when the preceding stage circuit 20 is in power operation, the voltage detection circuit 24 generates the voltage detection signal Vsen at the output terminal based on a difference voltage signal Vsub representing the difference between the first voltage signal Vfb and the second voltage signal Vcs. When the preceding stage circuit 20 is not in power operation, the voltage detection circuit 24 generates the voltage detection signal Vsen at the output terminal based on the first voltage signal Vfb.

[0024] like Figure 2 As shown, the integrated circuit control device IC1 also includes a switch control circuit 25. The switch control circuit 25 is coupled to the output terminal of the voltage detection circuit 24 to receive the voltage detection signal Vsen, and generates a switch control signal P1 based on the voltage detection signal Vsen. Pin G1 provides the switch control signal P1 to the front-stage circuit 20 to control the front-stage circuit 20 to convert the input voltage Vin into the first output voltage Vout1. For the sake of clarity, the other circuit structures of the integrated circuit control device IC1 are not shown. Figure 2 Those skilled in the art will appreciate that the integrated circuit control device IC1 may further include other circuits, such as an overvoltage / overcurrent protection circuit.

[0025] Figure 3 FIG2 shows a circuit structure diagram of a switching converter 200A according to another embodiment of the present invention. The switching converter 200A includes a pre-stage circuit 20A, a voltage divider circuit 21, and a current detection circuit 22. Figure 3As shown, the front-stage circuit 20A is a totem-pole power factor correction (PFC) structure, including: an inductor L1 coupled between nodes T1 and SW; a first switch S1 coupled between nodes T3 and SW; a second switch S2 coupled between nodes SW and T4; a third switch S3 coupled between nodes T2 and T4; a fourth switch S4 coupled between nodes T3 and T2; and a capacitor Cbus coupled between nodes T3 and T4. The front-stage circuit 20A receives an input voltage Vin between nodes T1 and T2 and generates a first output voltage Vout1 at nodes T3 and T4 by turning on and off the switches S1-S4. Node T4 is the reference ground GND1 of the front-stage circuit 20A.

[0026] The voltage divider circuit 21 is coupled between the node T3 and the node T5 and generates a first voltage signal Vfb at an output terminal. The current detection circuit 22 is coupled between the node T5 and the node T4 and provides a second voltage signal Vcs at the node T5.

[0027] exist Figure 3 In the illustrated embodiment, the second voltage signal Vcs represents the current IL flowing through the inductor L1 , and more specifically, represents the current in the decreasing phase of the current IL.

[0028] Figure 4 FIG. 1 shows the working state diagram of the switch tubes S1 to S4 of the front-stage circuit 20A according to an embodiment of the present invention. Figure 4 (a) and 4(b) show the working conditions of the switches S1 to S4 when the input voltage Vin is in the positive half cycle. Figure 4 (c) and 4(d) show the working conditions of the switches S1 to S4 when the input voltage Vin is in the negative half cycle.

[0029] When the input voltage Vin is in the positive half cycle, Figure 4 As shown in (a) and 4 (b), the third switch tube S3 remains on, the fourth switch tube S4 remains off, the second switch tube S2 is the main control tube, and the first switch tube S1 is the synchronization tube. Figure 4 In (b), the first switch S1 is turned on, the second switch S2 is turned off, and the current IL gradually decreases and flows through the inductor L1, the first switch S1, the capacitor Cbus, the current detection circuit 22 and the third switch S3 in sequence.

[0030] When the input voltage Vin is in the negative half cycle, Figure 4 As shown in (c) and 4 (d), the third switch tube S3 remains off, the fourth switch tube S4 remains on, the first switch tube S1 is the main control tube, and the second switch tube S2 is the synchronization tube. Figure 4In (d), the first switch S1 is turned off, the second switch S2 is turned on, and the current IL gradually decreases and flows through the fourth switch S4, the capacitor Cbus, the current detection circuit 22, the second switch S2, and the inductor L1 in sequence.

[0031] It can be seen that during the decreasing phase of the current IL, the current IL will flow through the current detection circuit 22 . Therefore, the second voltage signal Vcs represents the current during the decreasing phase of the current IL.

[0032] continue Figure 3 Description, such as Figure 3 As shown, switching converter 200A further includes a voltage detection circuit 24A, which is integrated into integrated circuit control device IC1. Integrated circuit control device IC1 also includes a pin CS for receiving current information, a pin FB for receiving feedback voltage information, a reference ground pin GND, pins G1-G4 for providing switch control signals, and a switch control circuit 25A. Pin FB is coupled to the output of voltage divider circuit 21 to receive a first voltage signal Vfb, pin CS is coupled to node T5 to receive a second voltage signal Vcs, and reference ground pin GND is coupled to reference ground GND1 of the preceding circuit 20A.

[0033] The voltage detection circuit 24A includes a difference detection circuit 241 and a selection circuit 242. The difference detection circuit 241 has a first input terminal, a second input terminal, and an output terminal. The first input terminal receives a first voltage signal Vfb, and the second input terminal receives a second voltage signal Vcs. Based on the difference between the first voltage signal Vfb and the second voltage signal Vcs, the difference detection circuit 241 provides a difference voltage signal Vsub at the output terminal. The selection circuit 242 has a first input terminal, a second input terminal, a control terminal, and an output terminal. The first input terminal receives the difference voltage signal Vsub, the second input terminal receives the first voltage signal Vfb, and the control terminal receives a mode signal MOD indicating whether the preceding circuit 20A is in power operation. Based on the difference voltage signal Vsub, the first voltage signal Vfb, and the mode signal MOD, the selection circuit 242 generates a voltage detection signal Vsen at the output terminal.

[0034] In one embodiment, when the current stage circuit 20A is in power operation, the mode signal MOD is at a first level, and the selection circuit 242 provides the difference voltage signal Vsub to the output end as the voltage detection signal Vsen; when the current stage circuit 20A stops power operation, the mode signal MOD is at a second level, and the selection circuit 242 provides the voltage signal of the first voltage signal Vfb relative to the reference ground GND1 to the output end as the voltage detection signal Vsen.

[0035] The switch control circuit 25A is coupled to the voltage detection circuit 24A to receive the voltage detection signal Vsen and generate switch control signals P1-P4 based on the voltage detection signal Vsen. Pins G1-G4 provide the switch control signals P1-P4 to switches S1-S4 of the front-stage circuit 20A, respectively, to control the front-stage circuit 20A to generate the first output voltage Vout1.

[0036] The switching converter 200A further includes a subsequent circuit 23A. The subsequent circuit 23A is coupled between the node T3 and the node T5 to receive the bus voltage Vbus and convert the bus voltage Vbus into a second output voltage Vout to supply power to a load (not shown). Figure 3 In the illustrated embodiment, the post-stage circuit 23A is an LLC resonant conversion circuit, including switches S5 - S6 , a resonant inductor Lr, a resonant capacitor Cr, a transformer Tr1 , diodes D1 - D2 , and a capacitor Cout.

[0037] Although the front-stage circuit 20A is a PFC circuit and the rear-stage circuit 23A is an LLC resonant converter circuit in the above embodiment, those skilled in the art will appreciate that these embodiments are for illustrative purposes only and are not intended to limit the present invention. Other suitable circuit structures also meet the spirit and scope of protection of the present invention. For example, in other embodiments, the rear-stage circuit may be a buck, boost, flyback, or hybrid flyback structure. Furthermore, the switching transistor of the switching converter 200A may be any controllable semiconductor device, such as a BJT, JFET, MOSFET, IGBT, or GaNFET.

[0038] Figure 5 FIG. 2 shows a circuit structure diagram of a switching converter 200B according to another embodiment of the present invention. Figure 3 The difference is that the voltage divider circuit 21B includes a first resistor R1 and a second resistor R2 connected in series, wherein the common connection point of the first resistor R1 and the second resistor R2 serves as the output terminal of the voltage divider circuit 21B. The current detection circuit 22B includes a third resistor R3. In one embodiment, the resistance of the first resistor R1 is approximately 10 megohms, the resistance of the second resistor R2 is approximately 3 kiloohms, and the resistance of the third resistor R3 is approximately 50 milliohms. In one embodiment, the post-stage circuit 23B is coupled to the output terminal of the voltage divider circuit 21B to receive a first voltage signal Vfb representing the bus voltage Vbus, and then detects the bus voltage Vbus based on the first voltage signal Vfb. In a further embodiment, the post-stage circuit 23B obtains a voltage Vsen2 of the first voltage signal Vfb relative to the reference ground GND2, where the bus voltage Vbus = Vsen2 / k, where k = R2 / (R1+R2).

[0039] Those skilled in the art will understand that Figure 5 The illustrated voltage divider circuit 21B and current detection circuit 22B are merely one embodiment. Other suitable circuit structures capable of achieving the same or similar functions are also applicable to the present invention. For example, in one embodiment, the voltage divider circuit 21 and / or the current detection circuit 22 may include a greater number of resistors. In another embodiment, the resistors in the voltage divider circuit 21 and / or the current detection circuit 22 may be replaced by transistors, etc.

[0040] exist Figure 5 In the illustrated embodiment, the voltage detection circuit 24B includes a difference detection circuit 241B, a selection circuit 242B, and a filtering circuit 243B. The difference detection circuit 241B includes an operational amplifier AM. The operational amplifier AM has a first input terminal, a second input terminal, and an output terminal. The first input terminal receives a first voltage signal Vfb, and the second input terminal receives a second voltage signal Vcs. Based on the difference between the first voltage signal Vfb and the second voltage signal Vcs, the operational amplifier AM provides a difference voltage signal Vsub at its output terminal. The filtering circuit 243B receives the first voltage signal Vfb and the difference voltage signal Vsub, and filters out noise present in the first voltage signal Vfb and the difference voltage signal Vsub, generating a first filtered voltage signal Vfb1 and a difference filtered voltage signal Vsub1.

[0041] The selection circuit 242B includes a multiplexer S1 having a first terminal, a second terminal, a control terminal, and an output terminal. The first terminal receives the first filtered voltage signal Vfb1, the second terminal receives the difference filtered voltage signal Vsub1, and the control terminal receives the mode signal MOD. In one embodiment, when the pre-stage circuit 20B is in power operation, the mode signal MOD is at a first level, and the output terminal of the multiplexer S1 is coupled to the second terminal, thereby providing the difference filtered voltage signal Vsub1 as the voltage detection signal Vsen. When the pre-stage circuit 20B is not in power operation, the mode signal MOD is at a second level, and the output terminal of the multiplexer S1 is coupled to the first terminal, thereby providing the first filtered voltage signal Vfb1 as the voltage detection signal Vsen. In one embodiment, when the pre-stage circuit 20B is not in power operation, the operational amplifier AM is disabled to further reduce power loss in the switching converter 200B. In other embodiments, the filter circuit 243B can be coupled between the output terminal of the selection circuit 242B and the reference ground GND1 to filter out noise in the voltage detection signal Vsen.

[0042] exist Figure 5In the illustrated embodiment, the voltage detection circuit 24B further includes a mode determination circuit 244B for generating a mode signal MOD. In one embodiment, the mode determination circuit 244B receives one or more of the switch control signals P1-P4 and, based on the switch control signals, detects whether the preceding circuit 20B is in power operation, thereby generating the mode signal MOD. In a further embodiment, when the switch control signals P1-P4 vary between high and low levels, the mode determination circuit 244B determines that the preceding circuit 20B is in power operation and generates a mode signal MOD having a first level. When the switch control signals P1-P4 remain low, the mode determination circuit 244B determines that the preceding circuit 20B is not in power operation and generates a mode signal MOD having a second level. In another embodiment, the mode determination circuit 244B receives a voltage detection signal Vsen representing the first output voltage Vout1 and compares the voltage detection signal Vsen with a first threshold voltage Vth1 and a second threshold voltage Vth2, respectively, to generate the mode signal MOD. In one embodiment, when the voltage detection signal Vsen increases to a first threshold voltage Vth1, the front-stage circuit 20B stops power operation, and the mode determination circuit 244B generates a mode signal MOD having a second level. When the voltage detection signal Vsen decreases to a second threshold voltage Vth2, the front-stage circuit 20B resumes power operation, and the mode determination circuit 244B generates a mode signal MOD having a first level. Those skilled in the art will appreciate that these embodiments are for illustrative purposes only and are not intended to limit the present invention. Other mode determination circuits capable of achieving the same or similar functions are also applicable to the present invention.

[0043] Those skilled in the art will appreciate that the voltage detection circuit 24 can be implemented using a digital circuit. For example, those skilled in the art can use a digital language such as VHDL or Verilog to specifically describe the operating principle and process of the voltage detection circuit 24, thereby automatically generating a digital circuit to implement the functions of the voltage detection circuit 24.

[0044] According to an embodiment of the present invention, when the front-stage circuit 20 is in power operation, the front-stage circuit 20 uses the voltage divider circuit 21 and the current detection circuit 22 to detect the voltage between nodes T3 and T4, i.e., the first output voltage Vout1. When the front-stage circuit 20 stops power operation, no current flows through the current detection circuit 22, the second voltage signal Vcs is zero, and the front-stage circuit 20 directly detects the first output voltage Vout1 using the voltage divider circuit 21. In one embodiment, the first output voltage Vout1 = Vsen / d, where Vsen is the voltage detection signal generated by the voltage detection circuit 24, and d is the proportionality factor. In one embodiment, d = 0.0032.

[0045] At the same time, no matter whether the front-stage circuit 20 is in power operation or not, the back-stage circuit 23 can directly use the voltage divider circuit 21 to detect the voltage between the node T3 and the node T5 , ie, the bus voltage Vbus.

[0046] Therefore, the front-stage circuit 20 and the rear-stage circuit 23 can share the voltage divider circuit 21 for voltage detection, thereby reducing the power loss of the switching converter 200 .

[0047] In addition, when the front-stage circuit 20 stops power operation, the difference detection circuit 241 can be disabled to further reduce the power loss of the switching converter 200 .

[0048] Figure 6 A flow chart of a control method 600 for a switching converter according to an embodiment of the present invention is shown. The switching converter includes a front-stage circuit that generates a first output voltage at a first node and a second node, a voltage divider circuit coupled between the second node and a third node, a current sensing circuit coupled between the third node and the second node, and a rear-stage circuit coupled between the first node and the third node to receive a bus voltage. Control method 600 includes steps S601 to S606.

[0049] In step S601 , a first voltage signal representing a bus voltage is received by coupling to an output terminal of a voltage divider circuit.

[0050] In step S602 , coupling to a third node to receive a second voltage signal.

[0051] In step S603, it is determined whether the front-stage circuit is in power operation. If so, the process proceeds to step S604; if not, the process proceeds to step S605.

[0052] In step S604 , a voltage detection signal is generated based on a difference voltage signal representing a difference between the first voltage signal and the second voltage signal.

[0053] In step S605 , a voltage detection signal is generated based on the first voltage signal.

[0054] In step S606 , a switch control signal is generated based on the voltage detection signal to control the previous stage circuit to generate a first output voltage.

[0055] Note that in the flowcharts described above, the functions marked in the boxes can also be Figure 6 For example, two blocks shown in succession may actually be executed substantially in parallel, or they may sometimes be executed in the reverse order, depending on the specific functionality involved.

[0056] While the present invention has been described with reference to several exemplary embodiments, it should be understood that the terms used are descriptive and illustrative, rather than restrictive. Since the present invention can be embodied in many forms without departing from the spirit or essence of the invention, it should be understood that the above-described embodiments are not limited to any of the foregoing details, but should be interpreted broadly within the spirit and scope of the appended claims. All changes and modifications that fall within the scope of the claims or their equivalents are intended to be covered by the appended claims.

Claims

1. A switching converter, comprising: a front-stage circuit configured to generate a first output voltage between a first node and a second node; a voltage divider circuit coupled between the first node and the third node and configured to generate a first voltage signal at an output terminal; a current detection circuit coupled between the third node and the second node; a subsequent stage circuit coupled between the first node and the third node to receive the bus voltage and configured to convert the bus voltage into a second output voltage; a voltage detection circuit coupled to the output terminal of the voltage divider circuit to receive the first voltage signal, coupled to the third node to receive the second voltage signal, and configured to generate a voltage detection signal representing the first output voltage based on the first voltage signal and the second voltage signal; as well as a switch control circuit configured to receive a voltage detection signal and to generate a switch control signal based on the voltage detection signal to control the preceding circuit to generate a first output voltage; in When the front-stage circuit performs power operation, the voltage detection circuit is configured to generate a voltage detection signal based on the difference between the first voltage signal and the second voltage signal; as well as in When the front stage circuit stops power operation, the voltage detection circuit is configured to generate a voltage detection signal based on a difference between the first voltage signal and a voltage at the second node.

2. The switching converter as claimed in claim 1, wherein the front-stage circuit comprises a totem pole power factor correction circuit having an inductor, and the second voltage signal represents a current flowing through the inductor.

3. The switching converter as claimed in claim 1, wherein the subsequent circuit comprises a resonant converter circuit.

4. The switching converter as claimed in claim 1, wherein the voltage detection circuit is integrated into an integrated circuit control device, the output end of the voltage divider circuit is coupled to a first pin of the integrated circuit control device, and the third node is coupled to a second pin of the integrated circuit control device.

5. An integrated circuit control device for a switching converter, the switching converter comprising a front-stage circuit generating a first output voltage between a first node and a second node, a voltage divider circuit coupled between the first node and a third node, a current sensing circuit coupled between the third node and the second node, and a rear-stage circuit coupled between the first node and the third node to receive a bus voltage, the integrated circuit control device comprising: A first pin is configured to be coupled to an output terminal of the voltage divider circuit to receive a first voltage signal; A second pin configured to be coupled to a third node to receive a second voltage signal; A third pin is configured to provide a switch control signal to control the previous stage circuit to generate a first output voltage; a fourth pin configured to be coupled to the second node and a reference ground of the integrated circuit control device; a voltage detection circuit coupled to the first pin to receive a first voltage signal and coupled to the second pin to receive a second voltage signal, wherein the voltage detection circuit is configured to generate a voltage detection signal representing a first output voltage based on the first voltage signal and the second voltage signal; as well as a switch control circuit configured to receive a voltage detection signal and to generate a switch control signal based on the voltage detection signal; in When the front-stage circuit performs power operation, the voltage detection circuit is configured to generate a voltage detection signal based on the difference between the first voltage signal and the second voltage signal; as well as in When the front-stage circuit stops power operation, the voltage detection circuit is configured to generate a voltage detection signal based on the first voltage signal.

6. The integrated circuit control device according to claim 5, wherein the voltage detection circuit comprises: A difference detection circuit having a first input terminal, a second input terminal, and an output terminal, wherein the first input terminal is configured to receive a first voltage signal, the second input terminal is configured to receive a second voltage signal, and based on a difference between the first voltage signal and the second voltage signal, the difference detection circuit is configured to provide a difference voltage signal at the output terminal; as well as The selection circuit has a first input terminal, a second input terminal, a control terminal and an output terminal, wherein the first input terminal is configured to receive a differential voltage signal, the second input terminal is configured to receive a first voltage signal, and the control terminal is configured to receive a mode signal representing the power operation status of the previous stage circuit. Based on the mode signal, the first voltage signal and the differential voltage signal, the selection circuit is configured to generate a voltage detection signal at the output terminal.

7. The integrated circuit control device of claim 6, wherein the difference detection circuit comprises an operational amplifier, and the operational amplifier is configured to be disabled when the power supply of the previous stage circuit is stopped.

8. The integrated circuit control device as claimed in claim 5, wherein the front-stage circuit comprises a totem pole power factor correction circuit having an inductor, and the second voltage signal represents a current flowing through the inductor.

9. A control method for a switching converter, wherein the switching converter includes a front-stage circuit generating a first output voltage between a first node and a second node, a voltage divider circuit coupled between the first node and a third node, a current sensing circuit coupled between the third node and the second node, and a rear-stage circuit coupled between the first node and the third node to receive a bus voltage, the control method comprising: receiving a first voltage signal from an output terminal of the voltage divider circuit; receiving a second voltage signal from a third node; generating a voltage detection signal representing a first output voltage based on the first voltage signal and the second voltage signal; as well as generating a switch control signal based on the voltage detection signal to control the preceding circuit to generate a first output voltage; in When the current stage circuit performs power operation, a voltage detection signal is generated based on the difference between the first voltage signal and the second voltage signal; as well as in When the front stage circuit stops power operation, a voltage detection signal is generated based on the difference between the first voltage signal and the voltage at the second node.

Images