Numerical control phase shift circuit without additional amplitude change and implementation method thereof

Abstract

The invention discloses a numerical control phase shift circuit without additional amplitude change and an implementation method thereof, and mainly solves the problem that the characteristics of a T / R assembly become poor due to the fact that parasitic amplitude modulation of silicon-based millimeter wave numerical control phase shift is large. The numerical control phase shifter comprises a field programmable gate array (FPGA) control module, a numerical control phase shifter, an adjusting branch and a feedback branch which are connected with the FPGA control module, a voltage-controlled attenuator which is connected with the numerical control phase shifter and carries out attenuation adjustment through the adjusting branch, and a power divider of which the input end is connected with the voltage-controlled attenuator and feeds back output power through the feedback branch. The attenuation amount of the voltage-controlled attenuator is continuously changed, additional phase shift is not generated by changing the attenuation amount, the automatic attenuation compensation technology realizes phase shift of the signal through the numerical control phase shifter and equal amplitude before and after phase change, and the technology of no additional amplitude change during phase shift of the numerical control phase shifter is realized.

Description

Technical Field

[0001] The invention belongs to the technical field of phase shifters, and in particular, relates to a digitally controlled phase shift circuit without additional amplitude change and a realization method thereof. Background Art

[0002] Phased array technology is widely used in various equipment such as radar, communication, and electronic countermeasures. Among them, CNC phase shifter / digital attenuator is one of the key components in phased array. In phased array applications, the amplitude and phase of the signal in each channel need to be precisely controlled. The CNC phase shifter is used to control the signal phase, and the CNC digital attenuator is used to control the signal amplitude. The phase shift and attenuation accuracy have a huge impact on the performance of the entire machine.

[0003] As part of the T / R module, the phase shifter / digital attenuator controls the signal amplitude and phase on different paths. It not only needs to provide a large dynamic range and precise beam pointing, but also needs to ensure small amplitude changes while performing phase control to avoid complex amplitude calibration. With the huge demand for 5G millimeter wave communication and broadband satellite communication technology, silicon-based CNC / digital phase shifters will be widely used in silicon-based monolithic beamforming chips.

[0004] Traditional digital phase shifters, especially silicon-based millimeter-wave digitally controlled phase shifters, have large parasitic amplitude modulation, which causes the characteristics of T / R components to deteriorate and reduces the performance of phased array equipment. There is an urgent need for a digitally controlled phase shift technology without additional amplitude changes. Summary of the invention

[0005] The purpose of the present invention is to provide a digitally controlled phase shift circuit without additional amplitude change and its implementation method, mainly to solve the problem that the parasitic amplitude modulation of silicon-based millimeter-wave digitally controlled phase shift is large, resulting in the deterioration of the characteristics of the T / R component.

[0006] To achieve the above purpose, the technical solution adopted by the present invention is as follows: A digitally controlled phase shifting circuit without additional amplitude change comprises an FPGA control module, a digitally controlled phase shifter, an adjustment branch and a feedback branch connected to the FPGA control module, a voltage-controlled attenuator connected to the digitally controlled phase shifter and performing attenuation adjustment through the adjustment branch, and a power divider whose input end is connected to the voltage-controlled attenuator and feeds back output power through the feedback branch; wherein the digitally controlled phase shifter receives an input signal, one output end of the power divider directly outputs a phase shift signal, and the other output end of the power divider outputs a feedback signal to the feedback branch.

[0007] Furthermore, in the present invention, the adjustment branch includes a digital-to-analog converter connected to the FPGA control module, an operational amplifier whose non-phase input terminal is connected to the output terminal of the digital-to-analog converter and whose output terminal is connected to the voltage-controlled attenuator, and resistors R1 and R2 connected to the inverting input terminal of the operational amplifier; wherein the other end of the resistor R1 is grounded, and the other end of the resistor R2 is connected to the output terminal of the operational amplifier.

[0008] Furthermore, in the present invention, the feedback branch includes a detector whose input end is connected to an output end of the power divider and an analog-to-digital converter whose input end is connected to the output end of the detector and the other end is connected to the FPGA control module.

[0009] Based on the above phase shifter, the present invention also provides a method for realizing a digitally controlled phase shift circuit without additional amplitude change, comprising the following steps: S1, FPGA control module controls the digital controlled phase shifter to shift the phase by 0°; S2, FPGA control module outputs digital signal a; S3, the digital signal a is converted into a voltage V0 by a digital-to-analog converter; S4, V0 is amplified by the operational amplifier and controls the voltage-controlled attenuator to attenuate by X1dB; S5, detector output voltage V1; S6, the voltage V1 is converted into a digital signal by an analog-to-digital converter and reported to the FPGA control module; S7, FPGA control module controls the digital controlled phase shifter to shift the phase by Y°; S8, detector output voltage V2; S9, the voltage V2 is converted into a digital signal by an analog-to-digital converter and reported to the FPGA control module; S10, the FPGA control module determines whether the voltage V2 is equal to the voltage V1, if the voltage V2 is equal to the voltage V1, then enter S14; if the voltage V2 is not equal to the voltage V1, then enter S11; S11, FPGA outputs digital signal b; S12, the digital signal b control module is converted into a voltage V3 through a digital-to-analog converter; S13, the voltage V3 is amplified by the operational amplifier and controls the voltage-controlled attenuator to attenuate by X2dB; S14, end the phase shifting work.

[0010] Compared with the prior art, the present invention has the following beneficial effects: The digital controlled phase shifting circuit in the present invention utilizes the continuous change of attenuation of the voltage controlled attenuator, and the change of attenuation will not produce additional phase shift, and the automatic attenuation compensation technology realizes the phase shifting of the signal through the digital controlled phase shifter, and the amplitude before and after the phase change is equal, realizing the technology of no additional amplitude change when the digital controlled phase shifter shifts the phase. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1 It is a principle block diagram of the present invention.

[0012] Figure 2 The figure is a flow chart of the implementation principle of the digital controlled phase shifter in the present invention. DETAILED DESCRIPTION

[0013] The present invention is further described below in conjunction with the accompanying drawings and embodiments. The embodiments of the present invention include but are not limited to the following embodiments.

[0014] like Figure 1 As shown, the present invention discloses a digitally controlled phase shift circuit without additional amplitude change, including an FPGA control module, a digitally controlled phase shifter, an adjustment branch and a feedback branch connected to the FPGA control module, a voltage-controlled attenuator connected to the digitally controlled phase shifter and adjusting the attenuation through the adjustment branch, and a power divider whose input end is connected to the voltage-controlled attenuator and feeds back the output power through the feedback branch; wherein the digitally controlled phase shifter receives an input signal, one output end of the power divider directly outputs a phase-shifted signal, and the other output end of the power divider outputs a feedback signal to the feedback branch. The digitally controlled phase shifter is used to realize the phase shifting function of the input signal. The power divider is used to divide the signal power into two paths, one path is directly output to the outside, and the other path enters the feedback branch. The FPGA control module is used to report the output amplitude of the signal, output a digital signal to the analog-to-digital converter, and control the phase shift of the digitally controlled phase shifter. The FPGA control module changes the amplitude of the input signal by changing the attenuation amount of the voltage-controlled attenuator.

[0015] In this embodiment, the adjustment branch includes a digital-to-analog converter connected to the FPGA control module, an operational amplifier whose non-phase input terminal is connected to the output terminal of the digital-to-analog converter and whose output terminal is connected to the voltage-controlled attenuator, and resistors R1 and R2 connected to the inverting input terminal of the operational amplifier; wherein the other end of the resistor R1 is grounded, and the other end of the resistor R2 is connected to the output terminal of the operational amplifier. The analog-to-digital converter is used to convert the detection voltage into a digital signal and report the output amplitude of the signal. The operational amplifier, resistors R1 and R2: constitute an operational amplifier circuit, which operationally amplifies the voltage converted by the analog-to-digital converter and controls the attenuation of the voltage-controlled attenuator.

[0016] In this embodiment, the feedback branch includes a detector whose input end is connected to an output end of the power divider and an analog-to-digital converter whose input end is connected to the output end of the detector and the other end is connected to the FPGA control module. The detector detects the output signal amplitude and outputs a detection voltage.

[0017] like Figure 2 As shown, the implementation principle of the above phase shifter is as follows: S1, FPGA control module controls the digital controlled phase shifter to shift the phase by 0°; S2, FPGA control module outputs digital signal a; S3, the digital signal a is converted into a voltage V0 by a digital-to-analog converter; S4, V0 is amplified by the operational amplifier and controls the voltage-controlled attenuator to attenuate by X1dB; S5, detector output voltage V1; S6, the voltage V1 is converted into a digital signal by an analog-to-digital converter and reported to the FPGA control module; S7, FPGA control module controls the digital controlled phase shifter to shift the phase by Y°; S8, detector output voltage V2; S9, the voltage V2 is converted into a digital signal by an analog-to-digital converter and reported to the FPGA control module; S10, the FPGA control module determines whether the voltage V2 is equal to the voltage V1, if the voltage V2 is equal to the voltage V1, then enter S14; if the voltage V2 is not equal to the voltage V1, then enter S11; S11, FPGA outputs digital signal b; S12, the digital signal b control module is converted into a voltage V3 through a digital-to-analog converter; S13, the voltage V3 is amplified by the operational amplifier and controls the voltage-controlled attenuator to attenuate by X2dB; S14, end the phase shifting work.

[0018] Through the above design, the digital controlled phase shifting circuit in the present invention utilizes the continuous change of attenuation of the voltage controlled attenuator, and changing the attenuation will not produce additional phase shift, and the automatic attenuation compensation technology realizes the phase shifting of the signal through the digital controlled phase shifter, and the amplitude before and after the phase change is equal, realizing the technology of no additional amplitude change when the digital controlled phase shifter shifts the phase.

[0019] The above embodiment is only one of the preferred implementation modes of the present invention and should not be used to limit the protection scope of the present invention. Any changes or modifications that are made to the main design concept and spirit of the present invention and have no substantive significance, and the technical problems they solve are still consistent with the present invention, should be included in the protection scope of the present invention.

Claims

1. A digitally controlled phase shift circuit without additional amplitude change, characterized in that: It includes an FPGA control module, a digitally controlled phase shifter, an adjustment branch and a feedback branch connected to the FPGA control module, a voltage-controlled attenuator connected to the digitally controlled phase shifter and performing attenuation adjustment through the adjustment branch, and a power divider whose input end is connected to the voltage-controlled attenuator and feeds back output power through the feedback branch; wherein the digitally controlled phase shifter receives an input signal, one output end of the power divider directly outputs a phase-shifted signal, and the other output end of the power divider outputs a feedback signal to the feedback branch.

2. A digitally controlled phase shifting circuit without additional amplitude change according to claim 1, characterized in that: The adjustment branch includes a digital-to-analog converter connected to the FPGA control module, an operational amplifier whose non-phase input terminal is connected to the output terminal of the digital-to-analog converter and whose output terminal is connected to the voltage-controlled attenuator, and resistors R1 and R2 connected to the inverting input terminal of the operational amplifier; wherein the other end of the resistor R1 is grounded, and the other end of the resistor R2 is connected to the output terminal of the operational amplifier.

3. A digitally controlled phase shift circuit without additional amplitude change according to claim 2, characterized in that: The feedback branch includes a detector whose input end is connected to an output end of the power divider and an analog-to-digital converter whose input end is connected to the output end of the detector and the other end is connected to the FPGA control module.

4. A method for realizing a digitally controlled phase shifting circuit without additional amplitude change, characterized in that: Implementing a digitally controlled phase shift circuit without additional amplitude change as claimed in claim 3 comprises the following steps: S1, FPGA control module controls the digital controlled phase shifter to shift the phase by 0°; S2, FPGA control module outputs digital signal a; S3, the digital signal a is converted into a voltage V0 by a digital-to-analog converter; S4, V0 is amplified by the operational amplifier and controls the voltage-controlled attenuator to attenuate by X1dB; S5, detector output voltage V1; S6, the voltage V1 is converted into a digital signal by an analog-to-digital converter and reported to the FPGA control module; S7, FPGA control module controls the digital controlled phase shifter to shift the phase by Y°; S8, detector output voltage V2; S9, the voltage V2 is converted into a digital signal by an analog-to-digital converter and reported to the FPGA control module; S10, the FPGA control module determines whether the voltage V2 is equal to the voltage V1, if the voltage V2 is equal to the voltage V1, then enter S14; if the voltage V2 is not equal to the voltage V1, then enter S11; S11, FPGA outputs digital signal b; S12, the digital signal b is converted into a voltage V3 by a digital-to-analog converter by the control module; S13, the voltage V3 is amplified by the operational amplifier and controls the voltage-controlled attenuator to attenuate by X2dB; S14, end the phase shifting work.

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