Display panel and display device

Abstract

The invention discloses a display panel and a display device. The display panel comprises a substrate, a plurality of sub-pixels and an inorganic layer, each sub-pixel comprises a light-emitting functional layer, a first electrode and a second electrode, the first electrode and the second electrode are located on the two sides of the light-emitting functional layer in the direction perpendicular to the substrate, each sub-pixel further comprises a pixel driving circuit, and the pixel driving circuits are configured to drive the light-emitting functional layers of the sub-pixels to emit light; the inorganic layer is located between the first electrode and the pixel driving circuit, the inorganic layer comprises a plurality of connecting via holes, the pixel driving circuit comprises a conductive structure, the first electrode of the sub-pixel is connected with the conductive structure through the connecting via holes, the plurality of sub-pixels comprise a first sub-pixel and a second sub-pixel, and the first sub-pixel is connected with the second sub-pixel through the connecting via holes. The luminous efficiency of the first sub-pixel is greater than that of the second sub-pixel, and the minimum inner diameter of the connecting via hole corresponding to the first electrode of the first sub-pixel is not less than 3.5 microns, so that the risk of problems such as non-uniform image display during gray scale driving can be reduced.

Description

Technical Field

[0001] The present disclosure relates to a display panel and a display device. Background Art

[0002] Organic light-emitting diode (OLED) display devices have many advantages such as self-luminescence, small thickness, fast response speed, high contrast, wide viewing angle, etc., and have attracted widespread attention. An organic light-emitting display device with a tandem structure increases the life and brightness of the light-emitting device and reduces power consumption by adding at least one light-emitting layer and a charge generation layer to the organic light-emitting device, thereby meeting the user's requirements for power consumption and service life of the display device. Summary of the invention

[0003] At least one embodiment of the present disclosure provides a display panel, including a base substrate, a plurality of sub-pixels and an inorganic layer, wherein the plurality of sub-pixels are located on the base substrate, the sub-pixels include a light-emitting functional layer, and a first electrode and a second electrode located on both sides of the light-emitting functional layer in a direction perpendicular to the base substrate, the first electrode being located between at least a portion of the light-emitting functional layer and the base substrate, the sub-pixel also including a pixel driving circuit, the pixel driving circuit being configured to drive the light-emitting functional layer of the sub-pixel to emit light; the inorganic layer is located between the first electrode and the pixel driving circuit, wherein the inorganic layer includes a plurality of connecting vias, the pixel driving circuit includes a conductive structure, the first electrode of the sub-pixel is connected to the conductive structure through the connecting vias, the plurality of sub-pixels include a first sub-pixel and a second sub-pixel, the light-emitting efficiency of the first sub-pixel is greater than the light-emitting efficiency of the second sub-pixel, and the minimum inner diameter of the connecting via corresponding to the first electrode of the first sub-pixel is not less than 3.5 microns.

[0004] For example, according to the display panel provided by at least one embodiment of the present disclosure, the minimum inner diameter of the connecting via corresponding to the first electrode of the first sub-pixel is a first inner diameter, the minimum inner diameter of the connecting via corresponding to the first electrode of the second sub-pixel is a second inner diameter, and the first inner diameter is larger than the second inner diameter.

[0005] For example, according to the display panel provided by at least one embodiment of the present disclosure, the multiple sub-pixels also include a third sub-pixel, the luminous efficiency of the third sub-pixel is greater than the luminous efficiency of the second sub-pixel, the minimum inner diameter of the connecting via corresponding to the first electrode of the third sub-pixel is a third inner diameter, the third inner diameter is not greater than the first inner diameter, and the third inner diameter is greater than the second inner diameter.

[0006] For example, in the display panel provided by at least one embodiment of the present disclosure, the first inner diameter and the third inner diameter are both greater than 3.5 micrometers, and the second inner diameter is 2.4 to 3.1 micrometers.

[0007] For example, according to the display panel provided by at least one embodiment of the present disclosure, the multiple sub-pixels include at least two sub-pixels with different luminous efficiencies, and the minimum inner diameter of the connecting via corresponding to the first electrode of each sub-pixel is not less than 3.5 microns.

[0008] For example, according to the display panel provided by at least one embodiment of the present disclosure, the ratio of the minimum inner diameters of the connection via holes corresponding to the first electrodes of sub-pixels with different luminous efficiencies is 0.95 to 1.05.

[0009] For example, according to a display panel provided by at least one embodiment of the present disclosure, the display panel further includes a first insulating layer and a pixel defining layer, the first insulating layer is located between the inorganic layer and the base substrate and is in contact with the inorganic layer; at least a portion of the pixel defining layer is located between the light-emitting functional layer and the first electrode, the pixel defining layer includes a pixel opening and a pixel defining portion located between adjacent pixel openings, the pixel opening exposes at least a portion of the first electrode, the light-emitting functional layer is arranged in contact with the first electrode through the pixel opening, wherein the inorganic layer includes a plurality of inorganic structures, the first insulating layer includes a plurality of first insulating layers, The inorganic structure comprises a protruding portion protruding relative to the edge of the first insulating structure, the light-emitting functional layer comprises a plurality of film layers, the pixel defining layer further comprises a defining opening located between adjacent sub-pixels in at least some of the sub-pixels, at least a portion of the protruding portion of each of the inorganic structures in at least some of the inorganic structures is exposed by the defining opening as a partition portion, and the partition portion is configured to partition at least one layer of the light-emitting functional layer; the first insulating layer comprises a plurality of first via holes, at least a portion of the inner wall of the first via hole is covered by the inorganic layer, so that at least a portion of the connecting via hole is located in the first via hole.

[0010] For example, in a display panel provided according to at least one embodiment of the present disclosure, a surface of a portion of the inorganic layer located in the first via hole away from the base substrate has a first slope angle with the conductive structure, and the first slope angle is less than 90 degrees.

[0011] For example, according to the display panel provided by at least one embodiment of the present disclosure, the first slope angle is 10 to 80 degrees.

[0012] For example, according to a display panel provided in accordance with at least one embodiment of the present disclosure, the display panel further includes a second insulating layer, which is located between the inorganic layer and the pixel defining layer; wherein the second insulating layer includes a plurality of second vias, and at least a portion of the inner wall of the connecting via is covered by the second insulating layer, so that at least a portion of the second via is located in the connecting via, and the first electrode of the sub-pixel is connected to the conductive structure through the second via.

[0013] For example, in a display panel provided according to at least one embodiment of the present disclosure, a first slope angle is provided between a surface of a portion of the inorganic layer located in the first via and away from the base substrate and the conductive structure, and a second slope angle is provided between a surface of a portion of the second insulating layer located in the connecting via and away from the base substrate and the conductive structure, and the second slope angle is smaller than the first slope angle.

[0014] For example, in the display panel provided by at least one embodiment of the present disclosure, the average thickness of the first insulating layer and the second insulating layer is 0.5 to 3 micrometers.

[0015] For example, in the display panel provided according to at least one embodiment of the present disclosure, the minimum inner diameter of the second via hole is greater than 3 micrometers.

[0016] For example, in the display panel provided according to at least one embodiment of the present disclosure, both the first insulating layer and the second insulating layer are organic layers.

[0017] At least one embodiment of the present disclosure further provides another display panel, including a substrate, a plurality of sub-pixels, an inorganic layer, a first insulating layer and a second insulating layer, wherein the plurality of sub-pixels are located on the substrate, the sub-pixels include a light-emitting functional layer, and a first electrode and a second electrode located on both sides of the light-emitting functional layer in a direction perpendicular to the substrate, the first electrode being located between at least a portion of the light-emitting functional layer and the substrate, the sub-pixels also including a pixel driving circuit, the pixel driving circuit being configured to drive the light-emitting functional layer of the sub-pixels to emit light; the inorganic layer is located between the first electrode and the pixel driving circuit; the first insulating layer is located between the inorganic layer and the sub-pixels The second insulating layer is located between the inorganic layer and at least a portion of the light-emitting functional layer, wherein the inorganic layer includes a plurality of connecting vias, the first insulating layer includes a plurality of first vias, the second insulating layer includes a plurality of second vias, at least a portion of the inner wall of the first via is covered by the inorganic layer, so that at least a portion of the connecting via is located in the first via, at least a portion of the inner wall of the connecting via is covered by the second insulating layer, so that at least a portion of the second via is located in the connecting via, the pixel driving circuit includes a conductive structure, and the first electrode of the sub-pixel is connected to the conductive structure through the second via.

[0018] For example, according to the display panel provided by at least one embodiment of the present disclosure, the inorganic layer completely covers the inner wall of the first via hole, and the second insulating layer completely covers the inner wall of the connecting via hole.

[0019] For example, according to the display panel provided by at least one embodiment of the present disclosure, the minimum inner diameter of the second via hole is not less than 3 micrometers.

[0020] For example, a display panel provided according to at least one embodiment of the present disclosure further includes a pixel defining layer, at least a portion of the pixel defining layer is located between the light-emitting functional layer and the first electrode, the pixel defining layer includes a pixel opening and a pixel defining portion located between adjacent pixel openings, the pixel opening exposes at least a portion of the first electrode, the light-emitting functional layer is arranged in contact with the first electrode through the pixel opening, the inorganic layer includes a plurality of inorganic structures, the first insulating layer includes a plurality of first insulating structures, the inorganic structure includes a protrusion protruding relative to an edge of the first insulating structure, the light-emitting functional layer includes a plurality of film layers, the pixel defining layer further includes a defining opening located between adjacent sub-pixels in at least some of the sub-pixels, at least a portion of the protrusion of each of the inorganic structures in at least some of the inorganic structures is exposed by the defining opening as a partition portion, the partition portion is configured to partition at least one layer of the light-emitting functional layer, and the first insulating layer and the second insulating layer both include organic materials.

[0021] At least one embodiment of the present disclosure also provides another display panel, including a substrate, a plurality of sub-pixels, an inorganic layer and a first insulating layer, wherein the plurality of sub-pixels are located on the substrate, the sub-pixels include a light-emitting functional layer, and a first electrode and a second electrode located on both sides of the light-emitting functional layer in a direction perpendicular to the substrate, the first electrode is located between at least a portion of the light-emitting functional layer and the substrate, the sub-pixels also include a pixel driving circuit, the pixel driving circuit is configured to drive the light-emitting functional layer of the sub-pixel to emit light; the inorganic layer is located between the first electrode and the pixel driving circuit; the first insulating layer is located between the inorganic layer and the pixel driving circuit, wherein the inorganic layer includes a plurality of connecting vias, the first insulating layer includes a plurality of first vias, at least a portion of the inner wall of the first via is covered by the inorganic layer, so that at least a portion of the connecting via is located in the first via, the pixel driving circuit includes a conductive structure, the first electrode of the sub-pixel is connected to the conductive structure through the connecting via, and a surface of the portion of the inorganic layer located in the first via away from the substrate has a slope angle with the conductive structure, and the slope angle is less than 90 degrees.

[0022] For example, according to the display panel provided by at least one embodiment of the present disclosure, the slope angle is 10 to 80 degrees.

[0023] Yet another embodiment of the present disclosure provides a display device, comprising any of the above-mentioned display panels. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings of the embodiments will be briefly introduced below. Obviously, the drawings in the following description only relate to some embodiments of the present disclosure, but are not intended to limit the present disclosure.

[0025] Figure 1 A partial plan view of a display panel provided for at least one embodiment of the present disclosure.

[0026] Figure 2 for Figure 1 The display panel is shown as a schematic cross-sectional view taken along line AA'.

[0027] Figure 3 An equivalent diagram of a pixel driving circuit according to at least one embodiment of the present disclosure.

[0028] Figure 4 A schematic diagram of a connection via hole corresponding to a first sub-pixel in a display panel provided for at least one embodiment of the present disclosure.

[0029] Figure 5A schematic diagram of a connection via hole corresponding to a second sub-pixel in a display panel provided for at least one embodiment of the present disclosure.

[0030] Figure 6 to Figure 8 Schematic diagram of display effects of different display devices.

[0031] Fig. 9 A schematic diagram of connection vias corresponding to sub-pixels in another display panel provided for at least one embodiment of the present disclosure.

[0032] Fig.10 A schematic diagram of connection vias corresponding to sub-pixels in another display panel provided for at least one embodiment of the present disclosure.

[0033] Fig.11 A schematic block diagram of a display device provided for at least one embodiment of the present disclosure. DETAILED DESCRIPTION

[0034] In order to make the purpose, technical solution and advantages of the embodiments of the present disclosure clearer, the technical solution of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings of the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, rather than all of the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

[0035] Unless otherwise defined, the technical terms or scientific terms used in the present disclosure should be understood by people with ordinary skills in the field to which the present disclosure belongs. The "first", "second" and similar words used in the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. "Including" or "comprising" and similar words mean that the elements or objects appearing in front of the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects. The features such as "parallel", "vertical" and "same" used in the embodiments of the present disclosure include the features such as "parallel", "vertical", "same" in the strict sense, and "approximately parallel", "approximately vertical", "approximately the same" and other situations containing certain errors, taking into account the measurement and the errors related to the measurement of a specific amount (for example, the limitations of the measurement system), indicating the acceptable deviation range for a specific value determined by ordinary technicians in the field. For example, "approximately" can be expressed within one or more standard deviations, or within 10% or 5% of the value. When the number of a component is not particularly indicated in the following of the embodiments of the present disclosure, it means that the component can be one or more, or can be understood as at least one. "At least one" refers to one or more, and "multiple" refers to at least two.

[0036] In an organic light-emitting display device with a tandem structure, the light-emitting layers of two sub-pixels are stacked in series, and there is a whole layer of charge generation layer between the stacked light-emitting layers, such as a P-type doped charge generation layer P-CGL and an N-type doped charge generation layer N-CGL. For example, the Tandem device can replace one light-emitting layer in the light-emitting element in the OLED display panel with two light-emitting layers. Compared with a display panel without a Tandem device, the two light-emitting layers in the Tandem device are connected in series, so that a dual light-emitting device can be connected in series. Under the same light-emitting intensity, the light-emitting current of the light-emitting device can be reduced, the life of the light-emitting device can be increased, and the power consumption can be reduced. Therefore, in some display panels with Tandem devices, by setting an isolation column located between adjacent sub-pixels to isolate at least one layer of the light-emitting functional layer, the risk of crosstalk between adjacent sub-pixels can be reduced.

[0037] For example, some isolation column structures may include an inorganic layer located between the first electrode of the sub-pixel and the base substrate, the inorganic layer is arranged in contact with the first electrode, and the first electrode is connected to the pixel driving circuit through a via hole penetrating the inorganic layer. Usually, there are other insulating layers between the inorganic layer and the pixel driving circuit, and the via holes in these insulating layers and the via holes in the inorganic layer constitute sleeve holes (for example, also called anode holes), so that the first electrode is connected to the pixel driving circuit through the sleeve holes.

[0038] However, in some display devices, the first electrode of the sub-pixel may be broken at the edge of the anode hole, resulting in a reduction in the overlap area between the first electrode and the conductive structure in the pixel driving circuit, resulting in incomplete overlap or sudden changes in routing, which in turn leads to uneven display of the screen when driven at low grayscale (for example, mura and other phenomena may occur), and may even cause some sub-pixels to not be fully turned on. In addition, when the contact area between the first electrode and the conductive structure in the pixel driving circuit is small, the corresponding contact resistance is large, and poor display is likely to occur when driven at low grayscale. When the luminous efficiency of multiple sub-pixels is different, under the same driving mode, sub-pixels with higher luminous efficiency are easier to turn on, making the above-mentioned problems more likely to occur.

[0039] At least one embodiment of the present disclosure provides a display panel, comprising: a base substrate, a plurality of sub-pixels and an inorganic layer, wherein the plurality of sub-pixels are located on the base substrate, the sub-pixels include a light-emitting functional layer, and a first electrode and a second electrode located on both sides of the light-emitting functional layer in a direction perpendicular to the base substrate, the first electrode is located between at least a portion of the light-emitting functional layer and the base substrate, the sub-pixels also include a pixel driving circuit, the pixel driving circuit is configured to drive the light-emitting functional layer of the sub-pixel to emit light; the inorganic layer is located between the first electrode and the pixel driving circuit, the inorganic layer includes a plurality of connecting vias, the pixel driving circuit includes a conductive structure, the first electrode of the sub-pixel is connected to the conductive structure through the connecting via, the plurality of sub-pixels include a first sub-pixel and a second sub-pixel, the light-emitting efficiency of the first sub-pixel is greater than the light-emitting efficiency of the second sub-pixel, and the minimum inner diameter of the connecting via corresponding to the first electrode of the first sub-pixel is not less than 3.5 microns.

[0040] In the display panel provided by at least one embodiment of the present disclosure, the first electrode of the sub-pixel is connected to the conductive structure through a connecting via, and the minimum inner diameter of the connecting via corresponding to the first electrode of the first sub-pixel with higher luminous efficiency is not less than 3.5 microns, thereby increasing the contact area between the first electrode of the first sub-pixel and the conductive structure in the pixel driving circuit to reduce the corresponding contact resistance, making the transmission current of the first sub-pixel more stable, thereby improving the risk of uneven picture display problems during low grayscale driving.

[0041] At least one embodiment of the present disclosure further provides another display panel, including a substrate, a plurality of sub-pixels, an inorganic layer, a first insulating layer and a second insulating layer, wherein the plurality of sub-pixels are located on the substrate, the sub-pixels include a light-emitting functional layer, and a first electrode and a second electrode located on both sides of the light-emitting functional layer in a direction perpendicular to the substrate, the first electrode being located between at least a portion of the light-emitting functional layer and the substrate, the sub-pixels also including a pixel driving circuit, the pixel driving circuit being configured to drive the light-emitting functional layer of the sub-pixels to emit light; the inorganic layer is located between the first electrode and the pixel driving circuit; the first insulating layer is located between the inorganic layer and the sub-pixels The second insulating layer is located between the inorganic layer and at least a portion of the light-emitting functional layer, wherein the inorganic layer includes a plurality of connecting vias, the first insulating layer includes a plurality of first vias, the second insulating layer includes a plurality of second vias, at least a portion of the inner wall of the first via is covered by the inorganic layer, so that at least a portion of the connecting via is located in the first via, at least a portion of the inner wall of the connecting via is covered by the second insulating layer, so that at least a portion of the second via is located in the connecting via, the pixel driving circuit includes a conductive structure, and the first electrode of the sub-pixel is connected to the conductive structure through the second via.

[0042] In the display panel provided by at least one embodiment of the present disclosure, at least a portion of the connecting via is located in the first via, and at least a portion of the second via is located in the connecting via, so that the first via, the connecting via and the second via form a sleeve hole, thereby achieving a good connection between the first electrode and the conductive structure in the pixel driving circuit. At the same time, by making at least a portion of the inner wall of the connecting via covered by the second insulating layer, the second insulating layer can reduce the influence of the step difference of the portion of the inorganic layer located in the first via, and reduce the risk of the first electrode breaking at the second via.

[0043] At least one embodiment of the present disclosure also provides another display panel, including a substrate, a plurality of sub-pixels, an inorganic layer and a first insulating layer, wherein the plurality of sub-pixels are located on the substrate, the sub-pixels include a light-emitting functional layer, and a first electrode and a second electrode located on both sides of the light-emitting functional layer in a direction perpendicular to the substrate, the first electrode is located between at least a portion of the light-emitting functional layer and the substrate, the sub-pixels also include a pixel driving circuit, the pixel driving circuit is configured to drive the light-emitting functional layer of the sub-pixel to emit light; the inorganic layer is located between the first electrode and the pixel driving circuit; the first insulating layer is located between the inorganic layer and the pixel driving circuit, wherein the inorganic layer includes a plurality of connecting vias, the first insulating layer includes a plurality of first vias, at least a portion of the inner wall of the first via is covered by the inorganic layer, so that at least a portion of the connecting via is located in the first via, the pixel driving circuit includes a conductive structure, the first electrode of the sub-pixel is connected to the conductive structure through the connecting via, and a surface of the portion of the inorganic layer located in the first via away from the substrate has a slope angle with the conductive structure, and the slope angle is less than 90 degrees.

[0044] Another display panel provided by at least one embodiment of the present disclosure can enable the portion of the inorganic layer located in the first via hole to have a smaller step difference, which is beneficial for the surface of the inorganic layer to fit well with the first electrode, thereby reducing the risk of the first electrode breaking at the first via hole, and further beneficial for ensuring the connection effect between the first electrode and the conductive structure of the pixel driving circuit.

[0045] At least one embodiment of the present disclosure further provides a display device, which includes the display panel provided by at least one embodiment of the present disclosure.

[0046] The display panel and the display device provided by the embodiments of the present disclosure are described below with reference to the accompanying drawings.

[0047] Figure 1 A partial plan view of a display panel provided for at least one embodiment of the present disclosure; Figure 2for Figure 1 The display panel is shown as a schematic cross-sectional view taken along line AA'.

[0048] like Figure 1 and Figure 2 As shown, the display panel includes a base substrate BS and a plurality of sub-pixels 10 located on the base substrate BS. The sub-pixels 10 include a light emitting functional layer 130 and a light emitting layer 130 extending in a direction perpendicular to the base substrate BS (ie, as shown in FIG. 1 ). Figure 2 The first electrode 110 and the second electrode 120 are located on both sides of the light emitting functional layer 130 (Z direction shown), and the first electrode 110 is located between at least a portion of the light emitting functional layer 130 and the substrate BS.

[0049] like Figure 2 As shown, the light-emitting functional layer 130 includes a plurality of film layers. For example, the light-emitting functional layer 130 may include a light-emitting layer for emitting light and a charge generating layer 133, and the charge generating layer 133 has strong conductivity, which can make the light-emitting functional layer 130 have the advantages of long life, low power consumption and high brightness. For example, the light-emitting functional layer 130 can be a film layer in an organic light-emitting element. For example, the light-emitting functional layer 130 may include a first light-emitting layer (EML) 131, a charge generating layer (CGL) 133 and a second light-emitting layer (EML) 132 arranged in a stacked manner, and the charge generating layer 133 is located between the first light-emitting layer 131 and the second light-emitting layer 132.

[0050] It should be noted that Figure 2 The light-emitting functional layer 130 shown may also include other film layers, such as a hole injection layer (HIL), a hole transport layer (HTL), an electron transport layer (ETL), and an electron injection layer (EIL), etc., which are not limited in the embodiments of the present disclosure. For example, the hole injection layer, the hole transport layer, the electron transport layer, the electron injection layer, the charge generation layer 133, and the second electrode 120 are all common film layers of multiple sub-pixels 10, which can be called common layers. In addition, Figure 2 The thickness of each film layer shown is only for illustrating each film layer clearly and does not represent the actual size.

[0051] For example, Figure 2 As shown, the sub-pixel 10 may include a tandem light emitting element, such as a Tandem OLED, but the embodiments of the present disclosure are not limited thereto.

[0052] like Figure 2As shown, other structures 01 are also provided on the side of the first electrode 110 facing the substrate BS, such as a pixel driving circuit 140 electrically connected to the first electrode 110 of the sub-pixel 10, a signal line, and various insulating layers, etc., for example, a passivation layer, a buffer layer, a gate insulating layer, an interlayer insulating layer, etc., which are not limited in the embodiments of the present disclosure. The pixel driving circuit 140 is located between the first electrode 110 and the substrate BS, and is configured to drive the light-emitting functional layer 130 of the sub-pixel 10 to emit light. For example, the pixel driving circuit 140 may include a plurality of transistors and at least one capacitor (not shown in the figure), and the first electrode 110 may be electrically connected to the pixel driving circuit 240 through the connecting via N0 to drive the light-emitting functional layer 130 to emit light.

[0053] like Figure 2 As shown, the display panel further includes an inorganic layer 200, and the inorganic layer 200 is located between the first electrode 110 and the pixel driving circuit 140. For example, the first electrode 110 is in contact with the inorganic layer 200. At least a portion of the inorganic layer 200 is configured to isolate at least one layer of the light-emitting functional layer 130 of the adjacent sub-pixel 10, thereby reducing the risk of crosstalk between the adjacent sub-pixels 10. For the isolation principle of the inorganic layer 200 to the light-emitting functional layer 130, please refer to the relevant description in the following embodiments.

[0054] like Figure 2 As shown, the inorganic layer 200 includes a plurality of connection vias N0, the pixel driving circuit 140 includes a conductive structure 1410, and the first electrode 110 of the sub-pixel 10 is connected to the conductive structure 1410 through the connection vias N0. For example, the plurality of connection vias N0 correspond to the plurality of sub-pixels 10 one by one. For example, the pixel driving circuit 140 may include a thin film transistor, and the conductive structure 1410 may be a source or a drain of the thin film transistor, but is not limited thereto. For example, the conductive structure 1410 may also be a structure connected to the thin film transistor in the pixel driving circuit 140, which is not limited in the embodiments of the present disclosure.

[0055] like Figure 1 and Figure 2As shown, the plurality of sub-pixels 10 include a first sub-pixel 101 and a second sub-pixel 102, the luminous efficiency of the first sub-pixel 101 is greater than the luminous efficiency of the second sub-pixel 102, and the minimum inner diameter of the connecting via N0 corresponding to the first electrode 110 of the first sub-pixel 101 is not less than 3.5 microns. For example, the luminous efficiency of the sub-pixel 10 can be the luminous efficiency of the material of the luminous functional layer of the sub-pixel 10 (for example, the material of the luminous layer). For example, under the same driving voltage, the brightness of the first sub-pixel 101 is greater than the brightness of the second sub-pixel 102, and the first sub-pixel 101 is easier to light up than the second sub-pixel 102. For example, when the same brightness is reached, the driving voltage required for the first sub-pixel 101 is less than the driving voltage required for the second sub-pixel 102. The first sub-pixel 101 is more likely to have poor display and the like than the second sub-pixel 102. For example, the connecting via corresponding to the sub-pixel refers to a via used to connect the first electrode of the sub-pixel to the conductive structure in the pixel driving circuit.

[0056] In the display panel provided by at least one embodiment of the present disclosure, the first electrode of the sub-pixel is connected to the conductive structure through a connecting via, and the minimum inner diameter of the connecting via corresponding to the first sub-pixel with higher luminous efficiency is not less than 3.5 microns, thereby increasing the contact area between the first electrode of the first sub-pixel and the conductive structure in the pixel driving circuit to reduce the corresponding contact resistance. For example, the contact resistance can be made less than 8 ohms, thereby making the transmission current of the first sub-pixel more stable to improve the risk of uneven picture display during low grayscale driving.

[0057] Figure 3 An equivalent diagram of a pixel driving circuit provided in an embodiment of the present disclosure.

[0058] For example, Figure 3 As shown, the pixel driving circuit 140 includes a threshold compensation transistor T2, a driving transistor T3, a data writing transistor T4, a first reset transistor T7, a second reset transistor T1, a first light emission control transistor T6, a second light emission control transistor T5 and a storage capacitor C. For example, the display panel also includes a reset power signal line, a scan signal line, a power signal line, a reset control signal line, a light emission control signal line and a data line.

[0059] For example, Figure 3As shown, the first electrode of the threshold compensation transistor T2 is electrically connected to the first electrode of the driving transistor T3, and the second electrode of the threshold compensation transistor T2 is electrically connected to the gate of the driving transistor T3. The first electrode of the first reset control transistor T7 is electrically connected to the reset power signal line to receive the reset signal Vinit, and the second electrode of the first reset control transistor T7 is electrically connected to the first electrode of the light emitting element 100 (i.e., the S2 node). The first electrode of the data writing transistor T4 is electrically connected to the second electrode of the driving transistor T3, the second electrode of the data writing transistor T4 is electrically connected to the data line to receive the data signal Data, and the gate of the data writing transistor T4 is electrically connected to the scanning signal line to receive the scanning signal Gate. The first electrode of the storage capacitor C is electrically connected to the power signal line, and the second electrode of the storage capacitor C is electrically connected to the gate of the driving transistor T3. The gate of the threshold compensation transistor T2 is electrically connected to the scanning signal line to receive the compensation control signal; the gate of the first reset transistor T7 is electrically connected to the reset control signal line to receive the reset control signal Reset (N+1). The first electrode of the second reset transistor T1 is electrically connected to the reset power signal line to receive the reset signal Vinit, the second electrode of the second reset transistor T1 is electrically connected to the gate of the driving transistor T3, and the gate of the second reset transistor T1 is electrically connected to the reset control signal line to receive the reset control signal Reset (N). The gate of the first light-emitting control transistor T6 is electrically connected to the light-emitting control signal line to receive the light-emitting control signal EM; the first electrode of the first light-emitting control transistor T6 is electrically connected to the first electrode of the driving transistor T3, and the second electrode of the first light-emitting control transistor T6 is electrically connected to the first electrode of the light-emitting element 100. The first electrode of the second light-emitting control transistor T5 is electrically connected to the power signal line to receive the first power signal VDD, the second electrode of the second light-emitting control transistor T5 is electrically connected to the second electrode of the driving transistor T3, and the gate of the second light-emitting control transistor T5 is electrically connected to the light-emitting control signal line to receive the light-emitting control signal EM. The second electrode of the light-emitting element 100 is connected to the voltage terminal VSS. The above-mentioned power signal line refers to a signal line that outputs the voltage signal VDD, and can be connected to a voltage source to output a constant voltage signal, such as a positive voltage signal.

[0060] For example, Figure 3As shown, the scanning signal and the compensation control signal can be the same, that is, the gate of the data writing transistor T4 and the gate of the threshold compensation transistor T2 can be electrically connected to the same signal line to receive the same signal, thereby reducing the number of signal lines. For example, the gate of the data writing transistor T4 and the gate of the threshold compensation transistor T2 can also be electrically connected to different signal lines, that is, the gate of the data writing transistor T4 is electrically connected to the first scanning signal line, and the gate of the threshold compensation transistor T2 is electrically connected to the second scanning signal line, and the signals transmitted by the first scanning signal line and the second scanning signal line can be the same or different, so that the gate of the data writing transistor T4 and the threshold compensation transistor T2 can be separately controlled, thereby increasing the flexibility of controlling the pixel circuit.

[0061] For example, Figure 3 As shown, when the pixel driving circuit is working, in the first stage of picture display, the second reset transistor T1 is turned on to initialize the voltage of the S1 node; in the second stage of picture display, data is stored in the S1 node through the data writing transistor T4, the driving transistor T3 and the threshold compensation transistor T2; in the third light-emitting stage, the second light-emitting control transistor T5, the driving transistor T3 and the first light-emitting control transistor T6 are all turned on, and the light-emitting element 100 is forward-conducted to emit light.

[0062] It should be noted that, in the embodiment of the present disclosure, each pixel circuit can Figure 3 In addition to the 7T1C structure (i.e., seven transistors and one capacitor) shown, a structure including other numbers of transistors may also be used, such as a 7T2C structure, a 6T1C structure, a 6T2C structure, or a 9T2C structure, which is not limited in the embodiments of the present disclosure. Figure 3 The pixel driving circuit shown may correspond to Figure 2 For example, the first electrode of the light emitting element 100 in the pixel driving circuit may be an anode, and the second electrode of the light emitting element 100 may be a cathode.

[0063] Figure 4 A schematic diagram of a connection via hole corresponding to a first sub-pixel in a display panel provided for at least one embodiment of the present disclosure; Figure 5 A schematic diagram of a connection via hole corresponding to a second sub-pixel in a display panel provided for at least one embodiment of the present disclosure.

[0064] For example, Figure 4 and Figure 5 As shown, the minimum inner diameter of the connection via hole N0 corresponding to the first sub-pixel 101 is the first inner diameter R1, and the minimum inner diameter of the connection via hole N0 corresponding to the second sub-pixel 102 is the second inner diameter R2, and the first inner diameter R1 is greater than the second inner diameter R2. For example, the inner diameters of the sub-pixels may be uniform or non-uniform.

[0065] By making the first inner diameter corresponding to the first sub-pixel with higher luminous efficiency larger, the contact area between the first electrode of the first sub-pixel and the conductive structure in the pixel driving circuit can be increased to reduce the corresponding contact resistance, thereby reducing the risk of uneven screen display problems when the first sub-pixel is driven at low grayscale, so that the display effects of sub-pixels with different luminous efficiencies are more uniform.

[0066] For example, Figure 2 As shown, the plurality of sub-pixels 10 in the display panel further include a third sub-pixel 103. For example, the plurality of sub-pixels 10 are arranged as a plurality of first sub-pixel groups 0010 and a plurality of second sub-pixel groups 0020 alternately arranged along a first arrangement direction X, the first sub-pixel group 0010 includes second sub-pixels 102 and third sub-pixels 103 alternately arranged along a second arrangement direction Y, and the second sub-pixel group 0020 includes first sub-pixels 101 arranged along the second arrangement direction Y. For example, the luminous colors of the first sub-pixel 101, the second sub-pixel 102, and the third sub-pixel 103 are different. The first arrangement direction X intersects with the second arrangement direction Y, and both are parallel to the substrate BS.

[0067] For example, Figure 2 As shown, the first sub-pixel 101, the second sub-pixel 102, and the third sub-pixel 103 are configured to emit light of different colors. For example, the first sub-pixel 101 is configured to emit green light, the second sub-pixel 102 is configured to emit blue light, and the third sub-pixel 103 is configured to emit red light. For example, the light-emitting colors of the first sub-pixel 101, the second sub-pixel 102, and the third sub-pixel 103 can be interchangeable, and the embodiments of the present disclosure do not limit the light-emitting colors of each sub-pixel 10.

[0068] For example, Figure 2 As shown, the luminous efficiency of the first sub-pixel 101 and the third sub-pixel 103 is greater than the luminous efficiency of the second sub-pixel 102. For example, the luminous efficiency of the first sub-pixel 101 and the third sub-pixel 103 may be substantially the same. For example, the material of the light-emitting function layer 130 of the first sub-pixel 101 and the third sub-pixel 103 may be substantially the same, but the embodiments of the present disclosure are not limited thereto. For example, the minimum inner diameter of the connection via N0 corresponding to the third sub-pixel 103 is the third inner diameter (not shown in the figure). For example, the third inner diameter may be substantially the same as the first inner diameter R1, and the third inner diameter is greater than the second inner diameter R2.

[0069] By making the inner diameters of the connecting vias corresponding to the first sub-pixel and the third sub-pixel with higher luminous efficiency larger, the contact area between the first electrodes of the first sub-pixel and the third sub-pixel and the conductive structure in the pixel driving circuit can be increased to reduce the corresponding contact resistance, thereby reducing the risk of problems such as uneven picture display during low grayscale driving.

[0070] For example, Figure 2 As shown, the luminous efficiency of the third sub-pixel 103 may be less than the luminous efficiency of the first sub-pixel 101, and greater than the luminous efficiency of the second sub-pixel 102. For example, the third inner diameter R3 is less than the first inner diameter R1, and the third inner diameter R3 is greater than the second inner diameter R2. For example, the minimum inner diameter of the connection via N0 corresponding to each sub-pixel 10 may be determined according to the luminous efficiency of the sub-pixel 10. For example, when the luminous efficiency of the sub-pixel 10 is high, the minimum inner diameter of the connection via N0 corresponding to the sub-pixel 10 may be larger; when the luminous efficiency of the sub-pixel 10 is low, the minimum inner diameter of the connection via N0 corresponding to the sub-pixel 10 may be smaller.

[0071] Since sub-pixels with higher luminous efficiency are easier to light up, and thus have a higher risk of problems such as uneven screen display, this setting can flexibly control the inner diameter size of the connecting via corresponding to the sub-pixel according to the luminous efficiency of the sub-pixel, while ensuring the stability of the transmission current of the sub-pixel to reduce the risk of problems such as uneven screen display when driving at low grayscale, and at the same time can reduce the layout space occupied by the connecting via.

[0072] For example, Figure 2 and Figure 4 As shown, the first inner diameter R1 and the third inner diameter R3 are both greater than 3.5 microns. For example, the first inner diameter R1 and the third inner diameter R3 may both be 3.5 microns. For example, the first inner diameter R1 may be greater than the third inner diameter R3. Thus, the contact resistance between the first electrode 110 of the first sub-pixel 101 and the first electrode 110 of the third sub-pixel 103 and the corresponding conductive structure 1410 of the pixel driving circuit 140 may be small, so as to ensure the stability of the transmission current.

[0073] For example, Figure 2 and Figure 5 As shown, the second inner diameter R2 may be 2.4 to 3.1 microns, such as 2.5 microns, 2.8 microns, 3.0 microns, 3.1 microns or other values ​​in the range of 2.4 to 3.1 microns, so that the transmission current can be stabilized while reducing the layout space occupied by the connection via N0 corresponding to the second sub-pixel 102 when the luminous efficiency of the second sub-pixel 102 is low and the risk of uneven screen display is low. For example, the maximum inner diameter of each connection via in the embodiment of the present disclosure may be less than 10 microns, but is not limited thereto.

[0074] For example, Figure 1 and Figure 2 As shown, the minimum inner diameter of the connection via N0 corresponding to each sub-pixel 10 in the first sub-pixel 101, the second sub-pixel 102, and the third sub-pixel 103 is not less than 3.5 microns. In other words, the minimum inner diameter of the connection via N0 corresponding to the sub-pixels 10 with different luminous efficiencies is larger. For example, the ratio of the minimum inner diameters of the connection vias N0 corresponding to the sub-pixels 10 with different luminous efficiencies (for example, the first sub-pixel 101, the second sub-pixel 102, and the third sub-pixel 103) is 0.95 to 1.05, such as 0.98, 0.99, 1.00, 1.02, 1.04, or other values ​​between 0.95 and 1.05, which is not limited in the embodiments of the present disclosure.

[0075] Such a setting is beneficial to making the contact resistance between the first electrode and the conductive structure of sub-pixels with different luminous efficiency smaller, for example, less than 8 ohms, thereby effectively improving the overall display effect of the display panel and reducing the display defective rate; in addition, it is also beneficial to simplify the manufacturing process of the connecting vias and to ensure the uniformity of the manufacturing process.

[0076] For example, Figure 2 As shown, the display panel further includes a pixel defining layer 400. At least part of the pixel defining layer 400 is located between the light-emitting functional layer 130 and the first electrode 110. The pixel defining layer 400 includes a pixel opening 410, and a pixel defining portion 450 located between adjacent pixel openings 410, the pixel opening 410 exposes at least part of the first electrode 110 to define the light-emitting area of ​​the sub-pixel 30, and the light-emitting functional layer 130 is arranged in contact with the first electrode 110 through the pixel opening 410. For example, the first electrode 110 and the second electrode 120 located on both sides of the light-emitting functional layer 130 can drive the light-emitting functional layer 130 located therebetween to emit light. For example, the light-emitting area of ​​the sub-pixel 10 refers to the effective light-emitting area of ​​the sub-pixel 10, and the shape of the light-emitting area refers to a two-dimensional shape, for example, the shape of the light-emitting area can be the same as the shape of the orthographic projection of the portion of the first electrode 110 exposed by the pixel opening 210 on the base substrate BS.

[0077] For example, Figure 2As shown, the display panel further includes a first insulating layer 300. The first insulating layer 300 is located between the inorganic layer 200 and the base substrate BS, and the first insulating layer 300 is in contact with the inorganic layer 200. For example, the inorganic layer 200 includes a plurality of inorganic structures 240, and the first insulating layer 300 includes a plurality of first insulating structures 310. The inorganic structure 240 includes a protrusion 260 protruding relative to the edge of the first insulating structure 310. For example, the inorganic structure 240 includes a portion overlapping with the light-emitting area of ​​the sub-pixel 10, and a portion located outside the light-emitting area of ​​the sub-pixel 10. For example, the first electrode 110 is located on the inorganic structure 240 and is in contact with the inorganic structure 240. For example, the orthographic projection of the first electrode 110 on the base substrate BS falls into the orthographic projection of the inorganic structure 240 on the base substrate BS. Thus, the inorganic structure 240 can make the first electrode 110 have good flatness, so that the light emitting effect of the sub-pixel 10 is good.

[0078] For example, Figure 2 As shown, the pixel defining layer 400 further includes a defining opening 420 located between adjacent sub-pixels 10 in at least some of the sub-pixels 10. For example, the orthographic projection of the defining opening 220 on the base substrate BS is generally in the shape of a ring or a strip, and surrounds the light-emitting area of ​​the sub-pixel 10. The light-emitting functional layer 130 includes a plurality of film layers, and at least a portion of the protrusion 260 of each inorganic structure 240 in at least some of the inorganic structures 240 is exposed by the defining opening 420 as a partitioning portion 2610, and the partitioning portion 2610 is configured to partition at least one layer of the light-emitting functional layer 130. For example, the partitioning portion 2610 is a portion of the protrusion 260 of the inorganic structure 240 exposed by the defining opening 420.

[0079] For example, Figure 2 As shown, at least part of the protrusions 260 of the inorganic structure 240 may not be exposed by the defined opening 420. For example, the protrusions 260 of a part of the inorganic structure 240 all include a portion exposed by the defined opening 420, and the protrusions 260 of a part of the inorganic structure 240 are all covered by the pixel defining portion 450. For example, a plurality of inorganic structures 240 may be arranged at intervals. For example, there may be a connection structure between adjacent inorganic structures 240 so that adjacent inorganic structures 240 are connected to each other. For example, a plurality of inorganic structures 240 may be an integrated structure, and the embodiments of the present disclosure do not limit the structural form of the plurality of inorganic structures 240. For example, the inorganic structure 240 corresponding to one of the adjacent sub-pixels 10 (for example, Figure 2 At least a portion of the protrusion 260 of the inorganic structure 240 corresponding to the second sub-pixel 102 is exposed by the defined opening 420 .

[0080] By providing the partitioning portion, at least one layer of the light-emitting functional layer between adjacent sub-pixels can be partitioned, thereby reducing the risk of crosstalk between adjacent sub-pixels.

[0081] For example, Figure 2 and Figure 4 As shown, the first insulating layer 300 includes a plurality of first vias N1, and at least part of the inner wall of the first via N1 is covered by the inorganic layer 200, so that at least part of the connecting via N0 is located in the first via N1. For example, the minimum inner diameter of the first via N1 is greater than the minimum inner diameter of the connecting via N0. For example, the minimum inner diameter of the first via N1 is greater than the maximum inner diameter of the connecting via N0. For example, the inner wall of the first via N1 is completely covered by the inorganic layer 200. For example, the orthographic projection of the connecting via N0 on the substrate BS falls into the orthographic projection of the first via N1 on the substrate BS. Thus, the risk of etching at least part of the first insulating layer located on the side of the inorganic layer 200 close to the substrate BS at the same time during the patterning process of the inorganic layer 200, thereby forming an "undercut" structure to isolate the first electrode 110, can be reduced. For example, the portion of the first electrode 110 located in the connecting via N0 does not contact the inner wall of the first via N1 , thereby making the structure of the connecting via N0 simple and facilitating the connection of the first electrode 110 with the conductive structure 1410 .

[0082] For example, Table 1 shows the test results of the test sub-pixels corresponding to the connection vias with different inner diameters. Figure 6 to Figure 8 Schematic diagram of display effects of different display devices.

[0083] For example, as shown in Table 1, the test sub-pixel includes a first sub-pixel, a second sub-pixel, and a third sub-pixel having different luminous efficiencies. For example, the inner diameter of the connection via corresponding to each sub-pixel in the test sub-pixel is substantially uniform. For example, when the inner diameter of the connection via corresponding to the test sub-pixel is 3.1 microns, the contact resistance between the first electrode of the test sub-pixel and the conductive structure in the pixel driving circuit is 28 ohms. When the inner diameter of the connection via corresponding to the test sub-pixel increases from 3.1 microns to 3.4 microns, the contact resistance between the first electrode and the conductive structure in the pixel driving circuit is still relatively large, and is 8 to 28 ohms. Figure 6-7 The display effect of the display device when the inner diameter of the connecting via hole corresponding to the test sub-pixel in Table 1 is one of 3.1 to 3.4 microns, Figure 6 and Figure 7 It can be seen that obvious stripes appear in the display devices, and the brightness of the display screen is uneven.

[0084] For example, as shown in Table 1, when the inner diameter of the connecting via hole corresponding to the test sub-pixel increases to 3.5 microns, the contact resistance between the first electrode of the test sub-pixel and the conductive structure in the pixel driving circuit is 4.9 ohms. Figure 8The display effect of the display device corresponding to the inner diameter of the connecting via hole of the test sub-pixel in Table 1 is 3.5 microns. Figure 8 It can be seen that the brightness of the display screen of the display device is uniform, and no obvious stripes are seen.

[0085] According to the above test results, since the luminous efficiency of each test sub-pixel is different, the difficulty of lighting up each test sub-pixel is different, and compared with the sub-pixel with lower luminous efficiency, the sub-pixel with higher luminous efficiency is more likely to have poor display and the like. Therefore, when the inner diameter of the connecting via hole corresponding to the test sub-pixel is small, the display state of the test sub-pixel (for example, the sub-pixel with higher luminous efficiency) is prone to poor display. When the inner diameter of the connecting via hole is set to 3.5 microns, it is beneficial to reduce the contact resistance between the first electrode and the conductive structure in the pixel driving circuit, and can significantly improve the brightness uniformity of the display screen.

[0086] Table 1

[0087]

[0088] Fig. 9 A schematic diagram of connection vias corresponding to sub-pixels in another display panel provided for at least one embodiment of the present disclosure.

[0089] At present, the thickness of the inorganic layer in some display panels is usually relatively large, for example, 300 to 1500 angstroms, and the thickness of the first electrode is relatively small, for example, about 1000 angstroms. At the same time, the slope angle between the surface of the inorganic layer located in the anode hole away from the substrate and the conductive structure is close to 90 degrees. Therefore, the first electrode is very easy to break at the anode hole.

[0090] Based on this, reference Figure 2 and Fig. 9 , there is a first slope angle β1 between the surface of the portion of the inorganic layer 200 located in the first via hole N1 away from the base substrate BS and the conductive structure 1410, and the first slope angle may be less than 90 degrees. For example, the surface of the portion of the inorganic layer 200 located in the first via hole N1 away from the base substrate BS may be a curved surface, so that the portion of the inorganic layer 200 located in the first via hole N1 has a smaller step difference, which is conducive to making the surface of the inorganic layer 200 and the first electrode 110 fit well, thereby reducing the risk of the first electrode 110 breaking at the first via hole N1, and further facilitating the connection effect between the first electrode 110 and the conductive structure 1410 of the pixel driving circuit 140. For example, the inorganic layer 200 may be processed by gas etching such as carbon tetrachloride, sulfur tetrafluoride, etc. to form the above-mentioned slope angle.

[0091] For example, Fig. 9As shown, the first slope angle β1 can be 10 to 80 degrees, for example, it can be at least one of 20 to 50 degrees, 30 to 60 degrees, 40 to 70 degrees, and 80 to 90 degrees, so as to facilitate the surface of the portion of the inorganic layer 200 located in the first via hole N1 away from the base substrate BS to be able to smoothly and smoothly transition in the first via hole N1, so as to reduce the risk of the first electrode 110 breaking at the first via hole N1.

[0092] Fig.10 A schematic diagram of connection vias corresponding to sub-pixels in another display panel provided for at least one embodiment of the present disclosure.

[0093] For example, refer to Figure 2 and Fig.10 , the display panel may further include a second insulating layer 500, and the second insulating layer 500 is located between the inorganic layer 200 and the pixel defining layer 400. For example, at least a portion of the inorganic layer 200 is covered by the second insulating layer 500. For example, the second insulating layer 500 includes a plurality of second vias N2, and at least a portion of the inner wall of the connecting via N0 is covered by the second insulating layer 500, so that at least a portion of the first via N2 is located in the connecting via N0, and the first electrode 110 of the sub-pixel 10 is connected to the conductive structure 1410 through the first via N2. For example, the portion of the inorganic layer 200 located in the first via N1 is completely covered by the second insulating layer 500 to reduce the risk of positional displacement between the second insulating layer 500 and the inorganic layer 200. For example, the maximum inner diameter of the second via N2 is smaller than the minimum inner diameter of the connecting via N0. The orthographic projection of the second via hole N2 on the base substrate BS falls into the orthographic projection of the connecting via hole N0 on the base substrate BS, and the orthographic projection of the connecting via hole N0 on the base substrate BS falls into the orthographic projection of the first via hole N1 on the base substrate BS.

[0094] For example, the second insulating layer may include a plurality of second insulating structures. For example, the plurality of second insulating structures correspond one to one with the plurality of sub-pixels. For example, the orthographic projection area of ​​the second insulating structure on the substrate is smaller than the orthographic projection area of ​​the inorganic structure on the substrate, and the orthographic projection of the second insulating structure on the substrate falls within the orthographic projection of the inorganic structure on the substrate. For example, the orthographic projection of the second insulating structure on the substrate falls within the orthographic projection of the first insulating structure on the substrate.

[0095] By providing a second insulating layer on the inorganic layer and making the portion of the inorganic layer located in the first via hole covered by the second insulating layer, the second insulating layer can reduce the impact of the step difference of the portion of the inorganic layer located in the first via hole, and make the risk of the first electrode breaking at the second via hole lower; in addition, the first electrode is provided on the second insulating structure, so that the second insulating structure can make the first electrode have good flatness.

[0096] For example, Fig.10 As shown, the surface of the portion of the inorganic layer 200 located in the first via hole N1 away from the substrate BS has a first slope angle β1 with the conductive structure 1410, and the surface of the portion of the second insulating layer 500 located in the connecting via hole N0 away from the substrate BS has a second slope angle β2 with the conductive structure 1410, and the second slope angle β2 is smaller than the first slope angle β1. For example, the inner wall of the first via hole N1 has a third slope angle β3 with the conductive structure 1410. For example, the first slope angle β1 can be smaller than the third slope angle β3, and the second slope angle β2 can be smaller than the first slope angle β1, so that the step difference of the first insulating layer 300 at the first via N1, the step difference of the portion of the inorganic layer 200 located in the first via N1, and the step difference of the portion of the second insulating layer 500 located in the connecting via N0 can be gradually reduced in sequence, which is conducive to the first electrode 110 to smoothly transition between the surface of the second insulating layer 500 away from the substrate BS and the second via N2, so as to effectively reduce the risk of breakage of the first electrode 110.

[0097] For example, Fig.10 As shown, the first insulating layer 300 and the second insulating layer 500 are both organic layers, for example, they may include organic materials such as polyimide, but are not limited thereto. Such a configuration can make the first insulating layer and the second insulating layer both have leveling properties, which is beneficial to reducing the impact of the step difference of the portion of the inorganic layer 200 located in the first via hole N1.

[0098] For example, Fig.10 As shown, the minimum inner diameter of the second via N2 is not less than 3 microns, which is beneficial to increase the contact area between the first electrode 110 and the conductive structure 1410 in the pixel driving circuit 140 and reduce the corresponding contact resistance. For example, the contact resistance can be made less than 8 ohms, which is beneficial to ensure a good connection between the first electrode 110 and the conductive structure 1410.

[0099] For example, Fig.10 As shown, the average thickness of the first insulating layer 300 and the second insulating layer 500 can be 0.5 to 3.0 microns, such as 1.0 microns, 1.5 microns, 2.0 microns, 2.5 microns or other values ​​in the range of 0.5 to 3.0 microns. For example, the average thickness of the first insulating layer 300 can be substantially the same as the average thickness of the second insulating layer 500. For example, the average thickness of the first insulating layer 300 can also be less than the average thickness of the second insulating layer 500. In this way, the first insulating layer 300 and the second insulating layer 500 can both have a smaller thickness, which is conducive to realizing a lightweight design of the display panel.

[0100] At least one embodiment of the present disclosure also provides another display panel, which includes a substrate, a plurality of sub-pixels, an inorganic layer, a first insulating layer and a second insulating layer, wherein the plurality of sub-pixels are located on the substrate, the sub-pixels include a light-emitting functional layer, and a first electrode and a second electrode located on both sides of the light-emitting functional layer in a direction perpendicular to the substrate, the first electrode is located between at least a portion of the light-emitting functional layer and the substrate, the sub-pixels also include a pixel driving circuit, the pixel driving circuit is configured to drive the light-emitting functional layer of the sub-pixel to emit light; the inorganic layer is located between the first electrode and the pixel driving circuit; the first insulating layer is located between the inorganic layer and the pixel driving circuit; the second insulating layer is located between the inorganic layer and at least a portion of the light-emitting functional layer, the inorganic layer includes a plurality of connecting vias, the first insulating layer includes a plurality of first vias, the second insulating layer includes a plurality of second vias, at least a portion of the inner wall of the first via is covered by the inorganic layer, so that at least a portion of the connecting via is located in the first via, at least a portion of the inner wall of the connecting via is covered by the second insulating layer, so that at least a portion of the second via is located in the connecting via, the pixel driving circuit includes a conductive structure, and the first electrode of the sub-pixel is connected to the conductive structure through the second via.

[0101] In the display panel provided by at least one embodiment of the present disclosure, at least a portion of the connecting via is located in the first via, and at least a portion of the second via is located in the connecting via, so that the first via, the connecting via and the second via form a sleeve hole, thereby achieving a good connection between the first electrode and the conductive structure in the pixel driving circuit. At the same time, by making at least a portion of the inner wall of the connecting via covered by the second insulating layer, the second insulating layer can reduce the influence of the step difference of the portion of the inorganic layer located in the first via, and reduce the risk of the first electrode breaking at the second via.

[0102] like Figure 1 As shown, the display panel includes a base substrate BS and a plurality of sub-pixels 10 located on the base substrate BS. The sub-pixels 10 include a light emitting functional layer 130 and a light emitting layer 130 extending in a direction perpendicular to the base substrate BS (ie, as shown in FIG. 1 ). Figure 2 The first electrode 110 and the second electrode 120 are located on both sides of the light emitting functional layer 130 (Z direction shown), and the first electrode 110 is located between at least a portion of the light emitting functional layer 130 and the substrate BS.

[0103] For example, Figure 2As shown, the light-emitting functional layer 130 includes a plurality of film layers. For example, the light-emitting functional layer 130 may include a light-emitting layer for emitting light and a charge generating layer 133, and the charge generating layer 133 has strong conductivity, which can make the light-emitting functional layer 130 have the advantages of long life, low power consumption and high brightness. For example, the light-emitting functional layer 130 can be a film layer in an organic light-emitting element. For example, the light-emitting functional layer 130 may include a first light-emitting layer (EML) 131, a charge generating layer (CGL) 133 and a second light-emitting layer (EML) 132 arranged in a stacked manner, and the charge generating layer 133 is located between the first light-emitting layer 131 and the second light-emitting layer 132.

[0104] For example, Figure 2 The light-emitting functional layer 130 shown may also include other film layers, such as a hole injection layer (HIL), a hole transport layer (HTL), an electron transport layer (ETL), and an electron injection layer (EIL), etc., which are not limited in the embodiments of the present disclosure. For example, the hole injection layer, the hole transport layer, the electron transport layer, the electron injection layer, the charge generation layer 133, and the second electrode 120 are all common film layers of multiple sub-pixels 10, which can be called common layers. In addition, Figure 2 The thickness of each film layer shown is only for illustrating each film layer clearly and does not represent the actual size.

[0105] For example, Figure 2 As shown, the sub-pixel 10 may include a tandem light emitting element, such as a Tandem OLED, but the embodiments of the present disclosure are not limited thereto.

[0106] like Figure 2 As shown, other structures 01 are also provided on the side of the first electrode 110 facing the substrate BS, such as a pixel driving circuit 140 electrically connected to the first electrode 110 of the sub-pixel 10, a signal line, and various insulating layers, etc., for example, a passivation layer, a buffer layer, a gate insulating layer, an interlayer insulating layer, etc., which are not limited in the embodiments of the present disclosure. The pixel driving circuit 140 is located between the first electrode 110 and the substrate BS, and is configured to drive the light-emitting functional layer 130 of the sub-pixel 10 to emit light. For example, the pixel driving circuit 140 may include a plurality of transistors and at least one capacitor (not shown in the figure), and the first electrode 110 may be electrically connected to the pixel driving circuit 240 through the connecting via N0 to drive the light-emitting functional layer 130 to emit light.

[0107] like Figure 2As shown, the display panel further includes an inorganic layer 200, and the inorganic layer 200 is located between the first electrode 110 and the pixel driving circuit 140. For example, the first electrode 110 is in contact with the inorganic layer 200. The display panel further includes a first insulating layer 300, and the first insulating layer 300 is located between the inorganic layer 200 and the pixel driving circuit 140, and the first insulating layer 300 is in contact with the inorganic layer 200. For example, the inorganic layer 200 is at least partially configured to block at least one layer of the light-emitting functional layer 130 of the adjacent sub-pixel 10, so that the risk of crosstalk between the adjacent sub-pixels 10 can be reduced.

[0108] like Figure 2 and Fig.10 As shown, the inorganic layer 200 includes a plurality of connecting vias N0, the first insulating layer 300 includes a plurality of first vias N1, and at least a portion of the inner wall of the first vias N1 is covered by the inorganic layer 200, so that at least a portion of the connecting vias N0 is located inside the first vias N1. For example, the minimum inner diameter of the first vias N1 is greater than the minimum inner diameter of the connecting vias N0.

[0109] like Figure 2 and Fig.10 As shown, the display panel may further include a second insulating layer 500, and the second insulating layer 500 is located between the inorganic layer 200 and the pixel defining layer 400. For example, the second insulating layer 500 includes a plurality of second via holes N2, and at least a portion of the inner wall of the connecting via hole N0 is covered by the second insulating layer 500, so that at least a portion of the first via hole N2 is located in the connecting via hole N0.

[0110] For example, Figure 2 As shown, the pixel driving circuit 140 includes a conductive structure 1410, and the first electrode 110 of the sub-pixel 10 is connected to the conductive structure 1410 through the second via N2. For example, a plurality of second vias N2 correspond to a plurality of sub-pixels 10 one by one. For example, the pixel driving circuit 140 may include a thin film transistor, and the conductive structure 1410 may be a source or drain of the thin film transistor, but is not limited thereto. For example, the conductive structure 1410 may also be a structure connected to the thin film transistor in the pixel driving circuit 140, which is not limited in the embodiments of the present disclosure.

[0111] In the display panel provided by at least one embodiment of the present disclosure, at least a portion of the connecting via is located in the first via, and at least a portion of the second via is located in the connecting via, so that the first via, the connecting via and the second via form a sleeve hole, thereby enabling good connection between the first electrode and the conductive structure in the pixel driving circuit. At the same time, by making at least a portion of the inner wall of the connecting via be covered by the second insulating layer, the second insulating layer can reduce the influence of the step difference of the portion of the inorganic layer located in the first via, and reduce the risk of the first electrode breaking at the second via.

[0112] For example, Fig.10 As shown, the inorganic layer 200 completely covers the inner wall of the first via hole N1, and the second insulating layer 500 completely covers the inner wall of the connecting via hole N0. For example, the portion of the inorganic layer 200 located in the first via hole N1 is completely covered by the second insulating layer 500 to reduce the risk of positional displacement between the second insulating layer 500 and the inorganic layer 200. For example, the orthographic projection of the second via hole N2 on the base substrate BS falls into the orthographic projection of the connecting via hole N0 on the base substrate BS, and the orthographic projection of the connecting via hole N0 on the base substrate BS falls into the orthographic projection of the first via hole N1 on the base substrate BS. For example, the portion of the first electrode 110 located in the second via hole N2 does not contact the connecting via hole N0 and the first via hole N1, thereby making the manufacturing process of the second via hole N2 simpler.

[0113] For example, Fig.10 As shown, the minimum inner diameter of the second via hole N2 is not less than 3 microns, which is beneficial to increase the contact area between the first electrode 110 and the conductive structure 1410 in the pixel driving circuit 140 and reduce the corresponding contact resistance. For example, the contact resistance between the first electrode 110 and the conductive structure 1410 in the pixel driving circuit 140 can be small, for example, less than 8 ohms, which is beneficial to ensure a good connection between the first electrode 110 and the conductive structure 1410.

[0114] For example, Fig.10 As shown, the first insulating layer 300 and the second insulating layer 500 are both organic layers, for example, they may include organic materials such as organic materials, but are not limited thereto. Such a configuration can make the first insulating layer and the second insulating layer both have leveling properties, which is beneficial to reducing the impact of the step difference of the portion of the inorganic layer 200 located in the first via hole N1.

[0115] For example, Figure 2 As shown, the display panel further includes a pixel defining layer 400. At least a portion of the pixel defining layer 400 is located between the light-emitting functional layer 130 and the first electrode 110. The pixel defining layer 400 includes a pixel opening 410 and a pixel defining portion 450 located between adjacent pixel openings 410, the pixel opening 410 exposes at least a portion of the first electrode 110 to define the light-emitting region of the sub-pixel 30, and the light-emitting functional layer 130 is arranged in contact with the first electrode 110 through the pixel opening 410. For example, the first electrode 110 and the second electrode 120 located on both sides of the light-emitting functional layer 130 can drive the light-emitting functional layer 130 located therebetween to emit light. For example, the light-emitting region of the sub-pixel 10 refers to the region where the sub-pixel 10 effectively emits light, and the shape of the light-emitting region refers to a two-dimensional shape, for example, the shape of the light-emitting region can be the same as the shape of the orthographic projection of the portion of the first electrode 110 exposed by the pixel opening 210 on the base substrate BS.

[0116] For example, Figure 2 As shown, the inorganic structure 240 includes a protrusion 260 protruding relative to the edge of the first insulating structure 310. For example, the inorganic structure 240 includes a portion overlapping with the light-emitting area of ​​the sub-pixel 10, and a portion located outside the light-emitting area of ​​the sub-pixel 10. For example, the first electrode 110 is located on the inorganic structure 240 and contacts the inorganic structure 240. For example, the orthographic projection of the first electrode 110 on the base substrate BS falls into the orthographic projection of the inorganic structure 240 on the base substrate BS. Thus, the inorganic structure 240 can make the first electrode 110 have good flatness, so that the light emitting effect of the sub-pixel 10 is good.

[0117] For example, Figure 2 As shown, the pixel defining layer 400 further includes a defining opening 420 located between adjacent sub-pixels 10 in at least some of the sub-pixels 10. For example, the orthographic projection of the defining opening 220 on the base substrate BS is generally annular or strip-shaped, and surrounds the light-emitting area of ​​the sub-pixel 10. For example, the light-emitting functional layer 130 includes a plurality of film layers, and at least a portion of the protrusion 260 of each inorganic structure 240 in at least some of the inorganic structures 240 is exposed by the defining opening 420 as a partitioning portion 2610, and the partitioning portion 2610 is configured to partition at least one layer of the light-emitting functional layer 130. For example, the partitioning portion 2610 is a portion of the protrusion 260 of the inorganic structure 240 exposed by the defining opening 420.

[0118] For example, Figure 2 As shown, at least part of the protrusions 260 of the inorganic structure 240 may not be exposed by the defined opening 420. For example, the protrusions 260 of a part of the inorganic structure 240 all include a portion exposed by the defined opening 420, and the protrusions 260 of a part of the inorganic structure 240 are all covered by the pixel defining portion 450. For example, a plurality of inorganic structures 240 may be arranged at intervals. For example, there may be a connection structure between adjacent inorganic structures 240 so that adjacent inorganic structures 240 are connected to each other. For example, a plurality of inorganic structures 240 may be an integrated structure, and the embodiments of the present disclosure do not limit the structural form of the plurality of inorganic structures 240. For example, the inorganic structure 240 corresponding to one of the adjacent sub-pixels 10 (for example, Figure 2 At least a portion of the protrusion 260 of the inorganic structure 240 corresponding to the second sub-pixel 102 is exposed by the defined opening 420 .

[0119] By providing the partitioning portion, at least one layer of the light-emitting functional layer between adjacent sub-pixels can be partitioned, which can reduce the risk of crosstalk between adjacent sub-pixels. For other structures in the display panel, please refer to the relevant description in the above embodiments, which will not be repeated here.

[0120] At present, the thickness of the inorganic layer in some display panels is usually relatively large, for example, 300 to 1500 angstroms, and the thickness of the first electrode is relatively small, for example, about 1000 angstroms. At the same time, the slope angle between the surface of the inorganic layer located in the anode hole away from the substrate and the conductive structure is close to 90 degrees. Therefore, the first electrode is very easy to break at the anode hole.

[0121] like Figure 1 and Figure 2 As shown, at least one embodiment of the present disclosure also provides another display panel, which includes a base substrate BS and a plurality of sub-pixels 10 located on the base substrate BS. The sub-pixel 10 includes a light-emitting functional layer 130, and a first electrode 110 and a second electrode 120 located on both sides of the light-emitting functional layer 130 in a direction perpendicular to the base substrate BS, and the first electrode 110 is located between the light-emitting functional layer 130 and the base substrate BS.

[0122] For example, Figure 2 As shown, the light-emitting functional layer 130 includes a plurality of film layers. For example, the light-emitting functional layer 130 may include a light-emitting layer for emitting light and a charge generating layer 133, and the charge generating layer 133 has strong conductivity, which can make the light-emitting functional layer 130 have the advantages of long life, low power consumption and high brightness. For example, the light-emitting functional layer 130 can be a film layer in an organic light-emitting element. For example, the light-emitting functional layer 130 may include a first light-emitting layer (EML) 131, a charge generating layer (CGL) 133 and a second light-emitting layer (EML) 132 arranged in a stacked manner, and the charge generating layer 133 is located between the first light-emitting layer 131 and the second light-emitting layer 132.

[0123] For example, Figure 2 The light-emitting functional layer 130 shown may also include other film layers, such as a hole injection layer (HIL), a hole transport layer (HTL), an electron transport layer (ETL), and an electron injection layer (EIL), etc., which are not limited in the embodiments of the present disclosure. For example, the hole injection layer, the hole transport layer, the electron transport layer, the electron injection layer, the charge generation layer 133, and the second electrode 120 are all common film layers of multiple sub-pixels 10, which can be called common layers. In addition, Figure 2 The thickness of each film layer shown is only for illustrating each film layer clearly and does not represent the actual size.

[0124] For example, Figure 2 As shown, the sub-pixel 10 may include a tandem light emitting element, such as a Tandem OLED, but the embodiments of the present disclosure are not limited thereto.

[0125] like Figure 2As shown, other structures 01 are also provided on the side of the first electrode 110 facing the substrate BS, such as a pixel driving circuit 140 electrically connected to the first electrode 110 of the sub-pixel 10, a signal line, and various insulating layers, for example, a passivation layer, a buffer layer, a gate insulating layer, an interlayer insulating layer, etc., which are not limited in the embodiments of the present disclosure. The pixel driving circuit 140 is located between the first electrode 110 and the substrate BS, and is configured to drive the light-emitting functional layer 130 of the sub-pixel 10 to emit light. For example, the pixel driving circuit 140 may include a plurality of transistors and at least one capacitor (not shown in the figure).

[0126] like Figure 2 As shown, the display panel further includes an inorganic layer 200, and the inorganic layer 200 is located between the first electrode 110 and the pixel driving circuit 140. For example, the first electrode 110 is in contact with the inorganic layer 200. The inorganic layer 200 is at least partially configured to isolate at least one layer of the light-emitting functional layer 130 of the adjacent sub-pixel 10, thereby reducing the risk of crosstalk between the adjacent sub-pixels 10. For the isolation principle of the inorganic layer 200 to the light-emitting functional layer 130, please refer to the relevant description in the aforementioned embodiment.

[0127] like Figure 2 and Fig. 9 As shown, the display panel further includes a first insulating layer 300. The first insulating layer 300 is located between the inorganic layer 200 and the pixel driving circuit 140. The inorganic layer 200 includes a plurality of connecting vias N0, and the first insulating layer 300 includes a plurality of first vias N1, and at least part of the inner wall of the first via N1 is covered by the inorganic layer 200, so that at least part of the connecting via N0 is located in the first via N1. The pixel driving circuit 140 includes a conductive structure 1410, and the first electrode 110 of the sub-pixel 10 is connected to the conductive structure 1410 through the connecting via N0 to drive the light-emitting functional layer 130 to emit light. For example, the first electrode 110 and the second electrode 120 located on both sides of the light-emitting functional layer 130 can drive the light-emitting functional layer 130 located therebetween to emit light.

[0128] like Figure 2 and Fig. 9 As shown, a first slope angle β1 is formed between a surface of the portion of the inorganic layer 200 located in the first via hole N1 and away from the substrate BS and the conductive structure 1410 , and the first slope angle may be less than 90 degrees.

[0129] For example, Figure 2 and Fig. 9As shown, the surface of the portion of the inorganic layer 200 located in the first via hole N1 away from the base substrate BS can be a curved surface, so that the portion of the inorganic layer 200 located in the first via hole N1 has a small step difference, which is conducive to making the surface of the inorganic layer 200 and the first electrode 110 fit well, thereby reducing the risk of the first electrode 110 breaking at the first via hole N1, and further facilitating the connection effect between the first electrode 110 and the conductive structure 1410 of the pixel driving circuit 140. For example, the inorganic layer 200 can be processed by gas etching such as carbon tetrachloride, sulfur tetrafluoride, etc. to form the above-mentioned slope angle.

[0130] For example, Fig. 9 As shown, the first slope angle β1 may be 10 to 80 degrees, for example, at least one of 20 to 50 degrees, 30 to 60 degrees, 40 to 70 degrees, and 80 to 90 degrees, so as to facilitate the surface of the portion of the inorganic layer 200 located in the first via hole N1 away from the base substrate BS to smoothly and smoothly transition in the first via hole N1, so as to reduce the risk of the first electrode 110 being broken at the first via hole N1. For other structures in the display panel, please refer to the relevant description in the aforementioned embodiment, which will not be repeated here.

[0131] Fig.11 A schematic block diagram of a display device provided for at least one embodiment of the present disclosure.

[0132] like Fig.11 As shown, at least one embodiment of the present disclosure provides a display device, which includes any of the above display panels. Therefore, the technical effects of the above display panels can also be embodied on the display device, which will not be described in detail here.

[0133] For example, the display device further includes a cover plate located on the light emitting side of the display panel.

[0134] For example, the display device may be a display device such as an organic light emitting diode display device, as well as any product or component with a display function, such as a television, digital camera, mobile phone, watch, tablet computer, laptop computer, navigator, etc. that includes the display device, but the present embodiment is not limited thereto.

[0135] There are a few points to note:

[0136] (1) In the drawings of the embodiments of the present disclosure, only the structures related to the embodiments of the present disclosure are involved, and other structures can refer to the general design.

[0137] (2) In the absence of conflict, features in the same embodiment or in different embodiments of the present disclosure may be combined with each other.

[0138] The above description is merely an exemplary embodiment of the present disclosure and is not intended to limit the protection scope of the present disclosure. The protection scope of the present disclosure is determined by the appended claims.

Claims

1. A display panel, comprising: substrate; a plurality of sub-pixels located on the base substrate, the sub-pixels comprising a light-emitting functional layer, and a first electrode and a second electrode located on both sides of the light-emitting functional layer in a direction perpendicular to the base substrate, the first electrode being located between at least a portion of the light-emitting functional layer and the base substrate, the sub-pixels further comprising a pixel driving circuit configured to drive the light-emitting functional layer of the sub-pixel to emit light; an inorganic layer, located between the first electrode and the pixel driving circuit, The inorganic layer includes a plurality of connection vias, the pixel driving circuit includes a conductive structure, and the first electrode of the sub-pixel is connected to the conductive structure through the connection vias. The multiple sub-pixels include a first sub-pixel and a second sub-pixel, the luminous efficiency of the first sub-pixel is greater than the luminous efficiency of the second sub-pixel, and the minimum inner diameter of the connecting via corresponding to the first electrode of the first sub-pixel is not less than 3.5 microns.

2. The display panel according to claim 1, wherein The minimum inner diameter of the connection via corresponding to the first electrode of the first subpixel is a first inner diameter, and the minimum inner diameter of the connection via corresponding to the first electrode of the second subpixel is a second inner diameter, and the first inner diameter is greater than the second inner diameter.

3. The display panel according to claim 2, wherein: The plurality of sub-pixels further includes a third sub-pixel, wherein the luminous efficiency of the third sub-pixel is greater than the luminous efficiency of the second sub-pixel, The minimum inner diameter of the connection via hole corresponding to the first electrode of the third sub-pixel is a third inner diameter, the third inner diameter is not greater than the first inner diameter, and the third inner diameter is greater than the second inner diameter.

4. The display panel according to claim 3, wherein: The first inner diameter and the third inner diameter are both greater than 3.5 micrometers, and the second inner diameter is 2.4 to 3.1 micrometers.

5. The display panel according to claim 1, wherein: The plurality of sub-pixels include at least two sub-pixels with different luminous efficiencies, and the minimum inner diameter of the connection via hole corresponding to the first electrode of each sub-pixel is not less than 3.5 micrometers. The display panel according to claim 5 , wherein: The ratio of the minimum inner diameters of the connection via holes corresponding to the first electrodes of sub-pixels with different luminous efficiencies is 0.95-1.

05.

7. The display panel according to any one of claims 1 to 6, further comprising: a first insulating layer, located between the inorganic layer and the base substrate and in contact with the inorganic layer; a pixel defining layer, wherein at least a portion of the pixel defining layer is located between the light-emitting functional layer and the first electrode, the pixel defining layer comprising a pixel opening and a pixel defining portion located between adjacent pixel openings, the pixel opening exposing at least a portion of the first electrode, and the light-emitting functional layer being arranged in contact with the first electrode through the pixel opening. The inorganic layer includes a plurality of inorganic structures, the first insulating layer includes a plurality of first insulating structures, the inorganic structure includes a protrusion protruding relative to an edge of the first insulating structure, the light-emitting functional layer includes a plurality of film layers, the pixel defining layer further includes a defined opening located between adjacent sub-pixels in at least some of the sub-pixels, at least a portion of the protrusion of each of the inorganic structures in at least some of the inorganic structures is exposed by the defined opening to serve as a partition portion, and the partition portion is configured to partition at least one layer of the light-emitting functional layer; The first insulating layer includes a plurality of first via holes, and at least a portion of inner walls of the first via holes is covered by the inorganic layer, so that at least a portion of the connecting via holes is located within the first via holes.

8. The display panel according to claim 7, wherein: A first slope angle is formed between a surface of a portion of the inorganic layer located in the first via hole and away from the base substrate and the conductive structure, and the first slope angle is smaller than 90 degrees. 9 . The display panel according to claim 8 , wherein the first slope angle is 10 to 80 degrees.

10. The display panel according to claim 7, further comprising: a second insulating layer, located between the inorganic layer and the pixel defining layer; The second insulating layer includes a plurality of second vias, and at least a portion of the inner wall of the connecting via is covered by the second insulating layer, so that at least a portion of the second via is located in the connecting via, and the first electrode of the sub-pixel is connected to the conductive structure through the second via.

11. The display panel according to claim 10, wherein: A first slope angle is provided between the surface of the portion of the inorganic layer located in the first via and away from the substrate and the conductive structure, and a second slope angle is provided between the surface of the portion of the second insulating layer located in the connecting via and away from the substrate and the conductive structure, and the second slope angle is smaller than the first slope angle.

12. The display panel according to claim 10, wherein: The average thickness of the first insulating layer and the second insulating layer is 0.5 to 3 microns.

13. The display panel according to claim 10, wherein: The minimum inner diameter of the second via hole is greater than 3 microns.

14. The display panel according to claim 10, wherein: The first insulating layer and the second insulating layer are both organic layers.

15. A display panel comprising: substrate; a plurality of sub-pixels located on the base substrate, the sub-pixels comprising a light-emitting functional layer, and a first electrode and a second electrode located on both sides of the light-emitting functional layer in a direction perpendicular to the base substrate, the first electrode being located between at least a portion of the light-emitting functional layer and the base substrate, the sub-pixels further comprising a pixel driving circuit configured to drive the light-emitting functional layer of the sub-pixel to emit light; an inorganic layer, located between the first electrode and the pixel driving circuit; a first insulating layer, located between the inorganic layer and the pixel driving circuit; a second insulating layer, located between the inorganic layer and at least a portion of the light-emitting functional layer; In which, the inorganic layer includes multiple connecting vias, the first insulating layer includes multiple first vias, the second insulating layer includes multiple second vias, at least part of the inner wall of the first via is covered by the inorganic layer, so that at least part of the connecting via is located in the first via, at least part of the inner wall of the connecting via is covered by the second insulating layer, so that at least part of the second via is located in the connecting via, the pixel driving circuit includes a conductive structure, and the first electrode of the sub-pixel is connected to the conductive structure through the second via.

16. The display panel according to claim 15, wherein: The inorganic layer completely covers the inner wall of the first via hole, and the second insulating layer completely covers the inner wall of the connecting via hole.

17. The display panel according to claim 15, wherein: The minimum inner diameter of the second via hole is not less than 3 microns.

18. The display panel according to any one of claims 15 to 17, wherein: The display panel further includes a pixel defining layer, at least a portion of which is located between the light-emitting functional layer and the first electrode, the pixel defining layer including a pixel opening and a pixel defining portion located between adjacent pixel openings, the pixel opening exposing at least a portion of the first electrode, and the light-emitting functional layer being arranged in contact with the first electrode through the pixel opening. The inorganic layer includes multiple inorganic structures, the first insulating layer includes multiple first insulating structures, the inorganic structure includes a protrusion protruding relative to the edge of the first insulating structure, the light-emitting functional layer includes multiple film layers, the pixel defining layer also includes a defined opening located between adjacent sub-pixels in at least some of the sub-pixels, at least part of the protrusion of each of the inorganic structures in at least some of the inorganic structures is exposed by the defined opening to serve as a partition portion, and the partition portion is configured to isolate at least one layer of the light-emitting functional layer, and the first insulating layer and the second insulating layer both include organic materials.

19. A display panel comprising: substrate; a plurality of sub-pixels located on the base substrate, the sub-pixels comprising a light-emitting functional layer, and a first electrode and a second electrode located on both sides of the light-emitting functional layer in a direction perpendicular to the base substrate, the first electrode being located between at least a portion of the light-emitting functional layer and the base substrate, the sub-pixels further comprising a pixel driving circuit configured to drive the light-emitting functional layer of the sub-pixel to emit light; an inorganic layer, located between the first electrode and the pixel driving circuit; a first insulating layer, located between the inorganic layer and the pixel driving circuit; The inorganic layer includes a plurality of connection vias, the first insulating layer includes a plurality of first vias, at least a portion of the inner wall of the first via is covered by the inorganic layer, so that at least a portion of the connection via is located within the first via, the pixel driving circuit includes a conductive structure, and the first electrode of the sub-pixel is connected to the conductive structure through the connection via. A slope angle is formed between a surface of the inorganic layer located in the first via hole and away from the base substrate and the conductive structure, and the slope angle is smaller than 90 degrees.

20. The display panel according to claim 19, wherein The slope angle is 10 to 80 degrees.

21. A display device comprising the display panel according to any one of claims 1 to 20.

Images