A memory allocation method for new non-volatile memory

By dividing non-volatile memory into independent areas and setting up a private pool for each thread, combined with batch persistence and write-ahead logging technology, the concurrency conflicts and memory fragmentation problems of new non-volatile memory systems are solved, and memory utilization and response speed are improved.

CN119127481BActive Publication Date: 2025-09-16HUAZHONG UNIV OF SCI & TECH
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Patent Information

Application Number
CN202411151881.7
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-08-21
Publication Date
2025-09-16
Estimated Expiration
2044-08-21

AI Technical Summary

Technical Problem

Existing new non-volatile memory systems suffer from high concurrency conflicts, memory fragmentation, and write wear problems during global memory allocation, resulting in low memory space utilization and long response time.

Method used

Non-volatile memory is mapped as a persistent memory heap, divided into multiple independent areas and a private memory pool is set for each worker thread. Batch persistence mechanism and write-ahead logging technology are adopted, combined with background thread monitoring and super block merging operations to optimize memory allocation and management.

Benefits of technology

It reduces concurrent conflicts and write wear in memory allocation, improves memory space utilization and response speed, reduces time overhead, and ensures crash consistency of metadata.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention belongs to the field of computer storage technology, and specifically relates to a memory allocation method for a novel non-volatile memory, comprising: dividing a plurality of independent memory areas from a persistent memory heap of the non-volatile memory to ensure that each working thread is allocated to a memory area; logically dividing each memory area into a plurality of super blocks of equal size, and managing free super blocks in the form of a bidirectional linked list; in a global memory application, splitting different super blocks according to different size classes, and splitting the same super block into a plurality of memory blocks of equal size; setting a private memory pool for each working thread, searching for a super block of a corresponding size class in the private memory pool according to the memory allocation request size of the working thread, and allocating a free memory block from the super block, wherein a batch persistence mechanism is adopted to manage the memory blocks, which can reduce cache line refreshes, thereby avoiding time overhead and write wear problems.
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Description

Technical Field

[0001] The present invention belongs to the field of computer storage technology, and more particularly, relates to a memory allocation method for a novel non-volatile memory. Background Art

[0002] New non-volatile memory (also known as persistent memory) is a new type of computer storage medium. It features low access latency, large storage capacity, byte-addressability, and the ability to retain data long-term even when powered off. Non-volatile memory devices include memristors and phase-change memory.

[0003] Existing computer storage systems use an architecture that separates internal and external storage. Internal storage uses dynamic random access memory (DRAM), which has low access latency and is byte-addressable, to cache necessary temporary data while programs are running. However, due to the volatility of memory, the data in the memory will be lost after a power outage. External storage uses larger-capacity, non-volatile disk (or solid-state drive) storage to store data that needs to be used for a long time. However, the access latency of external storage is extremely high (tens of thousands of times higher than that of internal storage) and it cannot be byte-addressed. It can only be read and written through the operating system's I / O interrupts, which is extremely inefficient. The emergence of new non-volatile memory has bridged the performance gap between external storage and internal storage, providing a foundation for building more efficient storage systems.

[0004] To fully leverage the performance advantages of non-volatile memory, operating systems provide a direct access mechanism, allowing applications (i.e., users) to bypass the operating system kernel and directly read and write non-volatile memory in user mode. Unlike traditional disks or solid-state drives (SSDs), which can only read and write at a 4KB granularity, non-volatile memory can be accessed at a byte granularity, requiring a finer-grained memory allocation mechanism.

[0005] Existing work mainly performs fine-grained memory allocation by dividing into different size classes, implements concurrent memory allocation by establishing a private memory pool for each application, and ensures crash consistency of metadata through write-ahead logging.

[0006] However, existing work generally suffers from high concurrency conflicts in global memory allocation. When a thread's private memory pool is exhausted or the required memory size exceeds the maximum memory block size that the thread's private memory pool can provide, the thread's private memory pool becomes invalid. When the private memory pool becomes invalid, the thread needs to allocate memory from the global persistent memory heap. In some cases, multiple worker threads will perform global memory allocations simultaneously, resulting in conflicts and competition. Furthermore, existing worker threads need to write logs and modify metadata after each memory allocation, resulting in a large number of repeated cache line refreshes, incurring additional time overhead and amplifying the write wear problem of non-volatile memory. In addition, the mutual isolation between different superblocks in the same size class can cause memory fragmentation, thereby reducing memory space utilization. Summary of the Invention

[0007] In response to the defects and improvement needs of the existing technology, the present invention provides a memory allocation method for a new type of non-volatile memory, which aims to reduce cache line refreshes during memory block management and avoid time overhead and write wear problems.

[0008] To achieve the above object, according to one aspect of the present invention, a memory allocation method for a novel non-volatile memory is provided, comprising:

[0009] Initialization phase: Based on the main thread, multiple independent memory areas are divided from the persistent memory heap of non-volatile memory. Each memory area is logically divided into multiple super blocks of equal size and linked into a doubly linked list. Multiple private memory pools are set up and initialized to empty. Multiple empty super block doubly linked lists are generated, each doubly linked list corresponding to a memory block size class.

[0010] Allocation phase: Global memory application and memory block allocation are performed on a per-worker basis, where:

[0011] The global memory application is as follows: after receiving a memory allocation request, it is determined whether the private memory pool of the worker thread is empty. If so, a free super block is requested from the memory area of ​​the worker thread based on a doubly linked list and placed in the private memory pool; the size class closest to the requested size is determined from a plurality of preset optional split size classes by upward alignment, the free super block is split according to the closest size class to obtain multiple memory blocks, the free super block is added to the doubly linked list of the corresponding memory block size class, and memory block allocation is performed; if not, memory block allocation is performed;

[0012] The memory block allocation is as follows: according to the requested size, a super block of the corresponding size class is searched from the private memory pool, a free memory block in the super block is allocated to the user, and a batch persistence mechanism is used to manage the memory block of the super block. Specifically, the super block header is cached in the DRAM memory to obtain a metadata copy. When memory blocks are allocated from the super block multiple times in a row, only the metadata copy of the super block is updated. When the number of updates reaches the batch value, the metadata copy is updated and synchronized to the super block header in the private memory pool.

[0013] Furthermore, it also includes:

[0014] Before the initialization phase, non-volatile memory is mapped to the user's virtual address space in direct access mode, and the virtual address space serves as the persistent memory heap.

[0015] Furthermore, the plurality of independent memory areas are divided from the persistent memory heap of the non-volatile memory, specifically:

[0016] Part of the head space of the persistent memory heap is used as the heap header area to store metadata information of the persistent memory heap, and the remaining part is divided into several independent memory areas;

[0017] The metadata information includes: the formatting flag of the persistent memory heap, the starting address and total size of the persistent memory heap, the starting address of the persistent memory heap during the last run, metadata of the private memory pool of each worker thread, and log data.

[0018] Furthermore, each memory area is logically divided into multiple super blocks of equal size, specifically:

[0019] The header of each memory region is used to store status information of the memory region, specifically including: the number of super blocks contained in the memory region; the number of currently free super blocks in the memory region; a pointer to the first free super block in the memory region; and a pointer to the last free super block in the memory region; the size of the header is the same as the size of the super block to be divided;

[0020] The remaining part is logically divided into multiple super blocks of equal size. The header of each super block is used to store the status information of the super block, including: the size class number of the super block; the size of each memory block in the super block; the total number of memory blocks in the super block; the number of currently free memory blocks in the super block; a bitmap marking the status of all memory blocks in the super block; the number of the first free memory block in the super block; a pointer to the next super block in the same size class; and a pointer to the previous super block in the same size class.

[0021] Furthermore, each worker thread selects and determines a memory area from the persistent memory heap based on a hash function as the memory area of ​​the worker thread;

[0022] The hash function is: H=(TID+rand())%R; wherein TID is the thread ID of the working thread, rand() is a random number generation function, R is the number of memory areas, and H is the calculated number of the memory area.

[0023] Furthermore, the status information stored in the header of each memory region also includes a 64-bit flag variable;

[0024] After determining the memory area of ​​each working thread, the CAS atomic instruction is used to modify the mark variable of the memory area to the thread number of the working thread to prevent other working threads from performing memory allocation in the memory area at the same time. After the memory allocation is completed, the working thread clears the mark variable of the memory area.

[0025] Furthermore, it also includes:

[0026] During the initialization phase, several background threads are started to monitor the usage of each worker thread's private memory pool and the global persistent memory heap in real time, and perform defragmentation operations when specific conditions are met;

[0027] The specific conditions include: for any size class in the private memory pool of any worker thread, if the proportion of free memory in the size class is higher than a preset value and the currently available memory space in the persistent memory heap is lower than the preset value, a super block merge operation is performed on the size class in the private memory pool.

[0028] Furthermore, the preset value is 80% or 20%.

[0029] The present invention also provides an electronic device, comprising a memory and a processor, wherein the memory stores a computer program, and is characterized in that when the processor executes the computer program, it implements the memory allocation method for the new non-volatile memory as described above.

[0030] The present invention also provides a computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a processor, the memory allocation method for the novel non-volatile memory as described above is implemented.

[0031] In general, the above technical solutions conceived by the present invention can achieve the following beneficial effects:

[0032] (1) The present invention provides a memory allocation method for a new type of non-volatile memory, which uses a direct access mechanism to map the non-volatile memory to a persistent memory heap, and divides the persistent memory heap into several independent areas to support concurrent memory allocation of multi-threaded applications. A private memory pool is set up for each active thread to alleviate the concurrency conflict problem of multi-threaded memory allocation, while shortening the critical path length of memory allocation, greatly shortening the response time of memory allocation. The write-ahead log technology is used to ensure the crash consistency of metadata, avoid memory leakage problems caused by partial persistence of metadata, and use batch persistence technology to accelerate the update operation of metadata, reducing the time overhead brought by the write-ahead log. At the same time, a large number of write operations to non-volatile memory are redirected to write operations to DRAM memory, further improving performance and alleviating the write wear problem of non-volatile memory.

[0033] (2) Due to the mutual isolation between different size classes, a large amount of memory fragmentation may occur in some cases, reducing memory utilization. To reduce memory fragmentation and improve memory utilization, the memory management method provided by the present invention creates a background thread to monitor memory usage in real time. When available memory space is insufficient or the memory fragmentation problem is serious, a super block merge operation is performed to integrate the memory fragments in super blocks of the same size class and release the free super blocks after integration, thereby generating available memory space. This method effectively reduces memory fragmentation and improves memory space utilization. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1 A flowchart of a memory allocation method for a novel non-volatile memory provided by an embodiment of the present invention;

[0035] Figure 2 A schematic diagram of a batch persistence solution provided by an embodiment of the present invention;

[0036] Figure 3 An overall schematic diagram of a memory allocation method for a novel non-volatile memory provided by an embodiment of the present invention;

[0037] Figure 4 A flowchart of memory allocation request processing provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0038] In order to make the objectives, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely for the purpose of explaining the present invention and are not intended to limit the present invention. In addition, the technical features involved in the various embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.

[0039] Example 1

[0040] A memory allocation method for new non-volatile memory, such as Figure 1 As shown, including:

[0041] Initialization phase: Based on the main thread, multiple independent memory areas are divided from the persistent memory heap of non-volatile memory; each memory area is logically divided into multiple super blocks of equal size and linked into a doubly linked list; multiple private memory pools are set up and each private memory pool is initialized to empty; multiple empty super block doubly linked lists are generated, each doubly linked list corresponds to a memory block size class.

[0042] It should be noted that reinitialization is required only after the program is restarted or the computer is restarted. One user is an application, corresponding to one main thread and multiple worker threads. The number of private memory pools is not less than the number of worker threads. Each worker thread private memory pool is unique to a specific thread and cannot be accessed by other threads. It contains a thread identifier. If the identifier is 0, it means that the private memory pool has not been occupied by a thread. Otherwise, it indicates the thread ID that occupies the private memory pool. When any thread occupies the private memory pool for the first time, the identifier will be set to the thread ID of the thread, and other threads will no longer be able to access the private memory pool.

[0043] Allocation phase: Global memory application and memory block allocation are performed on a per-worker basis, where:

[0044] The global memory application is as follows: after receiving a memory allocation request, it is determined whether the private memory pool of the worker thread is empty. If so, a free super block is requested from the memory area of ​​the worker thread based on a doubly linked list according to the memory allocation request size and placed in the private memory pool; the size class closest to the requested size is determined by upward alignment from multiple preset optional split size classes (so that the size of the memory block is sufficient and not wasted), the free super block is split according to the closest size class to obtain multiple memory blocks, and the free super block is added to the doubly linked list of the corresponding memory block size class, and memory block allocation is performed; if not, memory block allocation is performed;

[0045] The memory block allocation is as follows: according to the requested size, a super block of the corresponding size class is searched from the private memory pool, a free memory block in the super block is allocated to the user, and a batch persistence mechanism is used to manage the memory block of the super block. Specifically, the super block header is cached in the DRAM memory to obtain a metadata copy. When memory blocks are allocated from the super block multiple times in a row, only the metadata copy of the super block is updated, and the update counter is incremented by one. When the value of the update counter reaches the batch size, the metadata copy is updated and synchronized to the super block header in the private memory pool, and the update counter is cleared.

[0046] Each worker thread's private memory pool caches a small number of superblocks allocated from the global persistent memory heap. These superblocks are organized into multiple doubly linked lists based on size classes. Superblocks of the same size class are placed in the same linked list and split into several smaller memory blocks of equal size. When the thread's private memory pool runs low on superblocks, several free superblocks are allocated from the global persistent memory heap to supplement the pool.

[0047] This embodiment method involves the fine-grained memory allocation problem of a new type of non-volatile memory in direct access mode. In the user state of the application, the non-volatile memory mapped to the virtual address space (this part of the memory space is called the persistent memory heap) is fine-grainedly allocated and recycled. Specifically, the free super blocks are managed and allocated in the form of a doubly linked list, and the global memory request is allocated and recycled at the super block granularity; at the same time, it is necessary to support multi-threaded concurrent memory allocation to ensure the crash consistency of metadata.

[0048] A memory allocation method proposed in this embodiment first divides multiple independent memory areas from the persistent memory heap of non-volatile memory to ensure that each worker thread will be allocated to a memory area for memory application; in addition, each memory area in the persistent memory heap is logically divided into several super blocks of equal size, and the free super blocks are managed and allocated in the form of a bidirectional linked list, and global memory application is performed in units of super blocks; in global memory application, different super blocks are split according to different size classes, and the same super block is split into several memory blocks of the same size, and the memory block sizes in different super blocks may be different. At the same time, a private memory pool is set for each worker thread for thread-local memory allocation. According to the size of the memory allocation request of the worker thread, the super block in the corresponding size class is searched in its private memory pool, and a free memory block is allocated from the super block. When allocating memory blocks, a batch persistence mechanism is proposed, which adopts the method of writing logs first and then modifying metadata to ensure the crash consistency of metadata.

[0049] This embodiment uses a write-ahead log technology to ensure crash consistency of metadata. Due to the persistence characteristics of the new non-volatile memory, when the system crashes unexpectedly and the power is cut off, the metadata in the CPU cache may not have time to be written back to the non-volatile memory, resulting in partial persistence of metadata. Partial persistence of metadata will cause inconsistency in the system state, thereby causing serious problems such as memory leaks and runtime errors. In order to avoid partial persistence of metadata, this embodiment uses a write-ahead log technology. Specifically, when an application process allocates a memory block from a super block, the header metadata of the super block will first be written to the log area and persisted, and then the metadata of the super block can be modified. In this way, after the system crashes, the header metadata of the super block can be restored based on the metadata items saved in the log.

[0050] This embodiment provides a batch persistence mechanism to reduce the time overhead of frequent log writing. Due to the loop structure of the program, there may be a situation where memory blocks of the same size are allocated multiple times in a row, and these memory blocks of the same size are often obtained from the same super block. If the metadata of the super block (that is, the header of the super block) is written to the log and persisted every time a memory block is allocated, the same memory address will be written repeatedly, resulting in unnecessary time overhead. To address this problem, Figure 2 As shown, the present invention adopts batch persistence technology to cache metadata items in non-volatile memory into DRAM memory, obtain metadata item copies (called volatile headers), and only update the metadata backup in DRAM memory when allocating memory blocks from the same super block for multiple consecutive times, and increase the update counter by one. When the value of the update counter reaches the batch size, the update of the metadata in DRAM is synchronized to the non-volatile memory, and the update counter is cleared. The specific synchronization frequency is determined by the batch size. Due to the volatility of DRAM, there is no need to write logs when updating the metadata copy in DRAM, and logs need to be written to non-volatile memory only during synchronization operations. The batch persistence mechanism can effectively reduce repeated log writing and non-volatile memory writing operations, and redirect a large number of write operations to non-volatile memory to write operations to DRAM memory, further improving performance, and alleviating the write wear problem of non-volatile memory.

[0051] As a preferred embodiment, the method further includes:

[0052] Before the above initialization phase, the non-volatile memory device is mounted to the file system, and the non-volatile memory is mapped to the virtual address space of the application through memory mapping, and the virtual address space serves as the persistent memory heap.

[0053] For example, the non-volatile memory in this embodiment is mounted using the following command:

[0054] sudondctl create-namespace --mode=devdax --map=mem.

[0055] This preferred method is a memory allocation method for a new type of non-volatile memory, which uses a direct access mechanism to map the non-volatile memory to a persistent memory heap, and divides the persistent memory heap into several independent areas to support concurrent memory allocation for multi-threaded applications. A private memory pool is set up for each active thread to alleviate the concurrency conflict problem of multi-threaded memory allocation, while shortening the critical path length of memory allocation, greatly shortening the response time of memory allocation. Write-ahead logging technology is used to ensure the crash consistency of metadata, avoid memory leaks caused by partial persistence of metadata, and use batch persistence technology to accelerate metadata update operations, reducing the time overhead brought by write-ahead logging. At the same time, a large number of write operations to non-volatile memory are redirected to write operations to DRAM memory, further improving performance and alleviating the write wear problem of non-volatile memory.

[0056] As a preferred embodiment, the above method of dividing multiple independent memory areas from the persistent memory heap of the non-volatile memory is as follows:

[0057] Part of the head space of the persistent memory heap is used as the heap header area. The size of the heap header area is, for example, 1MB, used to store important metadata information of the persistent memory heap. The remaining part is divided into several independent memory areas for memory allocation by different threads.

[0058] Among them, important metadata information includes: for example, the formatting flag of the 8-byte persistent memory heap; the starting address and total size of the persistent memory heap; the starting address of the persistent memory heap during the last run; the metadata of the private memory pool of each worker thread; and log data.

[0059] like Figure 3 As shown, the remaining memory space except the heap header is divided into several independent memory areas of equal size. In this embodiment, the size of each memory area is set to 256MB. Further, the first 16KB of each memory area is used to store the status information of the memory area.

[0060] As a preferred embodiment, the above method of logically dividing each memory area into multiple super blocks of equal size is as follows:

[0061] The header of each memory region is used to store status information of the memory region, specifically including: the number of super blocks contained in the memory region; the number of currently free super blocks in the memory region; a pointer to the first free super block in the memory region; and a pointer to the last free super block in the memory region; the size of the header is the same as the size of the super block to be divided, for example, 16KB;

[0062] The remaining part is logically divided into multiple super blocks of equal size. The header of each super block (for example, the first 128 bytes) is used to store the status information of the super block, including: the size class number of the super block; the size of each memory block in the super block; the total number of memory blocks in the super block; the number of currently free memory blocks in the super block; a bitmap marking the status of all memory blocks in the super block; the number of the first free memory block in the super block; a pointer to the next super block in the same size class; and a pointer to the previous super block in the same size class.

[0063] In this embodiment, global memory requests are made in superblock units. That is, each global request acquires several consecutive free superblocks. The free superblocks in each memory area are organized in a doubly linked list and arranged in ascending address order. When allocating a superblock, each memory area traverses the superblock linked list from front to back, following the first-fit algorithm. When reclaiming a superblock, the superblock linked list is traversed from front to back, selecting the appropriate location for insertion based on address order. After insertion, the consecutive free superblocks are merged.

[0064] The above preset multiple optional split size classes may include:

[0065] {8,16,24,32,40,48,56,64,80,96,112,128,160,192,224,256,320,384,448,512,640,768,896,1024,1280,1536,1792,2048,2560,3072,3584,4096,5120,6144,7168,8192}

[0066] In this embodiment, any request size will be aligned upward to the nearest size class. For example, a memory allocation request of 500 bytes will be aligned upward to 512 bytes. Figure 4As shown in the figure, memory allocation requests exceeding 8192 bytes (8KB) ​​will be directly allocated to several consecutive free superblocks. For example, a memory allocation request of 50KB will receive four consecutive free superblocks, totaling 64KB of continuous memory space. Memory allocation requests exceeding 128MB will directly map a new memory area.

[0067] Each worker thread's private memory pool caches a small number of superblocks allocated from the global persistent memory heap. These superblocks are organized into multiple doubly linked lists according to different size classes. Superblocks in the same size class are in the same linked list and are split into several small memory blocks of the same size. In this embodiment, there are 36 different size classes, so there are up to 36 doubly linked lists in each thread's private memory pool, and the number of linked lists is determined according to user needs. The superblocks in the linked lists are respectively divided into small memory blocks of {8, 16, 24, 32, ..., 8192} bytes in size.

[0068] When the super blocks in the thread's private memory pool are insufficient, the thread will apply for several free super blocks from the global persistent memory heap to supplement them.

[0069] When a thread makes a global memory request, a hash function is used to specify a memory area for the thread. That is, as a preferred embodiment, each worker thread selects a memory area from the persistent memory heap based on the hash function as the memory area of ​​the worker thread.

[0070] The hash function is: H = (TID + rand()) % R; where TID is the thread ID of the working thread, rand() is a random number generation function, R is the number of memory areas, and H is the calculated number of the memory area.

[0071] As a preferred embodiment, the state information stored in the header of each memory area also includes a 64-bit flag variable;

[0072] After determining the target memory area of ​​each working thread, the CAS atomic instruction is used to modify the mark variable of the target memory area to the thread number of the working thread to prevent other working threads from performing memory allocation in the memory area at the same time. After the memory allocation is completed, the working thread clears the mark variable of the memory area.

[0073] That is, to prevent multiple threads from allocating memory in the same memory area at the same time, the thread that arrives at the area first will use the CAS atomic instruction to modify the marker variable of the area to its own thread number. Threads that arrive at the area later will no longer be able to enter the area for memory allocation until the previous thread completes the allocation and exits the area.

[0074] like Figure 4 As shown, when a user's memory allocation request does not exceed 8KB, it will be allocated from its private memory pool. If the thread does not occupy a private memory pool, an idle private memory pool will be occupied for it. Preferably, in this embodiment, a total of 1024 idle private memory pools are set up to support up to 1024 worker threads performing memory allocation simultaneously. Further preferably, when a thread's private memory pool is exhausted, a super block will be requested from the global persistent memory heap to replenish it.

[0075] As a preferred embodiment, the method further includes:

[0076] During initialization, several background threads are started to monitor the usage of each worker thread's private memory pool and the usage of the global persistent memory heap in real time, and perform defragmentation operations when specific conditions are met;

[0077] The specific condition includes: for any size class in the private memory pool of any worker thread, if the proportion of free memory in that size class is higher than a preset value and the currently available memory space in the persistent memory heap is lower than the preset value, then performing a superblock merge operation on that size class in the private memory pool. Preferably, the preset value is 80% or 20%.

[0078] The isolation between different size classes can lead to significant memory fragmentation in some cases, reducing memory utilization. To reduce memory fragmentation and improve memory utilization, the memory management method provided by this invention creates a background thread to monitor memory usage in real time. When available memory space is insufficient or memory fragmentation is severe, it performs a superblock merge operation, consolidating memory fragments within superblocks of the same size class and releasing the free superblocks after consolidation, thereby creating available memory space. This method effectively reduces memory fragmentation and improves memory space utilization.

[0079] When performing a superblock merge operation in this embodiment, for example, the background thread selects superblock B1 with the lowest usage rate in the current superblock linked list and superblock B2 with the highest usage rate among the superblocks that meet the requirement of a usage rate not exceeding 1-r(B1), where r(B1) represents the usage rate of superblock B1. B1 and B2 are removed from the current linked list, and all allocated memory blocks in B1 are copied to the free memory blocks in B2. After the copying is completed, B1 is returned to the global persistent memory heap, and B2 is added back to the superblock linked list. Since r(B2) ≤ 1-r(B1), it can be proved that the free memory blocks in B2 are not less than the allocated memory blocks in B1, that is, the free memory blocks in B2 are sufficient to accommodate the copy operation of all allocated memory blocks in B1.

[0080] In general, if Figure 3As shown, in order to fully utilize the performance advantages of the new non-volatile memory, the present invention maps the non-volatile memory to a persistent memory heap in direct access mode, and divides the persistent memory heap into several independent memory areas, each of which is managed and allocated in units of super blocks. In addition, a private memory pool is set for each worker thread to reduce the conflict problem of multi-threaded concurrent memory allocation. In order to ensure the crash consistency of metadata and avoid memory leaks and runtime errors caused by system crashes, the present invention adopts the method of writing logs first and then modifying metadata. Furthermore, the present invention adopts a batch persistence mechanism to reduce the time overhead of writing logs. In addition, the present invention creates a background thread to monitor the usage and fragmentation of the persistent memory heap in real time, and performs super block merge operations when necessary, thereby reducing memory fragmentation and improving memory space utilization.

[0081] Example 2

[0082] An electronic device includes a memory and a processor, wherein the memory stores a computer program, and the processor implements the steps of the above method when executing the computer program.

[0083] The electronic device may be a computing device such as a desktop computer, a notebook, a PDA, or a cloud server. The processor may be a central processing unit (CPU), or other general-purpose processors, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The memory may be used to store computer programs and / or modules, and the processor may perform various functions of the electronic device by running or executing the computer programs and / or modules stored in the memory, and calling the data stored in the memory.

[0084] The relevant technical solutions are the same as those in Example 1 and will not be described again here.

[0085] Example 3

[0086] A computer-readable storage medium stores a computer program, which implements the steps of the method described above when executed by a processor.

[0087] Specifically, the memory may include a high-speed random access memory, and may also include a non-volatile memory, such as a hard disk, a memory, a plug-in hard disk, a smart memory card (Smart Media Card, SMC), a secure digital (Secure Digital, SD) card, a flash card (Flash Card), at least one disk storage device, a flash memory device, or other volatile solid-state storage device.

[0088] The relevant technical solutions are the same as those in Example 1 and will not be described again here.

[0089] It will be easily understood by those skilled in the art that the above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A memory allocation method for a new type of non-volatile memory, characterized in that: include: Initialization phase: Based on the main thread, multiple independent memory areas are divided from the persistent memory heap of non-volatile memory; Each memory area is logically divided into multiple super blocks of equal size and linked into a doubly linked list; multiple private memory pools are set up and each private memory pool is initialized to empty; multiple empty super block doubly linked lists are generated, each doubly linked list corresponds to a memory block size class; Allocation phase: Global memory application and memory block allocation are performed on a per-worker basis, where: The global memory application is as follows: after receiving a memory allocation request, it is determined whether the private memory pool of the worker thread is empty. If so, a free super block is requested from the memory area of ​​the worker thread based on a doubly linked list and placed in the private memory pool; the size class closest to the requested size is determined from a plurality of preset optional split size classes by upward alignment, the free super block is split according to the closest size class to obtain multiple memory blocks, the free super block is added to the doubly linked list of the corresponding memory block size class, and memory block allocation is performed; if not, memory block allocation is performed; The memory block allocation is as follows: according to the requested size, a super block of the corresponding size class is searched from the private memory pool, a free memory block in the super block is allocated to the user, and a batch persistence mechanism is used to manage the memory block of the super block. Specifically, the super block header is cached in the DRAM memory to obtain a metadata copy. When memory blocks are allocated from the super block multiple times in a row, only the metadata copy of the super block is updated. When the number of updates reaches the batch value, the metadata copy is updated and synchronized to the super block header in the private memory pool.

2. The memory allocation method according to claim 1, wherein: Also includes: Before the initialization phase, non-volatile memory is mapped to the user's virtual address space in direct access mode, and the virtual address space serves as the persistent memory heap.

3. The memory allocation method according to claim 1, wherein: The method of dividing the persistent memory heap of the non-volatile memory into multiple independent memory areas is as follows: Part of the head space of the persistent memory heap is used as the heap header area to store metadata information of the persistent memory heap, and the remaining part is divided into several independent memory areas; The metadata information includes: the formatting flag of the persistent memory heap, the starting address and total size of the persistent memory heap, the starting address of the persistent memory heap during the last run, metadata of the private memory pool of each worker thread, and log data.

4. The memory allocation method according to claim 1, wherein: Each memory area is logically divided into multiple super blocks of equal size, specifically: The header of each memory region is used to store status information of the memory region, specifically including: the number of super blocks contained in the memory region; the number of currently free super blocks in the memory region; a pointer to the first free super block in the memory region; and a pointer to the last free super block in the memory region; the size of the header is the same as the size of the super block to be divided; The remaining part is logically divided into multiple super blocks of equal size. The header of each super block is used to store the status information of the super block, including: the size class number of the super block; the size of each memory block in the super block; the total number of memory blocks in the super block; the number of currently free memory blocks in the super block; a bitmap marking the status of all memory blocks in the super block; the number of the first free memory block in the super block; a pointer to the next super block in the same size class; and a pointer to the previous super block in the same size class.

5. The memory allocation method according to claim 1, wherein: Each worker thread selects and determines a memory area from the persistent memory heap based on a hash function as the memory area of ​​the worker thread; The hash function is: H=(TID+rand())%R; wherein TID is the thread ID of the working thread, rand() is a random number generation function, R is the number of memory areas, and H is the calculated number of the memory area.

6. The memory allocation method according to claim 5, characterized in that: The status information stored in the header of each memory area also includes a 64-bit flag variable; After determining the memory area of ​​each working thread, the CAS atomic instruction is used to modify the mark variable of the memory area to the thread number of the working thread to prevent other working threads from performing memory allocation in the memory area at the same time. After the memory allocation is completed, the working thread clears the mark variable of the memory area.

7. The memory allocation method according to claim 1, wherein: Also includes: During the initialization phase, several background threads are started to monitor the usage of each worker thread's private memory pool and the global persistent memory heap in real time, and perform defragmentation operations when specific conditions are met; The specific conditions include: for any size class in the private memory pool of any worker thread, if the proportion of free memory in the size class is higher than a preset value and the currently available memory space in the persistent memory heap is lower than the preset value, a super block merge operation is performed on the size class in the private memory pool.

8. The memory allocation method according to claim 7, wherein: The preset value is 80% or 20%.

9. An electronic device comprising a memory and a processor, wherein the memory stores a computer program, wherein: When the processor executes the computer program, it implements a memory allocation method for a novel non-volatile memory as claimed in any one of claims 1 to 8.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, it implements a memory allocation method for a novel non-volatile memory as claimed in any one of claims 1 to 8.

Citation Information

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