Current regulation techniques based on operating parameters

Abstract

The invention relates to a technique for adjusting current based on operating parameters. An apparatus may include an amplifier, a feedback component, and first and second current generators. The amplifier may include an input for receiving a first voltage and an output for outputting a second voltage. The first current generator may be coupled with the output of the amplifier and generate a first current based at least in part on the second voltage. The feedback component may be coupled with the first current generator to modify the first current based at least in part on an operating temperature associated with a memory device. The first current may be proportional to the operating temperature. The second current generator may be coupled with the first current generator to generate a second current based at least in part on the first current modified by the feedback component.

Description

[0001] Information about divisional applications

[0002] This case is a divisional application of the invention patent application with application date of March 24, 2021, application number 202110312170.3, and invention name "Current regulation technology based on operating parameters".

[0003] Cross-references

[0004] This patent application claims priority to U.S. patent application No. 16 / 852,019, filed by Chu et al. on April 17, 2020, entitled “TECHNIQUES FOR ADJUSTING CURRENT BASED ON OPERATING PARAMETERS,” which is assigned to the assignee of this application and is expressly incorporated by reference in its entirety into this application. Technical Field

[0005] The technical field relates to techniques for regulating electrical current based on operating parameters. Background Art

[0006] Memory devices are widely used to store information in various electronic devices such as computers, wireless communication devices, cameras, digital displays, etc. Information is stored by programming memory cells within the memory device to different states. To access the stored information, a component can read or sense at least one stored state in the memory device. To store information, a component can write or program a state in the memory device.

[0007] There are various types of memory devices and memory cells, including magnetic hard disks, random access memory (RAM), read-only memory (ROM), dynamic RAM (DRAM), synchronous dynamic RAM (SDRAM), ferroelectric RAM (FeRAM), magnetic RAM (MRAM), resistive RAM (RRAM), flash memory, phase change memory (PCM), optional memory, chalcogenide memory technology, etc. Memory cells can be volatile or non-volatile. Non-volatile memory such as FeRAM can maintain a stored logic state for a long time even in the absence of external power. Volatile memory devices such as DRAM may lose their stored state when disconnected from an external power source. Summary of the invention

[0008] A device is described. The device may include: an amplifier including an input for receiving a first voltage and an output for outputting a second voltage based at least in part on the first voltage; a first current generator coupled to the output of the amplifier and configured to generate a first current based at least in part on the second voltage output by the amplifier; a feedback component coupled to the first current generator and configured to modify the first current based at least in part on an operating temperature associated with the device, the first current being proportional to the operating temperature; and a second current generator coupled to the first current generator and configured to generate a second current based at least in part on the first current modified by the feedback component.

[0009] An apparatus is described. The apparatus may include: an amplifier including a first input for receiving a first voltage, a second input, and an output; a first transistor having a gate and a source, the gate coupled to the output of the amplifier; a resistive component having an input coupled to the source of the first transistor, the resistive component also coupled to the second input of the amplifier; a tracking component having an input coupled to the source of the first transistor, the tracking component including a pair of transistors coupled to each other in a diode configuration; and a second transistor having a gate and a source, the gate coupled to the output of the amplifier, the second transistor configured to generate a first current on the source of the second transistor, the first current mirroring a second current generated on the source of the first transistor.

[0010] A method is described. The method may include: receiving an input voltage at an input of an amplifier; identifying an operating temperature of a memory device associated with the input voltage; generating a first current through a first current generator based at least in part on a voltage at an output of the amplifier, the first current being proportional to the operating temperature; drawing the first current generated by the first current generator through a feedback component; generating a second current for a memory cell array through a second current generator based at least in part on drawing the first current through the feedback component, the second current mirroring the first current and being proportional to the operating temperature; and outputting the second current generated by the second current generator to the memory cell array. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1 An example of a memory die supporting techniques for regulating current based on operating parameters according to examples disclosed herein is shown.

[0012] Figure 2An example of a circuit supporting techniques for regulating current based on operating parameters according to examples disclosed herein is shown.

[0013] Figure 3 Graph showing current distribution with respect to temperature supporting techniques for regulating current based on operating parameters according to examples disclosed herein.

[0014] Figure 4 An example of a circuit supporting techniques for regulating current based on operating parameters according to examples disclosed herein is shown.

[0015] Figure 5 A block diagram illustrating a memory device supporting techniques for regulating current based on operating parameters according to examples disclosed herein.

[0016] Figure 6 The flowchart shown illustrates one or more methods of techniques supporting regulating current based on operating parameters according to examples disclosed herein. DETAILED DESCRIPTION

[0017] In some memory devices, the use of current in a circuit may vary based on different operating conditions of the memory device. For example, the current may vary based on the temperature of the memory device, other currents on the memory device, manufacturing differences of different components in the memory system, or a combination thereof. In some instances, some currents may vary with some operating parameters in a complementary manner rather than in a proportional manner. For example, the amount of current provided to a memory device may vary inversely with the operating temperature of the memory device (e.g., higher temperatures may result in lower current). However, in many cases, a memory device may use more current at higher temperatures, rather than less (e.g., the use of current may vary proportionally with the operating temperature).

[0018] Techniques, systems, and devices for providing current to a memory device such that the current varies in a manner that is proportional to an operating parameter of the memory device are described. The current modifying component may include a feedback component that includes a tracker component. The tracker component may include two or more transistors in a diode configuration. The tracker component may be configured to vary the output current or output voltage based at least in part on a temperature of the memory device, other currents or voltages across the memory device, manufacturing differences of different components in the memory system, or a combination thereof.

[0019] First, in the reference Figure 1 Features of the present disclosure are described in the context of the memory systems and dies described herein. Figures 2 to 4 Features of the present disclosure are described in the context of circuits and corresponding graphs related to techniques for regulating current based on operating temperature. Figures 5 to 6These and other features of the present disclosure are further illustrated and described with reference to the apparatus diagrams and flow charts described in connection with techniques for regulating current based on operating parameters.

[0020] Figure 1 An example of a memory die 100 that supports techniques for regulating current based on operating parameters according to examples disclosed herein is shown. In some examples, the memory die 100 may be referred to as a memory chip, a memory device, or an electronic memory device. The memory die 100 may include one or more memory cells 105, each of which may be programmed to store a different logic state (e.g., programmed to one of a set of two or more possible states). In some examples, the memory cells 105 may be arranged in an array.

[0021] Memory cell 105 may store a charge representing a programmable state in a capacitor. DRAM architectures may include capacitors that include dielectric materials to store a charge representing a programmable state. In other memory architectures, other storage devices and components are possible. Memory cell 105 may include a logic storage component, such as capacitor 130 and a switch component 135. Capacitor 130 may be an example of a dielectric capacitor or a ferroelectric capacitor. A node of capacitor 130 may be coupled to a voltage source 140, which may be a panel reference voltage such as Vpl, or may be a ground such as Vss.

[0022] The memory die 100 may include one or more access lines (e.g., one or more word lines 110 and one or more digit lines 115) arranged in a pattern such as a grid pattern. The access line may be a conductive line coupled to the memory cell 105 and may be used to perform access operations on the memory cell 105. In some examples, the word line 110 may be referred to as a row line. In some examples, the digit line 115 may be referred to as a column line or a bit line. The memory cell 105 may be located at the intersection of the word line 110 and the digit line 115.

[0023] Operations such as reading and writing can be performed on the memory cell 105 by activating or selecting an access line such as one or more of the word line 110 or the digit line 115. By biasing the word line 110 and the digit line 115 (e.g., applying a voltage to the word line 110 or the digit line 115), a single memory cell 105 can be accessed at their intersection. The intersection of the word line 110 and the digit line 115 in a two-dimensional or three-dimensional configuration can be referred to as the address of the memory cell 105.

[0024] Access to the memory cells 105 may be controlled by a row decoder 120 or a column decoder 125. For example, the row decoder 120 may receive a row address from the local memory controller 160 and activate the word lines 110 based on the received row address. The column decoder 125 may receive a column address from the local memory controller 160 and activate the digit lines 115 based on the received column address.

[0025] Selecting or deselecting the memory cell 105 may be achieved by activating or deactivating the switch component 135 using the word line 110. The capacitor 130 may be coupled to the digit line 115 using the switch component 135. For example, when the switch component 135 is deactivated, the capacitor 130 may be separated from the digit line 115, and when the switch component 135 is activated, the capacitor 130 may be coupled to the digit line 115.

[0026] The sensing component 145 may be used to detect a state (e.g., charge) stored on the capacitor 130 of the memory cell 105 and determine a logic state of the memory cell 105 based on the stored state. The sensing component 145 may include one or more sense amplifiers to amplify or otherwise convert a signal generated by accessing the memory cell 105. The sensing component 145 may compare the signal detected from the memory cell 105 with a reference 150 (e.g., a reference voltage). The detected logic state of the memory cell 105 may be provided as an output of the sensing component 145 (e.g., to the input / output 155), and the detected logic state may be indicated to another component of the memory device including the memory die 100.

[0027] The local memory controller 160 can control access to the memory cells 105 through various components (e.g., row decoder 120, column decoder 125, sense component 145). In some examples, one or more of the row decoder 120, column decoder 125, and sense component 145 can be co-located with the local memory controller 160. The local memory controller 160 can be used to receive one or more commands or data from one or more different memory controllers (e.g., an external memory controller associated with a host device, another controller associated with the memory die 100), convert the command or data (or both) into information that can be used by the memory die 100, perform one or more operations on the memory die 100, and transmit data from the memory die 100 to the host device based on performing the one or more operations. The local memory controller 160 can generate row signals and column address signals to activate the target word line 110 and the target digital line 115.

[0028] The local memory controller 160 may also generate and control various voltages or currents used during operation of the memory die 100. For example, the local memory controller 160 may include a power circuit 170 that may control the voltage and current of the memory die 100 based on operating parameters. According to examples disclosed herein, the power circuit 170 may use a current mirror to regulate current based on operating parameters.

[0029] A current mirror is a circuit designed to replicate the output current through an active output device by controlling the current in an internal active device. This keeps the output current constant regardless of the load. This type of circuit can be helpful for powering external circuits. For example, a current mirror can be used to output a constant current to an array of memory cells. However, in many cases, the current used by the external circuit (e.g., a memory cell) may not be constant. For example, the amount of current used by the external circuit may vary based on the operating temperature of the external circuit (e.g., a higher temperature may result in a larger current).

[0030] In some circuits (e.g., current mirror circuits), the current of the internal active device may be inversely proportional to the temperature change of the external circuit. That is, as the temperature of the external circuit increases, the current provided to the internal active device may decrease. Because the output current mirrors this internal current, the output current provided to other parts of the memory device (e.g., the memory array) may also decrease. For some circuits, the inverse relationship between temperature and current output may cause circuit inefficiency. In some cases, the external circuit may use more current at higher temperatures, not less. To compensate, the circuit can be designed so that the current output by the active output device is greater than or equal to the current used by the external circuit at the highest operating temperature. In a circuit where the output current changes inversely with temperature, the active output device can be designed to provide a current greater than the current provided at a lower temperature at a higher temperature. In this case, the active output device can be designed to be larger than the device used, and efficiency may be lost at lower temperatures.

[0031] Devices, systems, and techniques are described herein for circuits that can be designed such that both internal and external currents are proportional to the temperature of the external circuit. In such cases, as the operating temperature of the external circuit increases, the current output by the active output device may also increase to meet the growing power demands of the external circuit. As a result, the active output device can be more efficient and can be designed to be smaller (e.g., using less die area).

[0032] Figure 2An example of a circuit 200 supporting techniques for regulating current based on operating parameters according to examples disclosed herein is shown. The circuit 200 may illustrate a power supply circuit 170 that provides current to a representative memory cell 105 of a memory device.

[0033] The circuit 200 may include an amplifier 202 , a feedback component 204 , a first current generator 206 , and a second current generator 208 .

[0034] Amplifier 202 may have a first input 210, a second input 212, and an output 214. First input 210 may receive an input voltage Vin, and second input 212 may receive feedback from feedback component 204. The Vin voltage may be an example of a voltage used to operate a memory cell array or other portion of a memory device. Output 214 may output a first voltage V1 based on first input 210 and second input 212. In circuit 200, amplifier 202 may be an example of an operational amplifier A1 in a non-inverting configuration and having a gain G equal to V1 / Vin. In some cases, the gain of amplifier 202 may be based on feedback component 204. First input 210 may be an example of a positive input, and second input 212 may be an example of a negative input. Input voltage Vin may be received at first input 210, and feedback from feedback component 204 may be received at second input 212.

[0035] The first current generator 206 may include a first transistor 216, which may sometimes be referred to as a first current generator. The transistor 216 may include a gate 218, a source 220, and a drain 222. In some cases, the first transistor 216 may be an example of a power transistor. The drain 222 may be coupled to a high voltage Vh, such as Vpl, and the gate 218 may be coupled to the output 214 of the amplifier 202. The gate 218 may form a switch that may allow current to flow from the drain 222 through the transistor 216 to the source 220. The amount of current may be based on a gain. In some cases, the first current generator 206 may have a gain of one (1). Other gain values ​​may also be used.

[0036] The feedback component 204 may have a resistive component 224 and a tracking component 226, which may be coupled to the source 220 of the first transistor 216 and may both draw current from the source. The resistive component 224 may include a pair of resistors, such as a first resistor 228 and a second resistor 230, which may be coupled together to form a voltage divider. The first resistor 228 and the second resistor 230 may be coupled at one end to form a node 232. The second end of the first resistor 228 may be coupled to the first current generator 206. The second end of the second resistor 230 may be coupled to a low voltage VL, such as ground or Vss. The node 232 may be coupled to the second input 212 of the amplifier 202. In such a configuration, the resistive component 224 may form a voltage divider for the amplifier 202, and the gain G of the amplifier 202 may be determined by G=1+(R1 / R2), where R1 is the resistance of the first resistor 228 and R2 is the resistance of the second resistor 230. The first resistor 228 and the second resistor 230 may include two or more resistors linked together, or may be a single resistor forming a node therein.

[0037] Tracking component 226 may be configured to output a current that is proportional to operating temperature rather than inversely proportional to operating temperature. For example, a circuit that includes resistive component 224 but does not include tracking component 226 may output a current that is inversely proportional to (e.g., complementary to) an operating temperature associated with an external circuit. Tracking component 226 may include a pair of transistors 233, such as a first tracking transistor 234 and a second tracking transistor 236, which may be coupled to each other in a diode configuration. First tracking transistor 234 and second tracking transistor 236 may be field effect transistors (FETs). First tracking transistor 234 may be a p-channel transistor, and second tracking transistor 236 may be an n-channel transistor. First tracking transistor 234 and second tracking transistor 236 may each include a gate 238, a source 240, and a drain 242. Gates 238 and drains 242 of both first tracking transistor 234 and second tracking transistor 236 may be coupled together. Source 240 of first tracking transistor 234 may be coupled to first current generator 206 and may draw current therefrom. The source 240 of the second tracking transistor 236 can be coupled to VL. Other types of transistors and transistor configurations are also possible. For example, a second pair of transistors coupled to each other in a diode configuration can be coupled to the first tracking transistor 234 and the second tracking transistor 236, as described below.

[0038] The second current generator 208 may include a second transistor 244, which may sometimes be referred to as a second current generator. The second transistor 244 may include a gate 246, a source 248, and a drain 250. In some cases, the second transistor 244 may be an example of a power transistor. The drain 250 may be coupled to a high voltage Vh, and the gate 246 may be coupled to the output 214 of the amplifier 202. The gate 246 may form a switch that allows current to flow from the drain 250 through the second transistor 244 to the second transistor 248. The current Iout output from the second current generator 208 may be provided to an external memory array. The second current generator 208 may be configured to generate an output current Iout to mirror the first current I1 generated by the first current generator 206. The second current generator 208 may have a gain of 10. Other gain values ​​may also be possible. The second current generator 208 may have a gain higher than that of the first current generator 206. For example, the second current generator 208 may have a gain that is 10 times the gain of the first current generator 206. Other gain differences are also possible.

[0039] At a first operating temperature, amplifier 202 may receive an input voltage Vin at a first input 210. Amplifier 202 may cause a first voltage V1 to appear at its output 214. The first voltage V1 may be received at a gate 218 of a first transistor 216 of a first current generator 206. This may turn on the first current generator 206 and may cause a first current I1 to flow through the first transistor 216. The first current I1 may be based at least in part on the input voltage and the operating temperature of the memory device.

[0040] Feedback component 204 may draw current I1 from transistor 216. A first portion I1a of current I1 may flow through resistive component 224. A second portion I1b of current I1 may flow through tracking component 226. The amount of current flowing through resistive component 224 may be determined by I1a=Vh / R1. The amount of current flowing through tracking component 226 may be equal to the amount of current flowing through first tracking transistor 234 and second tracking transistor 236. The total amount of first current I1 may be equal to the sum of first portion I1a and second portion I1b.

[0041] The voltage V1 may also be received at the gate 246 of the second transistor 244 of the second current generator 208. This may turn on the second current generator 208 and may cause the output current Iout to flow through the second transistor 244. The output current Iout may be provided to Figure 2The memory cell array 105 is outside the circuit 200 shown. The output current Iout can mirror the current I1 drawn from the first transistor 216. The current Iout can mirror the current I1 of the difference between the gain of the second generator and the gain of the first current generator. In one example, the gain difference is 1000, so that the current Iin is in the microampere level and the current Iout is in the milliampere level.

[0042] As described herein, the operating temperature of an external circuit (e.g., a memory cell array) may affect the amount of current used by the external circuit. In some cases, as the operating temperature increases, the external circuit may use more current. Taking these situations into account, both the first current I1 and the output current Iout may be proportional to the change in the operating temperature. That is, as the temperature increases, both the first current I1 and the output current Iout may rise. Since Iout may rise with temperature, more current may be available for the external circuit.

[0043] Typically, as the temperature increases, the resistance value of the resistor also increases. In this case, when the temperature increases, the resistance values ​​of the first resistor 228 and the second resistor 230 in the resistance component 224 will increase. Because I=V / R, the first portion I1a of the first current I1 may decrease as the resistance increases. Therefore, as the temperature increases, the first portion I1a may decrease. In this case, the first portion I1a may be inversely proportional to the change in the operating temperature.

[0044] Generally, as the temperature increases, a diode draws more current. Therefore, when the first tracking transistor 234 and the second tracking transistor 236 of the tracking component 226 are configured in a diode configuration, they draw more current as the temperature increases. Therefore, the second portion I1b of the first current I1 can increase as the temperature increases. In this case, the second portion I1b can be proportional to the change in operating temperature.

[0045] The total current I1 may be equal to the sum of the first portion I1a and the second portion I1b. The transistors 234, 236 may be designed or selected so that as the temperature increases, the first portion I1b of the first current I1 may increase at a greater rate than the rate of decrease of the second portion I1a. In this case, the total current I1 may increase as the temperature increases. Therefore, the total current I1 may be proportional to the change in the operating temperature.

[0046] The output current Iout may mirror the first current I1. Therefore, in the case where the first current I1 increases with the increase of the operating temperature, the output current Iout may also increase with the increase of the operating temperature and may be proportional to the change of the operating temperature.

[0047] At a second operating temperature higher than the first operating temperature, the amplifier 202 may receive another input voltage Vin' and output another first voltage V1'. The voltage and current values ​​at the second operating temperature may be different from the voltage and current values ​​at the first operating temperature. The first voltage V1' may not be equal to the original first voltage V1. The first current generator 206 may be turned on again by the voltage V1', and the first current I1' may flow through the transistor 216.

[0048] The feedback component 204 may draw a first current I1' from the transistor 216. As previously described, a first portion I1a' of the first current I1' may flow through the resistance component 224, and a second portion I1b' may flow through the tracking component 226. As described above, the current flowing through the resistance component 224 may be inversely proportional to the operating temperature, and the current flowing through the tracking component 226 may be proportional to the operating temperature. Therefore, the first portion I1a' of the first current I1' may be smaller than the first portion I1a of the original first current I1, and the second portion I1b' of the first current I1' may be larger than the second portion I1b of the original first current I1. In some cases, the rate of increase of the first portion I1b' may be greater than the rate of increase of the first portion I1a' with respect to changes in the operating temperature. In this case, the first current I1' may be greater than the original first current I1.

[0049] The second current generator 208 may also be turned on by the first voltage V1′, and the output current Iout′ may flow through the transistor 244. As described above, the output current may mirror the current drawn from the first transistor 216. In the case where the first current I1′ is greater than the original first current I1, the output current Iout′ may be greater than the original output current Iout. In this case, both the internal and external currents may be proportional to the change in operating temperature.

[0050] Figure 3 A graph 300 showing current distribution with respect to temperature supporting techniques for regulating current based on operating parameters according to examples disclosed herein. Graph 300 may illustrate output and input currents of a power circuit employing a mirror circuit, and currents used by a representative memory cell 105 of memory die 100 between minimum and maximum operating temperatures. For example, the currents I1 and Iout shown may reflect the currents of the power circuit 100 and ... Figure 2 The circuit diagram shown associates current distributions I1 and Iout, while Imemory may reflect the current used by the memory cell 105 powered by the circuit 200 .

[0051] As discussed above, the external circuit may use more current at higher temperatures. This can be represented by the dotted line Imemory. Imemory can be increased from the minimum current Imin used by the external circuit at the minimum operating temperature Tmin of the circuit (e.g., -40°C). Imemory can be increased to the maximum current Imax at the maximum operating temperature Tmax of the circuit (e.g., 130°C). In order to provide sufficient current to the external circuit, the output current of the mirror circuit should be greater than or equal to the maximum current Imax used by the external circuit. As shown in the figure, this may occur at the highest operating temperature Tmax.

[0052] As discussed above, in some current mirror circuits, the internal current and the output current may be inversely proportional to the temperature change of the external circuit (e.g., the circuit 200 without the tracking component 226). That is, as the temperature of the external circuit increases, the internal current and the output current may decrease. This can be represented by the dotted lines I1-2 and Iout-2. As shown in the figure, when the output current is inversely proportional to the temperature change, in order to provide the maximum current Imax at the maximum operating temperature Tmax, the output current may be larger at a lower temperature. In this case, the output current generator may be larger than the current generator used, and efficiency may be lost at a lower temperature. At temperature Tmax, the output current generator may have a gain Bx relative to the internal current I1-2 to provide the maximum current Imax.

[0053] In contrast, in some current mirror circuits, the internal current and the output current may be proportional to the temperature change of the external circuit (e.g., circuit 200). That is, as the temperature of the external circuit increases, the internal current and the output current may rise. This can be represented by the solid lines I1 and Iout. As shown in the figure, when the output current is proportional to the temperature change, the output current at a lower temperature may be smaller, while the maximum current Imax is still provided at the highest operating temperature Tmax. Therefore, as the operating temperature increases, the current Iout will also meet the increased power demand Imemory of the external circuit. In this case, the output current generator can be designed to better match the current use of the external circuit. At temperature Tmax, the output current generator can have a gain Ax relative to the internal current I1 to provide a maximum current Imax. It can be seen that the gain A can be less than the gain B to provide the same maximum current Imax. Therefore, the output current generator may be smaller and more efficient.

[0054] Figure 4An example of a circuit 400 supporting techniques for regulating current based on operating parameters according to examples disclosed herein is shown. Circuit 400 may illustrate power circuit 170 providing current to a representative memory cell 105 of a memory device. Circuit 400 may include portions of circuit 200, as discussed above.

[0055] In addition to the devices and components discussed above, the power supply circuit may also include other devices or components. For example, the circuit 400 may further include a third current generator 402 and a second pair of tracking transistors 404 , such as a third tracking transistor 422 and a fourth tracking transistor 424 .

[0056] Switches may also be included in the power supply circuit to allow a user to select different combinations of components for the power supply circuit. For example, the circuit 400 may include four switches SW1 to SW4 that may be used. Of course, other numbers of switches may also be used. The first switch 406 may couple the third current generator 402 to the feedback component 204. The second switch 408 may couple the tracking component 226 to the resistance component 224 and the first current generator 206. The third switch 410 may bypass the third tracking transistor 422. The fourth switch 412 may bypass the fourth tracking transistor 424. To reflect the circuit 200 discussed above, the second switch 408, the third switch 410, and the fourth switch 412 may be closed, while the first switch 406 may be open.

[0057] In some instances, the switches may remain open during manufacturing, and components may be selected after manufacturing by closing one or more switches. For example, a fuse holder may be incorporated into the memory die so that after the die is manufactured, a fuse may be inserted to close the corresponding switch. Other types of switches may also be used. Thus, switches SW1 to SW4 may be used to adjust the configuration of the circuit during manufacturing prior to finalizing and shipping the product. In this case, the circuit may be manufactured with a variety of different configurations, and the exact configuration of the final circuit may be selected by activating / deactivating one or more switches SW1 to SW4.

[0058] When the tracking component 226 is used, the first current I1 may increase significantly compared to using the resistive component 224 alone. In some cases, the first current I1 may double or be greater. For example, the first current may change from 3 μA to 6 μA. This may cause the voltage V1 to change significantly as well, which may cause reliability issues. The third current generator 402 may help offset this by adding a second current that may flow through the tracking component 226.

[0059] The third current generator 402 may include a third transistor 414. The third transistor 414 may include a gate 416, a source 418, and a drain 420. In some cases, the third transistor 414 may be an example of a power transistor. The drain 420 may be coupled to a high voltage Vh, and the gate 416 may be coupled to the output 214 of the amplifier 202. The gate 416 may form a switch that may allow the second current I2 to flow from the drain 420 through the transistor 414 to the source 418. The amount of current may be based on a gain. The third current generator 402 may have a gain of 1. Other gain values ​​are also possible.

[0060] To couple the third current generator 402 with the tracking component 226, the first switch 406 and the second switch 408 may be closed. This may allow the tracking component 226 to draw current from the third current generator 402. Thus, the current I2 may flow through the tracking component 226 instead of the first portion I1b of the first current I1 flowing through the tracking component. Thus, the first voltage V1 may be maintained at around 1.4 or 1.5 volts.

[0061] Tracking component 226 may include a second pair of transistors 404, such as a third tracking transistor 422 and a fourth tracking transistor 424, for use with first pair of transistors 233. Second pair of transistors 404 may be configured in a similar manner to first pair of transistors 233. For example, third tracking transistor 422 and fourth tracking transistor 424 may be coupled to each other in a diode configuration. To couple second pair of transistors 404 to first pair of transistors 233, source 426 of third tracking transistor 422 may be coupled to drain 242 of first tracking transistor 234, and source 426 of fourth tracking transistor 424 may be coupled to drain 242 of second tracking transistor 236. In this configuration, second pair of transistors 404 may be connected in series between first tracking transistor 234 and second tracking transistor 236. In other examples, second pair of transistors 404 may be connected in series with first pair of transistors without separating first pair of transistors.

[0062] To allow current to flow through the third tracking transistor 422, the third switch 410 may remain open. To allow current to flow through the fourth tracking transistor 424, the fourth switch 412 may remain open. With both the third switch 410 and the fourth switch 412 open, the first portion I1b of the first current I1 from the first current generator (or the second current I2 from the third current generator 402 if the first switch 406 is closed) may flow through both pairs of transistors 233, 404. To bypass the third tracking transistor 422, the third switch 410 may be closed. To bypass the fourth tracking transistor 424, the fourth switch 412 may be closed. With both the third switch 410 and the fourth switch 412 closed, the second set of transistors 404 may be bypassed so that the first portion I1b of the first current I1 or the second current I2 may flow only through the first pair of transistors 233.

[0063] Figure 5 A block diagram 500 is shown of a memory device 505 that supports techniques for regulating current based on operating parameters according to examples disclosed herein. The memory device 505 may be as described in reference Figures 1 to 4 Memory device 505 may include a receiving component 510, a temperature component 515, a first current generator 520, a feedback component 525, a second current generator 530, and an output component 535. Each of these modules may communicate with each other directly or indirectly (e.g., via one or more buses).

[0064] The receiving component 510 may receive an input voltage at the input of the amplifier.

[0065] The temperature component 515 can identify an operating temperature of the memory device associated with the input voltage. In some examples, the temperature component 515 can identify a second operating temperature of the memory device that is greater than the operating temperature.

[0066] The first current generator 520 may generate a first current based on a voltage at the output of the amplifier, the first current being proportional to the operating temperature. In some examples, the first current generator 520 may generate a third current based on a voltage at the output of the amplifier, the third current being greater than the first current.

[0067] The feedback component 525 can draw a first current generated by the first current generator. In some examples, the feedback component 525 can draw a first portion of the first current through a resistive component of the feedback component and draw a second portion of the first current through a tracking component of the feedback component. In some examples, the feedback component 525 can draw a third current generated by the first current generator.

[0068] The second current generator 530 can generate a second current for the memory cell array based on drawing the first current through the feedback component, the second current mirroring the first current and being proportional to the operating temperature. In some cases, the first change direction of the second current is proportional to the second change direction of the first current relative to the change in the operating temperature. In some examples, the second current generator 530 can generate a fourth current for the memory cell array, the fourth current being greater than the second current.

[0069] The output unit 535 may output the second current generated by the second current generator to the memory cell array. In some examples, the output unit 535 may output the fourth current generated by the second current generator to the memory cell array.

[0070] Figure 6 The flowchart shown shows one or more methods 600 of supporting techniques for regulating current based on operating parameters according to examples disclosed herein. The operations of method 600 can be implemented by a memory device or component thereof described herein. For example, the operations of method 600 can be implemented by reference to Figure 5 The memory device described herein performs. In some examples, the memory device may execute an instruction set to control the functional elements of the memory device to perform the described functions. Additionally or alternatively, the memory device may use dedicated hardware to perform various aspects of the described functions.

[0071] At 605, the memory device may receive an input voltage at an input of an amplifier. The operation of 605 may be performed according to the methods described herein. In some examples, the operation of Figure 5 Aspects of the operations of the receiving component performing 605 are described.

[0072] At 610, the memory device may identify an operating temperature of the memory device associated with an input voltage. The operation of 610 may be performed according to the methods described herein. In some examples, the memory device may be configured as described in reference to Figure 5 The temperature component described performs aspects of the operation of 610 .

[0073] At 615, the memory device may generate a first current based on the voltage at the output of the amplifier, the first current being proportional to the operating temperature. The operation of 615 may be performed according to the methods described herein. In some examples, the operation may be performed as described in reference to Figure 5 Aspects of the operation of the first current generator performing 615 are described.

[0074] At 620, the memory device may draw a first current generated by a first current generator. The operation of 620 may be performed according to the methods described herein. In some examples, the operation of Figure 5Aspects of the operation of the feedback component 620 are described.

[0075] At 625, the memory device may generate a second current for the memory cell array based on drawing the first current through the feedback component, the second current mirroring the first current and proportional to the operating temperature. The operation of 625 may be performed according to the methods described herein. In some examples, the second current may be generated by the memory cell array as described in reference to Figure 5 Aspects of the operation of the second current generator performing 625 are described.

[0076] At 630, the memory device may output the second current generated by the second current generator to the memory cell array. The operation of 630 may be performed according to the method described herein. In some examples, the second current generator may be configured as described in reference to Figure 5 The output component described performs aspects of the operation of 630 .

[0077] In some examples, an apparatus as described herein may perform one or more methods, such as method 600. The apparatus may include features, means, or instructions (e.g., a non-transitory computer-readable medium storing instructions executable by a processor) for: receiving an input voltage at an input of an amplifier; identifying an operating temperature of a memory device associated with the input voltage; generating a first current by a first current generator based on a voltage at an output of the amplifier, the first current being proportional to the operating temperature; drawing the first current generated by the first current generator through a feedback component; generating a second current for a memory cell array by a second current generator based on drawing the first current through the feedback component, the second current mirroring the first current and being proportional to the operating temperature; and outputting the second current generated by the second current generator to the memory cell array.

[0078] In some examples of the methods 600 and devices described herein, the first direction of change of the second current can be proportional to the second direction of change of the first current relative to the change in operating temperature.

[0079] In some examples of the methods 600 and devices described herein, drawing the first current may include operations, features, components, or instructions for: drawing a first portion of the first current through a resistive component of the feedback component; and drawing a second portion of the first current through a tracking component of the feedback component.

[0080] Some instances of the method 600 and apparatus described herein may further include operations, features, components, or instructions for: identifying a second operating temperature of the memory device, which may be greater than the operating temperature; generating a third current through a first current generator based on a voltage at the output of the amplifier, the third current being greater than the first current; drawing the third current generated by the first current generator through a feedback component; generating a fourth current for the memory cell array through a second current generator, the fourth current being greater than the second current; and outputting the fourth current generated by the second current generator to the memory cell array.

[0081] It should be noted that the methods described above describe possible embodiments, and that the operations and steps may be rearranged or otherwise modified, and other embodiments are possible. Furthermore, parts of two or more of the methods may be combined.

[0082] A device is described. The device may include: an amplifier including an input for receiving a first voltage and an output for outputting a second voltage based on the first voltage; a first current generator coupled to the output of the amplifier and configured to generate a first current based on the second voltage output by the amplifier; a feedback component coupled to the first current generator and configured to modify the first current based on an operating temperature associated with the device, the first current being proportional to the operating temperature; and a second current generator coupled to the first current generator and configured to generate a second current based on the first current modified by the feedback component.

[0083] In some examples, based on the feedback component modifying the first current, a first change direction of the first current and a second change direction of the second current may both be proportional to a change in the operating temperature.

[0084] In some instances, the feedback component may include operations, features, components, or instructions for: a resistive component coupled to the first current generator and the input of the amplifier and used to draw a first portion of the first current from the first current generator; and a tracking component coupled to the first current generator and used to draw a second portion of the first current from the first current generator.

[0085] In some examples, a first portion of the first current may be inversely proportional to a change in operating temperature, and a second portion of the first current may be proportional to a change in operating temperature.

[0086] In some examples, the tracking component includes a pair of transistors configured to receive the second portion of the first current. In some examples, the pair of transistors includes a p-channel transistor and an n-channel transistor. In some examples, the transistors can be coupled to each other in a diode configuration.

[0087] In some examples, the tracking component includes a second pair of transistors coupled to each other in a diode configuration and configured to receive a second portion of the first current.

[0088] In some examples, the first current generator may be configured to have a first gain, and the second current generator may be configured to have a second gain that is higher than the first gain of the first current generator.

[0089] In some examples, the feedback component includes a resistive component and a tracking component both coupled to the first current generator, the resistive component coupled to the amplifier and configured to provide feedback to the amplifier, and the tracking component configured to track a second current generated by the second current generator.

[0090] An apparatus is described. The apparatus may include: an amplifier including a first input for receiving a first voltage, a second input, and an output; a first transistor having a gate and a source, the gate coupled to the output of the amplifier; a resistive component having an input coupled to the source of the first transistor, the resistive component also coupled to the second input of the amplifier; a tracking component having an input coupled to the source of the first transistor, the tracking component including a pair of transistors coupled to each other in a diode configuration; and a second transistor having a gate and a source, the gate coupled to the output of the amplifier, the second transistor configured to generate a first current on the source of the second transistor, the first current mirroring a second current generated on the source of the first transistor.

[0091] In some examples, the tracking component can be configured such that a first change direction of the first current and a second change direction of the second current are both proportional to a change in temperature.

[0092] In some examples, a source of the p-channel transistor of the pair of transistors may be coupled to an input of the tracking component, a source of the n-channel transistor of the pair of transistors may be coupled to ground, and gates and drains of the p-channel transistor and the n-channel transistor may be coupled together.

[0093] In some examples, the tracking component further includes a second pair of transistors coupled to each other in a diode configuration, wherein the second pair of transistors can be coupled to the pair of transistors.

[0094] In some examples, the first transistor may be configured to have a first gain, and the second transistor may be configured to have a second gain, which may be higher than the first gain of the first transistor.

[0095] In some examples, the amplifier comprises a non-inverting amplifier, where the first input can be a positive input and the second input can be a negative input.

[0096] The term "coupled" may refer to a relationship between components that supports a signal flow between the components. Components are considered to be coupled to one another if there is any conductive path between the components that can readily support a signal flow between the components. At any given time, the conductive path between the components that are coupled to one another may be an open circuit or a closed circuit based on the operation of the device containing the connected components. The conductive path between the connected components may be a direct conductive path between the components, or the conductive path between the connected components may be an indirect conductive path that may include an intermediate component such as a switch, transistor, or other component. In some instances, the signal flow between the connected components may be interrupted for a period of time, for example, using one or more intermediate components such as a switch or transistor.

[0097] The switch component or transistor discussed herein may represent a field effect transistor (FET) and include a three-terminal device including a source, a drain and a gate. The terminal may be connected to other electronic components by a conductive material (e.g., a metal). The source and drain may be conductive and may include a heavily doped semiconductor region, such as a degenerate semiconductor region. The source and drain may be separated by a lightly doped semiconductor region or a channel. If the channel is n-type (i.e., most carriers are electrons), the FET may be referred to as an n-type FET. If the channel is p-type (i.e., most carriers are holes), the FET may be referred to as a p-type FET. The channel may be terminated by an insulating gate oxide. Channel conductivity may be controlled by applying a voltage to the gate. For example, applying a positive voltage or a negative voltage to an n-type FET or a p-type FET, respectively, may cause the channel to be turned on. When a voltage greater than or equal to the threshold voltage of the transistor is applied to the transistor gate, the transistor may be "turned on" or "activated". When a voltage less than the threshold voltage of the transistor is applied to the transistor gate, the transistor may be "disconnected" or "deactivated".

[0098] The descriptions set forth herein in conjunction with the accompanying drawings describe example configurations and do not represent all examples that may be implemented or within the scope of the claims. The term "exemplary" as used herein means "serving as an example, instance, or illustration," rather than "preferably" or "better than other examples." The detailed description includes specific details to provide an understanding of the described techniques. However, these techniques may be practiced without these specific details. In some cases, well-known structures and devices are shown in block diagram form to avoid confusing the concepts of the described examples.

[0099] In the drawings, similar components or features may have the same reference label. In addition, various components of the same type may be distinguished by following the reference label with a dash and a second label that distinguishes between the similar components. If only the first reference label is used in the specification, the description applies to any of the similar components having the same first reference label regardless of the second reference label.

[0100] As used herein, "or" used in a list of items (e.g., a list of items beginning with a phrase such as "at least one of" or "one or more of"), including in the claims, indicates an inclusive list, so that (for example) a list of at least one of A, B, or C means A or B or C or AB or AC or BC or ABC (i.e., A and B and C). In addition, as used herein, the phrase "based on" should not be interpreted as a reference to a closed set of conditions. For example, an exemplary step described as "based on condition A" can be based on both condition A and condition B without departing from the scope of the present disclosure. In other words, as used herein, the phrase "based on" should be interpreted similarly to the phrase "based at least in part on".

[0101] The description herein is provided to enable those skilled in the art to make or use the present disclosure. Various modifications to the present disclosure will be apparent to those skilled in the art, and the general principles defined herein may be applied to other variations without departing from the scope of the present disclosure. Therefore, the present disclosure is not limited to the examples and designs described herein, but is given the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A device comprising: a first current generator configured to output a first current based at least in part on a first voltage; a second current generator configured to output a second current based at least in part on the first voltage; a feedback component coupled to the first current generator and operable to couple to the second current generator via a switch, the feedback component configured to generate a second voltage based at least in part on a temperature of the device, based at least in part on the first current, and based at least in part on the second current when the switch is closed, wherein the first voltage is based at least in part on the second voltage; as well as A third current generator is configured to output a third current proportional to the temperature of the device based at least in part on the first voltage.

2. The apparatus according to claim 1, further comprising: An amplifier is configured to generate the first voltage based at least in part on a difference between an input voltage and the second voltage.

3. The apparatus according to claim 1, wherein: The first current generator includes a first transistor having a first gate configured to receive the first voltage, a first drain configured to receive a third voltage, and a first source coupled to an input of the feedback component; as well as The second current generator includes a second transistor having a second gate configured to receive the first voltage, a second drain configured to receive the third voltage, and a second source operably coupled to the input of the feedback component via the switch.

4. The apparatus according to claim 1, wherein the feedback component comprises: a resistive component coupled to the first current generator and the switch, the resistive component configured to sink a first portion of the first current or sink both the first current and the second current based at least in part on whether the first switch is activated; as well as A tracking component is operably coupled to the first current generator and the switch via a second switch, the tracking component being configured to draw a second portion of the first current or both the first current and the second current based at least in part on whether the second switch is activated.

5. The device according to claim 4, wherein the tracking component comprises: a first pair of transistors coupled to each other in a diode configuration and configured to receive the second portion of the first current or both the first current and the second current; as well as A second pair of transistors are coupled to each other in a diode configuration and are configured to receive the second portion of the first current, the second current, or both based at least in part on whether the third switch is activated and at least in part on whether the fourth switch is activated.

6. The apparatus according to claim 5, wherein: coupling a first transistor of the second pair of transistors with the first pair of transistors based at least in part on the third switch being deactivated; and A second transistor of the second pair of transistors is coupled with the first pair of transistors based at least in part on the fourth switch being deactivated.

7. The apparatus of claim 5, wherein the first switch, the second switch, the third switch, the fourth switch, or any combination thereof is activated based at least in part on one or more fuses associated with one or more corresponding switches.

8. The apparatus of claim 1, wherein: The third current generator is configured to have a higher gain than the first current generator and the second current generator.

9. A device comprising: a first transistor having a first gate configured to receive a first voltage, a first drain configured to receive a second voltage, and a first source coupled to an input of the feedback component; a second transistor having a second gate configured to receive the first voltage, a second drain configured to receive the second voltage, and a second source; a switch operable to couple the second source to the input of a feedback component; The feedback component comprises: a resistive component having an input coupled to the input of the feedback component and having an output coupled to a third voltage, the resistive component configured to generate a fourth voltage based at least in part on a first current through the resistive component, the first voltage being based at least in part on the fourth voltage; and a tracking component having an input operable to couple to the input of the feedback component via a second switch and having an output coupled to the third voltage, the tracking component comprising a pair of transistors coupled in a diode configuration; and A third transistor has a third gate configured to receive the first voltage, a second drain configured to receive the second voltage, and a third source configured to output a second current based at least in part on the first voltage.

10. The apparatus of claim 9, further comprising: An amplifier is configured to output the first voltage based at least in part on a difference between an input voltage and the fourth voltage.

11. The apparatus of claim 9, wherein the tracking component comprises: a fourth transistor having a fourth gate coupled to the node of the tracking component, a fourth source coupled to the input of the tracking component, and a fourth drain; a fifth transistor having a fifth gate coupled to the node of the tracking component, a fifth source coupled to the fourth drain, and a fifth drain; a sixth transistor having a sixth gate coupled to the node of the tracking component, a sixth drain coupled to the fifth drain, and a sixth source; as well as A seventh transistor has a seventh gate coupled to the node of the tracking component, a seventh drain coupled to the sixth source, and a seventh source coupled to the third voltage.

12. The apparatus of claim 11, wherein: The fourth transistor and the fifth transistor are p-channel transistors; and The sixth transistor and the seventh transistor are n-channel transistors.

13. The apparatus of claim 11, further comprising: a third switch operable to couple the fifth source with the fifth drain; as well as A fourth switch is operable to couple the sixth source with the sixth drain.

14. The apparatus of claim 9, wherein the third transistor is configured to output the second current proportional to the temperature of the apparatus based at least in part on the first current through the resistive component proportional to the temperature of the apparatus.

15. The apparatus of claim 9, wherein: The first transistor is configured to have a first gain; The second transistor is configured to have a second gain; and The third transistor is configured to have a third gain higher than the first gain and the second gain. The apparatus of claim 9 , wherein the third voltage is a ground voltage.

17. A method comprising: receiving an input voltage at a first current generator and at a second current generator; outputting a first current from the first current generator to a feedback component based at least in part on the first current generator receiving the input voltage, the first current being proportional to an operating temperature; outputting a second current from the second current generator to the feedback component based at least in part on the second current generator receiving the input voltage and closing a switch between the second current generator and the feedback component, the second current being proportional to the operating temperature; as well as A third current is output from a third current generator based at least in part on outputting the first current to the feedback component and outputting the second current to the feedback component, the third current being proportional to the operating temperature.

18. The method according to claim 17, further comprising: The input voltage is generated based at least in part on the first current and the second current.

19. The method according to claim 18, further comprising: extracting a first portion of the first current and the second current through a resistive component of the feedback component; as well as The second portion of the first current and the second current are drawn by a tracking component of the feedback component, Wherein the input voltage is generated based at least in part on the resistive component drawing the first portion of the first current and the second current.

20. The method of claim 17, wherein the input voltage is maintained within a threshold range based at least in part on closing the switch.

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