Digital end driving system and method for micro-led display wafer panel

Abstract

A digital end driving system and method for a micro-LED display wafer panel, the digital end driving system comprising an external chip, a register array and a display area, the external chip being configured to provide configuration information and frame pixel data, the register array comprising a plurality of register modules, the configuration information comprising a plurality of module configuration information, the module configuration information being stored in the corresponding register modules, the display control register being a subset of the register array and being configured to store all the module configuration information, and the display area being configured to receive the total module configuration information and the frame pixel data to generate PWM modulation signals and control display brightness and grayscale according to the PWM modulation signals; thus, the system of the present application adopts a separate storage configuration mode and performs configuration at the beginning of each frame scan, thereby ensuring complete display of the picture of each frame.

Description

TECHNICAL FIELD

[0001] The present application relates to a digital end driving system and method, in particular, a digital end driving system and method for a micro light-emitting diode display wafer panel. BACKGROUND

[0002] Micro light-emitting diode (micro LED) display technology refers to a display technology in which micro-scale light-emitting diodes (LEDs) that self-emit light are used as light-emitting pixel units, and the micro-scale LEDs are assembled on a driving panel to form a high-density LED array. Due to the small size, high degree, and self-emission of micro LED chips, the micro LED display technology has greater advantages in brightness, resolution, contrast, energy consumption, service life, response speed, and thermal stability compared with liquid crystal displays (LCDs) and organic light-emitting diodes (OLEDs).

[0003] In the prior art, there are two main types of technical principles and circuit structures for digital end driving of displays. The first type is the digital driving circuit in the field of LCD and OLED displays. Since the display principles of the displays are different, the technical contents of the driving principles are not analyzed in detail here. The second type is the digital driving principle of micro LED display technology. Please refer to Figure 1 , Figure 1 is a block diagram of a digital end driving system P1 according to the prior art. As shown in Figure 1 , the digital end driving system P1 according to the prior art includes three parts: an external chip P11, a register array P12, and a display area P13. As can be seen from Figure 1 , the existing micro LED driving method adopts a real-time configuration and data loading method, that is, the display area P13 directly receives real-time configuration information from the register array P12. Please refer to Figure 2 , Figure 2 is a subframe timing cycle diagram according to the prior art. As shown in Figure 2 , the digital end driving system is driven according to a Sync signal (referred to as S signal) and a Configuration signal (referred to as C signal) in a subframe timing cycle. In the process of frame scanning by the digital end driving system according to the subframe timing cycle, the S signal is located at the middle position of the subframe timing cycle, and the specific position is determined by the external chip P11 (i.e., the upper computer) and is changed in real time.

[0004] The driving mode of the above prior art causes unstable phenomena in the display driving control process and a tearing feeling of the image, which affects the viewing experience, due to the need for real-time configuration information and loading of data. Therefore, solving the technical problems of instability and tearing feeling of the image caused by the digital end driving mode of the micro-LED display wafer panel is an important research topic and direction. SUMMARY

[0005] Therefore, the purpose of the present application is to provide a digital end driving system and method for a micro-LED display wafer panel, which can solve the problems of the prior art, solve the technical problem of instability caused by real-time modification of the configuration by the host computer, and ensure stable image display, effectively solving the technical problems of instability and tearing feeling of the image of the display.

[0006] To achieve the above-mentioned purpose, the present application discloses a digital end driving system for a micro-LED display wafer panel, characterized in that it comprises:

[0007] an external chip for providing a configuration message and a frame pixel data;

[0008] a register array coupled to the external chip, the register array comprising a plurality of register modules, the configuration message comprising a plurality of module configuration messages, each register module being used to store a corresponding module configuration message; and

[0009] a display control register electrically connected to the register array, which is a subset of the register array, used to store a total module configuration message comprising the module configuration messages; and

[0010] a display area coupled to the external chip and the display control register, used to receive the total module configuration message and the frame pixel data to generate a PWM modulation signal, and control the display brightness and grayscale according to the PWM modulation signal;

[0011] wherein the digital end driving system for the micro-LED display wafer panel displays brightness and grayscale according to a sub-frame timing period, the sub-frame timing period comprising at least one C signal and at least one S signal, under the C signal, the display control register stores the total module configuration message in the register array, and places the C signal in the sub-frame timing period at the initial position in the sub-frame timing period, and connects the S signal after the C signal; under the S signal, the display area receives the total module configuration message and the frame pixel data to generate the PWM modulation signal, and controls the display brightness and grayscale according to the PWM modulation signal.

[0012] The display region receives the total module configuration information to generate an SFx signal, combines the frame pixel data and the SFx signal to generate an SFMX signal, and superimposes the SFMX signal to generate the PWM modulation signal.

[0013] The display region further comprises:

[0014] A scan driving circuit coupled to the display control register, receives the total module configuration information stored in the display control register to generate the SFx signal;

[0015] A column data transmission control circuit coupled to the external chip and the display control register, receives the frame pixel data; and

[0016] A pixel array comprising a plurality of pixels, each of the pixels comprising:

[0017] A pixel driving circuit comprising a storage, a modulator, and a control circuit, the storage coupled to the column data transmission control circuit, receives and stores the frame pixel data; the modulator coupled to the storage and the scan driving circuit, receives the SFx signal and the frame pixel data, combines the SFx signal and the frame pixel data to generate the SFMX signal, and superimposes the SFMX signal to generate the PWM modulation signal; the control circuit coupled to the modulator; and

[0018] A light-emitting diode disposed in the control circuit, electrically connected to the control circuit, and having a light-emitting function.

[0019] The control circuit receives the PWM modulation signal and controls the brightness and grayscale of the light-emitting diode according to the PWM modulation signal.

[0020] The modulator places the S signal at the initial position in the sub-frame timing period and at the continuous position after the C signal.

[0021] The column data transmission control circuit further comprises:

[0022] A frame buffer coupled to the external chip, receives and stores the frame pixel data; and

[0023] A column data transmission control circuit body coupled to the frame buffer and electrically connected to the display control register, receives and transmits the frame pixel data.

[0024] A digital end driving method of a micro light-emitting diode display wafer panel is also disclosed, comprising the following steps:

[0025] An external chip provides a configuration information and a frame pixel data;

[0026] a register array including a plurality of register modules, the configuration information including a plurality of module configuration information, each of the register modules storing a corresponding one of the module configuration information;

[0027] under a C signal in a sub-frame timing period, the display control register storing a total module configuration information including the module configuration information in the register array;

[0028] under the C signal in the sub-frame timing period, placing the C signal in the sub-frame timing period at an initial position in the sub-frame timing period and successively placing the S signal after the C signal;

[0029] under a S signal in a sub-frame timing period, a display area receiving the total module configuration information and the frame pixel data to generate the PWM modulation signal; and

[0030] the display area controlling display brightness and grayscale of the display area according to the PWM modulation signal.

[0031] wherein, under the S signal in the sub-frame timing period, the display area receiving the total module configuration information and the frame pixel data to generate the PWM modulation signal further includes the following sub-steps:

[0032] a scan driving circuit in the display area receiving the total module configuration information to generate a SFx signal;

[0033] a frame buffer in the display area transmitting the frame pixel data;

[0034] a column data transmission control circuit body in the display area transmitting the frame pixel data from the frame buffer;

[0035] a memory in the display area transmitting and storing the frame pixel data from the column data transmission control circuit body; and

[0036] a modulator in the display area receiving the SFx signal, the frame pixel data from the memory to generate the PWM modulation signal.

[0037] wherein, the modulator in the display area receiving the SFx signal and the frame pixel data to generate the PWM modulation signal further includes the following sub-steps:

[0038] the modulator receiving and combining the SFx signal and the frame pixel data to generate a SFMX signal;

[0039] the modulator superimposing the SFMX signal to generate the PWM modulation signal; and

[0040] The modulator places the S signal at the initial position in the sub-frame timing period under the S signal.

[0041] The step of placing the C signal at the initial position in the sub-frame timing period and the S signal after the C signal under the C signal in the sub-frame timing period further comprises the following sub-steps:

[0042] The display control register places the C signal at the initial position in the sub-frame timing period; and

[0043] A modulator in the display area places the S signal at the initial position in the sub-frame timing period and a consecutive position after the C signal.

[0044] The step of controlling the display brightness and grayscale of the display area according to the PWM modulation signal further comprises the following sub-steps:

[0045] A control circuit in the display area receives the PWM modulation signal; and

[0046] The control circuit controls the brightness and grayscale of a light-emitting diode in the display area according to the PWM modulation signal.

[0047] Therefore, compared with the digital-end driving system mentioned in the prior art, the register array in the digital-end driving system of the present application further comprises a display control register as a subset. The display control register places the C signal at the initial position in the sub-frame period and the S signal after the C signal. Because the display control register stores the total module configuration information for the display area, the display control register automatically adjusts the order of the sub-frame period to C, S, SFX, and the like, and the configuration information can be directly read from the display control register, so that the display area can operate stably. In contrast, because the prior art does not have a display control register, the prior art does not have the function of automatically adjusting the sub-frame period. Instead, the prior art reads the configuration information from an external chip when the C signal appears and reads the frame pixel data from the external chip when the S signal appears, which causes the display area to operate unsmoothly and causes the problem of image tearing. BRIEF DESCRIPTION OF DRAWINGS

[0048] Figure 1 A block diagram of a digital-end driving system according to the prior art.

[0049] Figure 2 A schematic diagram of a sub-frame timing period according to the prior art.

[0050] Figure 3 A block diagram of a digital-end driving system of a micro light-emitting diode display wafer panel according to an embodiment of the present application.

[0051] Figure 4 is a block diagram of a digital end driving system for a micro light emitting diode display wafer panel according to Figure 3

[0052] Figure 5 is a block diagram of a digital end driving system for a micro light emitting diode display wafer panel according to Figure 4

[0053] Figure 6 is a pixel driving circuit diagram according to Figure 4

[0054] Figure 7 is a flow chart of a digital end driving method for a micro light emitting diode display wafer panel according to an embodiment of the present invention.

[0055] Figure 8 is a further flow chart of a digital end driving method for a micro light emitting diode display wafer panel according to Figure 7

[0056] Figure 9 is a flow chart of a digital end driving method for a micro light emitting diode display wafer panel according to Figure 8

[0057] Figure 10 is a further flow chart of a digital end driving method for a micro light emitting diode display wafer panel according to Figure 7

[0058] Figure 11 is a further flow chart of a digital end driving method for a micro light emitting diode display wafer panel according to Figure 7

[0059] Figure 12 is a sub-frame timing cycle diagram of a digital end driving method for a micro light emitting diode display wafer panel according to an embodiment of the present invention.

[0060] Figure 13 is a SFx signal diagram of a digital end driving method for a micro light emitting diode display wafer panel according to an embodiment of the present invention when Gray Value = 0xC5.

[0061] Figure 14 is a PWM iteration diagram according to Figure 13 DETAILED DESCRIPTION

[0062] ​​​​​​​​In order that the advantages of the application will be readily understood, a few representative embodiments will now be described in detail with reference to the accompanying drawings. It should be noted that these embodiments are intended only to contribute to an understanding of the application. However, the application can be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete. It will be apparent that those skilled in the art, upon attending to the disclosure, will appreciate still other aspects, embodiments and advantages of the present application.

[0063] The terminology used in the description of the various embodiments of the application herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the various embodiments of the application. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the various embodiments of the application belong. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0064] Reference will now be made to the drawings wherein Figure 3 , Figure 3 is a block diagram of a digital end driving system 1 for a micro-LED display wafer panel according to an embodiment of the present application. As shown in Figure 3As shown, the digital end driving system 1 of the micro-LED display wafer panel of the present application comprises an external chip 11, a register array 12 and a display area 13. The external chip 11 is used to provide configuration information and frame pixel data. The frame pixel data is the source data of an image. The configuration information refers to some control parameters for arranging the image source data to form a series of videos, such as frame data, brightness / gray data, etc. The register array 12 is coupled to the external chip 11. The register array 12 comprises a plurality of register modules 121. The register array 12 is in the form of a register array 12 composed of a plurality of register modules 121 storing different module configuration information. The main function of the register array 12 is to store all the configuration information in the display device, including the configuration information of the display area 13. The configuration information comprises a plurality of module configuration information, and each register module 121 is used to store the corresponding module configuration information. A display control register 122 is electrically connected to the register array 12, which is a subset of the register array 12, used to store the total module configuration information comprising all the module configuration information. In other words, the display control register 122 is a register in the register array 12 specially used to store the configuration information of the display area 13. The configuration information for the display area 13 stored in the display control register 122 includes row and column display control configuration information, i.e. all the configuration information for controlling the display state of the image. The configuration information includes but is not limited to the scanning time t and the data format, etc. The display area 13 is coupled to the external chip 11 and the display control register 122 to receive the total module configuration information and the frame pixel data to generate PWM modulation signals, and to control the display brightness and gray level according to the PWM modulation signals. The digital end driving system 1 of the micro-LED display wafer panel displays brightness and gray level according to a sub-frame timing period. The sub-frame timing period comprises at least one C signal and at least one S signal. In the C signal, the display control register 122 stores the total module configuration information in the register array 12, and places the C signal in the initial position in the sub-frame timing period, and then connects the S signal after the C signal. In the S signal, the display area 13 receives the total module configuration information and the frame pixel data to generate PWM modulation signals, and controls the display brightness and gray level according to the PWM modulation signals.

[0065] It should be noted that the display control register 122 is a subset of the register array 12. The configuration information stored in the plurality of register modules 121 in the register array 12 is different, and of course each register module 121 can also have its own subset. The function of each subset corresponds to the module position displayed by the display area where it is located. The number of display control registers 122 can correspond to the number of register modules 121, or one display control register 122 can correspond to a plurality of register modules 121, and is not limited thereto.

[0066] Please refer toFigure 4 , Figure 5 and Figure 6 . Figure 4 is a block diagram of a digital end driving system 1 of a micro light emitting diode display wafer panel according to Figure 3 . Figure 5 is a structural schematic diagram of a digital end driving system 1 of a micro light emitting diode display wafer panel according to Figure 4 . Figure 6 is a pixel driving circuit diagram according to Figure 4 . As shown in Figure 4 , Figure 5 and Figure 6 , the column data transmission control circuit 132 further comprises a frame buffer 1321 and a column data transmission control circuit body 1322. The frame buffer 1321 is coupled to the external chip 11 to receive and store frame pixel data. The column data transmission control circuit body 1322 is coupled to the frame buffer 1321 and electrically connected with the display control register 122 to receive and transmit frame pixel data. The display area 13 further comprises a scan driving circuit 131, the column data transmission control circuit 132 and a pixel array 133. The scan driving circuit 131 is coupled to the display control register 122 to receive the total module configuration information stored in the display control register 122 to generate an SFx signal (or SFX signal). The column data transmission control circuit 132 is coupled to the external chip 11 and the display control register 122 to receive frame pixel data. The pixel array 133 is composed of a plurality of single pixels 1331. The pixel 1331 comprises a pixel driving circuit 1332 and a light emitting diode 1336. The pixel driving circuit 1332 comprises a storage 1333, a modulator 1334 and a control circuit 1335. The storage 1333 is coupled to the column data transmission control circuit 132 to receive and store frame pixel data. The modulator 1334 is coupled to the storage 1333 and the scan driving circuit 131 to receive the SFx signal and the frame pixel data, combine the SFx signal and the frame pixel data to generate an SFMX signal, and superimpose the SFMX signal to generate a PWM modulation signal. The control circuit 1335 is coupled to the modulator 1334. The light emitting diode 1336 is disposed in the control circuit 1335 and electrically connected with the control circuit 1335, and has a light emitting function. The control circuit 1335 receives the PWM modulation signal and controls the brightness and the grayscale of the light emitting diode 1336 according to the PWM modulation signal to realize the control of the PMOS gate in the control circuit 1335. The modulator 1334 is used to place the S signal at the initial position in the subframe timing period and at the continuous position after the C signal.

[0067] Specifically, the scan driver circuit 131 is the row control element. Therefore, the configuration information in the display control register 3 represents the row and column control elements, and is represented to the scan driver circuit 131 and the column data transfer control circuit body 1322. Since the column data transfer control circuit body 1322 assumes the function of inputting source data, it is therefore named column data transfer control circuit body 1322.

[0068] See also Figure 7 , Figure 7 FIG. 1 is a flow chart of a digital end driving method of a micro-LED display chip panel according to a specific embodiment of the present invention. Figure 7 As shown, the digital end driving method of the light-emitting diode display chip panel of the present invention includes the following steps: step S1: an external chip provides configuration information and frame pixel data; step S2: a register array includes multiple register modules, the configuration information includes multiple module configuration information, and each register module stores corresponding module configuration information; step S3: under the C signal in the sub-frame timing period, the display control register stores the total module configuration information including these module configuration information in the register array; step S4: under the C signal in the sub-frame timing period, the C signal in the sub-frame timing period is placed at the initial position in the sub-frame timing period, and the S signal is connected after the C signal; step S5: under the S signal in the sub-frame timing period, the display area receives the total module configuration information and frame pixel data to generate a PWM modulation signal; and step S6: the display area controls the display brightness and grayscale of the display area according to the PWM modulation signal.

[0069] See also Figure 8 , Figure 8 Based on Figure 7 A further flow chart of the digital end driving method of the micro-LED display chip panel. Figure 8 As shown, step S5 (under the S signal) further includes the following sub-steps: sub-step S51: the scan driving circuit receives the overall module configuration information to generate the SFx signal; sub-step S52: the frame buffer transmits the frame pixel data; sub-step S53: the column data transmission control circuit body transmits the frame pixel data from the frame buffer; sub-step S54: the memory transmits and stores the frame pixel data from the column data transmission control circuit body; and sub-step S55: the modulator receives the SFx signal and the frame pixel data from the memory to generate a PWM modulation signal.

[0070] See also Figure 9 , Figure 9 Based on Figure 8 The flowchart of the digital end driving method of the micro-LED display chip panel under the S signal. Figure 9As shown, the sub-step S55 further comprises the following sub-steps: sub-step S551: the modulator receives and combines the SFx signal ("X" from 0 to "x", "x" determines the number of bits according to the gray value of the image element, such as 8 bits, x = 7) and the frame pixel data to generate the SFMX signal; sub-step S552: the modulator superimposes the SFMX signal to generate the PWM modulation signal; and sub-step S553: under the S signal, the modulator places the S signal at the initial position in the sub-frame timing period.

[0071] Referring to Figure 10 , Figure 10 is a further flowchart of the digital end driving method of the micro light emitting diode display wafer panel according to Figure 7 . As shown in Figure 10 , the step S4 further comprises the following sub-steps: sub-step S41: the display control register places the C signal at the initial position in the sub-frame timing period; and sub-step S42: the modulator in the display area places the S signal at the initial position in the sub-frame timing period and at the continuous position after the C signal.

[0072] Referring to Figure 11 , Figure 11 is a further flowchart of the digital end driving method of the micro light emitting diode display wafer panel according to Figure 7 . As shown in Figure 11 , the step S6 further comprises the following sub-steps: sub-step S61: the control circuit in the display area receives the PWM modulation signal; and sub-step S62: the control circuit controls the brightness and the gray scale of the light emitting diode in the display area according to the PWM modulation signal.

[0073] Referring to Figure 12 , Figure 12 is a sub-frame timing period schematic diagram of the digital end driving method of the micro light emitting diode display wafer panel according to an embodiment of the present application. Referring to Figure 12 , the S signal is a sync signal, which controls the transmission of frame source data. The C signal is a configuration signal, which controls the transmission of configuration information. In the sub-frame timing period, S and C respectively represent the instructions for controlling the data transmission, and the other positions are the time occupied by the image display process (i.e. the display process of the frame pixel data). Figure 12 The sub-frame timing period of the present application is the panel end driving timing. First, "C" is configuration, which reads the relevant driving configuration from the register array. This configuration can control the time of scanning, the format of data, etc. Then the frame pixel data in the frame buffer is loaded into the storage in the pixel. The PWM output is generated in combination with the scanning signal (SFx) to control the on-off time of the micro-led. In this way, the micro-led is driven to achieve the set gray scale and brightness.

[0074] Referring to Figure 13 and Figure 14 , Figure 13 Fig. 6 is a schematic diagram of SFx signals at Gray Value = 0xC5 for a digital end driving method of a micro-LED display wafer panel according to an embodiment of the present application. Figure 14 Fig. 7 is a PWM iteration diagram according to Figure 13 . The SFx related signal timing is as follows, taking 8-bit grayscale driving as an example, as shown in Figure 13 . The driving method of the present application can guarantee the integrity of the frame, and full-screen driving makes the display consistency better and the driving efficiency higher. As shown in Figure 14 , for example, GrayValue = 0xC5, only bit7 bit6 bit2 bit0 are high, which represents SF7 SF6 SF2 SF0 appearing in PWM, and others do not appear. In addition, because PMOS is controlled, the signal needs to be inverted. The PWM waveform is as shown in Figure 14 , in the figure, SFMx signal is the internal signal in the modulator, with the grayscale information in the register, and the signal inversion operation is performed. PWM is the output signal of the modulator, directly controlling the PMOS transistor to achieve the purpose of controlling the micro-led on-off.

[0075] Compared with the prior art, the driving system of the present application includes a display control register which places the C signal at the initial position of the sub-frame period, and the S signal is connected after the C signal, and because the display control register stores the configuration information of the display area, the sub-frame period is automatically adjusted to C→S→SFX…, so that the driving system of the present application can directly read the configuration information from the display control register, so that the display area 4 can operate stably. In contrast, because the prior art does not have a display control register, it does not have the function of automatically adjusting the sub-frame period, and it still needs to read the configuration information from the external chip when the C signal appears, and read the frame pixel data from the external chip when the S signal appears, thereby causing the display area to operate not smoothly, resulting in the problem of tearing of the picture image.

[0076] In summary, the micro-LED display wafer panel digital end driving system and method of the present application separates the configuration information transmitted by the main computer (external chip and register array) and the actual configuration information (display control register and storage) used, and only loads the main computer configuration information into the actual configuration at the frame scanning start position (C and S), thereby solving the technical problem of unstable driving caused by real-time modification of the main computer configuration. In other words, the driving method of the present application uses a separate storage configuration, and performs configuration at the start of each frame scan. The pre-loaded data and pre-configuration are performed at the initial position of each frame display, and there is no need to load data and configuration information in real time during the frame display process, so that the image display is more stable. Not only is it convenient for the main computer to configure the register, but it also does not affect the display of the panel, so the overall driving system can be efficiently adjusted and displayed, and the complete picture display of each frame is ensured. The technical problems of instability and tearing of the picture image of the display are effectively solved.

[0077] From the detailed description of the above specific embodiments, the features and spirits of the present application can be more clearly described, and the scope of the present application is not limited by the above disclosed specific embodiments. On the contrary, the purpose is to cover various changes and equivalent arrangements within the scope of the patent application of the present application.

Claims

1. A digital end driving system for a micro-LED display wafer panel, characterized in that The display control register is electrically connected to the register array and is a subset of the register array, used to store a total module configuration information including the module configuration information. The display area is coupled to the external chip and the display control register, used to receive the total module configuration information and the frame pixel data to generate a PWM modulation signal, and control display brightness and grayscale according to the PWM modulation signal. The display area is used to receive the total module configuration information to generate an SFx signal, combine the frame pixel data and the SFx signal to generate an SFMX signal, and superimpose the SFMX signal to generate the PWM modulation signal. The display area further includes: A scan driving circuit coupled to the display control register, used to receive the total module configuration information stored in the display control register to generate the SFx signal; A column data transmission control circuit coupled to the external chip and the display control register, used to receive the frame pixel data; and A pixel array including a plurality of pixels, each pixel including:

2. The digital end driving system of the micro-LED display wafer panel of claim 1, wherein, A pixel driving circuit including a storage, a modulator, and a control circuit, the storage being coupled to the column data transmission control circuit and used to receive and store the frame pixel data; 3. The digital end driving system of the micro-LED display wafer panel of claim 2, wherein, The modulator is coupled to the storage and the scan driving circuit, used to receive the SFx signal and the frame pixel data, combine the SFx signal and the frame pixel data to generate the SFMX signal, and superimpose the SFMX signal to generate the PWM modulation signal; The control circuit is coupled to the modulator; and A light-emitting diode disposed in the control circuit and electrically connected to the control circuit, having a light-emitting function; The control circuit receives the PWM modulation signal and controls the brightness and grayscale of the light-emitting diode according to the PWM modulation signal. The modulator is used to place the S signal at the initial position in the subframe timing period and at the continuous position after the C signal. The column data transmission control circuit further includes: A frame buffer coupled to the external chip, used to receive and store the frame pixel data; and ​ ​ ​ 4. The digital end driving system of the micro-LED display wafer panel of claim 3, wherein, ​ 5. The digital end driving system of the micro-LED display wafer panel of claim 3, wherein, ​ ​ A column data transmission control circuit body coupled to the frame buffer and electrically connected to the display control register, for receiving and transmitting the frame pixel data.

6. A digital end driving method for a micro-LED display chip panel, characterized in that The method comprises the following steps: An external chip providing a configuration message and a frame pixel data; A register array comprising a plurality of register modules, the configuration message comprising a plurality of module configuration messages, each of the register modules storing a corresponding one of the module configuration messages; In a C signal in a sub-frame timing period, the display control register stores a total module configuration message comprising the module configuration messages in the register array; In the C signal in the sub-frame timing period, the C signal in the sub-frame timing period is placed at a beginning position in the sub-frame timing period, and the S signal is placed after the C signal; In an S signal in a sub-frame timing period, a display area receives the total module configuration message and the frame pixel data to generate a PWM modulation signal; And The display area controls display brightness and grayscale of the display area according to the PWM modulation signal.

7. The digital end driving method of the micro-LED display chip panel according to claim 6, wherein: In the step of receiving the total module configuration message and the frame pixel data to generate the PWM modulation signal in the S signal in the sub-frame timing period, the display area further comprises the following sub-steps: A scan driving circuit in the display area receives the total module configuration message to generate an SFx signal; A frame buffer in the display area transmits the frame pixel data; A column data transmission control circuit body in the display area transmits the frame pixel data from the frame buffer; A memory in the display area transmits and stores the frame pixel data from the column data transmission control circuit body; and A modulator in the display area receives the SFx signal and the frame pixel data from the memory to generate the PWM modulation signal. In the step of receiving the SFx signal and the frame pixel data to generate the PWM modulation signal in the modulator in the display area, the modulator further comprises the following sub-steps:

8. The digital end driving method of the micro-LED display chip panel according to claim 7, wherein: The modulator receives and combines the SFx signal and the frame pixel data to generate an SFMX signal; The modulator superimposes the SFMX signal to generate the PWM modulation signal; and In the S signal, the modulator places the S signal at a beginning position in the sub-frame timing period. In the step of placing the C signal in the sub-frame timing period at a beginning position in the sub-frame timing period and placing the S signal after the C signal, the display control register further comprises the following sub-steps: The display control register places the C signal at a beginning position in the sub-frame timing period; and 9. The digital end driving method of a micro-LED display chip panel according to claim 6, wherein: A modulator in the display area places the S signal at a beginning position in the sub-frame timing period and a continuous position after the C signal. In the step of controlling display brightness and grayscale of the display area according to the PWM modulation signal, the display area further comprises the following sub-steps: A control circuit in the display area receives the PWM modulation signal; and 10. The digital end driving method of a micro-LED display chip panel according to claim 6, wherein: The control circuit controls brightness and grayscale of a light emitting diode in the display area according to the PWM modulation signal. ​ ​

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