Optical receiver, master station device, and optical communication system
By using photoelectric conversion elements, preamplifiers and automatic control circuits in the optical receiver, combined with pre-registered adjustment values and identification information, the conversion gain and threshold are quickly adjusted, which solves the problem of long convergence time of the optical signal receiver and improves the Response speed and signal quality.
Patent Information
- Application Number
- CN202280095729.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2022-05-13
- Publication Date
- 2024-12-13
AI Technical Summary
When existing optical receivers receive optical signals, the convergence time required for conversion gain and threshold adjustment is long, which affects the system's response speed.
An optical receiver is designed, including photoelectric conversion elements, preamplifiers, limiting amplifiers, automatic gain control circuits and automatic threshold control circuits. Through pre-registered adjustment values and identification information, the conversion gain and thresholds can be quickly adjusted to ensure the signal. Correct amplification and recovery.
The time from the start of optical signal reception to the completion of conversion gain and threshold adjustment is significantly shortened, and the system's response speed and signal quality are improved.
Smart Images
Figure CN119137884A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to an optical receiver, a master station device, and an optical communication system used in an optical communication system. Background Art
[0002] In recent years, access optical communication systems called PON (Passive Optical Network) systems, which can share one optical fiber among multiple users, have become widely popular. The PON system consists of one OLT (Optical Line Terminal) as a master station device and ONU (Optical Network Unit) as a terminal device on the multiple subscriber side and called a slave station device. The OLT and the ONU are connected by an optical star coupler, which is a passive element that does not require a power supply and is an optical splitter that branches the optical signal.
[0003] In the PON system, in upstream communication from the ONU to the OLT, a time division multiplexing method is used in which the OLT grants permission to the ONU regarding the transmission time and transmission data amount. The ONU performs upstream communication at the timing permitted by the OLT and with the permitted transmission data amount.
[0004] The distance between the OLT and the ONU varies depending on the location of the ONU, so the intensity of the upstream optical signal received by the OLT is not fixed. Therefore, upstream signals of various intensities intermittently arrive at the OLT from multiple ONUs. The range of the intensity of the optical signal received by the OLT is determined by standard specifications, etc., and is therefore limited to a certain extent, for example, from a weak signal of about -30dBm to a strong signal of about -10dBm. In this way, the OLT must receive optical signals with intensities that differ by more than 100 times.
[0005] When the intensity of the received optical signal of the OLT is weak, in order to perform clock data recovery and other processing, it is necessary to amplify the signal with a higher conversion gain. Therefore, a preamplifier with a higher conversion gain and capable of converting the current signal from the light receiving element into a voltage signal is widely used. However, when a light signal with a stronger intensity is received with the same conversion gain as a light signal with a weaker intensity, waveform distortion occurs in the amplifier. Therefore, a method of adjusting the conversion gain of the amplifier after receiving the optical signal is widely used. In addition, the preamplifier is equipped with a single-phase differential conversion circuit to set the input to the amplifier of the subsequent stage as a differential signal. When the conversion gain is adjusted, the threshold of the single-phase differential conversion circuit needs to be adjusted. In the method of adjusting the conversion gain and the threshold after receiving the optical signal, the preamplifier cannot output a normal waveform during the convergence time from the start of receiving the optical signal to the completion of the adjustment. Therefore, it is preferred that the convergence time is shorter.
[0006] In order to shorten the convergence time, the following method is proposed in Patent Document 1: according to the signal detection result, the time constants of the automatic gain adjustment circuit for adjusting the conversion gain and the automatic threshold control circuit for adjusting the threshold are switched. Hereinafter, the automatic gain adjustment circuit is referred to as AGC (Automatic Gain Control), and the automatic threshold control circuit is referred to as ATC (Automatic Threshold Control). In this method, the time constants of AGC and ATC are reduced during the adjustment period, and the time constants of AGC and ATC are increased after the adjustment is completed. In this way, the convergence time can be shortened.
[0007] Prior art literature
[0008] Patent Literature
[0009] Patent Document 1: Japanese Patent No. 5811955 Summary of the invention
[0010] Problem that the invention aims to solve
[0011] However, according to the above-mentioned conventional technology, although the convergence time can be shortened, some convergence time still remains, and further shortening of the convergence time is desired.
[0012] The present disclosure has been made in view of the above circumstances, and an object of the present disclosure is to obtain an optical receiver capable of further shortening the convergence time, which is the time taken from the start of reception of an optical signal to the completion of adjustment of a conversion gain and a threshold.
[0013] Means used to solve problems
[0014] In order to solve the above problems and achieve the purpose, the optical receiver of the present invention is installed in a main station device, and the main station device receives optical signals from multiple substation devices connected to the main station device via an optical transmission path by time division multiplexing. The optical receiver is characterized in that it has: a photoelectric conversion element, which converts the optical signal into a current signal; a preamplifier, which amplifies the current signal from the photoelectric conversion element and converts it into a voltage signal; a limiting amplifier, which further amplifies the voltage signal from the preamplifier and limits the amplitude of the voltage signal to a predetermined range; and an upper system, which outputs a reset signal to the preamplifier in matching with the timing of the received optical signal. The amplifier comprises: a core amplifier circuit that amplifies a current signal; an automatic gain control circuit that changes the conversion gain of the core amplifier circuit by adjusting a first adjustment value; a single-phase differential conversion circuit that converts a single-phase signal output by the core amplifier circuit into a differential signal; an automatic threshold control circuit that changes the threshold of the single-phase differential conversion circuit by adjusting a second adjustment value; and a processing device that stores the first adjustment value adjusted by the automatic gain control circuit based on the output of the core amplifier circuit and the second adjustment value adjusted by the automatic threshold control circuit based on the output of the core amplifier circuit in correspondence with identification information of a slave station device received from a host system in a storage unit.
[0015] Effects of the Invention
[0016] The optical receiver of the present disclosure has an effect of being able to further shorten the convergence time, which is the time taken from the start of reception of an optical signal to the completion of adjustment of the conversion gain and the threshold. BRIEF DESCRIPTION OF THE DRAWINGS
[0017] Figure 1 This is a diagram showing the structure of the optical communication system according to Embodiment 1.
[0018] Figure 2 It is shown Figure 1 A diagram showing the structure of an optical receiver.
[0019] Figure 3 It is shown Figure 2 Diagram of the observation points in the preamplifier shown.
[0020] Figure 4 It is simplified to show Figure 3 Graph showing an example of a time waveform at an observation point shown.
[0021] Figure 5 It is about Figure 2 FIG. 2 is an explanatory diagram of a registration process of a first adjustment value and a second adjustment value performed by the optical receiver shown in FIG.
[0022] Figure 6 This is a diagram showing the structure of an optical receiver according to Embodiment 2.
[0023] Figure 7 This is a diagram showing the structure of an optical receiver according to Embodiment 3. DETAILED DESCRIPTION
[0024] Hereinafter, an optical receiver, a master station device, and an optical communication system according to an embodiment of the present disclosure will be described in detail based on the drawings.
[0025] Implementation method 1.
[0026] Figure 1 This is a diagram showing the structure of an optical communication system 5 according to Embodiment 1. The optical communication system 5 is a PON system having an OLT 1 and a plurality of ONUs 2-1 to 2-3. The OLT 1 is also referred to as a master station device, and is connected to a plurality of ONUs 2-1 to 2-3 using an optical splitter 3 and an optical fiber 4 that branch an optical transmission path. In addition, when it is not necessary to distinguish between a plurality of ONUs 2-1 to 2-3, they are simply referred to as ONU 2. The ONU 2 is also referred to as a slave station device. Here, one OLT 1 is connected to three ONUs 2, but the number of ONUs 2 connected to one OLT 1 is not limited to three. The number of ONUs 2 connected to one OLT 1 may be two, or may be four or more.
[0027] In the optical communication system 5, in the upstream communication from ONU 2 to OLT 1, a time division multiplexing method is used in which OLT 1 grants permission for transmission time and transmission data amount to each of the plurality of ONUs 2. Therefore, OLT 1 knows in advance which ONU 2 among ONU 2-1 to 2-3 is the ONU 2 that is the transmission source of the received optical signal. OLT 1 has an optical receiver 10 that receives the optical signal.
[0028] Figure 2 It is shown Figure 1 The structure of the optical receiver 10 shown in FIG. 1 is a diagram. The optical receiver 10 has: an APD (Avalanche Photo Diode) 100, which is a photoelectric conversion element that converts an optical signal into a current signal; a preamplifier 200, which amplifies the current signal from the APD 100 and converts it into a voltage signal; a limiting amplifier 300, which further amplifies the voltage signal from the preamplifier 200 and limits the amplitude of the voltage signal to a predetermined range; and a host system 400, which has a clock data recovery function that extracts and reproduces the clock and data from the signal from the limiting amplifier 300. The host system 400 also provides a reset signal to the preamplifier 200 and the limiting amplifier 300, respectively, or provides ONU information to the preamplifier 200, or manages the arrival time of the signal from each of the plurality of ONU2 and the identification information of the ONU2. The ONU information, for example, includes the identification information of the ONU2 that is the transmission source of the optical signal to be received next.
[0029] APD100 converts the received optical signal into a current signal and outputs it to the preamplifier 200. The preamplifier 200 amplifies the current signal output by APD100, converts it into a voltage signal and outputs it to the limiting amplifier 300. The limiting amplifier 300 further amplifies the voltage signal output by the preamplifier 200, limits the amplitude of the voltage signal to a predetermined range and outputs it to the upper system 400. The upper system 400 extracts and reproduces the clock and data from the signal output by the limiting amplifier 300. In addition, the preamplifier 200 controls the operation of the preamplifier 200 based on the reset signal output by the upper system 400 and the ONU information including the identification information of ONU2, which will be described in detail later.
[0030] The preamplifier 200 has a core amplifier circuit 201, an AGC 202 as an automatic gain control circuit, an ATC 203 as an automatic threshold control circuit, a single-phase differential conversion circuit 204, an ADC (Analog Digital Converter) 205, a DAC (Digital Analog Converter) 206, a storage unit 207, and a processing device 208.
[0031] The core amplifier circuit 201 amplifies the current signal from the APD 100. The conversion gain of the core amplifier circuit 201 is adjusted by the AGC 202. The output of the core amplifier circuit 201 is connected to the AGC 202, the ATC 203 and the single-phase differential conversion circuit 204, respectively.
[0032] AGC202 has a function of adjusting the conversion gain of the core amplifier circuit 201. AGC202 can change the conversion gain of the core amplifier circuit 201 by adjusting the value of the first adjustment value output to the core amplifier circuit 201. AGC202 has the following function: based on the output of the core amplifier circuit 201, the first adjustment value is adjusted so that the output of the core amplifier circuit 201 becomes a predetermined level, thereby adjusting the conversion gain. In addition, AGC202 also has the following function: when the first adjustment value is received from DAC206, the conversion gain is changed by outputting the first adjustment value received from DAC206 to the core amplifier circuit 201. The first adjustment value is a voltage value and is provided to the feedback resistor section (not shown) of the core amplifier circuit 201. The feedback resistor section is generally a parallel circuit of a resistor and a MOSFET (Metal-Oxide-Semiconductor Field-EffectTransistor). The first adjustment value acts as a gate voltage of the MOSFET constituting the feedback resistor section of the core amplifier circuit 201. By adjusting the first adjustment value, the gate voltage of the MOSFET changes, the resistance value of the feedback resistor changes, and as a result, the signal amplification gain of the core amplifier circuit 201 changes. The higher the resistance value of the feedback resistor, the higher the gain, and the lower the resistance value, the lower the gain.
[0033] ATC203 has a function of adjusting the threshold of the single-phase differential conversion circuit 204. ATC203 can change the threshold input to the single-phase differential conversion circuit 204 by adjusting the second adjustment value output to the single-phase differential conversion circuit 204. ATC203 has the following function: based on the output of the core amplifier circuit 201, the second adjustment value is adjusted to adjust the threshold of the single-phase differential conversion circuit 204. In addition, ATC203 also has the following function: when the second adjustment value is received from DAC206, the threshold is adjusted by outputting the second adjustment value received from DAC206 to the single-phase differential conversion circuit 204. The second adjustment value is a voltage value, which becomes the input voltage of one of the two inputs of the differential amplifier circuit constituting the single-phase differential conversion circuit 204.
[0034] The single-phase differential conversion circuit 204 uses the output of the core amplifier circuit 201 and the threshold value of the output of the ATC 203 as inputs, and converts the single-phase signal into a differential signal. For example, the output of the core amplifier circuit 201 can be used as the positive phase input of the single-phase differential conversion circuit 204, and the threshold value of the output of the ATC 203 can be used as the negative phase input of the single-phase differential conversion circuit 204. The differential amplifier circuit constituting the single-phase differential conversion circuit 204 is a common CML (Current Model Logic) circuit based on MOSFET, an ECL (Emitter Coupled Logic) circuit based on a bipolar transistor, etc. In the case where the single-phase differential conversion circuit 204 is constituted by a CML circuit, the second adjustment value acts as the gate voltage of the MOSFET constituting the CML circuit. In the case where the single-phase differential conversion circuit 204 is constituted by an ECL circuit, the second adjustment value acts as the base voltage of the bipolar transistor constituting the ECL. Here, the center of the positive phase input signal of the single-phase differential conversion circuit 204 is DC1, and the center of the negative phase input signal is DC2. In this case, it is ideal that the value of the DC offset "DC1-DC2" is 0mV, so as to obtain a high amplification factor and an output differential signal without distortion. An example of a signal without distortion is a sine wave with a duty cycle of 50%. Here, when the value of "DC1-DC2" is not 0mV, the amplification factor of the single-phase differential conversion circuit 204 decreases, and the signal waveform of the output differential signal is distorted. That is, even if the amplitude of the output voltage of the core amplifier circuit 201 is fixed, the more the value of "DC1-DC2" deviates from 0mV, the more the output voltage amplitude of the single-phase differential conversion circuit 204 decreases, and the duty cycle deviates from 50%. Therefore, in order to make the value of "DC1-DC2" close to 0mV, the optical receiver 10 controls so that the value of DC2 is close to DC1. The value of DC2 is the output of ATC203, i.e., the second adjustment value, and becomes the threshold of the single-phase differential conversion circuit 204. Therefore, the receiver 10 controls so that the second adjustment value approaches the value of DC1, i.e., the output signal center of the core amplifier circuit 201. The differential signal output by the single-phase differential conversion circuit 204 is input to the limiting amplifier 300.
[0035] ADC 205 converts analog values into digital values. ADC 205 can convert analog values outputted from AGC 202 and ATC 203 , namely, first adjustment value and second adjustment value, into digital values, and output the converted digital values to storage unit 207 .
[0036] DAC206 converts a digital value into an analog value. DAC206 can convert the first adjustment value stored in the storage unit 207 from a digital value into an analog value, and output the converted analog value, i.e., the first adjustment value, to AGC202. In addition, DAC206 can convert the second adjustment value stored in the storage unit 207 from a digital value into an analog value, and output the converted analog value, i.e., the second adjustment value, to ATC203.
[0037] The storage unit 207 has a function of holding the first adjustment value and the second adjustment value which are digital values outputted from the ADC 205 . The storage unit 207 can output the held first adjustment value and the second adjustment value to the DAC 206 in accordance with an instruction from the processing device 208 .
[0038] The processing device 208 is a simple circuit that controls the operation of the preamplifier 200. The processing device 208 can receive a reset signal and ONU information from the host system 400, and control the operation of the preamplifier 200 based on the information received from the host system 400. The details of the control performed by the processing device 208 will be described later.
[0039] Figure 3 It is shown Figure 2 A diagram of observation points in the preamplifier 200 is shown. Figure 4 It is simplified to show Figure 3 An example of a time waveform at an observation point shown in FIG. Figure 3 The observation points shown are explained. Observation point A is the input point for APD100, and the optical signal input to APD100 is observed. Observation point B is the output point of the core amplifier circuit 201, and the signal amplified by the core amplifier circuit 201 is observed. Observation point C is the output point from AGC202 to the core amplifier circuit 201, and the first adjustment value is observed. Observation point D is the output point of ATC203, and the second adjustment value is observed. Observation point E is the input point from the host system 400 to the processing device 208, and the reset signal is observed.
[0040] As observed at observation point A. An optical signal from ONU2 is received at time T. At this time, the arrival timing of the optical signal from ONU2 is known, so a reset signal is provided to match the arrival of the optical signal at time T so that it can be observed at observation point E. After receiving the optical signal, the core amplifier circuit 201 performs reverse amplification, so the output of the core amplifier circuit 201 significantly reduces the DC (Direct Current) level as observed at observation point B. The dotted line in the curve graph of observation point B represents the output level of the core amplifier circuit 201 when the conversion gain is appropriate.
[0041] The time waveforms of observation points C and D when the AGC 202 and the ATC 203 adjust the conversion gain and the threshold value by adjusting the first adjustment value and the second adjustment value based on the output of the core amplifier circuit 201 as in the conventional art are shown by single-dot chain lines.
[0042] First, after receiving the optical signal, AGC 202 determines whether the output of the core amplifier circuit 201 is higher or lower than the appropriate level. Figure 4 As shown, when the conversion gain is greater than the appropriate value and it is determined that the output of the core amplifier circuit 201 is lower than the appropriate level, the first adjustment value is adjusted to reduce the conversion gain. In addition, here, the larger the value of the first adjustment value observed at the observation point C, the lower the conversion gain, but conversely, the smaller the value of the first adjustment value, the lower the conversion gain. Here, the time taken for the adjustment of the AGC 202 is set to t1. In the case of high speed, t1 becomes about tens of ns.
[0043] Next, ATC203 is mostly designed to follow the output of the core amplifier circuit 201. In this case, observation point D shows similar behavior to observation point B. However, it is not limited to this according to the design of the circuit. The second adjustment value observed at observation point D is preferably a value that matches the DC level of the output of the core amplifier circuit 201 observed at observation point B. Therefore, a low-pass filter or the like can be used to remove high-frequency components from the waveform of observation point B, thereby generating a second adjustment value. In this case, the waveform of observation point D changes slowly over time. When ATC203 is made to follow the output of the core amplifier circuit 201, the adjustment of ATC203 is completed after the adjustment of AGC202 is completed. When the time spent on the adjustment of ATC203 is set to t2, t2 is greater than t1.
[0044] Next, the adjustment method of the first adjustment value and the second adjustment value performed by the optical receiver 10 of this embodiment when receiving an optical signal is described. The optical receiver 10 maintains the pre-registered first adjustment value and the second adjustment value for each ONU2 in the storage unit 207. In the optical receiver 10, the timing of the arrival of the optical signal from each ONU2 is known. Therefore, the optical receiver 10 changes the conversion gain and the threshold using the pre-registered first adjustment value and the second adjustment value in accordance with the arrival of the optical signal, thereby shortening the time taken for adjustment. In this case Figure 4The time waveforms of observation point C and observation point D are represented by dotted lines. The time t1 and t2 consumed for adjustment can theoretically be zero. The specific operation is described. The upper system 400 of the optical receiver 10 outputs a reset signal to the preamplifier 200 in matching with the known signal reception timing, and the processing device 208 of the preamplifier 200 provides the first adjustment value and the second adjustment value stored in the storage unit 207 to the AGC 202 and ATC 203 respectively at a timing matching with the reset signal. AGC 202 changes the conversion gain using the provided first adjustment value, and ATC 203 changes the threshold using the provided second adjustment value.
[0045] In addition, as described above, in order to adjust the first adjustment value and the second adjustment value instantaneously in accordance with the arrival of the optical signal, it is necessary to register the first adjustment value and the second adjustment value to be used in advance. The registration of the first adjustment value and the second adjustment value will be described below.
[0046] Figure 5 It is about Figure 2 FIG. 1 is an explanatory diagram of the registration process of the first adjustment value and the second adjustment value performed by the optical receiver 10 shown in FIG. Figure 5 , the received signal of OLT1, the transmitted signal of OLT1, the internal signal of OLT1, the output of AGC202 in the preamplifier 200 of OLT1, the state of preamplifier 200, the received signal of ONU2, and the transmitted signal of ONU2 are shown. The internal signal of OLT1 refers to the signal exchanged inside OLT1, for example, between the host system 400 and the preamplifier 200. ONU2 is Figure 1 Any one of the ONUs 2-1 to 2-3 shown.
[0047] Figure 5 The process starts from the moment when ONU2 is first connected to the network. OLT1 sends a Gate signal to confirm whether there is a newly connected ONU2 in the network (step S1). In synchronization with the Gate signal sent to ONU2, the Gate signal is provided as an internal signal to the preamplifier 200 (step S2). Here, the electrical path for providing the Gate signal to the preamplifier 200 may be a circuit that provides Figure 2 The reset signal line shown can also be provided Figure 2 The signal lines of the ONU information shown may be new signal lines different from these signal lines.
[0048] When the preamplifier 200 receives the Gate signal, it shifts to the "Reg.stand-by" state for registering the first adjustment value and the second adjustment value. In the following description, the first adjustment value and the second adjustment value are sometimes referred to as adjustment values. When the ONU 2 receives the Gate signal, it sends a registration request including information required to register itself in the network to the OLT 1 (step S3).
[0049] When OLT1 receives the registration request from ONU2, at this stage, the adjustment value suitable for ONU2 is unclear, so the adjustment process of the adjustment value is performed based on the output of the core amplifier circuit 201 as in the past. When the adjustment of the adjustment value is completed, OLT1 provides a reset signal indicating that the signal from ONU2 is received as an internal signal to the preamplifier 200 (step S4). The preamplifier 200 converts the adjustment value at the stage of receiving the reset signal into a digital signal and registers it in the storage unit 207. At this stage, the registered adjustment value is not corresponding to the identification information of ONU2. In addition, when the reset signal is provided as an internal signal (step S5), the preamplifier 200 releases the adjustment value registration state.
[0050] After the registration request, OLT1 determines the transmission timing and transmission data volume of ONU2, and sends a "Register+gate" signal, which is a signal containing these allocation information and is a registration confirmation signal for ONU2 (step S6). At this time, OLT1 provides a data string containing the identification information of ONU2 to the preamplifier 200 through an internal signal (step S7). When the preamplifier 200 receives the identification information, it registers the adjustment value already stored in the storage unit 207 in correspondence with the received identification information. For example, the preamplifier 200 can correspond the adjustment value to the identification information by making the identification information of ONU2 correspond to the register address.
[0051] When ONU2 receives the "Register+gate" signal, it sends an Ack signal to confirm the reception (step S8). At this stage, the arrival timing of the signal from ONU2 is known, so OLT1 matches the reception timing of the Ack signal and provides a reset signal and identification information as an internal signal, the identification information identifying ONU2 as the transmission source of the signal to be received (step S9).
[0052] Since the registration of the adjustment value has been completed, the preamplifier 200 calls the adjustment value stored in the storage unit 207 corresponding to the provided identification information in accordance with the reset signal, and provides it to the AGC 202 and the ATC 203, respectively, thereby instantaneously completing the adjustment of the adjustment value. The conversion gain and the threshold are adjusted by adjusting the adjustment value. When the signal from the ONU 2 ends, the OLT 1 provides the reset signal as an internal signal to the preamplifier 200 (step S10). The preamplifier 200 releases the adjustment value calling state at the timing matching the reset signal.
[0053] As described above, the optical receiver 10 of embodiment 1 is installed in OLT1 as a master station device, and the master station device is connected to multiple ONU2 as slave stations via an optical transmission path, and receives optical signals from multiple ONU2 by time division multiplexing. The optical receiver 10 includes: APD100, which is a photoelectric conversion element that converts an optical signal into a current signal; a preamplifier 200, which amplifies the current signal from APD100 and converts it into a voltage signal; a limiting amplifier 300, which further amplifies the voltage signal from the preamplifier 200 and limits the amplitude of the voltage signal to a predetermined range; and a host system 400, which outputs a reset signal to the preamplifier 200 in matching with the timing of the received optical signal. The amplifier 200 includes a core amplifier circuit 201, an AGC 202, which is an automatic gain control circuit that changes the conversion gain of the core amplifier circuit by adjusting a first adjustment value, a single-phase differential conversion circuit 204, which converts a single-phase signal outputted from the core amplifier circuit 201 into a differential signal, an ATC 203, which is an automatic threshold control circuit that changes the threshold of the single-phase differential conversion circuit 204 by adjusting a second adjustment value, and a processing device 208, which stores the first adjustment value adjusted by the AGC 202 based on the output of the core amplifier circuit 201 and the second adjustment value adjusted by the ATC 203 based on the output of the core amplifier circuit 201 in a storage unit 207 in correspondence with the identification information of the ONU 2 received from the host system 400. The processing of storing the identification information in correspondence with the first adjustment value and the second adjustment value by the processing device 208 is performed as a part of the initial registration processing when the ONU 2 is connected to the network for the first time.
[0054] According to the above structure, when an optical signal is received from each ONU2, the appropriate first adjustment value and the second adjustment value can be maintained in correspondence with the identification information of ONU2. Therefore, when adjusting the conversion gain of the core amplifier circuit 201 and the threshold of the single-phase differential conversion circuit 204, the time consumed for adjustment can be shortened by using the pre-maintained adjustment value.
[0055] AGC 202 changes the conversion gain of core amplifier circuit 201 using the first adjustment value stored in storage unit 207 at a timing matching the reset signal, and ATC 203 changes the threshold value using the second adjustment value stored in storage unit 207 at a timing matching the reset signal. In this way, the conversion gain and the threshold value can be adjusted at a timing matching the reset signal provided to match the known reception timing, so that the preamplifier 200 can output a normal waveform from the beginning.
[0056] Implementation method 2.
[0057] Figure 6 1 is a diagram showing the structure of an optical receiver 10A according to Embodiment 2. The optical receiver 10A is provided in the OLT 1. The optical receiver 10A includes an APD 100, a preamplifier 200A, a limiting amplifier 300, and an upper system 400, and includes a preamplifier 200A instead of the preamplifier 200 of the optical receiver 10. Hereinafter, the parts different from the optical receiver 10 according to Embodiment 1 will be mainly described, and detailed description of the common parts will be omitted.
[0058] The preamplifier 200A further includes, in addition to the structure of the preamplifier 200, an adjustment core amplifier circuit 209 that amplifies the current signal from the APD 100, an adjustment automatic gain control circuit AGC 210 that adjusts the third adjustment value based on the output of the adjustment core amplifier circuit 209 to change the conversion gain of the adjustment core amplifier circuit 209, and an adjustment automatic threshold control circuit ATC 211 that adjusts the fourth adjustment value based on the output of the adjustment core amplifier circuit 209. The processing device 208 can convert the third adjustment value adjusted by the AGC 210 and the fourth adjustment value adjusted by the ATC 211 into digital values through the ADC 205, update the first adjustment value stored in the storage unit 207 using the converted third adjustment value, and update the second adjustment value stored in the storage unit 207 using the fourth adjustment value adjusted by the ATC 211. Here, the processing device 208 updates the first adjustment value and the second adjustment value used in adjusting the third adjustment value and the fourth adjustment value.
[0059] Thus, the optical receiver 10A can update the first adjustment value and the second adjustment value once registered in the storage unit 207. Therefore, even when the appropriate adjustment value changes due to environmental changes, aging, etc., it is possible to follow such changes.
[0060] Implementation method 3.
[0061] Figure 71 is a diagram showing the structure of an optical receiver 10B according to Embodiment 3. The optical receiver 10B is provided in the OLT 1. The optical receiver 10B includes an APD 100, a preamplifier 200B, a limiting amplifier 300, and an upper system 400, and includes a preamplifier 200B instead of the preamplifier 200 of the optical receiver 10. The following mainly describes the parts different from the optical receiver 10 according to Embodiment 1, and a detailed description of the common parts is omitted.
[0062] The preamplifier 200B has, based on the structure of the preamplifier 200, a signal detection circuit 212 that detects a signal included in the output of the core amplifier circuit 201, and a selector 213 that switches the connection to the input terminal of the single-phase differential conversion circuit 204 based on the signal detection result of the signal detection circuit 212. The selector 213 can switch between a first state in which the output of the ATC 203 is connected to the differential input of the single-phase differential conversion circuit 204 and a second state in which the output of the ATC 203 is connected to the single-phase input of the single-phase differential conversion circuit 204. In the second state, the output of the ATC 203 is connected to a single input of the single-phase differential conversion circuit 204, and the output of the core amplifier circuit 201 is connected to the other single input. The selector 213 is in the first state from the completion of the adjustment of the conversion gain of the core amplifier circuit 201 and the threshold of the single-phase differential conversion circuit 204 to the detection of the signal by the signal detection circuit 212, and is in the second state after the signal detection circuit 212 detects the signal. Thus, it is possible to suppress the generation of a DC offset between the differential outputs of the preamplifier 200B in the no-signal interval after the reset signal is input. When a DC offset is generated between the differential outputs of the preamplifier 200B, that is, when the value of the above-mentioned "DC1-DC2" is not 0mV, the amplification factor of the single-phase differential conversion circuit 204 decreases, and a state in which the output waveform of the single-phase differential conversion circuit 204 is distorted may occur. In addition, when the DC offset is large and deviates from the input / output range of the single-phase differential conversion circuit 204, a state in which no waveform is output from the single-phase differential conversion circuit 204 may occur. By suppressing the DC offset, such a state can be avoided, and the OLT 1 can continue to operate stably.
[0063] The configurations shown in the above embodiments are merely examples, and may be combined with other known technologies, the embodiments may be combined with each other, and some configurations may be omitted or modified without departing from the spirit and scope of the invention.
[0064] For example, in the above-mentioned embodiment, an avalanche photodiode is given as an example of a photoelectric conversion element, but the photoelectric conversion element may be a photoelectric conversion element other than an avalanche photodiode. For example, the photoelectric conversion element may be a PIN junction photodiode.
[0065] In addition, in the above-mentioned embodiment, the output of the core amplifier circuit 201 is used as the positive phase input of the single-phase differential conversion circuit 204, and the threshold value of the output of ATC203 is used as the negative phase input of the single-phase differential conversion circuit 204. However, the threshold value of the output of ATC203 can also be used as the positive phase input of the single-phase differential conversion circuit 204, and the output of the core amplifier circuit 201 can be used as the negative phase input of the single-phase differential conversion circuit 204.
[0066] Description of Reference Numerals
[0067] 1OLT, 2, 2-1 to 2-3ONU, 3 optical splitter, 4 optical fiber, 5 optical communication system, 10, 10A, 10B optical receiver, 100APD, 200, 200A, 200B preamplifier, 201 core amplifier circuit, 202, 210AGC, 203, 211ATC, 204 single-phase differential conversion circuit, 205ADC, 206DAC, 207 storage unit, 208 processing device, 209 core amplifier circuit for adjustment, 212 signal detection circuit, 213 selector, 300 limiting amplifier, 400 upper system.
Claims
1. An optical receiver installed in a master station device, the master station device receiving optical signals from a plurality of slave stations connected to the master station device via an optical transmission path by time division multiplexing, It is characterized in that The optical receiver comprises: A photoelectric conversion element that converts the optical signal into a current signal; A preamplifier, which amplifies the current signal from the photoelectric conversion element and converts it into a voltage signal; a limiting amplifier that further amplifies the voltage signal from the preamplifier and limits the amplitude of the voltage signal to a predetermined range; and a host system that outputs a reset signal to the preamplifier in matching timing with reception of the optical signal, The preamplifier has: A core amplifier circuit, which amplifies the current signal; an automatic gain control circuit, which changes the conversion gain of the core amplifier circuit by adjusting the first adjustment value; A single-phase differential conversion circuit, which converts the single-phase signal output by the core amplifier circuit into a differential signal; an automatic threshold control circuit that changes the threshold of the single-phase differential conversion circuit by adjusting a second adjustment value; and A processing device that causes the first adjustment value adjusted by the automatic gain control circuit based on the output of the core amplifier circuit and the second adjustment value adjusted by the automatic threshold control circuit based on the output of the core amplifier circuit to correspond to the identification information of the slave station device received from the upper system and store them in a storage unit.
2. The optical receiver according to claim 1, It is characterized in that The automatic gain control circuit changes the conversion gain using the first adjustment value stored in the storage unit at a timing matching the reset signal. The automatic threshold control circuit changes the threshold using the second adjustment value stored in the storage unit at a timing matching the reset signal.
3. The optical receiver according to claim 2, It is characterized in that The processing device provides the first adjustment value and the second adjustment value stored in the storage unit corresponding to the slave station device as a transmission source of the optical signal to be received to the automatic gain control circuit and the automatic threshold control circuit respectively at a timing matching the reset signal.
4. The optical receiver according to any one of claims 1 to 3, It is characterized in that The preamplifier also has: an adjustment core amplifier circuit, which amplifies the current signal from the photoelectric conversion element; an automatic gain control circuit for adjustment that adjusts a third adjustment value based on the output of the core amplifier circuit for adjustment, thereby changing the conversion gain of the core amplifier circuit for adjustment; and an automatic threshold control circuit for adjustment, which adjusts a fourth adjustment value based on an output of the core amplifier circuit for adjustment, The preamplifier updates the first adjustment value stored in the storage unit using the third adjustment value. The preamplifier updates the second adjustment value stored in the storage unit using the fourth adjustment value.
5. The optical receiver according to claim 1, It is characterized in that The preamplifier has: a signal detection circuit that detects a signal included in the output of the core amplification circuit; and a selector capable of switching between a first state and a second state based on a signal detection result of the signal detection circuit, wherein in the first state, the output of the automatic threshold control circuit is connected to the differential input of the single-phase differential conversion circuit, and in the second state, the output of the automatic threshold control circuit is connected to the single-phase input of the single-phase differential conversion circuit, The selector is in the first state from the time when the automatic threshold control circuit changes the threshold using the second adjustment value in response to the reset signal until the signal detection circuit detects a signal, and is in the second state after the signal detection circuit detects a signal.
6. The optical receiver according to claim 1, It is characterized in that The photoelectric conversion element is an avalanche photodiode.
7. A master station device, It is characterized in that The master station device includes the optical receiver according to any one of claims 1 to 6.
8. An optical communication system, It is characterized in that The optical communication system comprises: A master station device comprising the optical receiver according to any one of claims 1 to 6; and A plurality of slave station devices are connected to the master station device via an optical transmission path.