A high-speed terahertz signal position super-resolution acquisition method and system

Abstract

The application discloses a high-speed terahertz signal position super-resolution collection method and system, and belongs to the technical field of instruments and meters. The method can effectively improve the position measurement precision of a terahertz rotary delay line measurement, and finally improves the phase performance of a relative position of a terahertz analog signal. On the basis of improving the position phase of the terahertz signal, more nondestructive testing and intelligent analysis become possible, and new and reliable technical means are provided for manufacturing, agriculture and the like. The method can greatly improve the position measurement capability of an encoder, and higher effective resolution is obtained, so that a lower-resolution encoder can be used to realize better-precision measurement, and an expensive higher-specification encoder device is not needed, and cost is reduced.

Description

Technical Field

[0001] This invention belongs to the field of instrumentation technology, specifically relating to a method and system for super-resolution acquisition of high-speed terahertz signal position. Background Technology

[0002] The rotating delay line is a key component in terahertz equipment, and its position measurement accuracy directly affects the measurement performance of the terahertz equipment. Generally, the position of the rotating delay line can be obtained using an encoder sensor.

[0003] However, due to limitations in encoder sensor technology, manufacturing capabilities, and cost, the accuracy of encoder sensors cannot be continuously improved, ultimately limiting the performance improvement of terahertz equipment. Summary of the Invention

[0004] To address the aforementioned problems in the existing technology, this invention provides a method and system for super-resolution acquisition of high-speed terahertz signal position. This method can improve position measurement accuracy while maintaining consistent encoder and sensor performance, ultimately improving the accuracy of high-speed terahertz phase.

[0005] This invention is achieved through the following technical solution:

[0006] A method for super-resolution acquisition of high-speed terahertz signal position includes the following steps:

[0007] Step 1: Clock source 2 drives clock generator 3 to generate three clock signals CLK with the same frequency and synchronized phase, and transmits them to analog-to-digital converter 5, non-inverting counter 8, and digital comparator 9 respectively;

[0008] Step 2: The count value P of the pulse counter 10 continues to count upward under the position pulse drive of the pulse encoder 1. That is, when each pulse edge of the pulse encoder 1 arrives, the count value P of the pulse counter 10 is incremented by 1, and the count value is updated and transmitted to the digital comparator 9 in real time.

[0009] Step 3: When the count value P transmitted from pulse counter 10 to digital comparator 9 matches the preset position matching value P in digital comparator 9... c When they are equal, a pre-triggered signal t is generated;

[0010] Step 4: When the current trigger signal t appears, the inverting counter 8 starts and continues to count upward under the drive of the clock signal CLK. That is, when each rising edge of the clock signal CLK arrives, the count value Q of the inverting counter 8 is incremented by 1.

[0011] Step 5: When the count value Q of the in-phase counter 8 matches its internal preset subdivision compensation value Q... c When they are equal, a trigger signal T is generated, and the count value of the same-direction counter 8 is set to 0;

[0012] Step 6: When the trigger signal T appears, the data transceiver controller 6 starts the analog-to-digital converter 5. The analog-to-digital converter 5 starts to continuously acquire the analog signal output by the terahertz signal source 4 under the drive of the clock signal CLK, and outputs it synchronously to the subsequent receiving device 7 through the data transceiver controller 6.

[0013] Step 7: When the number of analog signals f acquired by the analog-to-digital converter 5 reaches the preset value F of the frame data volume, the data transceiver controller 6 controls the analog-to-digital converter 5 to stop acquiring data, thus completing the acquisition of a data frame.

[0014] Step 8: Repeat steps 3-6 to acquire multiple data frames until you want to stop acquiring data.

[0015] Furthermore, in step two, when the origin signal of pulse encoder 1 appears, the count value P of pulse counter 10 is reset to 0.

[0016] Furthermore, in step three, the position matching value P c It is the measurement value corresponding to the position that the pulse encoder (1) can measure, and the position should be the first encoder scale that the position to be accurately aligned is moved along the angular motion direction.

[0017] Furthermore, in step five, the subdivision compensation value Q c It is the fixed number of clock pulses of the clock signal CLK, specifically from the position matching value P. c The number of clock signal CLK pulses that occur within the time required for the movement to reach the desired, precisely aligned position.

[0018] Furthermore, in step seven, the preset value F of the frame data volume is obtained by the following formula:

[0019] F = SPR * R / v

[0020] Where SPR is the sampling speed of analog-to-digital converter 5, R is the distance range of the desired acquired signal, and v is the rotation speed of pulse encoder 1.

[0021] On the other hand, the present invention also provides a high-speed terahertz signal position super-resolution acquisition system for implementing the above method. The acquisition system includes: a pulse encoder 1, a clock source 2, a clock generator 3, a terahertz signal source 4, an analog-to-digital converter 5, a data transceiver controller 6, a subsequent receiving device 7, a co-directional counter 8, a digital comparator 9, and a pulse counter 10. The clock source 2 is connected to the clock generator 3, and the signal is transmitted from the clock source 2 to the clock generator 3. The clock CLK signal output by the clock generator 3 is transmitted to the analog-to-digital converter 5, the co-directional counter 8, and the digital comparator 9, respectively. The terahertz signal source 4, the analog-to-digital converter 5, the data transceiver controller 6, and the subsequent receiving device 7 are connected in sequence, and the signal is transmitted in this order. The pulse encoder 1, the pulse counter 10, the digital comparator 9, the co-directional counter 8, and the data transceiver controller 6 are connected in sequence, and the signal is transmitted in this order.

[0022] Furthermore, the pulse encoder 1 is used to acquire angular position information and send it to the pulse counter 10. The pulse counter 10 is used to count the position pulse signals of the encoder 1 to obtain a count value P. Finally, the count value data P, representing the position, is updated and transmitted to the digital comparator 9 in real time. The digital comparator 9 is used to compare the count value P sent by the pulse counter 10, i.e., the real-time position data, with its internally preset position matching value P. c The clock source 2 generates a fixed digital clock signal and sends it to the clock generator 3. The clock generator 3 generates three clock signals CLK with the same frequency and synchronized phase, and transmits them to the analog-to-digital converter 5, the in-phase counter 8, and the digital comparator 9, respectively. The analog-to-digital converter 5 converts the analog signal into a digital signal by voltage successive approximation or capacitor array comparison, and then sends the resulting digital signal to the data transceiver controller 6. The in-phase counter 8 counts under the drive of the clock generator 3 and transmits the count value trigger signal T to the data transceiver controller 6. The data transceiver controller 6 receives the digital signal data output by the analog-to-digital converter 5 and then sends it to the subsequent receiving device 7. The subsequent receiving device 7 displays the data transmitted from the data transceiver controller 6 to obtain the target terahertz signal waveform.

[0023] Furthermore, the pulse encoder 1 is an orthogonal, pulse incremental rotary encoder with zero-point position output;

[0024] The clock source 2 is a crystal oscillator, including a passive piezoelectric crystal oscillator, a common active crystal oscillator, a temperature-compensated oscillator, or a furnace-controlled oscillator;

[0025] The clock generator 3 is a phase-locked loop clock generator;

[0026] The data transceiver controller 6, the inverse counter 8, the digital comparator 9, and the pulse counter 10 are all implemented using a digital programmable gate array (FPGA).

[0027] The subsequent receiving device 7 is implemented using various types of electronic computers with display functions.

[0028] Compared with the prior art, the advantages of the present invention are as follows:

[0029] 1. The present invention provides a high-speed terahertz signal position super-resolution acquisition method and system, which can effectively improve the position measurement accuracy of terahertz rotating delay line measurement, and ultimately improve the phase performance of the relative position of terahertz analog signal;

[0030] 2. By improving the position and phase of terahertz signals, more non-destructive testing and intelligent analysis become possible, providing new and reliable technical means for manufacturing, agriculture, and other industries;

[0031] 3. It can significantly improve the encoder's position measurement capabilities and achieve higher effective resolution. Therefore, it can use a lower resolution encoder to achieve better accuracy measurement without the need for expensive higher-specification encoder equipment, thus reducing costs.

[0032] 4. Breaking through the limitations of existing encoder sensor capabilities, the ultimate capabilities of terahertz devices can be further improved. Attached Figure Description

[0033] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the accompanying drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. In all the drawings, similar elements or parts are generally identified by similar reference numerals. In the drawings, the elements or parts are not necessarily drawn to scale.

[0034] Figure 1 This is a flowchart illustrating a high-speed terahertz signal position super-resolution acquisition method according to the present invention.

[0035] Figure 2 This is a structural diagram of a high-speed terahertz signal position super-resolution acquisition system according to the present invention;

[0036] Figure 3 A diagram illustrating the parameters and operational information for super-resolution location acquisition.

[0037] Figure 4 A diagram illustrating the parameters and operational information for super-resolution subdivision;

[0038] Figure 5 This is a schematic diagram of the timing process of a high-speed terahertz signal super-resolution acquisition method.

[0039] In the diagram: 1. Pulse encoder; 2. Clock source; 3. Clock generator; 4. Terahertz signal source; 5. Analog-to-digital converter; 6. Data transceiver controller; 7. Subsequent receiving device; 8. In-phase counter; 9. Digital comparator; 10. Pulse counter; 21. Concentric circle of the encoder; 22. Encoder scale; 23. Target position; 24. Approximate position before; 25. Approximate position after; 26. Motion direction indicator line; 27. Imaginary trajectory of sampling position; 28. Imaginary point of sampling position; 31. Clock signal waveform; 32. Analog acquisition action waveform; 33. Position matching value amplitude; 34. In-phase counter count value; 35. Correction compensation value amplitude; 36. Digital comparator input value; 37. Pre-triggered signal t indicator line; 38. Triggered signal T indicator line; 39. Analog signal acquisition action time; 40. Clock jump time. Detailed Implementation

[0040] To clearly and completely describe the technical solution and its specific working process of the present invention, the specific embodiments of the present invention are as follows, in conjunction with the accompanying drawings:

[0041] Example 1

[0042] like Figure 1 The diagram shown is a flowchart of a high-speed terahertz signal position super-resolution acquisition method according to this embodiment. The acquisition method specifically includes the following steps:

[0043] Step 1: Clock source 2 drives clock generator 3 to generate three clock signals CLK with the same frequency and synchronized phase, and transmits them to analog-to-digital converter 5, non-inverting counter 8, and digital comparator 9 respectively;

[0044] The frequency of the clock signal CLK is consistent with the drive clock signal required by the analog-to-digital converter 5;

[0045] Step 2: The count value P of the pulse counter 10 continues to count upward under the position pulse drive of the pulse encoder 1. That is, when each pulse edge of the pulse encoder 1 arrives, the count value P of the pulse counter 10 is incremented by 1, and the count value is updated and transmitted to the digital comparator 9 in real time. When the origin signal of the pulse encoder 1 appears, the count value P of the pulse counter 10 is reset to 0.

[0046] Step 3: When the count value P transmitted from pulse counter 10 to digital comparator 9 matches the preset position matching value P c When they are equal, a pre-triggered signal t is generated;

[0047] In this embodiment, as Figure 3 As shown, motion direction indicator line 26 indicates the angular motion direction; encoder scale 22 indicates the angular position that pulse encoder 1 can distinguish; target position 23 is the desired accurately aligned position x; and the previous approximate position 24 is the first encoder scale along the direction x is moving forward, as shown below. Figure 3 Position A is the aforementioned position matching value P. c The value of .

[0048] Step 4: When the current trigger signal t appears, the inverting counter 8 starts and continues to count upward under the drive of the clock signal CLK. That is, when each rising edge of the clock signal CLK arrives, the count value Q of the inverting counter 8 is incremented by 1.

[0049] Step 5: When the count value Q of the inverse counter 8 is equal to the subdivision compensation value Q... c When they are equal, a trigger signal T is generated, and the count value of the same-direction counter 8 is set to 0;

[0050] In this embodiment, as Figure 4 As shown, the imaginary sampling point 28 on the imaginary sampling trajectory 27 represents the position corresponding to each acquisition by the analog converter 5 during operation; there are N imaginary sampling points 28 in the region between position A and position x, which are the subdivision compensation values ​​Q. c The quantity N is the number of hypothetical sampling points 28 between the two sampling positions C and D (including C and D), while C', D' and other hypothetical sampling points 28 located outside of positions A and x are not included.

[0051] Step 6: When the trigger signal T appears, the data transceiver controller 6 starts the analog-to-digital converter 5. The analog-to-digital converter 5 starts to continuously acquire the analog signal output by the terahertz signal source 4 under the drive of the clock signal CLK, and outputs it synchronously to the subsequent receiving device 7 through the data transceiver controller 6.

[0052] Step 7: When the number of analog signals f acquired by the analog-to-digital converter 5 reaches the preset value F of the frame data volume, the data transceiver controller 6 controls the analog-to-digital converter 5 to stop acquiring data, thus completing the acquisition of a data frame.

[0053] The preset value F for the frame data volume is a value set according to the desired frame acquisition range, and it needs to meet the following requirements:

[0054] F = SPR * R / v

[0055] Where SPR is the sampling speed of analog-to-digital converter 5, R is the distance range of the signal to be acquired, and v is the rotation speed of pulse encoder 1.

[0056] Step 8: Repeat steps 3-6 to acquire multiple data frames until you want to stop acquiring data.

[0057] The relationship between the signals in this embodiment will be explained in detail below with reference to the accompanying drawings:

[0058] like Figure 5As shown, the clock signal CLK runs continuously and stably during the acquisition process, as shown in clock signal waveform 31.

[0059] The digital comparator 9 operates when the input value P equals the target value P. C A pre-trigger signal t is generated at the current or next clock signal CLK, such as... Figure 5 The input value of the digital comparator is shown in line 36, the pre-trigger signal t indicator line is shown in line 37, and the trigger signal T indicator line is shown in line 38.

[0060] The counting of the in-direction counter 8 must begin immediately upon the arrival of the pre-trigger signal t, either at the edge of the current clock signal CLK or the edge of the next clock signal. Its counting drive clock is a fixed clock signal CLK, and it increments by 1 under the drive of each clock signal CLK beat. Figure 5 The following parameters are shown: position matching value amplitude 33, same direction counter count value 34, pre-triggered signal t indicator line 37, clock signal waveform 31, and clock jump time 40.

[0061] The unidirectional counter 8 has its count value Q and a preset value Q. c When they are equal, under the same clock signal CLK, the non-inverting counter 8 needs to complete two operations: counting to 0 and generating a trigger signal T. Figure 5 The mid-position matching value amplitude is 33, the same-direction counter count value is 34, and the trigger signal T indicator line is 38.

[0062] When the trigger signal T arrives, the data transceiver controller 6 needs to start the analog-to-digital converter 5's data acquisition operation at the next clock signal CLK, and drive the analog-to-digital converter 5 to perform continuous analog-to-digital conversion according to the clock signal CLK; such as Figure 5 The trigger signal T indicator line 38, the analog signal acquisition action time 39, and the clock jump time 40 are shown.

[0063] Combination Figure 5 The timing diagram is explained as follows:

[0064] The clock signal waveform 31 and the analog acquisition action waveform 32 are respectively indicators of the clock signal CLK and the acquisition action signal of the analog-to-digital converter 5; the analog signal acquisition action moment 39 and the clock jump moment 40 indicate the instant when the clock signal CLK and the acquisition action signal of the analog-to-digital converter 5 appear or occur; at the same time, the arrow on the clock signal waveform 31 indicates Figure 4 The direction of time progression;

[0065] The position matching value amplitude 33 and the correction compensation value amplitude 35 are the position matching value P. c Subdivided compensation value Q c This is used as an indication of amplitude in the diagram;

[0066] The count value 34 of the in-phase counter and the input value 36 of the digital comparator indicate the count value Q of the in-phase counter 8 and the position data signal sent by the pulse counter 10 to the digital comparator 9.

[0067] The pre-trigger signal t indicator line 37 and the trigger signal T indicator line 38 correspond to the occurrence times of the pre-trigger signal t and the trigger signal T, respectively.

[0068] Signal acquisition was performed on four terahertz signal acquisition devices using both the conventional method and the method described in this embodiment, keeping other conditions constant. Experimental results show that when using the conventional method, the average time-domain jitter of the acquired signal was 31.3 ps, with a maximum of 47 ps; while using the present method, the average jitter was 1.7 ps, with a maximum of 4 ps. This demonstrates that the present counting method can effectively reduce the jitter of the acquired signal. Furthermore, when using the counting scheme described in this invention, the jitter level can be further reduced by increasing the sampling rate. The measurable average and worst results achieved in the experiment were 0.085 ps and a maximum of 0.13 ps, respectively, representing a significant improvement. In contrast, the conventional technique, regardless of changes in the sampling rate, could not improve the jitter level.

[0069] Example 2

[0070] like Figure 2 As shown, this embodiment provides a high-speed terahertz signal position super-resolution acquisition system for implementing the acquisition method described in Embodiment 1. The acquisition system includes: a pulse encoder 1, a clock source 2, a clock generator 3, a terahertz signal source 4, an analog-to-digital converter 5, a data transceiver controller 6, a subsequent receiving device 7, a co-directional counter 8, a digital comparator 9, and a pulse counter 10. The clock source 2 is connected to the clock generator 3, and the signal is transmitted from the clock source 2 to the clock generator 3. The clock CLK signal output by the clock generator 3 is transmitted to the analog-to-digital converter 5, the co-directional counter 8, and the digital comparator 9, respectively. The terahertz signal source 4, the analog-to-digital converter 5, the data transceiver controller 6, and the subsequent receiving device 7 are connected in sequence, and the signal is transmitted in this order. The pulse encoder 1, the pulse counter 10, the digital comparator 9, the co-directional counter 8, and the data transceiver controller 6 are connected in sequence, and the signal is transmitted in this order.

[0071] The pulse encoder 1 is used to acquire angular position information and send it to the pulse counter 10. The pulse counter 10 is used to count the position pulse signals of the encoder 1 to obtain a count value P. Finally, the count value data P, representing the position, is updated and transmitted to the digital comparator 9 in real time. The digital comparator 9 is used to compare the count value P sent by the pulse counter 10, i.e., the real-time position data, with its internally preset position matching value P. cThe clock source 2 generates a fixed digital clock signal and sends it to the clock generator 3. The clock generator 3 generates three clock signals CLK with the same frequency and synchronized phase, and transmits them to the analog-to-digital converter 5, the in-phase counter 8, and the digital comparator 9, respectively. The analog-to-digital converter 5 converts the analog signal into a digital signal by voltage successive approximation or capacitor array comparison, and then sends the resulting digital signal to the data transceiver controller 6. The in-phase counter 8 counts under the drive of the clock generator 3 and transmits the count value trigger signal T to the data transceiver controller 6. The data transceiver controller 6 receives the digital signal data output by the analog-to-digital converter 5 and then sends it to the subsequent receiving device 7. The subsequent receiving device 7 displays the data transmitted from the data transceiver controller 6 to obtain the target terahertz signal waveform.

[0072] In this embodiment, the terahertz signal source 4 is a device that generates the terahertz signal to be measured and is the measurement target of this method; the subsequent receiving device 7 is the destination for outputting data after the acquisition is completed using this method and is the result of the method in practical application.

[0073] The pulse encoder 1 is a sensor used to acquire angular position information, and requires an orthogonal, pulse incremental rotary encoder with zero-point position output.

[0074] The clock source 2 is a device that generates a fixed digital clock signal output, implemented using a crystal oscillator, including a passive piezoelectric crystal oscillator, a common active crystal oscillator, a temperature-compensated oscillator, and a furnace-controlled oscillator.

[0075] Clock generator 3 is a phase-locked loop clock generator, which is used to receive a fixed digital clock signal and convert it into a high-quality digital clock of another fixed frequency, and has the ability to reliably distribute multiple digital clock signals.

[0076] The co-directional counter 8 and pulse counter 10 are counter components capable of digital counting; the co-directional counter 8 counts upwards under clock drive until the count value reaches the preset value, at which point the count value returns to zero, counting stops, and a trigger signal is output; the pulse counter 10 can acquire the position pulse signal of the pulse encoder 1 and convert it into position data output.

[0077] The digital comparator 9 is a component that compares the values ​​of two digital signals and outputs a trigger signal when the two input values ​​are equal.

[0078] The data transceiver controller 6 is a device that can control the analog-to-digital converter to acquire and output data when a specific trigger input arrives.

[0079] The data transceiver controller 6, the inverse counter 8, the digital comparator 9, and the pulse counter 10 need to be implemented using an FPGA (digital programmable gate array).

[0080] The preferred embodiments of the present invention have been described in detail above with reference to the accompanying drawings. However, the present invention is not limited to the specific details of the above embodiments. Within the scope of the technical concept of the present invention, various simple modifications can be made to the technical solution of the present invention, and these simple modifications all fall within the protection scope of the present invention.

[0081] It should also be noted that the various specific technical features described in the above specific embodiments can be combined in any suitable manner without contradiction. In order to avoid unnecessary repetition, the present invention will not describe the various possible combinations separately.

[0082] Furthermore, various different embodiments of the present invention can be combined in any way, as long as they do not violate the spirit of the present invention, they should also be regarded as the content disclosed by the present invention.

Claims

1. A high-speed terahertz signal position super-resolution acquisition method, characterized in that, Specifically comprising the following steps: Step one: generate three clock signals with the same frequency and phase synchronization through the clock generator (3) driven by the clock source (2), and transmit them to the analog-to-digital converter (5), the up-down counter (8) and the digital comparator (9) respectively; Step two: the count value P of the pulse counter (10) continuously counts up under the position pulse driving of the pulse encoder (1), that is, the count value P of the pulse counter (10) increases by 1 when each pulse edge of the pulse encoder (1) arrives, and the real-time updated count value is transmitted to the digital comparator (9); Step three: when the count value P of the pulse counter (10) transferred to the digital comparator (9) matches the preset position matching value P in the digital comparator (9) c is equal, a pre-trigger signal t is generated; Step four: when the preset trigger signal t appears, the up-down counter (8) starts and continuously counts up under the driving of the clock signal CLK, that is, the count value Q of the up-down counter (8) increases by 1 when each rising edge of the clock signal CLK arrives; Step five: when the count value Q of the up counter (8) is equal to the preset subdivision compensation value Q c a trigger signal T is generated and the count value of the up counter (8) is set to 0; Step six: when the trigger signal T appears, the data transceiver controller (6) starts the analog-to-digital converter (5), and the analog-to-digital converter (5) starts to continuously collect the analog signal output by the terahertz signal source (4) under the driving of the clock signal CLK, and synchronously outputs to the subsequent receiving device (7) through the data transceiver controller (6); Step seven: when the analog signal quantity f collected by the analog-to-digital converter (5) reaches the preset frame data quantity F, the data transceiver controller (6) controls the analog-to-digital converter (5) to stop collecting, and completes the complete collection of one data frame; Step eight: repeat steps three to six to collect multiple data frames until the desired collection is stopped.

2. The method of claim 1, wherein the method is a high-speed terahertz signal position super-resolution acquisition method, characterized in that, In step two, when the origin signal of the pulse encoder (1) appears, the count value P of the pulse counter (10) is reset to 0.

3. The method of claim 1, wherein the method is a high-speed terahertz signal position super-resolution acquisition method, characterized in that, In step three, the position matching value P c is the measured value of the position corresponding to the position of the first encoder scale moved in the direction of angular movement for which the exact alignment is desired.

4. The method of claim 1, wherein the method is a high-speed terahertz signal position super-resolution acquisition method, characterized in that, In step five, the subdivided compensation value Q c is a fixed number of pulses of the clock signal CLK, in particular the number of pulses of the clock signal CLK that occur in the time required to move from the position matching value P c to the position of the desired exact alignment.

5. The method of claim 1, wherein the method is a high-speed terahertz signal position super-resolution acquisition method, characterized in that, In step seven, the preset frame data quantity F is obtained by the following formula: F = SPR * R / v Wherein, SPR is the sampling speed of the analog-to-digital converter (5), R is the distance range of the expected collected signal, and v is the rotation speed of the pulse encoder (1).

6. A high-speed terahertz signal position super-resolution acquisition system for implementing the method according to any one of claims 1-5, characterized in that, The collection system comprises a pulse encoder (1), a clock source (2), a clock generator (3), a terahertz signal source (4), an analog-to-digital converter (5), a data transceiver controller (6), a subsequent receiving device (7), an up-down counter (8), a digital comparator (9) and a pulse counter (10); wherein the clock source (2) is connected with the clock generator (3), and the signal is transmitted from the clock source (2) to the clock generator (3); the clock signal CLK output by the clock generator (3) is transmitted to the analog-to-digital converter (5), the up-down counter (8) and the digital comparator (9) respectively; the terahertz signal source (4), the analog-to-digital converter (5), the data transceiver controller (6) and the subsequent receiving device (7) are connected in sequence, and the signal transmission is carried out in this order; the pulse encoder (1), the pulse counter (10), the digital comparator (9), the up-down counter (8), the data transceiver controller (6) are connected in sequence, and the signal transmission is carried out in this order.

7. The high-speed terahertz signal position super-resolution acquisition system of claim 6, wherein, The pulse encoder (1) is used for obtaining angle position information and sending to the pulse counter (10), the pulse counter (10) is used for counting the position pulse signal of the encoder (1), obtaining the count value P, and finally transmitting the count value data P representing the position to the digital comparator (9) in real time; the digital comparator (9) is used for comparing the count value P sent by the pulse counter (10), that is, the real-time position data and the position matching value P preset in it c The clock source (2) is used for generating a fixed digital clock signal and sending to the clock generator (3), the clock generator (3) generates three clock signals CLK with the same frequency and phase synchronization, and transmits to the analog-to-digital converter (5), the same direction counter (8) and the digital comparator (9) respectively; the analog-to-digital converter (5) converts the analog signal into digital signal by voltage successive approximation or capacitor array comparison, and then sends the obtained digital signal to the data transceiver controller (6); the same direction counter (8) counts under the drive of the clock generator (3), and transmits the count value trigger signal T to the data transceiver controller (6); the data transceiver controller (6) receives the digital signal data output by the analog-to-digital converter (5), and then sends to the subsequent receiving device (7); the subsequent receiving device (7) displays the data transmitted by the data transceiver controller (6), and obtains the target terahertz signal waveform.

8. The high-speed terahertz signal position super-resolution acquisition system of claim 6, wherein, The pulse encoder (1) is a quadrature, pulse incremental rotary encoder with zero position output. The clock source (2) is a crystal oscillator, including a passive piezoelectric crystal oscillator, a common active crystal oscillator, a temperature compensated oscillator or a furnace controlled oscillator; The clock generator (3) is a phase-locked loop clock generator; The data transceiver controller (6), the same direction counter (8), the digital comparator (9) and the pulse counter (10) are all realized by a digital programmable gate array FPGA. The subsequent receiving device (7) is realized by using various types of electronic computers with display function.

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