Data writing method, system, electronic device and storage medium

Abstract

The present application relates to a data writing method, system, electronic device and storage medium. The method includes: receiving a data writing request, the data writing request includes a controller identifier; determining the controller corresponding to the controller identifier as the main controller, and determining other controllers as slave controllers, the main controller includes a main cache module, and the slave controller includes a slave cache module; obtaining the data to be written and sending it to the main controller; in response to receiving a data mirroring request from the slave controller, creating a task queue and saving the data mirroring request, and at the same time controlling the slave controller to send a response message to the main controller; based on the response message, controlling the main controller to write the data to be written into the main cache module, and at the same time controlling the slave controller to write the data to be written into the slave cache module based on the task queue; in response to the main controller and the slave controller successfully writing, determining that the data write request response is completed. The use of this method can make full use of controller resources and reduce data access latency.

Description

Technical Field

[0001] The present application relates to the technical field of data caching, and in particular to a data writing method, system, electronic device and storage medium. Background Art

[0002] With the advent of the big data era and the rapid development of various applications, data storage systems are becoming increasingly indispensable to economic and social development. The advent of the big data era also brings huge challenges to the design of data storage systems, such as how to ensure data security.

[0003] To ensure data security, data storage systems incorporate data caching technology. This technology caches application data in memory. Because cached data is never written to physical storage media, a sudden power failure in the system will inevitably result in cached data loss if emergency protection measures are not implemented.

[0004] Currently, in order to avoid the loss of cached data, such as Figure 1 As shown, when controller 1 receives a data write request, it first saves the cache data to the cache module of controller 2 through the communication module. In response to the message received through the communication module that the cache data in controller 2 is successfully written, controller 1 then writes the cache data to the cache module of controller 1, resulting in a longer data access time.

[0005] Furthermore, in a storage system with multiple controllers, since it is physically composed of multiple dual-controller storages, cache mirroring is currently commonly used between the dual-controller storages. In this case, only one controller can fail at a time. However, because the dual-controller storages are integrated, the probability of simultaneous failure is very high. If both controllers of the same dual-controller storage fail at the same time, cache data will be lost, reducing the utilization of controller resources.

[0006] Therefore, there is an urgent need to propose a data writing method, system, electronic device and storage medium that can fully utilize controller resources and reduce data access latency. Summary of the Invention

[0007] Based on this, it is necessary to provide a data writing method, system, electronic device and storage medium that can fully utilize controller resources and reduce data access latency to address the above technical problems.

[0008] In a first aspect, a data writing method is provided, the method comprising:

[0009] receiving a data write request, wherein the data write request includes a controller identifier;

[0010] Determine the controller corresponding to the controller identifier as a master controller, and determine the other controllers as slave controllers, wherein the master controller includes a master cache module, and the slave controllers include slave cache modules;

[0011] Acquire the data to be written according to the data write request, and send the data to be written to the main controller;

[0012] In response to the slave controller receiving a data mirroring request sent by the master controller, creating a task queue, converting the data mirroring request into a mirroring task and storing it in the task queue, and controlling the slave controller to send a response message to the master controller, wherein the data mirroring request includes the data to be written;

[0013] Controlling the master controller to write the data to be written into the master cache module based on the response message, and controlling the slave controller to write the data to be written into the slave cache module based on the task queue;

[0014] In response to the master controller and the slave controller writing successfully, it is determined that the data write request response is completed.

[0015] In one embodiment, the data to be written is cache data, and the method further includes: controlling the master controller to write the data to be written into the master cache module based on the response message, and controlling the slave controller to write the data to be written into the slave cache module based on the task queue.

[0016] Determine a minimum unit of memory size occupied by cache data, and divide the primary cache module and the secondary cache module according to the minimum unit, wherein the minimum unit is a cache block;

[0017] Sorting the cache blocks in the primary cache module and the secondary cache module according to the amount of cached data;

[0018] The cache data is written into the primary cache module starting from the side with the largest cache data amount, and the cache data is synchronized into the secondary cache module starting from the side with the smallest cache data amount.

[0019] In one embodiment, the data mirroring request includes a target offset address, and controlling the master controller to write the to-be-written data into the master cache module based on the response message, and controlling the slave controller to write the to-be-written data into the slave cache module based on the task queue, comprises:

[0020] Allocating offset addresses to cache blocks in the primary cache module and the secondary cache module;

[0021] Based on the correspondence between the offset address and the cache block, obtaining a first target cache block in the primary cache module according to the target offset address matching, and obtaining a second target cache block in the secondary cache module according to the target offset address matching;

[0022] The master controller is controlled to write the data to be written into the first target cache block, and the slave controller is controlled to write the data to be written into the second target cache block.

[0023] In one embodiment, before controlling the master controller to write the to-be-written data into the master cache module based on the response message and controlling the slave controller to write the to-be-written data into the slave cache module based on the task queue, the method further includes:

[0024] Sequentially numbering the cache blocks in the slave cache module;

[0025] The step of creating a task queue and converting the data mirroring request into a mirroring task and storing the mirroring task in the task queue includes:

[0026] Create M task queues and number the M task queues in sequence, where the value of M is the number of threads used to process the mirroring task;

[0027] Based on the correspondence between the offset address and the cache block, and the correspondence between the cache block and the cache block number, determining the number of the target cache block according to the target offset address;

[0028] The number of the target cache block is modulo M to obtain the number of the target task queue;

[0029] Based on the correspondence between the task queue and the task queue number, the to-be-written data is saved in the target task queue according to the number of the target task queue.

[0030] In one embodiment, controlling the master controller to write the to-be-written data into the master cache module based on the response message, and controlling the master controller to write the to-be-written data into the slave cache module based on the task queue, includes:

[0031] In response to the master controller receiving a response message sent by the slave controller, controlling the master controller to write the to-be-written data into the first target cache block and establish first cache index information, wherein the first cache index information points to the to-be-written data in the first target cache block;

[0032] At the same time, based on the M threads for processing the mirroring task, polling the corresponding M task queues to determine whether the mirroring task exists in the M task queues;

[0033] In response to the mirror task not existing in the M task queues, exiting the current polling;

[0034] In response to the presence of the mirror task in the M task queues, sending the mirror task to the slave controller;

[0035] Based on the mirroring task, the slave controller is controlled to write the data to be written into the second target cache block and establish second cache index information, wherein the second cache index information points to the data to be written in the second target cache block.

[0036] In one embodiment, the method further comprises:

[0037] Dividing the primary cache module into a first upper cache module and a first lower cache module, and dividing the secondary cache module into a second upper cache module and a second lower cache module;

[0038] Controlling the main controller to write the data write request into the first upper-layer cache module, and writing the to-be-written data into the first lower-layer cache module;

[0039] Controlling the main controller to generate first cache index information, and saving the first cache index information to the first lower-layer cache module, wherein the first cache index information points to the data to be written;

[0040] Generate mirror data corresponding to the data write request in the first upper cache module, and control the slave controller to write the mirror data corresponding to the data write request into the second upper cache module;

[0041] Generate mirror data corresponding to the first cache index information in the first lower cache module, and control the slave controller to write the mirror data corresponding to the first cache index information into the second lower cache module.

[0042] In one embodiment, in response to the master controller and the slave controller successfully writing, after determining that the data write request response is completed, the method further includes:

[0043] Performing periodic detection on the main controller to obtain detection results;

[0044] determining whether the main controller fails according to the detection result;

[0045] In response to a failure of the master controller, generating a first fault signal, and sending the first fault signal to a takeover controller according to a preset rule, wherein the takeover controller belongs to the slave controllers, and the preset rule controls the election of the takeover controller among the slave controllers;

[0046] Creating a waiting queue and saving the pending data write request in the waiting queue, wherein the priority of the task queue is higher than the priority of the waiting queue;

[0047] Polling the task queue and determining whether there is a pending mirroring task in the task queue;

[0048] In response to the presence of pending mirroring tasks in the task queue, controlling the takeover controller to sequentially write the to-be-written data corresponding to the pending mirroring tasks into the cache module of the takeover controller;

[0049] In response to the absence of pending mirror tasks in the task queue, the corresponding data to be written is obtained according to the pending data write request, and the takeover controller is controlled to write the data to be written corresponding to the data write request into the cache module of the takeover controller; in response to the takeover controller successfully writing, it is determined that the response to the pending data write request is completed.

[0050] In a second aspect, a data writing system is provided, the system comprising a master controller and a slave controller, the master controller comprising a master cache module and a master communication module, the slave controller comprising a slave cache module and a slave communication module,

[0051] The first end of the master communication module is connected to the master cache module, and the second end of the master communication module is connected to the first end of the slave communication module;

[0052] The second end of the slave communication module is connected to the slave cache module.

[0053] In a third aspect, an electronic device is provided, comprising one or more processors; and a memory associated with the one or more processors, the memory being used to store program instructions, which, when read and executed by the one or more processors, execute the steps of the method described in any one of the first aspects above.

[0054] In a fourth aspect, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the steps of the method described in any one of the above-mentioned first aspects are performed.

[0055] In a fifth aspect, a computer program product is provided, comprising a computer program, which, when executed by a processor, implements the steps of the method described in any one of the first aspects above.

[0056] The above-mentioned data writing method, system, electronic device and storage medium determine the main controller according to the controller identifier in the data writing request, and determine other controllers as slave controllers, thereby fully utilizing the controller resources; by creating a task queue, the mirroring task is placed in the background for processing, thereby reducing the response time of the data access request. BRIEF DESCRIPTION OF THE DRAWINGS

[0057] Figure 1 A data interaction flow chart of the data writing system in the background technology;

[0058] Figure 2 1 is a flow chart of a data writing method according to an embodiment;

[0059] Figure 3 A schematic diagram of allocation of mirroring tasks in a task queue in one embodiment;

[0060] Figure 4 This is a data interaction flow chart for the data writing system in this application;

[0061] Figure 5 is a structural block diagram of a data writing device in one embodiment;

[0062] Figure 6 FIG. 1 is a diagram showing the internal structure of an electronic device in one embodiment. DETAILED DESCRIPTION

[0063] In order to make the purpose, technical solutions and advantages of this application more clear, the following further describes this application in detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain this application and are not intended to limit this application.

[0064] Example 1

[0065] In one embodiment, Figure 2 As shown, a data writing method is provided, the method comprising:

[0066] receiving a data write request, wherein the data write request includes a controller identifier;

[0067] Determine the controller corresponding to the controller identifier as a master controller, and determine the other controllers as slave controllers, wherein the master controller includes a master cache module, and the slave controllers include slave cache modules;

[0068] Acquire the data to be written according to the data write request, and send the data to be written to the main controller;

[0069] In response to the slave controller receiving a data mirroring request sent by the master controller, creating a task queue, converting the data mirroring request into a mirroring task and storing it in the task queue, and controlling the slave controller to send a response message to the master controller, wherein the data mirroring request includes the data to be written;

[0070] Controlling the master controller to write the data to be written into the master cache module based on the response message, and controlling the slave controller to write the data to be written into the slave cache module based on the task queue;

[0071] In response to the master controller and the slave controller writing successfully, it is determined that the data write request response is completed.

[0072] Specifically, the master controller is determined according to the controller identifier in the data write request, and other controllers are determined as slave controllers, which fully utilizes the controller resources; by creating a task queue, the mirroring task is put into background processing, which reduces the response time of the data access request.

[0073] In one embodiment, the data to be written is cache data, and the method further includes: controlling the master controller to write the data to be written into the master cache module based on the response message, and controlling the slave controller to write the data to be written into the slave cache module based on the task queue.

[0074] Determine a minimum unit of memory size occupied by cache data, and divide the primary cache module and the secondary cache module according to the minimum unit, wherein the minimum unit is a cache block;

[0075] Sorting the cache blocks in the primary cache module and the secondary cache module according to the amount of cached data;

[0076] The cache data is written into the primary cache module starting from the side with the largest cache data amount, and the cache data is synchronized into the secondary cache module starting from the side with the smallest cache data amount.

[0077] Specifically, the cache module is divided into the smallest units, and the cache data is written into the main cache module starting from the side with the largest cache data volume, and the cache data is synchronized to the slave cache module starting from the side with the smallest cache data volume, which effectively improves the processing efficiency of the storage system and improves the reliability of the storage system from multiple dimensions.

[0078] In one embodiment, the data mirroring request includes a target offset address, and controlling the master controller to write the to-be-written data into the master cache module based on the response message, and controlling the slave controller to write the to-be-written data into the slave cache module based on the task queue, comprises:

[0079] Allocating offset addresses to cache blocks in the primary cache module and the secondary cache module;

[0080] Based on the correspondence between the offset address and the cache block, obtaining a first target cache block in the primary cache module according to the target offset address matching, and obtaining a second target cache block in the secondary cache module according to the target offset address matching;

[0081] The master controller is controlled to write the data to be written into the first target cache block, and the slave controller is controlled to write the data to be written into the second target cache block.

[0082] In one embodiment, before controlling the master controller to write the to-be-written data into the master cache module based on the response message and controlling the slave controller to write the to-be-written data into the slave cache module based on the task queue, the method further includes:

[0083] Sequentially numbering the cache blocks in the slave cache module;

[0084] The corresponding relationship between the task queue and the mirror task is as follows Figure 3 As shown, creating a task queue and converting the data mirroring request into a mirroring task and storing it in the task queue includes:

[0085] Create M task queues and number the M task queues in sequence, where the value of M is the number of threads used to process the mirroring tasks;

[0086] Based on the correspondence between the offset address and the cache block, and the correspondence between the cache block and the cache block number, determining the number of the target cache block according to the target offset address;

[0087] The number of the target cache block is modulo M to obtain the number of the target task queue;

[0088] Based on the correspondence between the task queues and the numbers of the task queues, and according to the number of the target task queue, the data to be written is saved in the target task queue.

[0089] Specifically, by creating M task queues, the cache blocks are logical volumes, that is, the data of LUN 0 is placed in queue 0, the data of LUN 1 is placed in queue 1, ..., the data of LUN m-1 is placed in queue m-1, the data of LUN m is placed in queue m, and so on, which reduces the response time of data access.

[0090] In one embodiment, controlling the master controller to write the to-be-written data into the master cache module based on the response message, and controlling the master controller to write the to-be-written data into the slave cache module based on the task queue, includes:

[0091] In response to the master controller receiving a response message sent by the slave controller, controlling the master controller to write the to-be-written data into the first target cache block and establish first cache index information, wherein the first cache index information points to the to-be-written data in the first target cache block;

[0092] At the same time, based on the M threads for processing the mirroring task, polling the corresponding M task queues to determine whether the mirroring task exists in the M task queues;

[0093] In response to the mirror task not existing in the M task queues, exiting the current polling;

[0094] In response to the presence of the mirror task in the M task queues, sending the mirror task to the slave controller;

[0095] Based on the mirroring task, the slave controller is controlled to write the data to be written into the second target cache block and establish second cache index information, wherein the second cache index information points to the data to be written in the second target cache block.

[0096] In one embodiment, the method further comprises:

[0097] Dividing the primary cache module into a first upper cache module and a first lower cache module, and dividing the secondary cache module into a second upper cache module and a second lower cache module;

[0098] Controlling the main controller to write the data write request into the first upper-layer cache module, and writing the to-be-written data into the first lower-layer cache module;

[0099] Controlling the main controller to generate first cache index information, and saving the first cache index information to the first lower-layer cache module, wherein the first cache index information points to the data to be written;

[0100] Generate mirror data corresponding to the data write request in the first upper cache module, and control the slave controller to write the mirror data corresponding to the data write request into the second upper cache module;

[0101] Generate mirror data corresponding to the first cache index information in the first lower cache module, and control the slave controller to write the mirror data corresponding to the first cache index information into the second lower cache module.

[0102] Specifically, the main cache module and the slave cache module are divided into double-layer cache modules respectively. The double-layer cache module includes an upper-layer cache module for writing data write requests and a lower-layer cache module for writing cache data corresponding to the data write requests and cache index information pointing to the cache data. When the second lower-layer cache module mirrors the cache data in the first lower-layer cache module, it does not transmit the data to be written, but only transmits the cache index information. This greatly reduces the pressure on the mirror channel, reduces the amount of mirror data transmission, and improves the response speed of data access requests, thereby improving the performance of the entire system.

[0103] In one embodiment, in response to the master controller and the slave controller successfully writing, after determining that the data write request response is completed, the method further includes:

[0104] Performing periodic detection on the main controller to obtain detection results;

[0105] determining whether the main controller fails according to the detection result;

[0106] In response to a failure of the master controller, generating a first fault signal, and sending the first fault signal to a takeover controller according to a preset rule, wherein the takeover controller belongs to the slave controllers, and the preset rule controls the election of the takeover controller among the slave controllers;

[0107] Creating a waiting queue and saving the pending data write request in the waiting queue, wherein the priority of the task queue is higher than the priority of the waiting queue;

[0108] Polling the task queue and determining whether there is a pending mirroring task in the task queue;

[0109] In response to the presence of pending mirroring tasks in the task queue, controlling the takeover controller to sequentially write the to-be-written data corresponding to the pending mirroring tasks into the cache module of the takeover controller;

[0110] In response to the absence of pending mirror tasks in the task queue, the corresponding data to be written is obtained according to the pending data write request, and the takeover controller is controlled to write the data to be written corresponding to the data write request into the cache module of the takeover controller; in response to the takeover controller successfully writing, it is determined that the response to the pending data write request is completed.

[0111] Specifically, when the master controller fails, a takeover controller is selected from the slave controllers to complete the mirroring tasks in the task queue corresponding to the takeover controller first, and then process new data write requests, thereby ensuring the correctness of data access.

[0112] In one embodiment, the method further comprises:

[0113] Selecting N slave controllers as mirror controllers according to a preset rule, and sending the data mirroring request to the two mirror controllers for storage, respectively, wherein N ≥ 2, and N is an integer, and the preset rule controls each controller to serve as a mirror controller of the other controller the same number of times;

[0114] Performing periodic detection on the main controller and the mirror controller, and determining whether the main controller and the mirror controller have failed according to the detection results;

[0115] In response to a failure of the main controller, a fault signal is generated and sent to a corresponding mirror controller, so as to control the mirror controller to write the mirror image of the main controller to a back-end storage device;

[0116] In response to a failure of at least one of the mirror controllers, determining a total number of non-faulty slave controllers other than the master controller;

[0117] In response to the total number being greater than N, reselecting N slave controllers from the remaining non-faulty slave controllers other than the master controller as mirror controllers according to a preset rule, and sending the mirror image generated by the master controller to the corresponding mirror controller for storage;

[0118] In response to the total number being greater than 1 but not greater than N, all non-faulty slave controllers except the master controller are used as mirror controllers, and the mirror image generated by the master controller is sent to the corresponding mirror controller for storage.

[0119] Specifically, the mirrored data is cached in N mirrored controllers. When two controllers in a set of dual-controller storage fail, there is at least one other controller that stores the mirror image of the failed controller, which avoids the loss of cached data as much as possible, reduces the inconsistency between the back-end storage data and the input data, and has high reliability.

[0120] It should be understood that although Figure 1 The steps in the flowchart are shown in sequence as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified in this document, there is no strict order restriction for the execution of these steps, and these steps can be executed in other orders. In addition, Figure 1 At least part of the steps may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily executed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but can be executed in turn or alternately with other steps or at least part of the sub-steps or stages of other steps.

[0121] Example 2

[0122] In one embodiment, Figure 4 As shown, a data writing system is provided, the system includes a master controller and a slave controller, the master controller includes a master cache module and a master communication module, the slave controller includes a slave cache module and a slave communication module,

[0123] The first end of the master communication module is connected to the master cache module, and the second end of the master communication module is connected to the first end of the slave communication module;

[0124] The second end of the slave communication module is connected to the slave cache module.

[0125] Example 3

[0126] In one embodiment, Figure 5 As shown, a data writing device is provided, the device comprising:

[0127] A receiving module, configured to receive a data write request, wherein the data write request includes a controller identifier;

[0128] a first determining module, configured to determine a controller corresponding to the controller identifier as a master controller and to determine other controllers as slave controllers, wherein the master controller includes a master cache module and the slave controllers include slave cache modules;

[0129] an acquisition and transmission module, configured to acquire the data to be written according to the data write request and send the data to be written to the main controller;

[0130] a first creating and saving module, configured to create a task queue in response to a data mirroring request received by the slave controller from the master controller, and convert the data mirroring request into a mirroring task and save the result in the task queue;

[0131] a first control module, configured to control the slave controller to send a response message to the master controller, wherein the data mirroring request includes the data to be written;

[0132] a second control module, configured to control the master controller to write the to-be-written data into the master cache module based on the response message, and simultaneously control the slave controller to write the to-be-written data into the slave cache module based on the task queue;

[0133] The second determining module is configured to determine that the data write request response is completed in response to the master controller and the slave controller successfully writing.

[0134] In one embodiment, the data to be written is cache data, and the second control module controls the master controller to write the data to be written into the master cache module based on the response message, and controls the slave controller to write the data to be written into the slave cache module based on the task queue. The device further includes:

[0135] a third determining module, configured to determine a minimum unit of memory size occupied by cached data;

[0136] a first partitioning module, configured to partition the primary cache module and the secondary cache module according to the minimum unit, wherein the minimum unit is a cache block;

[0137] A sorting module, configured to sort the cache blocks in the primary cache module and the secondary cache module according to the amount of cached data;

[0138] The third control module is used to control the main controller to write the cache data into the main cache module starting from the side with the largest cache data amount, and synchronize the cache data to the slave cache module starting from the side with the smallest cache data amount.

[0139] In one embodiment, the data mirroring request includes a target offset address, and the second control module is configured to:

[0140] Allocating offset addresses to cache blocks in the primary cache module and the secondary cache module;

[0141] Based on the correspondence between the offset address and the cache block, obtaining a first target cache block in the primary cache module according to the target offset address matching, and obtaining a second target cache block in the secondary cache module according to the target offset address matching;

[0142] The master controller is controlled to write the data to be written into the first target cache block, and the slave controller is controlled to write the data to be written into the second target cache block.

[0143] In one embodiment, the second control module controls the master controller to write the to-be-written data into the master cache module based on the response message, and controls the slave controller to write the to-be-written data into the slave cache module based on the task queue. The device further includes:

[0144] a numbering module, configured to sequentially number the cache blocks in the slave cache module;

[0145] The creation and preservation module is used to:

[0146] Create M task queues and number the M task queues in sequence, where the value of M is the number of threads used to process the mirroring tasks;

[0147] Based on the correspondence between the offset address and the cache block, and the correspondence between the cache block and the cache block number, determining the number of the target cache block according to the target offset address;

[0148] The number of the target cache block is modulo M to obtain the number of the target task queue;

[0149] Based on the correspondence between the task queues and the numbers of the task queues, and according to the number of the target task queue, the data to be written is saved in the target task queue.

[0150] In one embodiment, the second control module is configured to:

[0151] In response to the master controller receiving a response message sent by the slave controller, controlling the master controller to write the to-be-written data into the first target cache block and establish first cache index information, wherein the first cache index information points to the to-be-written data in the first target cache block;

[0152] At the same time, based on the M threads for processing the mirroring task, polling the corresponding M task queues to determine whether the mirroring task exists in the M task queues;

[0153] In response to the mirror task not existing in the M task queues, exiting the current polling;

[0154] In response to the presence of the mirror task in the M task queues, sending the mirror task to the slave controller;

[0155] Based on the mirroring task, the slave controller is controlled to write the data to be written into the second target cache block and establish second cache index information, wherein the second cache index information points to the data to be written in the second target cache block.

[0156] In one embodiment, the apparatus further comprises:

[0157] a second partitioning module, configured to partition the primary cache module into a first upper-layer cache module and a first lower-layer cache module, and to partition the secondary cache module into a second upper-layer cache module and a second lower-layer cache module;

[0158] a fourth control module, configured to control the main controller to write the data write request into the first upper-layer cache module, and to write the to-be-written data into the first lower-layer cache module;

[0159] a fifth control module, configured to control the main controller to generate first cache index information and save the first cache index information to the first lower-layer cache module, wherein the first cache index information points to the data to be written;

[0160] a first generating and controlling module, configured to generate mirror data corresponding to a data write request in the first upper-layer cache module, and control the slave controller to write the mirror data corresponding to the data write request into the second upper-layer cache module;

[0161] The second generation and control module is used to generate mirror data corresponding to the first cache index information in the first lower cache module, and control the slave controller to write the mirror data corresponding to the first cache index information into the second lower cache module.

[0162] In one embodiment, after the second determining module determines that the data write request response is completed in response to the master controller and the slave controller successfully writing, the device further includes:

[0163] A detection module, the detection module is used to perform periodic detection on the main controller to obtain detection results;

[0164] a judgment module, configured to judge whether a fault occurs in the main controller according to the detection result;

[0165] a generation and transmission module, the generation and transmission module being configured to generate a first fault signal in response to a fault of the master controller, and to transmit the first fault signal to a takeover controller according to a preset rule, wherein the takeover controller belongs to the slave controllers, and the preset rule controls the election of the takeover controller among the slave controllers;

[0166] a second creating and saving module, the second creating and saving module being used to create a waiting queue and save the pending data write request into the waiting queue, wherein the priority of the task queue is higher than the priority of the waiting queue;

[0167] A polling and judgment module, wherein the polling and judgment module is used to poll the task queue and judge whether there is a pending mirror task in the task queue;

[0168] a sixth control module configured to, in response to the presence of pending mirroring tasks in the task queue, control the takeover controller to sequentially write the to-be-written data corresponding to the pending mirroring tasks into the cache module of the takeover controller;

[0169] an acquisition and control module, configured to, in response to the absence of a pending mirror task in the task queue, acquire corresponding to-be-written data according to the pending data write request, and control the takeover controller to write the to-be-written data corresponding to the data write request into a cache module of the takeover controller;

[0170] A fourth determining module is configured to determine that a response to the pending data write request is completed in response to a success of the write operation of the takeover controller.

[0171] For the specific definition of the data writing device, please refer to the definition of the data writing method above and will not be repeated here. Each module in the above-mentioned data writing device can be implemented in whole or in part by software, hardware, or a combination thereof. Each of the above-mentioned modules can be embedded in or independent of the processor in the electronic device in the form of hardware, or can be stored in the memory of the electronic device in the form of software, so that the processor can call and execute the operations corresponding to each of the above modules.

[0172] Example 4

[0173] In one embodiment, an electronic device is provided, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the following steps are performed:

[0174] receiving a data write request, wherein the data write request includes a controller identifier;

[0175] Determine the controller corresponding to the controller identifier as a master controller, and determine the other controllers as slave controllers, wherein the master controller includes a master cache module, and the slave controllers include slave cache modules;

[0176] Acquire the data to be written according to the data write request, and send the data to be written to the main controller;

[0177] In response to the slave controller receiving a data mirroring request sent by the master controller, creating a task queue, converting the data mirroring request into a mirroring task and storing it in the task queue, and controlling the slave controller to send a response message to the master controller, wherein the data mirroring request includes the data to be written;

[0178] Controlling the master controller to write the data to be written into the master cache module based on the response message, and controlling the slave controller to write the data to be written into the slave cache module based on the task queue;

[0179] In response to the master controller and the slave controller writing successfully, it is determined that the data write request response is completed.

[0180] When the program instructions are read and executed by the one or more processors, the program instructions may also perform operations corresponding to the various steps in the above method embodiments. Please refer to the above description and will not be repeated here. Figure 6 , which exemplarily shows the architecture of an electronic device, which may specifically include a processor 610, a video display adapter 611, a disk drive 612, an input / output interface 613, a network interface 614, and a memory 620. The processor 610, video display adapter 611, disk drive 612, input / output interface 613, network interface 614, and memory 620 may be communicatively connected via a communication bus 630.

[0181] Among them, the processor 610 can be implemented by a general-purpose central processing unit (CPU), a microprocessor, an application-specific integrated circuit (ASIC), or one or more integrated circuits, and is used to execute relevant programs to implement the technical solutions provided in this application.

[0182] The memory 620 can be implemented in the form of a read-only memory (ROM), a random access memory (RAM), a static storage device, a dynamic storage device, etc. The memory 620 can store an operating system 621 for controlling the operation of the electronic device 600, and a basic input and output system (BIOS) 622 for controlling the low-level operations of the electronic device 600. In addition, a web browser 623, a data storage management 624, and an icon font processing system 625, etc. can also be stored. The above-mentioned icon font processing system 625 can be an application program that specifically implements the operations of the aforementioned steps in the embodiment of the present application. In short, when the technical solution provided by the present application is implemented by software or firmware, the relevant program code is stored in the memory 620 and is called and executed by the processor 610.

[0183] The input / output interface 613 is used to connect to input / output modules to implement information input and output. The input / output modules can be configured as components within the device (not shown in the figure) or can be externally connected to the device to provide corresponding functions. Input devices may include a keyboard, mouse, touch screen, microphone, various sensors, etc., and output devices may include a display, speaker, vibrator, indicator light, etc.

[0184] The network interface 614 is used to connect to a communication module (not shown) to enable communication between the device and other devices. The communication module can communicate via a wired method (such as USB, network cable, etc.) or a wireless method (such as mobile network, WiFi, Bluetooth, etc.).

[0185] The bus 630 comprises a pathway for transmitting information between the various components of the device (eg, the processor 610 , the video display adapter 611 , the disk drive 612 , the input / output interface 613 , the network interface 614 , and the memory 620 ).

[0186] In addition, the electronic device 600 can also obtain information on specific collection conditions from the virtual resource object collection condition information database 641 for use in condition judgment, etc.

[0187] It should be noted that although the electronic device 600 shown above only includes a processor 610, a video display adapter 611, a disk drive 612, an input / output interface 613, a network interface 614, a memory 620, a bus 630, etc., in a specific implementation, the electronic device may also include other components necessary for normal operation. In addition, it will be understood by those skilled in the art that the above device may only include the components necessary to implement the solution of the present application, and does not necessarily include all the components shown in the figure.

[0188] Through the description of the above implementation methods, it can be seen that those skilled in the art can clearly understand that the present application can be implemented by means of software plus the necessary general hardware platform. Based on this understanding, the technical solution of the present application can be essentially or in other words, the part that contributes to the prior art can be embodied in the form of a software product, which can be stored in a storage medium such as ROM / RAM, a magnetic disk, an optical disk, etc., and includes a number of instructions for enabling an electronic device (which can be a personal computer, a cloud server, or a network device, etc.) to execute the methods described in various embodiments of the present application or certain parts of the embodiments.

[0189] Example 5

[0190] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the following steps are implemented:

[0191] receiving a data write request, wherein the data write request includes a controller identifier;

[0192] Determine the controller corresponding to the controller identifier as a master controller, and determine the other controllers as slave controllers, wherein the master controller includes a master cache module, and the slave controllers include slave cache modules;

[0193] Acquire the data to be written according to the data write request, and send the data to be written to the main controller;

[0194] In response to the slave controller receiving a data mirroring request sent by the master controller, creating a task queue, converting the data mirroring request into a mirroring task and storing it in the task queue, and controlling the slave controller to send a response message to the master controller, wherein the data mirroring request includes the data to be written;

[0195] Controlling the master controller to write the data to be written into the master cache module based on the response message, and controlling the slave controller to write the data to be written into the slave cache module based on the task queue;

[0196] In response to the master controller and the slave controller writing successfully, it is determined that the data write request response is completed.

[0197] Those skilled in the art will appreciate that all or part of the processes in the above-mentioned embodiments can be implemented by instructing the relevant hardware through a computer program. The computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in various forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM).

[0198] The technical features of the above embodiments can be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0199] The above-described embodiments merely represent several implementation methods of the present application. While the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that a person skilled in the art could make various modifications and improvements without departing from the spirit of the present application, all of which fall within the scope of protection of the present application. Therefore, the scope of protection of the present patent application shall be determined by the appended claims.

[0200] Example 6

[0201] In one embodiment, a computer program product is provided, wherein a computer program is stored on the product, and when the computer program is executed by a processor, the following steps are performed:

[0202] receiving a data write request, wherein the data write request includes a controller identifier;

[0203] Determine the controller corresponding to the controller identifier as a master controller, and determine the other controllers as slave controllers, wherein the master controller includes a master cache module, and the slave controllers include slave cache modules;

[0204] Acquire the data to be written according to the data write request, and send the data to be written to the main controller;

[0205] In response to the slave controller receiving a data mirroring request sent by the master controller, creating a task queue, converting the data mirroring request into a mirroring task and storing it in the task queue, and controlling the slave controller to send a response message to the master controller, wherein the data mirroring request includes the data to be written;

[0206] Controlling the master controller to write the data to be written into the master cache module based on the response message, and controlling the slave controller to write the data to be written into the slave cache module based on the task queue;

[0207] In response to the master controller and the slave controller writing successfully, it is determined that the data write request response is completed.

[0208] Those skilled in the art will understand that all or part of the processes in the above-mentioned embodiment methods can be implemented by instructing relevant hardware through a computer program. The computer program can be stored in a computer program product. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods.

[0209] The technical features of the above embodiments can be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0210] The above-described embodiments merely represent several implementation methods of the present application. While the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that a person skilled in the art could make various modifications and improvements without departing from the spirit of the present application, all of which fall within the scope of protection of the present application. Therefore, the scope of protection of the present patent application shall be determined by the appended claims.

Claims

1. A data writing method, characterized in that: The method comprises: receiving a data write request, wherein the data write request includes a controller identifier; Determine the controller corresponding to the controller identifier as a master controller, and determine the other controllers as slave controllers, wherein the master controller includes a master cache module, and the slave controllers include slave cache modules; Acquire the data to be written according to the data write request, and send the data to be written to the main controller; In response to the slave controller receiving a data mirroring request sent by the master controller, creating a task queue, converting the data mirroring request into a mirroring task and storing it in the task queue, and controlling the slave controller to send a response message to the master controller, wherein the data mirroring request includes the data to be written; Controlling the master controller to write the data to be written into the master cache module based on the response message, and controlling the slave controller to write the data to be written into the slave cache module based on the task queue; In response to the master controller and the slave controller writing successfully, it is determined that the data write request response is completed.

2. The method according to claim 1, characterized in that The data to be written belongs to cache data, and the method further includes: controlling the master controller to write the data to be written into the master cache module based on the response message, and controlling the slave controller to write the data to be written into the slave cache module based on the task queue. Determine a minimum unit of memory size occupied by cache data, and divide the primary cache module and the secondary cache module according to the minimum unit, wherein the minimum unit is a cache block; Sorting the cache blocks in the primary cache module and the secondary cache module according to the amount of cached data; The cache data is written into the primary cache module starting from the side with the largest cache data amount, and the cache data is synchronized into the secondary cache module starting from the side with the smallest cache data amount.

3. The method according to claim 1, characterized in that The data mirroring request includes a target offset address, and controlling the master controller to write the to-be-written data into the master cache module based on the response message, and controlling the slave controller to write the to-be-written data into the slave cache module based on the task queue, includes: Allocating offset addresses to cache blocks in the primary cache module and the secondary cache module; Based on the correspondence between the offset address and the cache block, obtaining a first target cache block in the primary cache module according to the target offset address matching, and obtaining a second target cache block in the secondary cache module according to the target offset address matching; The master controller is controlled to write the data to be written into the first target cache block, and the slave controller is controlled to write the data to be written into the second target cache block.

4. The method according to claim 3, characterized in that The method further includes: controlling the master controller to write the to-be-written data into the master cache module based on the response message, and controlling the slave controller to write the to-be-written data into the slave cache module based on the task queue. Sequentially numbering the cache blocks in the slave cache module; The step of creating a task queue and converting the data mirroring request into a mirroring task and storing the mirroring task in the task queue includes: Create M task queues and number the M task queues in sequence, where the value of M is the number of threads used to process the mirroring tasks; Based on the correspondence between the offset address and the cache block, and the correspondence between the cache block and the cache block number, determining the number of the target cache block according to the target offset address; The number of the target cache block is modulo M to obtain the number of the target task queue; Based on the correspondence between the task queues and the numbers of the task queues, and according to the number of the target task queue, the data to be written is saved in the target task queue.

5. The method according to claim 4, characterized in that: The controlling the main controller to write the to-be-written data into the main cache module based on the response message, and simultaneously controlling the main controller to write the to-be-written data into the slave cache module based on the task queue, includes: In response to the master controller receiving a response message sent by the slave controller, controlling the master controller to write the to-be-written data into the first target cache block and establish first cache index information, wherein the first cache index information points to the to-be-written data in the first target cache block; At the same time, based on the M threads for processing the mirroring task, polling the corresponding M task queues to determine whether the mirroring task exists in the M task queues; In response to the mirror task not existing in the M task queues, exiting the current polling; In response to the presence of the mirror task in the M task queues, sending the mirror task to the slave controller; Based on the mirroring task, the slave controller is controlled to write the data to be written into the second target cache block and establish second cache index information, wherein the second cache index information points to the data to be written in the second target cache block.

6. The method according to claim 1, characterized in that The method further comprises: Dividing the primary cache module into a first upper cache module and a first lower cache module, and dividing the secondary cache module into a second upper cache module and a second lower cache module; Controlling the main controller to write the data write request into the first upper-layer cache module, and writing the to-be-written data into the first lower-layer cache module; Controlling the main controller to generate first cache index information, and saving the first cache index information to the first lower-layer cache module, wherein the first cache index information points to the data to be written; Generate mirror data corresponding to the data write request in the first upper cache module, and control the slave controller to write the mirror data corresponding to the data write request into the second upper cache module; Generate mirror data corresponding to the first cache index information in the first lower cache module, and control the slave controller to write the mirror data corresponding to the first cache index information into the second lower cache module.

7. The method according to claim 1, characterized in that: In response to the master controller and the slave controller successfully writing, after determining that the data write request response is completed, the method further includes: Performing periodic detection on the main controller to obtain detection results; determining whether the main controller fails according to the detection result; In response to a failure of the master controller, generating a first fault signal, and sending the first fault signal to a takeover controller according to a preset rule, wherein the takeover controller belongs to the slave controllers, and the preset rule controls the election of the takeover controller among the slave controllers; Creating a waiting queue and saving the pending data write request in the waiting queue, wherein the priority of the task queue is higher than the priority of the waiting queue; Polling the task queue and determining whether there is a pending mirroring task in the task queue; In response to the presence of pending mirroring tasks in the task queue, controlling the takeover controller to sequentially write the to-be-written data corresponding to the pending mirroring tasks into the cache module of the takeover controller; In response to the absence of pending mirror tasks in the task queue, the corresponding data to be written is obtained according to the pending data write request, and the takeover controller is controlled to write the data to be written corresponding to the data write request into the cache module of the takeover controller; in response to the takeover controller successfully writing, it is determined that the response to the pending data write request is completed.

8. A data writing system, characterized in that: The system includes a master controller and a slave controller, wherein the master controller includes a master cache module and a master communication module, and the slave controller includes a slave cache module and a slave communication module. The first end of the master communication module is connected to the master cache module, and the second end of the master communication module is connected to the first end of the slave communication module; The second end of the slave communication module is connected to the slave cache module.

9. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 7 are implemented.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 7 are implemented.

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