A wafer defect detection method based on super-resolution guided Fourier attention network

Abstract

The present invention belongs to the technical field of wafer defect detection, and discloses a wafer defect detection method based on a super-resolution guided Fourier attention network, including: obtaining a wafer image; constructing a basic target detection model, the basic target detection model includes a feature extraction module and a classification prediction module connected in sequence; using the basic target detection model as a student model; introducing a deep super-resolution network and a Fourier attention mechanism in the feature extraction module of the basic target detection model as a teacher model; inputting the wafer image into the teacher model and the student model, guiding the training of the student model based on the output of the teacher model, and obtaining a trained student model; classifying and predicting the wafer image to be detected based on the trained student model, and obtaining the defect type and corresponding position of the wafer image to be detected. The technical solution described in the present invention can improve the detection efficiency and accuracy of nano-scale wafer defects.

Description

Technical Field

[0001] The present invention belongs to the technical field of wafer defect detection, and in particular relates to a wafer defect detection method based on a super-resolution guided Fourier attention network. Background Art

[0002] As the semiconductor industry continues to advance to higher process nodes, wafer defect detection faces unprecedented challenges. Tiny defects on wafers, such as particles and pits, are small but enough to affect device performance and even cause product failure. In severe cases, they can interrupt the production line. Currently, optical inspection technology dominates defect detection on patterned wafers due to its high efficiency and non-destructive nature, especially bright field inspection technology, which can meet the production needs of high capacity and high throughput. However, optical inspection exposes its limitations when faced with nanoscale defects, especially the image blur caused by optical diffraction effects, which makes clear imaging of nanoscale defects extremely difficult.

[0003] Traditional optical inspection methods, such as die-to-die comparison and die-to-database comparison, can identify low-resolution defects, but they have problems such as systematic errors and reliance on manually designed feature engineering, making it difficult to achieve both high-speed inspection and high-precision identification. Summary of the invention

[0004] The purpose of the present invention is to provide a wafer defect detection method based on a super-resolution guided Fourier attention network to solve the problems existing in the above-mentioned prior art.

[0005] To achieve the above object, the present invention provides a wafer defect detection method based on a super-resolution guided Fourier attention network, comprising:

[0006] Acquire wafer images;

[0007] Constructing a basic target detection model, wherein the basic target detection model includes a feature extraction module and a classification prediction module connected in sequence;

[0008] Using the basic object detection model as a student model;

[0009] Introducing a deep super-resolution network and a Fourier attention mechanism as a teacher model in the feature extraction module of the basic object detection model;

[0010] Inputting the wafer image into the teacher model and the student model, guiding the training of the student model based on the output of the teacher model, and obtaining a trained student model;

[0011] Based on the trained student model, the wafer image to be inspected is classified and predicted to obtain the defect type and corresponding position of the wafer image to be inspected.

[0012] Optionally, the basic target detection model adopts a YOLOv5s network.

[0013] Optionally, the training process of the teacher model specifically includes:

[0014] The wafer image is input into the teacher model for classification prediction, and is trained according to the target loss function to obtain a trained teacher model.

[0015] Optionally, the target loss function includes a position loss function, a target loss function, a category loss function and a super-resolution branch loss function.

[0016] Optionally, the processing process of the teacher model specifically includes:

[0017] Inputting the wafer image into the feature extraction module, performing feature extraction on the wafer image based on the Fourier attention mechanism, and obtaining a feature map with frequency domain weights;

[0018] Based on the deep super-resolution network, shallow features and deep features of the feature map are fused and deconvolved to obtain a high-resolution feature image;

[0019] Defect detection is performed on the high-resolution feature image based on the classification prediction module to obtain the defect type and corresponding position of the wafer image.

[0020] Optionally, guiding the training of the student model based on the output of the teacher model to obtain a trained student model specifically includes:

[0021] Calculate the distillation loss of the teacher model and the student model based on the MSELoss function;

[0022] Constructing a total loss function of the student model according to the distillation loss;

[0023] The student model is trained based on the wafer image and the total loss function, the weight parameters in the loss function are adjusted, and the student model parameters are optimized through a back propagation algorithm to obtain a trained student model.

[0024] Optionally, the distillation loss of the teacher model and the student model is calculated based on the MSELoss function. The specific calculation formula is:

[0025] ;

[0026] In the formula, is the distillation loss, is the position loss of the teacher model, is the position loss of the student model, The target loss of the teacher model, is the target loss of the student model, The class loss of the teacher model, is the class loss of the student model.

[0027] Optionally, the total loss function of the student model is:

[0028] ;

[0029] In the formula, is the total loss function, is the distillation loss, To detect the loss, including position loss, target loss and category loss, Super-resolution branch loss, α, β, and γ are the weight parameters of the corresponding loss terms.

[0030] The technical effects of the present invention are:

[0031] The present invention significantly improves the detection efficiency and accuracy of nano-scale wafer defects under low-resolution input conditions. The present invention reduces the dependence on large amounts of labeled data and high computing resources and is suitable for deployment in actual production environments. The present invention achieves a balance between high-precision detection and lightweight models and meets the needs of real-time monitoring and online defect identification in large-scale, high-speed semiconductor production environments. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0033] The drawings constituting a part of the present application are used to provide a further understanding of the present application. The illustrative embodiments and descriptions of the present application are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0034] Figure 1 A schematic diagram of a framework of a Fourier attention guided wafer defect detection network with a super-resolution branch in an embodiment of the present invention;

[0035] Figure 2 A diagram of the backbone network structure in an embodiment of the present invention;

[0036] Figure 3 A structural diagram of the Fourier attention module in an embodiment of the present invention;

[0037] Figure 4A diagram of the super-resolution auxiliary branch structure in an embodiment of the present invention;

[0038] Figure 5 A schematic diagram of bright field wafer defect sample detection results in an embodiment of the present invention;

[0039] Figure 6 Wafer defect detection flow chart in an embodiment of the present invention. DETAILED DESCRIPTION

[0040] Various exemplary embodiments of the present invention will now be described in detail. This detailed description should not be considered as limiting the present invention, but should be understood as a more detailed description of certain aspects, features, and embodiments of the present invention.

[0041] It should be understood that the terms described in the present invention are only for describing special embodiments and are not intended to limit the present invention. In addition, for the numerical range in the present invention, it should be understood that each intermediate value between the upper and lower limits of the scope is also specifically disclosed. Each smaller range between the intermediate value in any stated value or stated range and any other stated value or intermediate value in the described range is also included in the present invention. The upper and lower limits of these smaller ranges can be independently included or excluded in the scope.

[0042] Unless otherwise indicated, all technical and scientific terms used herein have the same meanings as those of ordinary skill in the art generally understood by the present invention. Although the present invention describes only preferred methods, any method similar or equivalent to that described herein may also be used in the implementation or testing of the present invention. All documents mentioned in this specification are incorporated by reference to disclose and describe the methods related to the documents. In the event of a conflict with any incorporated document, the content of this specification shall prevail.

[0043] It will be apparent to those skilled in the art that various modifications and variations may be made to the specific embodiments of the present invention description without departing from the scope or spirit of the present invention. Other embodiments derived from the present invention description will be apparent to those skilled in the art. The present application description and examples are exemplary only.

[0044] The words “include,” “including,” “have,” “contain,” etc. used in this article are open-ended terms, meaning including but not limited to.

[0045] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present application can be combined with each other. The present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0046] Embodiment 1

[0047] like Figure 1 - Figure 6As shown, in this embodiment, a wafer defect detection method based on a super-resolution guided Fourier attention network is provided, including: acquiring a wafer image; constructing a basic target detection model, the basic target detection model including a feature extraction module and a classification prediction module connected in sequence; using the basic target detection model as a student model; introducing a deep super-resolution network and a Fourier attention mechanism into the feature extraction module of the basic target detection model as a teacher model; inputting the wafer image into the teacher model and the student model, guiding the training of the student model based on the output of the teacher model, and obtaining a trained student model; classifying and predicting the wafer image to be detected based on the trained student model, and obtaining the defect type and corresponding position of the wafer image to be detected.

[0048] This embodiment proposes a Fourier attention detection network called super-resolution branch-guided (SR-FABNet) to improve the efficiency and accuracy of optical detection of nanoscale patterned wafer defects, especially under low-resolution input conditions, so that the model can accurately and quickly identify and locate tiny defects inside complex patterns. This embodiment realizes the integration of efficient positioning and classification of optical wafer defect detection, specifically including: introducing auxiliary super-resolution branches within the defect detection framework, which not only improves the upper limit of detection performance under limited conditions, but also provides a more flexible method for in-depth research on high-resolution feature representation under low-resolution input; a Fourier attention module is creatively designed, which introduces the frequency domain perspective into the field of wafer defect detection for the first time, and significantly improves the detection accuracy by learning the defect features in periodic structural patterns.

[0049] The backbone network of this embodiment is based on the YOLOv5s model, integrates the CSPNet structure for feature extraction, and combines the spatial pyramid pooling (SPP) module to adapt to the detection of objects of different scales. The network of this embodiment is suitable for high-speed, large-scale semiconductor production environments to achieve real-time online wafer defect detection and classification. The network of this embodiment is particularly optimized for efficient identification and positioning of nanoscale wafer defects, and can maintain high detection accuracy even under low-resolution input conditions. The network of this embodiment achieves an effective balance between detection speed and accuracy by utilizing knowledge distillation in the inference stage. The Fourier attention block (FAB) added to the backbone network of the network of this embodiment can enhance the model's learning of defect features in periodic structural patterns and improve detection accuracy. The network of this embodiment provides a flexible method for studying high-resolution feature representation in detection problems by introducing super-resolution branches under low-resolution input, thereby improving the upper limit of detection performance.

[0050] In order to solve the challenges faced by high-precision wafer defect detection, especially the technical problem of limited detection efficiency and accuracy of nano-level defects in low-resolution images, this embodiment proposes a super-resolution branch-guided Fourier attention detection network (SR-FABNet), which can significantly improve the detection capability and classification accuracy of nano-level wafer defects.

[0051] To achieve the above objectives, this embodiment provides a method for constructing and training an SR-FABNet, comprising the following steps:

[0052] 1. Obtain training data: Collect an image dataset containing wafer defects and divide it into a training set and a validation set in proportion.

[0053] 2. Frequency domain feature enhancement: The Fourier attention module (FAB) is used to preprocess the training set images, enhance the input images by extracting the frequency domain features of the images, and use the prior knowledge of frequency domain features to improve the sensitivity of the detection model to defects in periodic structures.

[0054] 3. Super-resolution auxiliary branch integration: A super-resolution auxiliary branch is integrated into the backbone network, which generates a high-resolution image using a low-resolution input image to enhance feature extraction and detection performance.

[0055] 4. Knowledge distillation and model training: Construct the teacher model and the student model, guide the learning of the student model through knowledge distillation technology, and achieve detection performance similar to that of the teacher model at a lower computational cost. Define the loss function, including detection loss, super-resolution loss, and distillation loss, and balance different loss items by adjusting the weight parameters.

[0056] 5. Model evaluation and optimization: Evaluate the detection performance of SR-FABNet on the validation set, and optimize the model by adjusting network parameters and hyperparameters until the expected detection accuracy and efficiency are achieved.

[0057] The key steps are as follows:

[0058] a) Feature extraction and Fourier attention mechanism: At the feature extraction level, the specific network structure is as follows Figure 2 As shown, this embodiment uses the CSPNet architecture as the basis, combining the convolution-batch-normalization-SiLU (CBS) components and the cross-stage part (CSP) module to reduce the computational complexity in an efficient way. However, the innovation of this embodiment is that a layer of Fourier attention module (FAB) is introduced before the SPP (spatial pyramid pooling) module for the first time. This design aims to make the network pay more attention to the frequency characteristic area, thereby improving the accuracy and performance of target detection.

[0059] like Figure 3As shown in Figure 2, the Fourier Attention Module (FAB) works as follows:

[0060] 1. Spatial domain information extraction: The input feature map is passed through a 3×3 convolution, and then the spatial domain information is extracted through a Gelu activation layer.

[0061] 2. Frequency domain information extraction: Next, use Fourier transform to extract frequency domain information, then change the number of channels through 1×1 convolution, and use ReLU as the activation function.

[0062] 3. Global understanding and weight distribution: The feature map is compressed through global average pooling to obtain a global understanding of each channel. After global average pooling of frequency domain information, the weight of each channel is obtained through the Sigmoid activation function to ensure that the layers with greater network contributions have greater weights.

[0063] 4. Feature map fusion: Multiply the frequency domain feature weights with the spatial feature map and adaptively assign them to the spatial feature map. Finally, add the feature map with frequency domain weights to the input feature map of the block to further fuse more feature information.

[0064] b) Construction of super-resolution auxiliary branch: In order to overcome the challenges brought by low-resolution image input, this embodiment designs a super-resolution auxiliary branch (SR), which is closely integrated with the backbone network to extract high-resolution (HR) information while keeping the model inference speed unaffected. The specific construction process of the super-resolution auxiliary branch (SR) is as follows:

[0065] 1. Feature fusion: such as Figure 4 As shown in Fig. 2, shallow features (S) and deep features (D) are fused from the backbone network. The shallow features capture local texture patterns, while the deep features are responsible for extracting semantic information. The selection of D and S layers is as follows: Figure 2 As shown, in this embodiment, the results obtained after the second and third layers of convolution-batch processing-normalization-SiLU (CBS) are selected as shallow features (S) and deep features (D), respectively.

[0066] 2. Encoder-Decoder Model: The encoder integrates the low-level (S) and high-level features (D) generated in the backbone. For deep features, this embodiment uses deconvolution operations to match the spatial dimensions of shallow features. Subsequently, a concatenation operation and two convolution and ReLU modules are used to merge the low-level and high-level features.

[0067] 3. High-resolution feature enhancement: In the decoder stage, low-resolution features are promoted to high-resolution space, and the output size of the SR module is twice the size of the input image. The design of the decoder draws on the enhanced deep super-resolution (EDSR) network to perform this promotion process.

[0068] c) Knowledge distillation and loss function design: In wafer defect detection, this embodiment adopts a knowledge distillation strategy, using a large teacher model to guide the training of the student model to reduce model complexity and computational cost while maintaining high detection accuracy.

[0069] Detection branch loss function design:

[0070] Position loss: used to determine the accuracy of the bounding box of the object.

[0071] Target loss: Ensures that the model can correctly predict the presence or absence of an object.

[0072] Category loss: used to classify which category the target belongs to.

[0073] The detection branch loss function of the teacher model can be expressed as:

[0074] ;

[0075] in, , , are the weight hyperparameters of the respective losses.

[0076] Super-resolution branch loss function design:

[0077] ;

[0078] in, represents the SR branch loss in the teacher model, n represents the number of categories, is the low-resolution input image, is the reconstructed high-resolution image.

[0079] The total loss of the teacher model is the sum of the losses of the two branches:

[0080] ;

[0081] The feature extraction is performed by compressing the number of channels, so that the student model can learn the feature representation of the complex teacher model. In order to simplify the model, the SR branch is discarded in the student model, and the detection loss of the student model is:

[0082] ;

[0083] Similarly, where represents the loss of detecting branches in the student network, They represent position loss, target loss and category loss respectively.

[0084] In order to let the teacher model guide the student model through the distillation loss, three losses (position loss, target loss and category loss) are calculated using MSELoss, and then the distillation loss is the sum of these three parts;

[0085] ;

[0086] The final loss function of the student model for inference is:

[0087] ;

[0088] Among them, α, β, and γ are weighted parameters of the corresponding loss terms, which are used to balance the relative importance of different loss terms in the overall optimization goal. These weighted coefficients need to be determined through hyperparameter adjustment to achieve the best performance balance between loss terms.

[0089] Through the above in-depth analysis, the SR-FABNet proposed in this embodiment can significantly improve the detection efficiency and accuracy of nano-scale wafer defects under low-resolution input conditions. This embodiment reduces the dependence on large amounts of labeled data and high computing resources, and is suitable for deployment in actual production environments. This embodiment achieves a balance between high-precision detection and model lightweighting, meeting the needs of real-time monitoring and online defect identification in large-scale, high-speed semiconductor production environments.

[0090] The following is a specific algorithm example of this embodiment:

[0091] 1. Build the SR-FABNet network;

[0092] (1) Initialization of the backbone network and detection head: YOLOv5s is used as the basic network, which consists of a backbone network and a detection head. The backbone network is responsible for extracting features, and the detection head is used to predict the location and category of the target. The backbone network uses the CSPNet structure, including CBS components and CSP modules, to efficiently extract features and reduce computational complexity.

[0093] (2) Fourier Attention Module (FAB) Integration: A Fourier Attention Module is introduced before the SPP module. The spatial domain information is extracted through a 3×3 convolution layer, followed by a Fourier transform to extract the frequency domain information. The number of channels is changed through a 1×1 convolution layer, and the ReLU activation function is used. After that, the frequency domain feature weights are obtained through global average pooling and Sigmoid activation function. These weights are multiplied with the spatial feature map and adaptively assigned to the spatial feature map. Finally, the feature map with the frequency domain weights is added back to the input feature map to enhance the extraction of frequency domain features.

[0094] (3) Design of super-resolution auxiliary branch: An auxiliary super-resolution branch is integrated into the backbone network to process low-resolution input and upscale the image to high resolution to improve detection performance. This branch adopts an encoder-decoder structure, in which the encoder fuses shallow and deep features, and the decoder upscales low-resolution features to high resolution through deconvolution operations. The design is inspired by the EDSR network and aims to extract high-resolution information while maintaining the model inference speed.

[0095] (4) Knowledge distillation and loss function design: Construct a teacher model, including a detection branch and a super-resolution auxiliary branch, and define the loss function including position, target, and category losses. Simplify the student model, remove the super-resolution branch, and use the knowledge distillation mechanism to calculate the distillation loss using MSELoss to guide the student model to learn the feature representation of the teacher model. The final loss function combines the distillation loss, detection loss, and super-resolution loss, and achieves a balance between different loss terms by adjusting the weighting parameters α, β, and γ.

[0096] 2. Model training optimization;

[0097] Data preparation: Collect or simulate a large number of wafer defect samples, annotate them, and construct a training data set. The data set is split in an 8:2 ratio for training and testing, and the input image is resized to 512*512.

[0098] Model initialization: Use the pre-trained deep learning YOLOv5s model as the basis and select CSPNet as the backbone network for initialization. The batch size is configured as 4, and the training process is set to 300 epochs. This embodiment adopts a single-cycle learning rate strategy, with an initial learning rate of 0.005 and a final learning rate of 0.1. This embodiment selects the stochastic gradient descent (SGD) optimizer with momentum, sets the momentum parameter to 0.937, and the weight decay to 0.0005. In addition, in order to alleviate potential model instability, this embodiment uses a warm-up learning rate schedule in the initial stage of training.

[0099] Loss function design: Define the loss function, including detection loss, super-resolution loss, and knowledge distillation loss. By balancing the weights of each loss, ensure that the model achieves the optimal balance between detection accuracy, super-resolution effect, and knowledge distillation efficiency.

[0100] Iterative training: Use the back-propagation algorithm to iteratively optimize model parameters and minimize the loss function until the model converges.

[0101] 3. Performance evaluation and deployment:

[0102] Validation test: Evaluate model performance on an independent test dataset, including indicators such as detection accuracy, speed, robustness, and model complexity.

[0103] Parameter tuning: Based on the test results, fine-tune the model parameters to further improve the detection effect.

[0104] Deployment and Implementation: The optimized SR-FABNet model is deployed to semiconductor production lines to achieve real-time, high-precision wafer defect detection.

[0105] 4. Experimental results: To demonstrate the effectiveness of the proposed method, this paper conducts a series of extensive experiments to carefully examine its performance from the perspectives of accuracy and model complexity. Some of the visual detection results are shown in Figure 5 shown.

[0106] Table 1 Ablation test results of each module of the baseline model yolov5

[0107] FAB SR KD Params GFlops mAP50 7.2M 5.2 89.7 √ 8.0M 5.8 93.7 √ 7.2M 5.2 92.3 √ 3.0M 2.6 89.5 √ √ 3.2M 2.7 93.6 √ √ √ 3.2M 2.7 95.9

[0108] Table 1 shows the results of ablation experiments on various components added to the baseline model YOLOv5s. In the ablation experiments, three additional components were gradually added: FAB module, SR branch, and knowledge distillation. The results show that the FAB module enhances the model's ability to focus on frequency domain information and significantly improves the accuracy (4%); the SR branch enhances the model's ability to guide low-resolution detection tasks from a spatial perspective, thereby improving the detection accuracy (2.6%); the KD module reduces the number of parameters by about 55% by transferring knowledge from a larger teacher model to a smaller student model, improving the generalization ability and efficiency of the model. The experimental results show that adding these components has a positive impact on both accuracy and efficiency. Specifically, when all three components are added, the highest value of mAP50 reaches 95.9%.

[0109] Table 2 Comparative experimental results of advanced detection models

[0110] Model Params GFlops mAP50 Faster-RCNN

[37] 103.2M 167.5 90.1 FOCS

[38] 21.8M 34.2 87.2 RetainNet

[39] 52.6M 44.7 89.9 YOLOv3 59.7M 49.8 83.6 YOLOv5s 7.17M 5.2 89.7 YOLOv5m 33.4M 18.9 87.9 YOLOv5l 62.9M 41.2 88.8 YOLOv5x 103.2M 83.1 85.3 YOLOR 56.8M 39.6 85.9 YOLOX 62.7M 41.9 88.2 YOLOv7 61.4M 69.3 90.2 YOLOv8 12.6M 28.9 91.7 Model of this embodiment 3.2M 2.7 95.9

[0111] The improved detection model is compared with the most advanced defect detection algorithm to demonstrate the superiority of the SR-FABNet proposed in this embodiment in the bright field wafer defect detection task. The experimental results are shown in Table 2. The results show that the method proposed in this embodiment has a significant advantage in mAP50 (95.9%), which is 4.2% higher than the best YOLOv8 method. At the same time, the number of parameters and the amount of calculation of the method in this embodiment are also significantly lower than those of other methods, which are 3.2M and 2.7 respectively, which are only 25% and 10% of the YOLOv8 method. In short, the method of this embodiment has achieved excellent performance on the bright field wafer defect dataset.

[0112] Through the above implementation steps, this embodiment can effectively solve the challenges of nano-scale wafer defect detection, achieve high-precision and high-efficiency detection goals, and provide strong technical support for quality control in the semiconductor manufacturing industry.

[0113] The above is only a preferred specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions that can be easily thought of by a person skilled in the art within the technical scope disclosed in the present application should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A wafer defect detection method based on super-resolution guided Fourier attention network, characterized in that: include: Acquire wafer images; Constructing a basic target detection model, wherein the basic target detection model includes a feature extraction module and a classification prediction module connected in sequence; Using the basic object detection model as a student model; Introducing a deep super-resolution network and a Fourier attention mechanism as a teacher model in the feature extraction module of the basic object detection model; Inputting the wafer image into the teacher model and the student model, guiding the training of the student model based on the output of the teacher model, and obtaining a trained student model; The output based on the teacher model guides the training of the student model to obtain a trained student model, specifically including: Calculate the distillation loss of the teacher model and the student model based on the MSELoss function; Constructing a total loss function of the student model according to the distillation loss; Training the student model based on the wafer image and the total loss function, adjusting the weight parameters in the loss function, and optimizing the student model parameters through a back propagation algorithm to obtain a trained student model; The total loss function of the student model is: ； In the formula, is the total loss function, is the distillation loss, For detection loss, including position loss, target loss and category loss, is the super-resolution branch loss, α, β, and γ are the weight parameters of the corresponding loss terms; Based on the trained student model, the wafer image to be inspected is classified and predicted to obtain the defect type and corresponding position of the wafer image to be inspected.

2. According to claim 1, a wafer defect detection method based on super-resolution guided Fourier attention network is characterized in that: The basic target detection model adopts the YOLOv5s network.

3. According to claim 1, a wafer defect detection method based on super-resolution guided Fourier attention network is characterized in that: The training process of the teacher model specifically includes: The wafer image is input into the teacher model for classification prediction, and is trained according to the target loss function to obtain a trained teacher model.

4. According to claim 3, a wafer defect detection method based on super-resolution guided Fourier attention network is characterized in that: The target loss function includes a position loss function, a target loss function, a category loss function and a super-resolution branch loss function.

5. The wafer defect detection method based on super-resolution guided Fourier attention network according to claim 1 is characterized in that: The processing process of the teacher model specifically includes: Inputting the wafer image into the feature extraction module, performing feature extraction on the wafer image based on the Fourier attention mechanism, and obtaining a feature map with frequency domain weights; Based on the deep super-resolution network, shallow features and deep features of the feature map are fused and deconvolved to obtain a high-resolution feature image; Defect detection is performed on the high-resolution feature image based on the classification prediction module to obtain the defect type and corresponding position of the wafer image.

6. The wafer defect detection method based on super-resolution guided Fourier attention network according to claim 1 is characterized in that: The distillation loss of the teacher model and the student model is calculated based on the MSELoss function. The specific calculation formula is: ； In the formula, is the distillation loss, is the position loss of the teacher model, is the position loss of the student model, The target loss of the teacher model, is the target loss of the student model, The class loss of the teacher model, is the class loss of the student model.

Images