Display device

By designing power and timing controllers in the display device, managing drive power and initializing power, the problem of difficulty in displaying and flashing when brightness changes in dark environments is solved, and a stable image display is achieved.

CN119152795APending Publication Date: 2024-12-17SAMSUNG DISPLAY CO LTD
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Patent Information

Application Number
CN202410410064.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2023-06-15
Filing Date
2024-04-07
Publication Date
2024-12-17

AI Technical Summary

Technical Problem

Viewing images in display devices in dark environments may be difficult, and flickering is prone to occur when the brightness increases.

Method used

A display device is designed, including a power supply, a display panel and a timing controller, to manage brightness by controlling voltage and initializing power to ensure that no flashes occur when the maximum brightness changes. The device is connected in series with multiple pixels and sub-transistors, and uses a control transistor and a timing controller to respond to the brightness control signal, gradually adjusting the driving power and initialization power to prevent sudden changes in brightness.

Benefits of technology

It effectively prevents flickering when brightness is maximized, ensures stable display of images, and improves the display quality under different brightness conditions.

✦ Generated by Eureka AI based on patent content.

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    Figure CN119152795A_ABST
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Abstract

A display device includes: a power supply configured to supply a voltage of first driving power to a first power line and supply a voltage of second driving power to a second power line; a display panel including a plurality of pixels connected to a plurality of scan lines and a plurality of data lines and each including a first transistor and a light emitting element, the first transistor configured to control a current supplied from the first power line to the second power line via the light emitting element; and a timing controller configured to supply a luminance control signal to the plurality of pixels. Each of the plurality of pixels further includes a control transistor connected in parallel to some of the plurality of sub-transistors of the corresponding first transistor, and the control transistor is configured to be turned on in response to receiving the luminance control signal having an enabled state. The power supply changes the voltage of the second driving power when the luminance control signal having the enabled state is supplied to the plurality of pixels.
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Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This patent application claims priority to Korean Patent Application No. 10-2023-0076510, filed on Jun. 15, 2023, the entire disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] Embodiments of the present disclosure relate to a display device, a method of driving the display device, and an electronic device including the display device. Background Art

[0004] The display device serves as a connection medium between a user and information. Examples of the display device include a liquid crystal display device and an organic light emitting display device.

[0005] It may be difficult to view an image in a display device in a dark environment. Therefore, the brightness of the display device may be increased. However, when the brightness is increased, a flickering phenomenon may occur in the display device. Summary of the invention

[0006] Embodiments of the present disclosure relate to a display device, a method of driving the display device, and an electronic device including the display device, which can prevent a flicker phenomenon from occurring when the maximum brightness of the display device changes.

[0007] An embodiment of the present disclosure provides a display device, which includes a power supply, a display panel and a timing controller. The power supply is configured to supply a voltage of a first driving power to a first power line, and to supply a voltage of a second driving power to a second power line. The display panel includes a plurality of pixels, the plurality of pixels are connected to a plurality of scan lines and a plurality of data lines and each include a first transistor and a light emitting element, the first transistor being configured to control the amount of current supplied from the first power line to the second power line via the light emitting element. The timing controller is configured to supply a brightness control signal to the plurality of pixels. Each of the plurality of pixels also includes a control transistor, the control transistor being connected in parallel to some of the plurality of sub-transistors of the corresponding first transistor, and being configured to be turned on in response to receiving the brightness control signal having an enabled state. When the brightness control signal having the enabled state is supplied to the plurality of pixels, the power supply changes the voltage of the second driving power.

[0008] In an embodiment, when the brightness control signal changes from the disabled state to the enabled state, the power supply may increase the second driving power from a first voltage to a second voltage higher than the first voltage.

[0009] In an embodiment, the power supply may maintain the second driving power at the second voltage for a period of time, and then gradually reduce the second driving power to a third voltage lower than the second voltage.

[0010] In an embodiment, the third voltage may be the same as the first voltage.

[0011] In an embodiment, the third voltage may be different from the first voltage.

[0012] In an embodiment, the power supply may further supply first initialization power to the plurality of pixels, the first initialization power being used to initialize a gate electrode of the first transistor.

[0013] In an embodiment, when the brightness control signal changes from the disabled state to the enabled state, the power supply may increase the first initialization power from a first initialization voltage to a second initialization voltage higher than the first initialization voltage.

[0014] In an embodiment, the power supply may maintain the first initialization power at the second initialization voltage for the period of time, and then gradually reduce the first initialization power to a third initialization voltage lower than the second initialization voltage.

[0015] In an embodiment, when the brightness control signal changes from the enabled state to the disabled state, the power supply may reduce the second driving power from a third voltage to a fourth voltage lower than the third voltage.

[0016] In an embodiment, the power supply may maintain the second driving power at the fourth voltage for a period of time, and then gradually increase the second driving power to a first voltage higher than the fourth voltage.

[0017] In an embodiment, the power supply may further supply first initialization power to the plurality of pixels, the first initialization power being used to initialize a gate electrode of the first transistor.

[0018] In an embodiment, when the brightness control signal changes from the enable state to the disable state, the power supply may reduce the first initialization power from a third initialization voltage to a fourth initialization voltage lower than the third initialization voltage.

[0019] In an embodiment, the power supply may maintain the first initialization power at the fourth initialization voltage for the period of time, and then gradually increase the first initialization power to a first initialization voltage higher than the fourth initialization voltage.

[0020] In an embodiment, the display device may further include a plurality of emission control lines connected to the plurality of pixels. Each of the plurality of pixels may be controlled during an emission period by an emission control signal supplied to a corresponding emission control line among the plurality of emission control lines connected to each of the plurality of pixels.

[0021] In an embodiment, the display device may further include an emission driver configured to supply an emission control signal to the plurality of emission control lines. When the brightness control signal changes from the disabled state to the enabled state, the emission driver may simultaneously supply the emission control signal having the disabled state to the plurality of emission control lines to prevent the plurality of pixels from emitting light.

[0022] In an embodiment, when the brightness control signal is changed from the enabled state to the disabled state, the emission driver may simultaneously supply the emission control signal having the disabled state to the plurality of emission control lines.

[0023] In an embodiment, in each of the plurality of pixels: the light emitting element includes a second electrode electrically connected to the second power line; the first transistor includes the plurality of sub-transistors connected in series between a first node and a second node, the first node being electrically connected to the first power line during an emission period in which the light emitting element emits light, and the second node being electrically connected to the first electrode of the light emitting element during the emission period; and the control transistor is connected to a common node between the first node and the plurality of sub-transistors, the control transistor having a gate electrode connected to a control line, and being configured to be turned on when the brightness control signal having the enabled state is supplied to the control line, and to be turned off when the brightness control signal having the disabled state is supplied to the control line.

[0024] In an embodiment, each of the multiple pixels may also include: a second transistor, connected between a corresponding data line among the multiple data lines and the first node, and including a gate electrode electrically connected to the first scan line; a third transistor, connected between the second node and a third node to which the multiple gate electrodes of the multiple sub-transistors are connected, and including a gate electrode electrically connected to the second scan line; a fourth transistor, connected between the third node and a third power line configured to receive a first initialization power, and including a gate electrode electrically connected to the third scan line; a fifth transistor, connected between the first power line and the first node, and including a gate electrode electrically connected to an emission control line; a sixth transistor, connected between the second node and the first electrode of the light-emitting element, and including a gate electrode electrically connected to the emission control line; and a seventh transistor, connected between the first electrode of the light-emitting element and a fourth power line configured to receive a second initialization power, and including a gate electrode electrically connected to the fourth scan line.

[0025] In an embodiment, the control line may be commonly connected to a plurality of the control transistors included in the plurality of pixels.

[0026] In an embodiment, the display device may include a first mode and a second mode, the maximum brightness of the display panel is set to a first brightness in the first mode, and the maximum brightness of the display panel is set to a second brightness higher than the first brightness in the second mode. The timing controller may supply the brightness control signal having a disabled state when the driving mode is set to the first mode, and supply the brightness control signal having the enabled state when the driving mode is set to the second mode.

[0027] In an embodiment, the display device may further include a normal mode, in which the maximum brightness of the display panel is set to a normal brightness lower than the first brightness. When the driving mode is changed from the normal mode to the first mode, the power supply may gradually reduce the voltage of the second driving power.

[0028] An embodiment of the present disclosure provides a display device, which includes a power supply, a plurality of pixels, and a timing controller. The power supply is configured to supply a voltage of a first driving power to a first power line, and to supply a voltage of a second driving power to a second power line. Each of the plurality of pixels includes a plurality of sub-transistors, a control transistor, and a light-emitting element, wherein the plurality of sub-transistors are configured to control the amount of current to be supplied from the first power line to the second power line via the light-emitting element, the control transistor is connected to a common node between the first power line and the plurality of sub-transistors, and the control transistor is configured to be turned on in response to receiving a brightness control signal having an enabled state, and to be turned off in response to receiving the brightness control signal having a disabled state. The timing controller is configured to supply the brightness control signal to a control line, which is commonly connected to a plurality of gate electrodes of the plurality of control transistors of the plurality of pixels. When the brightness control signal changes from the enabled state to the disabled state or from the disabled state to the enabled state, the power supply changes the voltage of the second driving power.

[0029] In an embodiment, when the brightness control signal changes from the disabled state to the enabled state, the power supply may increase the voltage of the second driving power.

[0030] In an embodiment, the power supply may gradually decrease the voltage of the second driving power after a period of time after the increase of the voltage of the second driving power.

[0031] In an embodiment, when the brightness control signal changes from the enabled state to the disabled state, the power supply may reduce the voltage of the second driving power.

[0032] In an embodiment, the power supply may gradually increase the voltage of the second driving power after a period of time after the decrease of the voltage of the second driving power.

[0033] In an embodiment, the power supply may further supply a first initialization power for initializing each gate electrode of the plurality of sub-transistors.

[0034] In an embodiment, when the brightness control signal changes from the disabled state to the enabled state, the power supply may increase a voltage of the first initialization power.

[0035] In an embodiment, the power supply may gradually decrease the voltage of the first initialization power after a period of time after the increase of the voltage of the first initialization power.

[0036] In an embodiment, when the brightness control signal changes from the enabled state to the disabled state, the power supply may reduce the voltage of the first initialization power.

[0037] In an embodiment, the power supply may gradually increase the voltage of the first initialization power after a period of time after the decrease of the voltage of the first initialization power.

[0038] In an embodiment, the display device may further include a plurality of emission control lines connected to the plurality of pixels. Each of the plurality of pixels may be set to a non-emission state when an emission control signal having a disabled state is supplied to a corresponding emission control line among the plurality of emission control lines connected to each of the plurality of pixels.

[0039] In an embodiment, the display device may further include an emission driver configured to supply emission control signals to the plurality of emission control lines. When the brightness control signal changes from the enabled state to the disabled state or from the disabled state to the enabled state, the emission driver may simultaneously supply the emission control signals of the disabled state to the plurality of emission control lines.

[0040] An embodiment of the present disclosure provides a method for driving a display device, the display device including a plurality of pixels each including a driving transistor and a light-emitting element, the driving transistor being configured to control the amount of current flowing from a line supplying a first driving power to a line supplying a second driving power via the light-emitting element. The method includes: determining whether the display device is in a first mode or a second mode; when determining that the display device is in the first mode, driving the plurality of pixels to have a maximum brightness set to a first brightness; when determining that the display device is in the second mode, driving the plurality of pixels to have a maximum brightness set to a second brightness higher than the first brightness; and when changing from the first mode to the second mode or from the second mode to the first mode, controlling a control transistor connected in parallel to some of the plurality of sub-transistors of the driving transistor. When changing from the first mode to the second mode or from the second mode to the first mode, the voltage of the second driving power changes.

[0041] In an embodiment, the plurality of sub-transistors may be connected in series. When the plurality of pixels are driven in the first mode, current may be supplied to the light emitting element via all of the plurality of sub-transistors. When the pixel is driven in the second mode, current may be supplied to the light emitting element via some of the plurality of sub-transistors.

[0042] In an embodiment, when changing from the first mode to the second mode, the voltage of the second driving power may increase with a first slope.

[0043] In an embodiment, the voltage of the second driving power may increase at the first slope, and after a period of time, the voltage of the second driving power may decrease at a second slope that is gentler than the first slope.

[0044] In an embodiment, the method may further include initializing a gate electrode of the driving transistor by a voltage of a first initialization power, and increasing the voltage of the first initialization power when changing from the first mode to the second mode.

[0045] In an embodiment, when changing from the second mode to the first mode, the voltage of the second driving power may decrease with a third slope.

[0046] In an embodiment, the voltage of the second driving power may decrease with the third slope, and after a period of time, the voltage of the second driving power may increase with a fourth slope gentler than the third slope.

[0047] In an embodiment, the method may further include initializing a gate electrode of the driving transistor by a voltage of a first initialization power, and lowering the voltage of the first initialization power when changing from the second mode to the first mode.

[0048] In an embodiment, the method may further include preventing the plurality of pixels from emitting light when changing from the first mode to the second mode or when changing from the second mode to the first mode.

[0049] In an embodiment, the method may further include a normal mode in which the maximum brightness is set to a normal brightness lower than the first brightness. When changing from the normal mode to the first mode, the voltage of the second driving power may be reduced.

[0050] An embodiment of the present disclosure provides an electronic device, the electronic device comprising a main processor, an auxiliary processor, a display panel and a voltage generating circuit. The main processor is configured to generate a driving mode signal based on at least one of external light intensity and user settings. The auxiliary processor is configured to supply a brightness control signal set to an enabled state or a disabled state in response to the driving mode signal. The display panel is configured to control the amount of current flowing from a line supplying a first driving power to a line supplying a second driving power via a light-emitting element of a pixel in response to a data signal supplied from the auxiliary processor, and display an image. The voltage generating circuit is configured to supply the second driving power of a first voltage when supplying the brightness control signal with the disabled state, and to supply the second driving power of a second voltage when supplying the brightness control signal with the enabled state, the second voltage being higher than the first voltage. Compared with when supplying the brightness control signal with the disabled state in response to the data signal, the pixel supplies a higher current when supplying the brightness control signal with the enabled state in response to the same data signal.

[0051] In an embodiment, the maximum brightness of the pixel may be changed in response to a mode of the driving mode signal.

[0052] In an embodiment, the voltage generating circuit may gradually reduce the second driving power from the second voltage to a third voltage lower than the second voltage. BRIEF DESCRIPTION OF THE DRAWINGS

[0053] Figure 1 is a diagram illustrating a display device according to an embodiment of the present disclosure.

[0054] Figure 2 It is shown Figure 1 An embodiment of a scan driver and an emission driver is shown in FIG.

[0055] Figure 3 It is shown Figure 1 An embodiment of a pixel is shown in FIG.

[0056] Figure 4 Is shown driving Figure 3 0047] A waveform diagram of an embodiment of a pixel method is shown in FIG.

[0057] Figure 5A and Figure 5B is a diagram showing a channel length of a first transistor in response to a brightness control signal.

[0058] Fig. 6A and Figure 6B is a diagram showing a mode changing process in response to a brightness control signal.

[0059] Figure 7 is a diagram illustrating a mode change process according to an embodiment of the present disclosure.

[0060] Figure 8 is a diagram illustrating a mode change process according to an embodiment of the present disclosure.

[0061] Fig.9A and Fig. 9B is a diagram showing a current change process of the first transistor in response to a change in the voltage of the second driving power.

[0062] Fig.10 is a diagram illustrating a mode change process according to an embodiment of the present disclosure.

[0063] Fig.11 is a diagram illustrating a mode change process according to an embodiment of the present disclosure.

[0064] Fig. 12A and Fig. 12B is a waveform diagram showing an emission control signal in response to a mode change.

[0065] Fig.13 is a diagram showing a driving mode of a display device.

[0066] Fig.14 is a diagram illustrating an electronic device according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0067] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art can implement the present invention. The present disclosure can be implemented in various forms and is not limited to the embodiments to be described hereinafter.

[0068] It will be understood that when an element is referred to as being “between” two elements, it can be the only element between the two elements, or one or more intervening elements may also be present. Like reference numerals may refer to like elements throughout.

[0069] In addition, the expression "same" may mean "substantially (essentially) the same". In other words, the expression "same" may include a range that can be accepted by those skilled in the art. Other expressions may also be expressions from which the term "substantially (essentially)" has been omitted.

[0070] Some embodiments are described in conjunction with functional blocks, units and / or modules in the accompanying drawings. It will be appreciated by those skilled in the art that such blocks, units and / or modules can be physically implemented by logic circuits, discrete components, microprocessors, hard-wired circuits, memory elements, line connections and other electronic circuits. This can be formed using semiconductor-based manufacturing techniques or other manufacturing techniques. Blocks, units and / or modules implemented by microprocessors or other similar hardware can be programmed and controlled using software to perform various functions discussed herein, and can be optionally driven by firmware and / or software. In addition, each block, unit and / or module can be implemented by dedicated hardware, or by a combination of dedicated hardware that performs some functions and processors (e.g., one or more programmed microprocessors and associated circuits) that perform different functions. In addition, in some embodiments, without departing from the scope of the present invention, blocks, units and / or modules can be physically separated into two or more separate blocks, units and / or modules that interact with each other. In some embodiments, without departing from the scope of the present invention, blocks, units and / or modules can be physically combined into more complex blocks, units and / or modules.

[0071] However, the present disclosure is not limited to the following embodiments and may be modified in various forms. Each embodiment to be described below may be implemented alone or combined with at least one other embodiment to make various combinations of the embodiments.

[0072] Figure 1 is a diagram illustrating a display device 100 according to an embodiment of the present disclosure. Figure 2 It is shown Figure 1 1. An embodiment of the scan driver 130 and the emission driver 150 is shown in FIG.

[0073] Reference Figure 1 and Figure 2 According to an embodiment of the present disclosure, the display device 100 may include a pixel component 110 (or a display panel), a timing controller 120 (e.g., a control circuit), a scan driver 130 (e.g., a first driver circuit), a data driver 140 (e.g., a second driver circuit), an emission driver 150 (e.g., a third driver circuit), and a power supply 160 (e.g., a power supply circuit). The aforementioned components may be implemented as separate integrated circuits. Two or more of the aforementioned components may be implemented as a single integrated circuit. In addition, the scan driver 130 and / or the emission driver 150 may be formed in the pixel component 110.

[0074] The pixel assembly 110 may include pixels PX, which are connected to first scan lines SL11, SL12, ... and SL1n, second scan lines SL21, SL22, ... and SL2n, third scan lines SL31, SL32, ... and SL3n, fourth scan lines SL41, SL42, ... and SL4n, data lines DL1, DL2, ... and DLm, emission control lines EL1, EL2, ... and ELo, control lines CL, and power lines PL1, PL2, PL3 and PL4 (where n, m and o are integers greater than 0).

[0075] For example, the pixel PXij located in the i-th horizontal line (or pixel row) and the j-th vertical line (or pixel column) (refer to Figure 3 ) may be connected to the i-th first scan line SL1i (hereinafter also referred to as the first scan line SL1i) (refer to Figure 3 ), the i-th second scan line SL2i (hereinafter also referred to as the second scan line SL2i) (refer to Figure 3 ), the i-th third scan line SL3i (hereinafter also referred to as the third scan line SL3i) (refer to Figure 3 ), the i-th fourth scan line SL4i (hereinafter also referred to as the fourth scan line SL4i) (refer to Figure 3 ), the kth emission control line ELk (hereinafter also referred to as the emission control line ELk) (refer to Figure 3 ), the control line CL and the j-th data line DLj (hereinafter also referred to as the data line DLj) (refer to Figure 3 )(wherein, i is an integer greater than 0 and less than or equal to n, j is an integer greater than 0 and less than or equal to m, and k is an integer greater than 0 and less than or equal to o). Here, k is a number equal to or less than i. For example, in the case where each of the emission control lines EL1 to ELo is connected to the pixels PX located in one horizontal line, k is a number equal to i. For example, in the case where each of the emission control lines EL1 to ELo is connected to the pixels PX located in two or more horizontal lines, k is a number less than i.

[0076] When the first scan signal is supplied to the first scan lines SL11 to SL1n, the pixels PX may be selected on a horizontal line basis (e.g., the pixels PX connected to the same scan line may be grouped into one horizontal line (pixel row)). Each of the pixels PX selected by the first scan signal may receive a data signal from a corresponding data line (any one of DL1 to DLm) connected thereto. The pixel PX receiving the data signal may generate light having a specific brightness in response to the voltage of the data signal.

[0077] The scan driver 130 may receive a scan driving signal SCS from the timing controller 120. The scan driving signal SCS may include at least one scan start signal and a clock signal required to drive the scan driver 130. The scan driver 130 may generate a first scan signal, a second scan signal, a third scan signal, and a fourth scan signal while shifting the scan start signal in response to the clock signal.

[0078] like Figure 2 As shown in FIG. 1 , the scan driver 130 may include a first scan driver 132 , a second scan driver 134 , a third scan driver 136 , and a fourth scan driver 138 .

[0079] The first scan driver 132 may receive the first scan start signal FLM1 to generate a first scan signal while shifting the first scan start signal FLM1 in response to a clock signal. The first scan driver 132 may sequentially supply the first scan signal to the first scan lines SL11 to SL1n.

[0080] The second scan driver 134 may receive the second scan start signal FLM2 to generate a second scan signal while shifting the second scan start signal FLM2 in response to the clock signal The second scan driver 134 may sequentially supply the second scan signal to the second scan lines SL21 to SL2n.

[0081] The third scan driver 136 may receive the third scan start signal FLM3 to generate a third scan signal while shifting the third scan start signal FLM3 in response to the clock signal The third scan driver 136 may sequentially supply the third scan signal to the third scan lines SL31 to SL3n.

[0082] The fourth scan driver 138 may receive the fourth scan start signal FLM4 to generate a fourth scan signal while shifting the fourth scan start signal FLM4 in response to the clock signal. The fourth scan driver 138 may sequentially supply the fourth scan signal to the fourth scan lines SL41 to SL4n. Each of the first scan signal, the second scan signal, the third scan signal, and the fourth scan signal may be set to a gate-on voltage for turning on a transistor included in the pixel PX.

[0083] For example, a low-level first scan signal, a second scan signal, a third scan signal, and a fourth scan signal may be supplied to a P-type transistor. A high-level first scan signal, a second scan signal, a third scan signal, and a fourth scan signal may be supplied to an N-type transistor. A transistor supplied with a first scan signal, a second scan signal, a third scan signal, or a fourth scan signal may be turned on in response to the first scan signal, the second scan signal, the third scan signal, or the fourth scan signal. Supplying the first scan signal, the second scan signal, the third scan signal, or the fourth scan signal may mean supplying a gate-on voltage to the first scan line SL1, the second scan line SL2, the third scan line SL3, or the fourth scan line SL4. Not supplying the first scan signal, the second scan signal, the third scan signal, or the fourth scan signal may mean supplying a gate-off voltage to the first scan line SL1, the second scan line SL2, the third scan line SL3, or the fourth scan line SL4.

[0084] although Figure 2 The first scan driver 132, the second scan driver 134, the third scan driver 136, and the fourth scan driver 138 are shown to be connected to the first scan line SL1, the second scan line SL2, the third scan line SL3, and the fourth scan line SL4, respectively, but the embodiments of the present disclosure are not limited thereto. For example, the first scan line SL1, the second scan line SL2, and the fourth scan line SL4 may be set to the same scan line. In this case, the second scan driver 134 and the fourth scan driver 138 may be omitted.

[0085] The data driver 140 may receive the output data Dout and the data driving signal DCS from the timing controller 120. The data driving signal DCS may include a sampling signal and / or a timing signal required to drive the data driver 140. The data driver 140 may generate a data signal based on the data driving signal DCS and the output data Dout. For example, the data driver 140 may generate an analog data signal based on the grayscale value of the output data Dout. The data driver 140 may supply the data signal in units of one horizontal period.

[0086] The emission driver 150 may receive an emission driving signal ECS from the timing controller 120. The emission driving signal ECS may include an emission start signal and a clock signal for driving the emission driver 150. The emission driver 150 may generate an emission control signal EM (refer to Figure 3 ).

[0087] like Figure 2As shown in , the emission driver 150 may receive the emission start signal EFLM and generate the emission control signal EM while shifting the emission start signal EFLM in response to the clock signal. The emission driver 150 may sequentially supply the emission control signal EM to the emission control lines EL1 to ELo. The emission control signal EM may be set to a gate-off voltage so that the corresponding transistor included in the pixel PX is turned off.

[0088] For example, the emission control signal to be supplied to the P-type transistor can be set to a high level, and the emission control signal to be supplied to the N-type transistor can be set to a low level. The transistor supplied with the emission control signal can be cut off in response to the emission control signal. Therefore, supplying the emission control signal can mean supplying the gate-off voltage to the emission control line EL. Not supplying the emission control signal can mean supplying the gate-on voltage to the emission control line EL.

[0089] The timing controller 120 may receive input data Din and a control signal CS from a host system through an interface. For example, the timing controller 120 may receive input data Din and a control signal CS from at least one of a graphics processing unit (GPU), a central processing unit (CPU), and an application processor (AP) included in the host system. The control signal CS may include various signals including a clock signal.

[0090] The timing controller 120 may generate a scan driving signal SCS, a data driving signal DCS, and an emission driving signal ECS based on the control signal CS. The scan driving signal SCS, the data driving signal DCS, and the emission driving signal ECS may be supplied to the scan driver 130, the data driver 140, and the emission driver 150, respectively.

[0091] The timing controller 120 may convert the input data Din into a format matching the specification of the display device 100. In addition, the timing controller 120 may correct the input data Din to generate output data Dout, and supply the output data Dout to the data driver 140. In an embodiment, the timing controller 120 may correct the input data Din in response to an optical measurement result obtained during a manufacturing process.

[0092] The timing controller 120 may supply a brightness control signal CB to the control line CL in response to a driving mode of the display device 100. For example, the timing controller 120 may supply a brightness control signal CB having an enabled state or a brightness control signal CB having a disabled state in response to the driving mode. Here, the brightness control signal CB having an enabled state may mean that a gate-on voltage is supplied to the control line CL. The brightness control signal CB having a disabled state may mean that a gate-off voltage is supplied to the control line CL. In addition, the control line CL may be commonly connected to the pixel PX.

[0093] The driving mode of the display device 100 may include a first mode and a second mode. The first mode may refer to a mode in which the maximum brightness of the pixel component 110 is set to a first brightness. The second mode may refer to a mode in which the maximum brightness of the pixel component 110 is set to a second brightness higher than the first brightness. When the display device 100 is driven in the first mode, the timing controller 120 may supply a brightness control signal CB having a disabled state, and when the display device 100 is driven in the second mode, the timing controller 120 may supply a brightness control signal CB having an enabled state.

[0094] In an embodiment, the driving mode may be changed according to a user's setting. For example, the user may change the driving mode by adjusting the maximum brightness of the display device 100. In an embodiment, the driving mode may be automatically changed according to the external brightness. For example, when the display device 100 is used in a relatively bright surrounding environment, the display device 100 may be set to the second mode. When the display device 100 is used in a relatively dark surrounding environment compared to the surrounding environment of the second mode, the display device 100 may be set to the first mode.

[0095] In an embodiment, a driving mode signal corresponding to the driving mode is supplied from a host system (eg, an AP, etc.) to the timing controller 120. The host system may supply a driving mode signal corresponding to the first mode or the second mode to the timing controller 120 in response to a user's setting and / or an external environment. Fig.13 As shown in , in the case where the driving modes of the display device include a normal mode, a first mode, and a second mode, the host system may supply a driving mode signal corresponding to the normal mode, the first mode, or the second mode to the timing controller 120 .

[0096] The power supply 160 may generate various power voltages for driving the display device 100. For example, the power supply 160 may generate a first driving power VDD, a second driving power VSS, a first initialization power Vint1, and a second initialization power Vint2.

[0097] The first driving power VDD may be provided to supply a driving current to the pixel PX. The second driving power VSS may be provided to receive a driving current from the pixel PX. During the period when the pixel PX is set to a light emitting state, the first driving power VDD may be set to a voltage higher than that of the second driving power VSS.

[0098] The first initialization power Vint1 may be provided to initialize the gate electrode of the driving transistor included in each of the pixels PX. The second initialization power Vint2 may be provided to initialize the light emitting element LD (refer to Figure 3 ) is initialized.

[0099] The first driving power VDD generated from the power supply 160 may be supplied to the first power line PL1, the second driving power VSS may be supplied to the second power line PL2, the first initialization power Vint1 may be supplied to the third power line PL3, and the second initialization power Vint2 may be supplied to the fourth power line PL4. The first power line PL1, the second power line PL2, the third power line PL3, and the fourth power line PL4 may be commonly connected to the pixel PX, but the embodiments of the present disclosure are not limited thereto.

[0100] In an embodiment, the first power line PL1 may be composed of a plurality of power lines. The plurality of power lines may be connected to different pixels PX. In an embodiment, the second power line PL2 may be composed of a plurality of power lines. The plurality of power lines may be connected to different pixels PX. In an embodiment, the third power line PL3 may be composed of a plurality of power lines. The plurality of power lines may be connected to different pixels PX. In an embodiment, the fourth power line PL4 may be composed of a plurality of power lines. The plurality of power lines may be connected to different pixels PX. In other words, in an embodiment of the present disclosure, the pixel PX may be connected to any one of the first power line PL1, any one of the second power line PL2, any one of the third power line PL3, and any one of the fourth power line PL4.

[0101] When the driving mode is changed from the first mode to the second mode, the power supply 160 may change the voltage of the second driving power VSS. For example, when the driving mode is changed from the first mode to the second mode, the power supply 160 may increase the voltage of the second driving power VSS and then gradually reduce the voltage of the second driving power VSS after a certain period of time.

[0102] When the driving mode is changed from the first mode to the second mode, the power supply 160 may change the voltage of the first initialization power Vint1. For example, when the driving mode is changed from the first mode to the second mode, the power supply 160 may increase the voltage of the first initialization power Vint1, and then gradually decrease the voltage of the first initialization power Vint1 after a certain period of time.

[0103] When the driving mode is changed from the second mode to the first mode, the power supply 160 may change the voltage of the second driving power VSS. For example, when the driving mode is changed from the second mode to the first mode, the power supply 160 may reduce the voltage of the second driving power VSS, and then gradually increase the voltage of the second driving power VSS after a certain period of time.

[0104] When the driving mode is changed from the second mode to the first mode, the power supply 160 may change the voltage of the first initialization power Vint1. For example, when the driving mode is changed from the second mode to the first mode, the power supply 160 may reduce the voltage of the first initialization power Vint1, and then gradually increase the voltage of the first initialization power Vint1 after a certain period of time.

[0105] Figure 3 It is shown Figure 1 An embodiment of a pixel PX is shown in FIG. Figure 3 The pixel PXij located in the i-th horizontal line and the j-th vertical line can be represented.

[0106] Reference Figure 3 , the pixel PXij according to an embodiment of the present disclosure can be connected to the corresponding signal lines (i.e., the scan lines SL1i, SL2i, SL3i and SL4i, the emission control line ELk, the data line DLj and the control line CL). In an embodiment, the pixel PXij can also be connected to the first power line PL1, the second power line PL2, the third power line PL3 and the fourth power line PL4.

[0107] A pixel PXij according to an embodiment of the present disclosure may include a light emitting element LD and a pixel circuit configured to control an amount of current to be supplied to the light emitting element LD.

[0108] The light emitting element LD may be connected between the first power line PL1 and the second power line PL2. For example, the first electrode (or anode electrode) of the light emitting element LD may be electrically connected to the first power line PL1 via the sixth transistor M6, the second node N2, the first transistor M1, the first node N1, and the fifth transistor M5. The second electrode (or cathode electrode) of the light emitting element LD may be electrically connected to the second power line PL2. The light emitting element LD may generate light of a specific brightness corresponding to the amount of driving current supplied from the first power line PL1 to the second power line PL2 via the pixel circuit.

[0109] The light emitting element LD may be implemented by an organic light emitting diode. In addition, the light emitting element LD may be implemented by an inorganic light emitting diode such as a micro light emitting diode (LED) or a quantum dot light emitting diode. The light emitting element LD may be an element formed by a combination of an organic material and an inorganic material. Figure 3 The pixel PXij is shown to include a single light emitting element LD, but the pixel PXij in the embodiment may include a plurality of light emitting elements LD. The plurality of light emitting elements LD may be connected to each other in series, in parallel, or in series and parallel.

[0110] The pixel circuit may include a first transistor M1, a second transistor M2, a third transistor M3, a fourth transistor M4, a fifth transistor M5, a sixth transistor M6, a seventh transistor M7, an eighth transistor M8, and a storage capacitor Cst.

[0111] The first transistor M1 (or driving transistor) may include a first electrode connected to the first node N1 and a second electrode connected to the second node N2. The gate electrode of the first transistor M1 may be connected to the third node N3. For example, the gate electrode may be electrically connected to the third node N3. The first transistor M1 may control the amount of current to be supplied from the first power line PL1 to the second power line PL2 via the light emitting element LD in response to the voltage of the third node N3.

[0112] In an embodiment, the first transistor M1 includes a 1_1th sub-transistor M1_1 and a 1_2th sub-transistor M1_2. The 1_1th sub-transistor M1_1 and the 1_2th sub-transistor M1_2 may be connected in series between the first node N1 and the second node N2.

[0113] The 1_1th sub-transistor M1_1 may include a first electrode connected to the first node N1 and a second electrode connected to a common node CN between the 1_1th sub-transistor M1_1 and the 1_2nd sub-transistor M1_2. A gate electrode of the 1_1th sub-transistor M1_1 may be connected to a third node N3.

[0114] The 1_2 th sub-transistor M1_2 may include a first electrode connected to the common node CN and a second electrode connected to the second node N2. A gate electrode of the 1_2 th sub-transistor M1_2 may be connected to the third node N3.

[0115] The second transistor M2 may be connected between the data line DLj and the first node N1. The gate electrode of the second transistor M2 may be electrically connected to the first scan line SL1i. When a low voltage first scan signal (or an enabled first scan signal) is supplied to the first scan line SL1i, the second transistor M2 may be turned on and electrically connect the data line DLj to the first node N1.

[0116] The third transistor M3 may be connected between the third node N3 and the second node N2. The gate electrode of the third transistor M3 may be electrically connected to the second scan line SL2i. When a low voltage second scan signal (or an enabled second scan signal) is supplied to the second scan line SL2i, the third transistor M3 may be turned on and electrically connect the third node N3 to the second node N2. If the third transistor M3 is turned on, the first transistor M1 may be connected in the form of a diode.

[0117] In an embodiment, the third transistor M3 includes a 3_1st sub-transistor M3_1 and a 3_2nd sub-transistor M3_2. In the case where the third transistor M3 includes a plurality of sub-transistors (e.g., a 3_1st sub-transistor M3_1 and a 3_2nd sub-transistor M3_2), leakage of current from the third node N3 may be minimized. The 3_1st sub-transistor M3_1 and the 3_2nd sub-transistor M3_2 may be connected in series between the third node N3 and the second node N2. Respective gate electrodes of the 3_1st sub-transistor M3_1 and the 3_2nd sub-transistor M3_2 may be electrically connected to the second scan line SL2i.

[0118] The fourth transistor M4 may include a first electrode connected to the third node N3 and a second electrode electrically connected to the third power line PL3. The gate electrode of the fourth transistor M4 may be electrically connected to the third scan line SL3i. When the third scan signal of a low voltage (or an enabled third scan signal) is supplied to the third scan line SL3i, the fourth transistor M4 may be turned on and supply the voltage of the first initialization power Vint1 to the third node N3. In an embodiment, the first initialization power Vint1 is set to a voltage lower than the voltage of the data signal to be supplied to the data line DLj.

[0119] In an embodiment, the fourth transistor M4 includes a 4_1th sub-transistor M4_1 and a 4_2th sub-transistor M4_2. In the case where the fourth transistor M4 includes a plurality of sub-transistors (e.g., a 4_1th sub-transistor M4_1 and a 4_2th sub-transistor M4_2), leakage of current from the third node N3 may be minimized. The 4_1th sub-transistor M4_1 and the 4_2th sub-transistor M4_2 may be connected in series between the third node N3 and the third power line PL3. Respective gate electrodes of the 4_1th sub-transistor M4_1 and the 4_2th sub-transistor M4_2 may be electrically connected to the third scan line SL3i.

[0120] The fifth transistor M5 may include a first electrode electrically connected to the first power line PL1 and a second electrode connected to the first node N1. The gate electrode of the fifth transistor M5 may be connected to the emission control line ELk. The fifth transistor M5 may be turned off when a high voltage emission control signal EM (or an emission control signal having a disabled state) is supplied to the emission control line ELk, and may be turned on when a low voltage emission control signal EM (or an emission control signal having an enabled state) is supplied to the emission control line ELk.

[0121] The sixth transistor M6 may be connected between the second node N2 and the first electrode of the light emitting element LD. The gate electrode of the sixth transistor M6 may be connected to the emission control line ELk. The sixth transistor M6 may be turned off when a high voltage emission control signal EM is supplied to the emission control line ELk, and may be turned on when a low voltage emission control signal EM is supplied to the emission control line ELk.

[0122] although Figure 3 It is shown that the fifth transistor M5 and the sixth transistor M6 are connected to the same emission control line ELk, but the present disclosure is not limited thereto. In an embodiment, the fifth transistor M5 and the sixth transistor M6 may be connected to different emission control lines.

[0123] The seventh transistor M7 may include a first electrode connected to the first electrode of the light emitting element LD and a second electrode electrically connected to the fourth power line PL4. The gate electrode of the seventh transistor M7 may be electrically connected to the fourth scan line SL4i. When the fourth scan signal of a low voltage (or an enabled fourth scan signal) is supplied to the fourth scan line SL4i, the seventh transistor M7 may be turned on to supply the voltage of the second initialization power Vint2 to the first electrode of the light emitting element LD.

[0124] If the voltage of the second initialization power Vint2 is supplied to the first electrode of the light emitting element LD, the parasitic capacitor of the light emitting element LD can be discharged. Since the residual voltage charged in the parasitic capacitor of the light emitting element LD is discharged (or removed), undesired weak emission can be prevented. Therefore, the black performance of the pixel PXij can be enhanced.

[0125] The eighth transistor M8 (or control transistor) is connected between the first node N1 and the common node CN. In other words, the eighth transistor M8 is connected in parallel to the 1_1th sub-transistor M1_1. For example, in the case where the first transistor M1 includes a plurality of sub-transistors, the eighth transistor M8 may be connected in parallel to some of the sub-transistors.

[0126] A gate electrode of the eighth transistor M8 may be electrically connected to the control line CL. The eighth transistor M8 may be turned on when a brightness control signal CB having an enabled state is supplied to the control line CL, and may be turned off when a brightness control signal CB having a disabled state is supplied to the control line CL.

[0127] If the eighth transistor M8 is turned off, the first node N1 and the common node CN may be electrically connected to each other through the 1_1th sub-transistor M1_1. In this case, the 1_1th sub-transistor M1_1 may control the amount of current flowing from the first node N1 to the common node CN in response to the voltage of the third node N3. In other words, when the eighth transistor M8 is turned off, the 1_1th sub-transistor M1_1 may be driven as a driving transistor.

[0128] If the eighth transistor M8 is turned on, the first node N1 and the common node CN may be electrically connected to each other via the eighth transistor M8. In this case, the current supplied from the first node N1 to the common node CN may be provided via the eighth transistor M8 without passing through the 1_1th sub-transistor M1_1. In other words, when the eighth transistor M8 is turned on, the 1_1th sub-transistor M1_1 is not driven as a driving transistor. For example, when the eighth transistor M8 is turned on, the 1_1th sub-transistor M1_1 may be bypassed.

[0129] The storage capacitor Cst may be connected between the first power line PL1 and the third node N3. The storage capacitor Cst may store a voltage applied to the third node N3.

[0130] Despite Figure 3 Each of the first to eighth transistors M1 to M8 is shown as a P-type transistor, but the present disclosure is not limited thereto. For example, at least one of the first to eighth transistors M1 to M8 may be an N-type transistor.

[0131] Despite Figure 3 The first transistor M1 has been described as including two sub-transistors M1_1 and M1_2, but the present disclosure is not limited thereto. For example, the first transistor M1 may be configured by connecting three or more sub-transistors in series. In this case, the eighth transistor M8 may be connected in parallel to at least one sub-transistor. For example, when the first transistor M1 is configured by three sub-transistors, the eighth transistor M8 may be connected in parallel to two of the three sub-transistors.

[0132] Figure 4 Is shown driving Figure 3 The waveform diagram of an embodiment of the method for pixel PXij shown in FIG. Figure 4In the drawings, for convenience of explanation, it is assumed that each of the first scan line SL1i, the second scan line SL2i, and the fourth scan line SL4i is an i-th scan line SLi, and the third scan line SL3i is an i-1-th scan line SLi-1.

[0133] Reference Figure 3 and Figure 4 , first, the emission control signal EM of a high voltage is applied to the emission control line ELk. If the emission control signal EM of a high voltage is supplied to the emission control line ELk, the fifth transistor M5 and the sixth transistor M6 are turned off.

[0134] If the fifth transistor M5 is turned off, the first power line PL1 and the first node N1 are electrically disconnected. If the sixth transistor M6 is turned off, the second node N2 and the light emitting element LD may be electrically disconnected. Therefore, the light emitting element LD may be set to a non-emission state during the non-emission period NEP.

[0135] After the emission control signal EM of a high voltage is supplied to the emission control line ELk, the voltage DATA(i-1)j of the data signal corresponding to the i-1th horizontal line is supplied to the data line DLj, and the scan signal GI is supplied to the i-1th scan line SLi-1. Here, because the second transistor M2 is set to a cut-off state, the voltage DATA(i-1)j of the data signal corresponding to the i-1th horizontal line is not applied to the pixel PXij.

[0136] If the scan signal GI is supplied to the i-1th scan line SLi-1, the fourth transistor M4 is turned on. If the fourth transistor M4 is turned on, the voltage of the first initialization power Vint1 may be supplied to the third node N3, thereby initializing the third node N3.

[0137] Next, a voltage DATAij of a data signal corresponding to the i-th horizontal line is applied to the data line DLj, and a scan signal GW is supplied to the i-th scan line SLi. If the scan signal GW is supplied to the i-th scan line SLi, the second transistor M2, the third transistor M3, and the seventh transistor M7 are turned on.

[0138] If the third transistor M3 is turned on, the first transistor M1 may be diode-connected or diode-connected. If the second transistor M2 is turned on, the voltage DATAij of the data signal is supplied to the first node N1 of the pixel PXij. The voltage DATAij of the data signal supplied to the first node N1 may be supplied to the third node N3 via the first transistor M1 connected in the form of a diode. Here, a voltage corresponding to both the voltage DATAij of the data signal and the threshold voltage of the first transistor M1 may be applied to the third node N3. The storage capacitor Cst may store the voltage of the third node N3.

[0139] If the seventh transistor M7 is turned on, the voltage of the second initialization power Vint2 may be supplied to the first electrode of the light emitting element LD. The light emitting element LD (eg, the first electrode of the light emitting element LD) may be initialized by the voltage of the second initialization power Vint2.

[0140] Subsequently, a low voltage emission control signal EM is supplied to the emission control line ELk, thereby turning on the fifth transistor M5 and the sixth transistor M6. In this case, a current path connecting the first power line PL1, the fifth transistor M5, the first transistor M1, the sixth transistor M6, the light emitting element LD and the second power line PL2 is formed.

[0141] The first transistor M1 may control the amount of current to be supplied from the first power line PL1 to the second power line PL2 via the light emitting element LD in response to the voltage stored in the storage capacitor Cst. The light emitting element LD may emit light at a brightness corresponding to the amount of current supplied from the first transistor M1 during the emission period EP. The light emitting element LD may emit light until the emission control signal EM of a high voltage is supplied to the emission control line ELk.

[0142] When the emission control signal EM of a low voltage is supplied, the pixel PXij may be in a display state. Therefore, the period during which the emission control signal EM of a low voltage is supplied may be referred to as an emission period EP. When the emission control signal EM of a high voltage is supplied, the pixel PXij may be in a non-display state. Therefore, the period during which the emission control signal EM of a high voltage is supplied may be referred to as a non-emission period NEP. Each frame period may include at least one non-emission period NEP.

[0143] Figure 5A and Figure 5B is a diagram showing a channel length of the first transistor M1 in response to a brightness control signal. Figure 5A and Figure 5B A state in which current is supplied to the light emitting element LD is presented, and unnecessary components (eg, the fifth transistor M5 and the sixth transistor M6 ) are not shown.

[0144] Reference Figure 5A When the driving mode is set to the first mode, the timing controller 120 (refer to Figure 1 ) may supply the brightness control signal CB having a disabled state to the control line CL. If the brightness control signal CB of the disabled state is supplied to the control line CL, the eighth transistor M8 is turned off.

[0145] If the eighth transistor M8 is turned off, the amount of current supplied from the first power line PL1 to the second power line PL2 via the light emitting element LD may be controlled by the 1_1st sub-transistor M1_1 and the 1_2nd sub-transistor M1_2. When each of the 1_1st sub-transistor M1_1 and the 1_2nd sub-transistor M1_2 has a channel length of 10 μm, the channel length of the first transistor M1 may be 20 μm.

[0146] In other words, in the display device 100 (refer to Figure 1 ) in the case of driving in the first mode, including in the pixel PX (refer to Figure 1 ) may have a channel length of 20 μm, and in response thereto, the amount of current to be supplied to the light emitting element LD may be controlled.

[0147] Reference Figure 5B When the driving mode is set to the second mode, the timing controller 120 (refer to Figure 1 ) may supply the brightness control signal CB having an enabled state to the control line CL. If the brightness control signal CB of the enabled state is supplied to the control line CL, the eighth transistor M8 is turned on.

[0148] If the eighth transistor M8 is turned on, the first node N1 and the common node CN may be electrically connected to each other. In this case, the amount of current supplied from the first power line PL1 to the second power line PL2 via the light emitting element LD may be controlled by the 1_2nd sub-transistor M1_2. Here, the channel length of the first transistor M1 may be 10 μm. For example, the channel length may be calculated based on the 1_2nd sub-transistor M1_2 without considering the 1_1st sub-transistor M1_1.

[0149] In other words, in the embodiment of the present disclosure, the channel length of the first transistor M1 may change in response to the driving mode. When the channel length of the first transistor M1 changes, the amount of current to be supplied to the light emitting element LD may change in response to the voltage of the third node N3.

[0150] For example, in the case where the channel length of the first transistor M1 is reduced, the amount of current to be supplied to the light emitting element LD may be increased in response to the voltage of the third node N3. Figure 1 ) is in the second mode, the channel length of the first transistor M1 is set to be short, so that the amount of current to be supplied to the light emitting element LD can be increased.

[0151] When the display device 100 is driven in the first mode, the timing controller 120 may supply the brightness control signal CB having a disabled state, thereby the pixel element 110 (refer to Figure 1) can be set to the first brightness. When the display device 100 is driven in the second mode, the timing controller 120 can supply a brightness control signal CB having an enabled state, whereby the maximum brightness of the pixel component 110 can be set to a second brightness higher than the first brightness.

[0152] In other words, in the embodiment of the present disclosure, the channel length of the first transistor M1 may be changed in response to the driving mode, thereby controlling the brightness of the pixel component 110 .

[0153] Fig. 6A and Figure 6B is a diagram showing a mode change process in response to a brightness control signal. Figure 6B In FIG. 1 , for the convenience of explanation, four emission control lines EL1, EL2, EL3 and EL4 are shown. Figure 6B In , reference numeral LU1 represents the brightness of the first horizontal line in which the first emission control line EL1 is positioned. Similarly, reference numerals LU2, LU3, and LU4 represent the brightness of the second horizontal line in which the second emission control line EL2 is positioned, the brightness of the third horizontal line in which the third emission control line EL3 is positioned, and the brightness of the fourth horizontal line in which the fourth emission control line EL4 is positioned, respectively. Fig. 6A , the oblique arrows included in each of the frame periods represent the sequential supply of the scanning signal GW.

[0154] Reference Fig. 6A and Figure 6B , the scan signal GW may be sequentially supplied to the scan lines during a frame period. In addition, the emission control signal EM may be sequentially supplied to the emission control lines EL1 to EL4 during a frame period.

[0155] If the scan signal GW is sequentially supplied to the scan lines, the pixel PX (refer to Figure 1 ) is selected on a horizontal line basis, and the voltage of the data signal may be supplied to the pixel PX selected by the corresponding scan signal GW. Thereafter, the pixel PX may emit light in such a manner that the supply of the emission control signal EM is sequentially interrupted.

[0156] In response to the user's settings and / or external environment, the display device 100 (refer to Figure 1 ) can be changed from the first mode to the second mode. For example, when the frame of the display device 100 changes from the second frame 2F to the third frame 3F, the brightness control signal CB having an enabled state can be supplied to the control line CL.

[0157] If the brightness control signal CB having an enabled state is supplied to the control line CL, the first transistor M1 (refer to Figure 3) can be reduced, thereby, the brightness of each of the pixels PX can be increased. If the brightness control signal CB having an enabled state is supplied to the control line CL, the brightness of the pixel PX increases instantaneously, and the pixel element 110 (refer to Figure 1 )’s brightness change can be perceived by the user in the form of flickering.

[0158] Furthermore, when the driving mode of the display device 100 is changed from the first mode to the second mode, some pixels (eg, pixels emitting light in the area A1) may generate light with a brightness higher than the desired brightness. Figure 6B As shown in , when the brightness control signal CB having an enabled state is supplied to the control line CL during the third frame 3F, the brightness of some pixels that emit light in response to the data signal in the second frame 2F may increase. For example, the brightness of the pixels located in the second horizontal line, the third horizontal line, and the fourth horizontal line may increase.

[0159] In response to user settings and / or external environment, the driving mode of the display device 100 may be changed from the second mode to the first mode after the fourth frame 4F. For example, when changing from the fourth frame 4F to the fifth frame 5F, the brightness control signal CB having a disabled state may be supplied to the control line CL.

[0160] If the brightness control signal CB having a disabled state is supplied to the control line CL, the channel length of the first transistor M1 included in each of the pixels PX may increase, and thus, the brightness of each of the pixels PX may decrease. If the brightness control signal CB having a disabled state is supplied to the control line CL, the brightness of the pixel PX may decrease instantaneously.

[0161] In addition, when the driving mode of the display device 100 is changed from the second mode to the first mode, some pixels (for example, pixels emitting light in the area A2) may generate light with a brightness lower than the desired brightness. Figure 6B As shown in FIG. 5 , when the brightness control signal CB having a disabled state is supplied to the control line CL during the fifth frame 5F, the brightness of some pixels that emit light in response to the data signal in the fourth frame 4F may be reduced. For example, the brightness of the pixels located in the second horizontal line, the third horizontal line, and the fourth horizontal line may be reduced.

[0162] Figure 7 is a diagram illustrating a mode change process according to an embodiment of the present disclosure.

[0163] Reference Figure 1 and Figure 7, when the driving mode of the display device 100 is changed from the first mode to the second mode, the timing controller 120 supplies the brightness control signal CB having an enabled state to the control line CL. When the driving mode of the display device 100 is changed from the first mode to the second mode, the power supply 160 may increase the voltage of the second driving power VSS. The power supply 160 may increase the voltage of the second driving power VSS in response to receiving the enabled brightness control signal CB having an enabled state or a signal corresponding thereto from the timing controller 120.

[0164] When the driving mode of the display device 100 is changed from the first mode to the second mode, the power supply 160 may increase the voltage of the second driving power VSS from the first voltage V1 to the second voltage V2. For example, the power supply 160 may increase the voltage of the second driving power VSS at a first slope (or slope). Here, the first slope may be set to a slope substantially similar to a right angle.

[0165] When the voltage of the second driving power VSS increases from the first voltage V1 to the second voltage V2, the brightness of the pixel PX may decrease. The brightness reduction of the pixel PX corresponding to the increase in the voltage of the second driving power VSS may be similar or equivalent to the brightness increase corresponding to the change in the channel length of the first transistor M1 included in each of the pixels PX.

[0166] Therefore, when the second driving power VSS is increased to the second voltage V2 when the brightness control signal CB having the enabled state is supplied, the brightness of the pixel component 110 can be substantially maintained at the same (or similar) brightness regardless of the mode change. The value of the second voltage V2 can be experimentally determined to allow the pixel component 110 (or multiple pixels) to maintain constant brightness when changing from the first mode to the second mode.

[0167] After the voltage of the second driving power VSS has increased to the second voltage V2, the power supply 160 may maintain the second voltage V2 during the first period T1 (or a specific period of time). For example, the first period T1 may be set to a time of one or more frames. For example, the first period T1 may be set to a time of ten seconds or less. For example, the first period T1 may be experimentally determined depending on the type (e.g., resolution or size, etc.) of the display device 100.

[0168] The power supply 160 may reduce the voltage of the second driving power VSS from the second voltage V2 to the third voltage V3 at a second slope during a second period T2 after the first period T1. The second slope may be set to a gentler slope than the first slope. In other words, the power supply 160 may gradually reduce the voltage of the second driving power VSS from the second voltage V2 to the third voltage V3 during the second period T2.

[0169] When the voltage of the second driving power VSS is gradually reduced, the brightness of the pixel component 110 (or multiple pixels) can be gradually increased. In other words, in an embodiment of the present disclosure, the brightness of the pixel component 110 can be gradually increased when changing from the first mode to the second mode, thereby preventing flickering from being perceived by the observer.

[0170] The power supply 160 may maintain the second driving power VSS at the third voltage V3 during a third period T3 after the second period T2. When the second driving power VSS is maintained at the third voltage V3, the maximum brightness of the display device 100 may be set to the second brightness in response to the second mode.

[0171] In an embodiment, the second voltage V2 is a voltage higher than the first voltage V1 and the third voltage V3. In an embodiment, the third voltage V3 is a voltage substantially the same as the first voltage V1. In an embodiment, the third voltage V3 may be set to a voltage different from the first voltage V1. In an embodiment, the first voltage V1 may be set to enable a first brightness corresponding to the first mode. The third voltage V3 may be experimentally determined to enable a second brightness corresponding to the second mode.

[0172] Figure 8 1 is a diagram showing a mode change process according to an embodiment of the present disclosure. Figure 8 In the description of Figure 7 Explanation of overlapping descriptions.

[0173] Reference Figure 1 and Figure 8 When the driving mode of the display device 100 is changed from the first mode to the second mode, the power supply 160 may increase the voltage of the second driving power VSS from the first voltage V1 to the second voltage V2a. In addition, when the driving mode of the display device 100 is changed from the first mode to the second mode, the power supply 160 may increase the voltage of the first initialization power Vint1 from the 11th voltage V11 (or the first initialization voltage) to the 12th voltage V12 (or the second initialization voltage).

[0174] In the case where the voltage of the first initialization power Vint1 increases, the gate electrode of the first transistor M1 included in each of the pixels PX may be initialized to a high voltage (i.e., the 12th voltage V12), whereby the brightness of the pixel PX may be reduced. In the case where the voltage of the first initialization power Vint1 increases when the display device 100 changes from the first mode to the second mode, the second voltage V2a may be set to be higher than Figure 7 The second voltage V2 shown in is lower than the voltage (in other words, the voltage fluctuation range of the second driving power VSS can be reduced).

[0175] The brightness reduction of the pixel PX corresponding to the increase in the voltage of the second driving power VSS and the increase in the voltage of the first initialization power Vint1 may be similar or equivalent to the brightness increase corresponding to the change in the channel length of the first transistor M1 included in each of the pixels PX. In this case, a rapid increase in the brightness of the pixel component 110 when the driving mode of the display device 100 is changed from the first mode to the second mode can be prevented.

[0176] For example, when the second driving power VSS is increased to the second voltage V2a and the first initialization power Vint1 is increased to the 12th voltage V12 when the brightness control signal CB having the enabled state is supplied, the brightness of the pixel component 110 can be substantially maintained at the same (or similar) brightness regardless of the mode change. For example, the value of the second voltage V2a and the value of the 12th voltage V12 can be experimentally determined to allow the pixel component 110 (or multiple pixels) to maintain constant brightness when changing from the first mode to the second mode.

[0177] After the voltage of the second driving power VSS has increased to the second voltage V2a and the voltage of the first initialization power Vint1 has increased to the 12th voltage V12, the power supply 160 may maintain the second voltage V2a and the 12th voltage V12 during the first period T1 (or a specific period of time).

[0178] The power supply 160 may gradually reduce the voltage of the second driving power VSS from the second voltage V2a to the third voltage V3 during the second period T2 after the first period T1. In addition, the power supply 160 may gradually reduce the voltage of the first initialization power Vint1 from the 12th voltage V12 to the 13th voltage V13 (or the third initialization voltage) during the second period T2.

[0179] When the voltage of the second driving power VSS and the voltage of the first initialization power Vint1 are gradually reduced, the brightness of the pixel component 110 (or multiple pixels) can be gradually increased. In other words, in an embodiment of the present disclosure, the brightness of the pixel component 110 can be gradually increased when changing from the first mode to the second mode, thereby preventing flickering, etc. from being perceived by an observer.

[0180] The power supply 160 may maintain the second driving power VSS at the third voltage V3 during a third period T3 after the second period T2. The power supply 160 may maintain the first initialization power Vint1 at the 13th voltage V13 during a third period T3 after the second period T2.

[0181] In an embodiment, the 12th voltage V12 is a voltage higher than the 11th voltage V11 and the 13th voltage V13. In an embodiment, the 13th voltage V13 is a voltage substantially the same as the 11th voltage V11. In an embodiment, the 13th voltage V13 may be a voltage different from the 11th voltage V11.

[0182] Fig.9A and Fig. 9B is a diagram showing the response of the second driving power VSS (refer to Figure 1 ) of the voltage change of the first transistor M1 (refer to Figure 3 ) is a diagram showing the current change process. Fig.9A and Fig. 9B , Ids of the vertical axis represents the current flowing through the first transistor M1, and Vds of the horizontal axis represents the voltage between the first electrode and the second electrode of the first transistor M1. Vgs1, Vgs2, and Vgs3 refer to the voltage between the gate electrode and the first electrode of the first transistor M1.

[0183] Reference Fig.9A , at the second drive power VSS (refer to Figure 1 ) changes from the first voltage V1 to the second voltage V2, the light emitting element LD (refer to Figure 3 ) shifts to the left in the graph. When the characteristic curve of the light emitting element LD changes, the operating point changes in position, thereby changing from the first transistor M1 (refer to Figure 3 )The amount of current flowing out can be reduced.

[0184] For example, assuming that the voltage of Vgs3 is applied between the gate electrode and the source electrode of the first transistor M1, when the voltage of the second driving power VSS changes from the first voltage V1 to the second voltage V2, the amount of current may be reduced by the first current I1. Here, the amount of current of the first current I1 may be similar to or identical to the increase in the amount of current in response to the change in the channel length of the first transistor M1 when changing from the first mode to the second mode. Therefore, even if the display device 100 (refer to Figure 1 ) is changed from the first mode to the second mode, the pixel component 110 (refer to Figure 1 ) can also maintain constant brightness, thereby preventing brightness changes caused by mode changes from being perceived by the user.

[0185] Reference Fig. 9B , at the second drive power VSS (refer to Figure 1 ) changes from the second voltage V2 to the third voltage V3, the light emitting element LD (refer to Figure 3) shifts to the right in the graph. When the characteristic curve of the light emitting element LD changes, the operating point changes in position, thereby changing from the first transistor M1 (refer to Figure 3 )The amount of current flowing out can be increased.

[0186] For example, assuming that the voltage of Vgs3 is applied between the gate electrode and the source electrode of the first transistor M1 , when the voltage of the second driving power VSS changes from the second voltage V2 to the third voltage V3 , the amount of current may increase by the second current I2 .

[0187] Here, the voltage of the second driving power VSS may be Figure 7 ) is gradually reduced from the second voltage V2 to the third voltage V3. Therefore, the amount of current flowing through the first transistor M1 can be gradually increased, thereby, the brightness of the pixel component 110 can be smoothly increased.

[0188] In an embodiment, it may further include correcting the input data Din (refer to Figure 1 ) and generates output data Dout (refer to Figure 1 ) process so that it can respond to changes in the characteristic curve of the light emitting element LD (such as Fig.9A and Fig. 9B For example, in response to a change in the characteristic curve of the light-emitting element LD, the brightness of the pixel component 110 can be measured, and the input data Din can be corrected (e.g., optically compensated) so that grayscale expression can be reliably achieved in response to the measurement result.

[0189] Fig.10 is a diagram illustrating a mode change process according to an embodiment of the present disclosure.

[0190] Reference Figure 1 and Fig.10 When the driving mode of the display device 100 is changed from the second mode to the first mode, the timing controller 120 supplies the brightness control signal CB having a disabled state to the control line CL. When the driving mode of the display device 100 is changed from the second mode to the first mode, the power supply 160 may reduce the voltage of the second driving power VSS.

[0191] When the driving mode of the display device 100 is changed from the second mode to the first mode, the power supply 160 may reduce the voltage of the second driving power VSS from the third voltage V3 to the fourth voltage V4. For example, the power supply 160 may reduce the voltage of the second driving power VSS at a third slope. The third slope may be set to a slope substantially similar to or equal to a right angle.

[0192] When the voltage of the second driving power VSS is reduced from the third voltage V3 to the fourth voltage V4, the brightness of the pixel PX may be increased. The brightness increment of the pixel PX corresponding to the reduction of the second driving power VSS may be similar or equivalent to the brightness increment corresponding to the change in the channel length of the first transistor M1 included in each of the pixels PX.

[0193] Therefore, in the case where the second driving power VSS is reduced to the fourth voltage V4 when the brightness control signal CB in the disabled state is supplied, the brightness of the pixel component 110 can be substantially maintained at the same (or similar) brightness regardless of the mode change. For example, the value of the fourth voltage V4 can be experimentally determined to allow the pixel component 110 (or multiple pixels) to maintain a constant brightness when changing from the second mode to the first mode.

[0194] After the voltage of the second driving power VSS has been reduced to the fourth voltage V4, the power supply 160 may maintain the fourth voltage V4 during the 11th period T11 (or a specific period of time). For example, the 11th period T11 may be set to a time of one or more frames. For example, the 11th period T11 may be set to a time of ten seconds or less. For example, the 11th period T11 may be experimentally determined according to the type (e.g., resolution or size, etc.) of the display device 100.

[0195] The power supply 160 may increase the voltage of the second driving power VSS from the fourth voltage V4 to the first voltage V1 at a fourth slope during the 12th period T12 after the 11th period T11. The fourth slope may be set to a gentler slope than the third slope. In other words, the power supply 160 may gradually increase the voltage of the second driving power VSS from the fourth voltage V4 to the first voltage V1 during the 12th period T12.

[0196] When the voltage of the second driving power VSS gradually increases, the brightness of the pixel component 110 (or multiple pixels) can be gradually reduced. In other words, in an embodiment of the present disclosure, the brightness of the pixel component 110 can be gradually reduced when changing from the second mode to the first mode, thereby preventing flickering from being perceived by the observer.

[0197] The power supply 160 may maintain the second driving power VSS at the first voltage V1 during the 13th period T13 after the 12th period T12. When the second driving power VSS is maintained at the first voltage V1, the maximum brightness of the display device 100 may be set to the first brightness in response to the first mode.

[0198] Fig.11 1 is a diagram showing a mode change process according to an embodiment of the present disclosure. Fig.11 In the description of Fig.10Explanation of overlapping descriptions.

[0199] Reference Figure 1 and Fig.11 When the driving mode of the display device 100 is changed from the second mode to the first mode, the power supply 160 may reduce the voltage of the second driving power VSS from the third voltage V3 to the fourth voltage V4a. In addition, when the driving mode of the display device 100 is changed from the second mode to the first mode, the power supply 160 may reduce the voltage of the first initialization power Vint1 from the 13th voltage V13 to the 14th voltage V14.

[0200] In the case where the voltage of the first initialization power Vint1 is reduced, the gate electrode of the first transistor M1 included in each of the pixels PX can be initialized to a low voltage (i.e., the 14th voltage V14), whereby the brightness of the pixel PX can be increased. In the case where the voltage of the first initialization power Vint1 is reduced when the display device 100 is changed from the second mode to the first mode, the fourth voltage V4a can be set to be lower than Fig.10 The fourth voltage V4 shown in is a higher voltage (in other words, the voltage fluctuation range of the second driving power VSS can be reduced).

[0201] The brightness increment of the pixel PX corresponding to the decrease of the second driving power VSS and the decrease of the first initialization power Vint1 may be similar or identical to the first transistor M1 (refer to Figure 3 ) The brightness decreases corresponding to the change in the channel length of the pixel element 110. In this case, the rapid decrease in the brightness of the pixel element 110 when the driving mode of the display device 100 is changed from the second mode to the first mode can be prevented.

[0202] For example, in the case where the second driving power VSS is reduced to the fourth voltage V4a and the first initialization power Vint1 is reduced to the 14th voltage V14 when the brightness control signal CB having the disabled state is supplied, the brightness of the pixel component 110 can be substantially maintained at the same (or similar) brightness regardless of the mode change. For example, the value of the fourth voltage V4a and the value of the 14th voltage V14 can be experimentally determined to allow the pixel component 110 (or multiple pixels) to maintain constant brightness when changing from the second mode to the first mode.

[0203] After the voltage of the second driving power VSS has dropped to the fourth voltage V4a and the voltage of the first initialization power Vint1 has dropped to the 14th voltage V14, the power supply 160 may maintain the fourth voltage V4a and the 14th voltage V14 during the 11th period T11 (or a specific period).

[0204] The power supply 160 may gradually increase the voltage of the second driving power VSS from the fourth voltage V4a to the first voltage V1 during the 12th period T12 after the 11th period T11. In addition, the power supply 160 may gradually increase the voltage of the first initialization power Vint1 from the 14th voltage V14 to the 11th voltage V11 during the 12th period T12.

[0205] When the voltage of the second driving power VSS and the voltage of the first initialization power Vint1 gradually increase, the brightness of the pixel component 110 (or multiple pixels) can be gradually reduced. In other words, in an embodiment of the present disclosure, the brightness of the pixel component 110 can be gradually reduced when changing from the second mode to the first mode, thereby preventing flickering, etc. from being perceived by an observer.

[0206] The power supply 160 may maintain the second driving power VSS at the first voltage V1 during a 13th period T13 after the 12th period T12. The power supply 160 may maintain the first initialization power Vint1 at the 11th voltage V11 during a 13th period T13 after the second period T2.

[0207] Fig. 12A and Fig. 12B is a diagram showing the emission control signal EM (refer to Figure 3 ) waveform. Fig. 12A and Fig. 12B In FIG. 1 , for convenience of explanation, six emission control lines EL1 , EL2 , EL3 , EL4 , EL5 and EL6 are shown.

[0208] Reference Fig. 12A , when the display device 100 (refer to Figure 1 ) is changed from the first mode to the second mode, the emission control signal EM (reference Figure 3 ) can be simultaneously supplied to the emission control lines EL1 to EL6 (ie, the gate-off voltage can be simultaneously supplied to the emission control lines EL1 to EL6). If the emission control signal EM is simultaneously supplied to the emission control lines EL1 to EL6, the pixel PX (refer to Figure 1 ) is set to non-transmitting state.

[0209] As reference Figure 7 As described above, in the embodiment of the present disclosure, when the driving mode of the display device 100 is changed from the first mode to the second mode, the second driving power VSS (refer to Figure 1 ) can be increased from the first voltage V1 to the second voltage V2, thereby preventing the pixel component 110 (refer to Figure 1 )’s brightness change is perceived by the user.

[0210] However, since the second power line PL2 (refer to Figure 1 ), the second voltage V2 of the second driving power VSS may not be supplied to all pixels PX at the same time, resulting in a brightness difference between the upper and lower sides of the pixel component 110. Therefore, in an embodiment of the present disclosure, when the driving mode of the display device 100 is changed from the first mode to the second mode, the pixel PX can be set to a non-emitting state. Thus, the brightness difference corresponding to the change of the second driving power VSS in the pixel component 110 can be prevented from being perceived by the user.

[0211] Reference Fig. 12B , when the display device 100 (refer to Figure 1 ) is changed from the second mode to the first mode, the emission control signal EM (reference Figure 3 ) are simultaneously supplied to the emission control lines EL1 to EL6 (ie, the gate-off voltage can be simultaneously supplied to the emission control lines EL1 to EL6). If the emission control signal EM is simultaneously supplied to the emission control lines EL1 to EL6, the pixel PX (refer to Figure 1 ) is set to non-transmitting state.

[0212] In the case where the pixel PX is set to a non-emission state when the driving mode of the display device 100 is changed from the second mode to the first mode, the pixel element 110 (refer to Figure 1 ) and the second drive power VSS (refer to Figure 1 ) is perceived by the user.

[0213] Fig.13 is a diagram showing a driving mode of a display device. Fig.13 In the description of the present invention, a process of changing the driving mode from the first mode to the second mode will be omitted.

[0214] Reference Fig.13 In addition to the first mode and the second mode, the display device 100 (refer to Figure 1 )'s driving mode may also include a normal mode.

[0215] In the normal mode, the maximum brightness may be set to the normal brightness. In the first mode, the maximum brightness may be set to the first brightness. In the second mode, the maximum brightness may be set to the second brightness. The first brightness may be set to a brightness higher than the normal brightness. The second brightness may be set to a brightness higher than the first brightness. For example, the normal brightness may be set to about 420 nits. The first brightness may be set to about 800 nits. The second brightness may be set to 1200 nits or more, for example, 2000 nits.

[0216] When the driving mode is changed from the normal mode to the first mode, the voltage of the second driving power VSS may be gradually reduced from the fifth voltage V5 to the first voltage V1. When the voltage of the second driving power VSS is gradually reduced, the pixel component 110 (refer to Figure 1 ) can gradually increase. If the voltage of the second driving power VSS is reduced to the first voltage V1, the maximum brightness of the pixel component 110 can be set to the first brightness. In addition, if the voltage of the second driving power VSS is gradually reduced when the driving mode is changed from the normal mode to the first mode, the brightness change of the pixel component 110 can be prevented from being perceived by the user.

[0217] In addition, the fifth voltage V5 may be the same voltage as the second voltage V2, but the present disclosure is not limited thereto. For example, the fifth voltage V5 may be set to a voltage different from the second voltage V2. In an embodiment, the fifth voltage V5 may be experimentally determined so that a normal brightness as the maximum brightness in the normal mode may be achieved.

[0218] Fig.14 is a diagram illustrating an electronic device 1000 according to an embodiment of the present disclosure.

[0219] Reference Fig.14 , the electronic device 1000 according to an embodiment of the present disclosure may output various information through the display module 1140. If the processor 1110 executes an application stored in the memory 1120, the display module 1140 may provide application information to the user through the display panel 1141. For example, the display panel 1141 may be Figure 1 The pixel component 110 is shown in FIG.

[0220] The processor 1110 may obtain an external input through the input module 1130 or the sensor module 1161, and execute an application corresponding to the external input. For example, in the case where the user selects a camera icon (or a camera application icon) displayed in the display panel 1141, the processor 1110 may obtain the user input through the input sensor 1161-2, and activate the camera module 1171. The processor 1110 may send image data corresponding to an image captured by the camera module 1171 to the display module 1140. The display module 1140 may display an image corresponding to the captured image in the display panel 1141.

[0221] As another example, in the case of performing personal information authentication through the display module 1140, the fingerprint sensor 1161-1 can obtain the input fingerprint information as input data. The processor 1110 can compare the input data obtained through the fingerprint sensor 1161-1 with the authentication data stored in the memory 1120, and can execute the application according to the result of the comparison. The display module 1140 can display information executed according to the logic of the application in the display panel 1141. The fingerprint sensor 1161-1 can be configured so that fingerprint information can be obtained in the entire area of ​​the display module 1140 (or the display panel 1141).

[0222] As yet another example, in a case where a music streaming icon displayed on the display module 1140 is selected, the processor 1110 may acquire a user input through the input sensor 1161-2 and activate a music streaming application stored in the memory 1120. If a music play command is input in the music streaming application, the processor 1110 may activate the sound output module 1163 and provide the user with sound information corresponding to the music play command.

[0223] So far, a brief description of the operation of the electronic device 1000 has been provided. Hereinafter, the configuration of the electronic device 1000 will be described in detail. Some components of the electronic device 1000 to be described below may be integrated into a single component, or one component may be separated into two or more components.

[0224] The electronic device 1000 can communicate with the external electronic device 2000 through a network (e.g., a short-range wireless communication network or a long-range wireless communication network). In an embodiment, the electronic device 1000 may include a processor 1110, a memory 1120, an input module 1130, a display module 1140, a power module 1150, an embedded module 1160, and an external installation module 1170. In an embodiment, in the electronic device 1000, at least one of the aforementioned components may be omitted, or one or more other components may be added. In an embodiment, some of the aforementioned components (e.g., a sensor module 1161, an antenna module 1162, or a sound output module 1163) may be integrated into another component (e.g., a display module 1140).

[0225] The processor 1110 may execute software to control at least one other component (e.g., a hardware component or a software component) of the electronic device 1000 connected to the processor 1110, and perform various data processing or computing operations. In an embodiment, as at least part of the data processing or computing operation, the processor 1110 may store a command or data received from another component (e.g., the input module 1130, the sensor module 1161, or the communication module 1173) in the volatile memory 1121, process the command or data stored in the volatile memory 1121, and store the result data in the non-volatile memory 1122.

[0226] The processor 1110 may include a main processor 1111 and an auxiliary processor 1112. The main processor 1111 may include one or more of a central processing unit (CPU) 1111-1 and an application processor (AP). The main processor 1111 may also include any one or more of a graphics processing unit (GPU) 1111-2, a communication processor (CP), and an image signal processor (ISP). The main processor 1111 may also include a neural processing unit (NPU) 1111-3. NPU 1111-3 may be a processor dedicated to processing an artificial intelligence model. The artificial intelligence model may be generated by machine learning. The artificial intelligence model may include multiple artificial neural network layers. The artificial neural network may be a deep neural network (DNN), a convolutional neural network (CNN), a recursive neural network (RNN), a restricted Boltzmann machine (RBM), a deep belief network (DBN), a bidirectional recursive deep neural network (BRDNN), a deep Q network, or a combination of two or more of the foregoing networks, but is not limited thereto. The artificial intelligence model may include not only a hardware structure, but also an additional or alternative software structure. At least two of the aforementioned processing units and processors may be implemented as a single integrated component (eg, a single chip). Alternatively, the processing units and processors may be implemented as respective independent components (eg, multiple chips).

[0227] The auxiliary processor 1112 may include a controller 1112-1. The controller 1112-1 may include an interface conversion circuit and a timing control circuit. For example, the controller 1112-1 may include Figure 1 The timing controller 120 shown in FIG. 1112-1 may receive an image signal from the main processor 1111, and may convert the data format of the image signal into a format corresponding to the specification of the interface with the display module 1140 and output the image data. The controller 1112-1 may output various control signals required to drive the display module 1140.

[0228] The main processor 1111 may obtain mode information of the display module 1140 corresponding to the user's setting from the input module 1130 or the sensor module 1161, and generate a driving mode signal corresponding to the mode information. The driving mode signal generated from the main processor 1111 may be supplied to the auxiliary processor 1112 (or the controller 1112-1). In addition, the main processor 1111 may obtain mode information of the display module 1140 in response to the external light intensity measured by the embedded module 1160, and may supply a driving mode signal corresponding to the mode information to the auxiliary processor 1112 (or the controller 1112-1). The driving mode signal may correspond to a normal mode, a first mode, or a second mode.

[0229] The auxiliary processor 1112 (or the controller 1112-1) supplied with the driving mode signal may generate an enabled brightness control signal CB (refer to Figure 1 ) or disable the brightness control signal CB, and supply the generated brightness control signal CB to the control line CL (refer to Figure 1 ).

[0230] The auxiliary processor 1112 may further include a data conversion circuit 1112-2, a gamma correction circuit 1112-3, a rendering circuit 1112-4, and a touch control circuit (not shown), etc. The data conversion circuit 1112-2 may receive image data from the controller 1112-1, compensate the image data so that the image can be displayed at a desired brightness according to the characteristics of the electronic device 1000 or the user's settings, or may convert the image data to reduce power consumption or compensate for afterimages.

[0231] The gamma correction circuit 1112-3 may convert image data or a gamma reference voltage, etc. so that an image to be displayed in the electronic device 1000 may have a desired gamma characteristic. The rendering circuit 1112-4 may receive image data from the controller 1112-1 and render the image data in consideration of a pixel arrangement, etc. in a display panel 1141 applied to the electronic device 1000.

[0232] The touch control circuit may supply a touch signal to the input sensor 1161 - 2 and receive a sensing signal from the input sensor 1161 - 2 in response to the touch signal.

[0233] At least one of the data conversion circuit 1112-2, the gamma correction circuit 1112-3, the rendering circuit 1112-4, and the touch control circuit may be integrated into another component (e.g., the main processor 1111 or the controller 1112-1). At least one of the data conversion circuit 1112-2, the gamma correction circuit 1112-3, and the rendering circuit 1112-4 may be integrated into a source driver 1143 to be described below.

[0234] The memory 1120 may store various data to be used in at least one component of the electronic device 1000 (e.g., the processor 1110 or the sensor module 1161) and input data or output data for a command related to the data. In addition, the memory 1120 may store various setting data corresponding to the user's settings. The memory 1120 may include at least one of a volatile memory 1121 and a non-volatile memory 1122.

[0235] The input module 1130 may receive commands or data to be used in components of the electronic device 1000 (e.g., the processor 1110, the sensor module 1161, or the sound output module 1163) from an external device disposed outside the electronic device 1000 (e.g., a user or an external electronic device 2000).

[0236] The input module 1130 may include a first input module 1131 configured to receive a command or data input from a user and a second input module 1132 configured to receive a command or data input from an external electronic device 2000. The first input module 1131 may include a microphone, a mouse, a keyboard, a key (e.g., a button) or a pen (e.g., a passive pen or an active pen). The second input module 1132 may support a specified protocol that can be connected to the external electronic device 2000 in a wired or wireless manner. In an embodiment, the second input module 1132 may include a high-definition multimedia interface (HDMI), a universal serial bus (USB) interface, an SD card interface, or an audio interface. The second input module 1132 may include a connector for physical connection to the external electronic device 2000, for example, an HDMI connector, a USB connector, an SD card connector, or an audio connector (e.g., a headphone connector).

[0237] The display module 1140 may provide visual information to the user. The display module 1140 may include a display panel 1141, a gate driver 1142, and a source driver 1143. The display module 1140 may also include a window, a base, and a bracket to protect the display panel 1141. The display module 1140 may include Figure 1 The display device 100 shown in FIG. The gate driver 1142 may correspond to Figure 1 The source driver 1143 may correspond to the scan driver 130 shown in FIG. Figure 1 The display module 1140 may additionally include Figure 1 The timing controller 120 and the emission driver 150 are shown in FIG.

[0238] The display panel 1141 (or display) may include a liquid crystal display panel, an organic light emitting display panel, or an inorganic light emitting display panel. The type of the display panel 1141 is not limited to a specific type. The display panel 1141 is a rigid type panel or a rollable or foldable flexible type panel. The display module 1140 may also include a support, a bracket, or a radiator that can support the display panel 1141.

[0239] The display panel 1141 may receive image data from the auxiliary processor 1112, and control the display of the image data through the light emitting element LD (see FIG. Figure 3 ) from the first power line PL1 (refer to Figure 3 ) flows to the second power line PL2 (refer to Figure 3 ) while displaying an image.

[0240] The gate driver 1142 may be mounted on the display panel 1141 as a driving chip. The gate driver 1142 may be integrated in the display panel 1141. For example, the gate driver 1142 may include an amorphous silicon thin film transistor (TFT) gate (ASG) driver circuit, a low temperature polysilicon (LTPS) TFT gate driver circuit, or an oxide semiconductor TFT gate (OSG) driver circuit built into the display panel 1141. The gate driver 1142 may receive a control signal from the controller 1112-1 and output a scan signal to the display panel 1141 in response to the control signal. The gate driver 1142 may include Figure 1 The scan driver 130 shown in FIG.

[0241] The display module 1140 may further include an emission driver. The emission driver may output an emission control signal to the display panel 1141 in response to a control signal received from the controller 1112-1. The emission driver may be formed separately from the gate driver 1142 or may be integrated into the gate driver 1142. The emission driver may include Figure 1 The transmit driver 150 shown in FIG.

[0242] The source driver 1143 may receive a control signal from the controller 1112-1, convert the image data into an analog voltage (eg, a data signal) in response to the control signal, and output the data signal to the display panel 1141. The source driver 1143 may include Figure 1 The data driver 140 is shown in FIG.

[0243] The source driver 1143 may be integrated into another component (eg, the controller 1112 - 1 ). The function of the interface conversion circuit and the function of the timing control circuit of the controller 1112 - 1 may be integrated into the source driver 1143 .

[0244] The display module 1140 may further include a voltage generating circuit 1144. The voltage generating circuit 1144 may output various voltages required to drive the display panel 1141. For example, the voltage generating circuit 1144 may include Figure 1 In other words, the voltage generating circuit 1144 can control the second driving power VSS (see Figure 1 ) and / or the first initialization power Vint1 (refer to Figure 1 ) voltage. Figures 1 to 13 Detailed descriptions related thereto have been made, and thus, redundant descriptions will be omitted.

[0245] In an embodiment, the display panel 1141 may include a plurality of pixel columns, each of the plurality of pixel columns including a plurality of pixels.

[0246] In an embodiment, the source driver 1143 may convert data included in the image data received from the processor 1110 and corresponding to red (R), green (G), and blue (B) into a red data signal (or data voltage), a green data signal, and a blue data signal, and provide the data signals to a plurality of pixel columns included in the display panel 1141 during a single horizontal period.

[0247] The power module 1150 can supply power to the components of the electronic device 1000. The power module 1150 may include a battery to store power voltage. The battery may include a non-rechargeable primary battery and a rechargeable secondary battery or a fuel cell. The power module 1150 may include a power management integrated circuit (PMIC). The PMIC may supply optimized power to each of the aforementioned modules and the modules to be described below. The power module 1150 may include a wireless power transceiver electrically connected to the battery. The wireless power transceiver may include a plurality of coil-type antenna radiators.

[0248] The electronic device 1000 may further include an embedded module 1160 and an external mounting module 1170. The embedded module 1160 may include a sensor module 1161, an antenna module 1162, and a sound output module 1163. The external mounting module 1170 may include a camera module 1171, an optical module 1172, and a communication module 1173.

[0249] The sensor module 1161 may sense input from a user's body or input from a pen of the first input module 1131 and generate an electrical signal or data value corresponding to the input. The sensor module 1161 may include at least one of a fingerprint sensor 1161-1, an input sensor 1161-2, and a digitizer 1161-3.

[0250] The fingerprint sensor 1161-1 may generate a data value corresponding to the fingerprint of the user. The fingerprint sensor 1161-1 may include any one of an optical fingerprint sensor and a capacitive fingerprint sensor.

[0251] The input sensor 1161-2 may generate a data value corresponding to the coordinate information of the input from the user's body or the input from the pen. The input sensor 1161-2 may generate a data value corresponding to the amount of change in capacitance caused by the input. The input sensor 1161-2 may sense the input from the passive pen, or send data to or receive data from the active pen.

[0252] The input sensor 1161-2 may measure a biometric signal related to biometric information such as blood pressure, body fluid, or body fat. For example, when a user brings a part of his / her body into contact with the sensor layer or sensing panel and remains still for a certain period of time, the input sensor 1161-2 may sense a biometric signal based on a change in an electric field caused by the part of his / her body and output information desired by the user to the display module 1140.

[0253] The digitizer 1161-3 may generate data values ​​corresponding to coordinate information of the input from the pen. The digitizer 1161-3 may generate data values ​​corresponding to electromagnetic changes caused by the input. The digitizer 1161-3 may sense input from a passive pen, or send or receive data to or from an active pen.

[0254] At least one of the fingerprint sensor 1161-1, the input sensor 1161-2, and the digitizer 1161-3 may be implemented as a sensor layer formed on the display panel 1141 through a continuous process. At least one of the fingerprint sensor 1161-1, the input sensor 1161-2, and the digitizer 1161-3 may be disposed above the display panel 1141. Any one of the fingerprint sensor 1161-1, the input sensor 1161-2, and the digitizer 1161-3 (e.g., the digitizer 1161-3) may be disposed under the display panel 1141.

[0255] At least two of the fingerprint sensor 1161-1, the input sensor 1161-2, and the digitizer 1161-3 may be formed by the same process to be integrated into a single sensing panel. In the case where at least two of the fingerprint sensor 1161-1, the input sensor 1161-2, and the digitizer 1161-3 are integrated into a single sensing panel, the sensing panel may be disposed between the display panel 1141 and a window disposed above the display panel 1141. In an embodiment, the sensing panel may be disposed on the window, and the position of the sensing panel is not particularly limited.

[0256] At least one of the fingerprint sensor 1161-1, the input sensor 1161-2, and the digitizer 1161-3 may be embedded in the display panel 1141. In other words, during a process of forming components (e.g., light emitting elements and transistors, etc.) included in the display panel 1141, at least one of the fingerprint sensor 1161-1, the input sensor 1161-2, and the digitizer 1161-3 may be formed simultaneously with these components.

[0257] In addition, the sensor module 1161 may generate an electrical signal or a data value corresponding to an internal condition or an external condition of the electronic device 1000. The sensor module 1161 may also include, for example, a gesture sensor, a gyro sensor, an atmospheric sensor, a magnetic sensor, an acceleration sensor, a grip sensor, a proximity sensor, a color sensor, an infrared (IR) sensor, a biometric sensor, a temperature sensor, a humidity sensor, or an illumination sensor.

[0258] The antenna module 1162 may include one or more antennas for sending signals or power to an external device or receiving signals or power from an external device. In an embodiment, the communication module 1173 may send signals to an external electronic device or receive signals from an external electronic device through an antenna suitable for the communication scheme. The antenna pattern of the antenna module 1162 may be integrated into a component of the display module 1140 (e.g., the display panel 1141 of the display module 1140) or the input sensor 1161-2.

[0259] The sound output module 1163 may be a device for outputting a sound signal to a device provided outside the electronic device 1000, and may include, for example, a speaker for typical purposes (such as reproducing multimedia or recording data) and a receiver for telephone reception only. In an embodiment, the receiver may be formed integrally with the speaker or separately. The sound output pattern of the sound output module 1163 may be integrated into the display module 1140.

[0260] The camera module 1171 can capture still images or videos. In an embodiment, the camera module 1171 may include one or more lenses, image sensors, or image signal processors. The camera module 1171 may also include an infrared camera capable of sensing the presence of a user, the position of a user, the sight of a user, etc.

[0261] The light module 1172 may provide light. The light module 1172 may include a light emitting diode or a xenon lamp. The light module 1172 may operate interlocked with the camera module 1171 or operate independently of the camera module 1171.

[0262] The communication module 1173 can form a wired or wireless communication channel between the electronic device 1000 and the external electronic device 2000, and support the execution of communication through the formed communication channel. The communication module 1173 may include any one or both of a wireless communication module (such as a cellular communication module, a short-range wireless communication module, or a global navigation satellite system (GNSS) communication module) and a wired communication module (such as a local area network (LAN) communication module or a power line communication module). The communication module 1173 can communicate with the external electronic device 2000 through a short-range communication network (such as Bluetooth, WiFi Direct, or Infrared Data Association (IrDA)) or a long-range communication network (such as a cellular network, the Internet, or a computer network (e.g., LAN or WAN)). The above-mentioned various types of communication modules 1173 can be implemented as a single chip, or can be implemented as corresponding independent chips.

[0263] The input module 1130 , the sensor module 1161 , the camera module 1171 , and the like interacting with the processor 1110 may be used to control the operation of the display module 1140 .

[0264] The processor 1110 may output a command or data to the display module 1140, the sound output module 1163, the camera module 1171, or the optical module 1172 based on the input data received from the input module 1130. For example, the processor 1110 may generate image data in response to input data applied through a mouse or an active pen, etc. and output the image data to the display module 1140, or may generate command data in response to the input data and output the command data to the camera module 1171 or the optical module 1172. In the case where no input data is received from the input module 1130, the processor 1110 may convert the operation mode of the electronic device 1000 into a low power mode or a sleep mode, thereby reducing the power consumption of the electronic device 1000.

[0265] The processor 1110 may output a command or data to the display module 1140, the sound output module 1163, the camera module 1171, or the optical module 1172 based on the sensing data received from the sensor module 1161. For example, the processor 1110 may compare the authentication data applied from the fingerprint sensor 1161-1 with the authentication data stored in the memory 1120, and may execute an application according to the result of the comparison. The processor 1110 may execute a command based on the sensing data sensed by the input sensor 1161-2 or the digitizer 1161-3, or output corresponding image data to the display module 1140. In the case where the sensor module 1161 includes a temperature sensor, the processor 1110 may receive temperature data for the measured temperature from the sensor module 1161, and further perform a brightness correction operation on the image data based on the temperature data.

[0266] The processor 1110 may receive measurement data for the presence of a user, the position of a user, or the sight of a user from the camera module 1171. The processor 1110 may further perform a brightness correction operation on the image data based on the measurement data. For example, the processor 1110, which has determined whether a user exists through input from the camera module 1171, may output image data whose brightness has been corrected by the data conversion circuit 1112-2 or the gamma correction circuit 1112-3 to the display module 1140.

[0267] Some of the aforementioned components may be connected to each other through a communication scheme that can be used between peripheral devices (e.g., a bus, a general purpose input / output (GPIO), a serial peripheral interface (SPI), a mobile industry processor interface (MIPI), or an ultra-path interconnect (UPI) link), and signals (e.g., commands or data) may be exchanged therebetween. The processor 1110 may communicate with the display module 1140 through a predefined interface. For example, any of the aforementioned communication schemes may be used, and the interface is not limited to the aforementioned communication schemes.

[0268] In a display device, a method for driving the display device, and an electronic device including the display device according to an embodiment of the present disclosure, when the maximum brightness of the display device changes, the voltage of the second driving power and / or the first initialization power can be changed to prevent a flickering phenomenon.

[0269] In a display device, a method for driving the display device, and an electronic device including the display device according to an embodiment of the present disclosure, when the maximum brightness of the display device changes, pixels can be set to a non-emitting state, thereby preventing the change in brightness from being perceived by a user.

[0270] However, the effects of the present disclosure are not limited to the above-described effects, and various modifications are possible without departing from the spirit and scope of the present disclosure.

[0271] While embodiments of the present disclosure have been described above, those skilled in the art will appreciate that various modifications, additions and substitutions are possible, without departing from the scope and spirit of the disclosure as claimed in the accompanying claims.

Claims

1. A display device, in, The display device comprises: a power supply configured to supply a voltage of a first driving power to the first power line and to supply a voltage of a second driving power to the second power line; a display panel including a plurality of pixels connected to a plurality of scan lines and a plurality of data lines, and each of the plurality of pixels including a first transistor and a light emitting element, the first transistor being configured to control an amount of current supplied from the first power line to the second power line via the light emitting element; and a timing controller configured to supply a brightness control signal to the plurality of pixels, Wherein, each of the plurality of pixels further comprises: a control transistor connected in parallel to some of the plurality of sub-transistors corresponding to the first transistor, and the control transistor is configured to be turned on in response to receiving the brightness control signal having an enabled state, Wherein, when the brightness control signal having the enabled state is supplied to the plurality of pixels, the power supply changes the voltage of the second driving power.

2. The display device according to claim 1, in, When the brightness control signal changes from the disabled state to the enabled state, the power supply increases the second driving power from a first voltage to a second voltage higher than the first voltage.

3. The display device according to claim 2, in, The power supply maintains the second driving power at the second voltage for a period of time, and then gradually reduces the second driving power to a third voltage lower than the second voltage.

4. The display device according to claim 3, in, The third voltage is the same as the first voltage.

5. The display device according to claim 3, in, The third voltage is different from the first voltage.

6. The display device according to claim 3, in, The power supply also supplies first initialization power to the plurality of pixels, the first initialization power being used to initialize the gate electrode of the first transistor.

7. The display device according to claim 6, in, When the brightness control signal changes from the disabled state to the enabled state, the power supply increases the first initialization power from a first initialization voltage to a second initialization voltage higher than the first initialization voltage.

8. The display device according to claim 7, in, The power supply maintains the first initialization power at the second initialization voltage for the period of time, and then gradually reduces the first initialization power to a third initialization voltage lower than the second initialization voltage.

9. The display device according to claim 1, in, When the brightness control signal changes from the enabled state to the disabled state, the power supply reduces the second driving power from a first voltage to a second voltage lower than the first voltage.

10. The display device according to claim 9, in, The power supply maintains the second driving power at the second voltage for a period of time, and then gradually increases the second driving power to a third voltage higher than the second voltage.

11. The display device according to claim 10, in, The power supply also supplies first initialization power to the plurality of pixels, the first initialization power being used to initialize the gate electrode of the first transistor.

12. The display device according to claim 11, in, When the brightness control signal changes from the enabled state to the disabled state, the power supply reduces the first initialization power from a first initialization voltage to a second initialization voltage lower than the first initialization voltage.

13. The display device according to claim 12, in, The power supply maintains the first initialization power at the second initialization voltage for the period of time, and then gradually increases the first initialization power to a third initialization voltage higher than the second initialization voltage.

14. The display device according to claim 1, in, The display device further includes a plurality of emission control lines connected to the plurality of pixels, Each of the plurality of pixels is controlled during an emission period by an emission control signal supplied to a corresponding emission control line among the plurality of emission control lines connected to each of the plurality of pixels.

15. The display device according to claim 14, in, The display device further includes an emission driver configured to supply emission control signals to the plurality of emission control lines. When the brightness control signal changes from the disabled state to the enabled state, the emission driver simultaneously supplies the emission control signal having the disabled state to the plurality of emission control lines to prevent the plurality of pixels from emitting light.

16. The display device according to claim 15, in, When the brightness control signal changes from the enabled state to the disabled state, the emission driver simultaneously supplies the emission control signal having the disabled state to the plurality of emission control lines.

17. The display device according to claim 1, in, In each of the plurality of pixels: The light emitting element includes a second electrode electrically connected to the second power line; The first transistor includes the plurality of sub-transistors connected in series between a first node and a second node, the first node being electrically connected to the first power line during an emission period in which the light emitting element emits light, and the second node being electrically connected to a first electrode of the light emitting element during the emission period; as well as The control transistor is connected to the first node and a common node between the plurality of sub-transistors, the control transistor has a gate electrode connected to a control line, and the control transistor is configured to be turned on when the brightness control signal having the enabled state is supplied to the control line, and to be turned off when the brightness control signal having the disabled state is supplied to the control line.

18. The display device according to claim 17, in, Each of the plurality of pixels further comprises: a second transistor connected between a corresponding data line among the plurality of data lines and the first node and including a gate electrode electrically connected to the first scan line; a third transistor connected between the second node and a third node to which the plurality of gate electrodes of the plurality of sub-transistors are connected and including a gate electrode electrically connected to a second scan line; a fourth transistor connected between the third node and a third power line configured to receive the first initialization power and including a gate electrode electrically connected to a third scan line; a fifth transistor connected between the first power line and the first node and including a gate electrode electrically connected to an emission control line; a sixth transistor connected between the second node and the first electrode of the light emitting element and including a gate electrode electrically connected to the emission control line; and A seventh transistor is connected between the first electrode of the light emitting element and a fourth power line configured to receive a second initialization power and includes a gate electrode electrically connected to a fourth scan line.

19. The display device according to claim 17, in, The control line is commonly connected to the plurality of control transistors included in the plurality of pixels.

20. The display device according to claim 17, in, The display device includes a first mode and a second mode, wherein the maximum brightness of the display panel is set to a first brightness in the first mode, and the maximum brightness of the display panel is set to a second brightness higher than the first brightness in the second mode, The timing controller supplies the brightness control signal having the disabled state when the driving mode is set to the first mode, and supplies the brightness control signal having the enabled state when the driving mode is set to the second mode.

21. The display device according to claim 20, in, The display device further includes a normal mode, in which the maximum brightness of the display panel is set to a normal brightness lower than the first brightness. When the driving mode is changed from the normal mode to the first mode, the power supply gradually reduces the voltage of the second driving power.

Citation Information

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