Driving method for display screen and source operational amplifier thereof

Abstract

The invention discloses a driving method, a driving circuit thereof and a source operational amplifier. The driving method comprises the following steps of: configuring the source operational amplifier to drive a display component; when the display component is refreshed at a first refresh rate, operating the source operational amplifier at a first bias current value; and when the display component is refreshed at a second refresh rate different from the first refresh rate, operating the source operational amplifier at a second bias current value different from the first bias current value.

Description

Technical Field

[0001] The present invention relates to a driving method for a display screen, and in particular to a driving method that can be used in a driving circuit to control a display screen and a related source operational amplifier (SOP) included in the driving circuit. Background Art

[0002] Low-Temperature Polycrystalline Oxide (LTPO) technology is an evolution of Low-Temperature Polycrystalline Silicon (LTPS). On a LTPO panel, the thin-film transistor (TFT) in the pixel coupled to the storage capacitor is implemented by an NMOS transistor, which can be completely turned off in the off state, minimizing the leakage current and completely disconnecting the leakage path of the capacitor charge. Due to the low leakage characteristics, LTPO displays can support extremely low frame rates, such as 1Hz (refresh once per second) or 0.016Hz (refresh once per minute).

[0003] In a display driver integrated circuit (DDIC), a source operational amplifier (SOP) used to output display data voltage to a display screen usually uses a chopper technique to eliminate the voltage offset of the source operational amplifier. The voltage offset of the source operational amplifier refers to the voltage error between the two input terminals of the source operational amplifier. However, if the panel is displayed at an extremely low frame rate (such as 1Hz or 0.016Hz), the same image will stay on the panel for too long. When using the chopper technique, the brightness deviation caused by the voltage offset is easily observed. In view of this, the prior art really needs to be improved. Summary of the invention

[0004] Therefore, the main purpose of the present invention is to propose a new driving method for a display screen and a related source operational amplifier (SOP) to solve the above problems.

[0005] An embodiment of the present invention discloses a driving method, which includes the following steps: configuring a source operational amplifier to drive a display component; when the display component is refreshed at a first refresh rate, operating the source operational amplifier at a first bias current value; and when the display component is refreshed at a second refresh rate different from the first refresh rate, operating the source operational amplifier at a second bias current value different from the first bias current value.

[0006] Another embodiment of the present invention discloses a driving method for driving a plurality of display components. The driving method comprises the following steps: configuring a source operational amplifier to drive the plurality of display components; when a first display component among the plurality of display components is refreshed at a first refresh rate, operating the source operational amplifier at a first bias current value; and when a second display component among the plurality of display components is refreshed at a second refresh rate different from the first refresh rate, operating the source operational amplifier at a second bias current value different from the first bias current value.

[0007] Another embodiment of the present invention discloses a driving circuit, which includes a source operational amplifier for driving a plurality of display components. When a first display component among the plurality of display components is refreshed at a first refresh rate, the source operational amplifier operates at a first bias current value, and when a second display component among the plurality of display components is refreshed at a second refresh rate different from the first refresh rate, the source operational amplifier operates at a second bias current value different from the first bias current value.

[0008] Another embodiment of the present invention discloses a driving circuit, which includes a first source operational amplifier and a second source operational amplifier. The first source operational amplifier is used to drive a first display component on a display screen. The second source operational amplifier is used to drive a second display component on the display screen. When the first display component is refreshed at a first refresh rate, the first source operational amplifier operates at a first bias current value, and when the second display component is refreshed at a second refresh rate different from the first refresh rate, the second source operational amplifier operates at a second bias current value different from the first bias current value.

[0009] Another embodiment of the present invention discloses a source operational amplifier for driving a plurality of display components on a display screen. The source operational amplifier includes a differential input pair, a current source pair, and a first bias control circuit. The differential input pair is used to receive an input signal of the source operational amplifier. The current source pair is used to provide an operating current to the source operational amplifier. The first bias control circuit is used to supply a first bias current to one of the differential input pair and the current source pair. When a refresh rate of a display component among the plurality of display components driven by the source operational amplifier changes, the first bias current generated by the first bias control circuit is adjusted accordingly. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 A schematic diagram of a source operational amplifier using chopper technology.

[0011] Figure 2 The pixel configuration of the chopper settings over several image frames is shown.

[0012] Figure 3A is a waveform diagram for illustrating the operation of a driving circuit at a normal frame rate.

[0013] Figure 3B The waveform diagram is used to illustrate a driving circuit utilizing frame skipping technology to perform low frame rate operation.

[0014] Figure 4A and Figure 4B A comparison of the chopper effect achieved at different bias currents is shown.

[0015] Figure 5 The figure is a flowchart of a driving process according to an embodiment of the present invention.

[0016] Figure 6 FIG. 4 is a flow chart of an algorithm executed by a driving circuit according to an embodiment of the present invention.

[0017] Figure 7 An exemplary operation mode of the driving circuit of the first embodiment of the present invention under a variable frame rate is shown.

[0018] Figure 8 Another exemplary operation mode of the driving circuit under a variable frame rate according to the first embodiment of the present invention is shown.

[0019] Fig. 9 An exemplary implementation of a driving circuit in accordance with the first embodiment of the present invention using an inter-frame touch driving mode to achieve a variable frame rate is shown.

[0020] Fig.10 It shows that an image frame on a display screen is divided into a plurality of areas to allocate different frame rates.

[0021] Fig.11 An exemplary operation mode of the driving circuit according to the first embodiment of the present invention under a variable frame rate with multi-zone frame rate application is shown.

[0022] Fig.12 Shows the brightness deviation caused by the chopper voltage offset in a multi-zone frame rate application.

[0023] Fig.13 The embodiment of the present invention is shown as an implementation method of a multi-zone frame rate in an inter-frame touch driving mode.

[0024] Fig.14 FIG. 4 is a schematic diagram of a source operational amplifier according to an embodiment of the present invention.

[0025] The reference numerals are described as follows:

[0026] 10, 140 source operational amplifier

[0027] V IN Input signal

[0028] V OUT Output voltage

[0029] V OS Offset Voltage

[0030] F(X), F(X+1) image frame

[0031] L(N)~L(N+3) pixel rows

[0032] Vsync vertical synchronization signal

[0033] 50 Drive Process

[0034] Steps 502-508

[0035] CONF1~CONF3 Bias current setting

[0036] NFR Normal Frame Rate

[0037] LFR Low Frame Rate

[0038] ULFR Ultra Low Frame Rate

[0039] FSC, FSC_A1, FSC_A2, FSC_A3 frame skipping number

[0040] PC, PC_A1, PC_A2, PC_A3 corridor number

[0041] Area A1 to A3

[0042] AVDD, AVSS power supply voltage

[0043] IN_P, IN_N differential input pair

[0044] BIAS_P1, BIAS_N1, BIAS_P2, bias control circuit

[0045] BIAS_N2

[0046] AVBPO2, AVBNO2, AVBPO3, bias voltage

[0047] AVBNO3、APDI1、ANDI1、APDI2、

[0048] ANDI2

[0049] 1402 Bias Voltage Generator

[0050] MP, MN current source pair

[0051] ΔI P1 , ΔI N1 , ΔI P2 , ΔI N2 No match

[0052] gm N1 , gm P1 , gm N2 , gm P2 Transconductance

[0053] ΔVt N1 , ΔVt P1 , ΔVt N2 , ΔVt P2 Threshold voltage mismatch DETAILED DESCRIPTION

[0054] Figure 1 FIG. 1 is a schematic diagram of a source operational amplifier (SOP) 10 using chopper technology. The source operational amplifier 10 is connected in a negative feedback structure to form an output buffer for transmitting an input signal V IN To generate an output voltage V OUT Ideally, the output voltage V OUT Equal to the input signal V IN , in order to achieve the accurate data voltage used to drive the display screen. However, there is an offset voltage V between the two input terminals of the source operational amplifier 10. OS This causes an error, making the output voltage V OUT Slightly different from the input signal V IN .

[0055] like Figure 1As shown, by using the chopper technique, the source operational amplifier 10 can have two settings, wherein the input signal V IN The input signal V can be alternately input to the upper input terminal and the lower input terminal of the source operational amplifier 10, while the other input terminal is connected to its output terminal to form a feedback loop. More specifically, in the first setting (setting = 1), the input signal V IN is received through the upper input terminal, and the output voltage V OUT Equal to V OUT =V IN -V OS In the second setting (setting = 0), the input signal V IN is received through the lower input terminal, and the output voltage V OUT Equal to V OUT =V IN +V OS .

[0056] The chopper technology enables the source operational amplifier 10 to switch alternately between the first setting and the second setting, so as to eliminate the voltage offset of the source operational amplifier in time and space. Figure 2 The pixel configuration of the chopper setting on several image frames is shown, which shows some pixel rows L(N) to L(N+3) on two consecutive image frames F(X) and F(X+1) as examples. Figure 2 As shown, each grid is used to represent the chopper setting of a sub-pixel, and "R", "G", and "B" represent the color configuration in the sub-pixel array. Based on the chopper technology, the first setting can be represented as "+" and the second setting can be represented as "-".

[0057] In this example, for each sub-pixel, one of the first setting and the second setting is used in the image frame F(X), and the other is used in the image frame F(X+1) to achieve temporal chopping. In addition, in an image frame, different settings are used for every two adjacent sub-pixels to achieve spatial chopping. The slightly higher output voltage V due to the voltage offset of the source operational amplifier OUT and slightly lower output voltage V OUT Under the first setting and the second setting, the output is respectively and alternately outputted. Under long-term display, such a slight deviation will be averaged, thereby producing accurate display brightness in visual effect. Therefore, the chopper effect can be achieved under a high frame rate such as 60Hz or 120Hz. Because of the high-speed switching of the image frame, the brightness deviation caused by the voltage offset on each image frame is not easily perceived by the human eye.

[0058] Figure 3AThe waveform diagram is used to illustrate the operation of a driving circuit, and the driving circuit is configured to drive the display screen to display by outputting source data voltage to the display element on the display screen. In one embodiment, the driving circuit can be a display driver integrated circuit (DDIC). Figure 3A A vertical synchronization signal Vsync, source data output, and display operation are shown. The vertical synchronization signal Vsync includes a series of periodic pulses, each pulse indicating the start of a frame period, which defines the time interval used to display an image frame. The source data output indicates whether a specific source operational amplifier of the driving circuit outputs a data voltage to the display screen during each frame period. The display operation indicates whether the display screen is refreshed or not during each frame period.

[0059] like Figure 3A As shown, the vertical synchronization signal Vsync can be used to allocate a frame period, which is equal to 16.6 milliseconds (ms). Figure 3A A normal frame rate of 60 Hz is shown, where the data voltage is output and the display screen is refreshed during each frame period. With a frame rate of 60 Hz, the display screen is refreshed during each frame period, and because the displayed image is updated quickly, the brightness deviation caused by the voltage offset under the chopper operation is not easily visible to the human eye.

[0060] As mentioned above, if the panel is displayed at a very low frame rate such as 1 Hz or 0.016 Hz, the same image will stay on the panel for too long, making the brightness deviation caused by the voltage offset generated by the chopper technology more easily visible. Figure 3B A low frame rate operation using a frame skip technique is described, wherein the display screen can be refreshed during one of every 60 consecutive frames to achieve a frame rate of 1 Hz. In this case, the same image will remain on the display screen until the next time the display screen is refreshed.

[0061] The brightness deviation caused by the voltage offset can be alleviated by increasing the bias current of the source operational amplifier without increasing the area of ​​the driving circuit. Figure 4A and Figure 4B A comparison of the chopper effect achieved at different bias currents is shown. Figure 4A shows the case of low bias current, which can correspond to high brightness deviation, Figure 4A It can be seen that the brightness difference between the settings "+" and "-" due to the voltage offset of the source operational amplifier is more obvious. Figure 4Bshows the case of high bias current, which corresponds to low brightness deviation, and the voltage offset decreases with increasing bias current, so compared to Figure 4A For the low bias current case shown, Figure 4B It can be seen that the brightness difference between the settings “+” and “-” due to the voltage offset of the source operational amplifier becomes less obvious.

[0062] In one exemplary embodiment, if the source operational amplifier is in a low bias current setting, the voltage offset is approximately equal to 50 mV; and if the source operational amplifier is in a high bias current setting with a larger bias current value, the voltage offset can drop to approximately 10 mV.

[0063] However, the increase in bias current is usually accompanied by higher power consumption. It should be noted that the power consumption of the display driver circuit mainly comes from the source operational amplifier used to drive the display screen. Therefore, if the source operational amplifier of the driver circuit continues to use a high bias current setting, the overall power consumption of the driver circuit will increase significantly.

[0064] Therefore, the present invention proposes a novel method for changing the bias current of the source operational amplifier under dynamically changing frame rates. Under high frame rates or normal frame rates, the source operational amplifier can be set to a low bias current setting to average the brightness deviation in the chopper application to achieve good visual effects, while maintaining low power consumption to achieve ideal power saving effects. Under low frame rates, the source operational amplifier can be set to a high bias current setting to alleviate the visual effects problems that may be caused by the chopper operation. At this time, since the panel is refreshed at a very low frequency, the high bias current setting under the low frame rate will not significantly increase power consumption. In this way, the overall power consumption can still be improved, and the visual effects problem can also be solved.

[0065] Figure 5 FIG. 5 is a flow chart of a driving process 50 according to an embodiment of the present invention. The driving process 50 may be implemented in a driving circuit for driving a display screen, such as a display driver integrated circuit. The display screen may include multiple display components. The driving circuit may include several source operational amplifiers for driving the display components on the display screen to display. Figure 5 As shown, the driving process 50 includes the following steps:

[0066] Step 502: Receive a series of image frames.

[0067] Step 504: Determine a refresh rate of a display device according to the series of image frames.

[0068] Step 506 : Operate a first source operational amplifier of the driving circuit at a first bias current value.

[0069] Step 508: When the refresh rate of the display device changes, operate the first source operational amplifier at a second bias current value different from the first bias current value.

[0070] According to the driving process 50, the driving circuit may receive a series of image frames (step 502). Based on the received image frames, the driving circuit may determine the refresh rate of one or more display components on the display screen. Based on the refresh rate, the driving circuit may determine to operate the corresponding source operational amplifier at a first bias current value or a second bias current value. For example, for a specific display component driven by a first source operational amplifier, the driving circuit may determine the refresh rate of this specific display component (step 504). In a first image frame, the driving circuit may operate the first source operational amplifier at a first bias current value (step 506). In a subsequent second image frame, when the refresh rate of this specific display component changes, the driving circuit may operate the first source operational amplifier at a second bias current value different from the first bias current value (step 508).

[0071] In one embodiment, the display component represents a pixel or a sub-pixel on a display screen. More specifically, the display component may represent a light-emitting component included in a pixel or a sub-pixel, wherein the light-emitting component may be a light-emitting diode (LED) or an organic light-emitting diode (OLED), but is not limited thereto.

[0072] It is worth noting that in the driving process 50, the bias current setting of the source operational amplifier can be determined according to the refresh rate of the corresponding display component. The refresh rate here is equivalent to the frame rate described in the above paragraph. As described above, a display screen can operate at a normal frame rate such as 120Hz or 60Hz, or at a low frame rate such as 1Hz or 0.016Hz. The normal frame rate or low frame rate represents the number of refreshes or the refresh frequency within a series of consecutive image frames. Therefore, the frame rate of the display screen is equivalent to the refresh rate of the display component on the display screen. In the following description paragraphs, the terms "frame rate" and "refresh rate" can be used interchangeably.

[0073] Please refer back Figure 4A and Figure 4B, a higher bias current causes a smaller voltage offset, while a lower bias current causes a larger voltage offset. Preferably, a higher bias current is applied to a lower refresh rate, while a lower bias current is applied to a higher refresh rate. Therefore, in the driving process 50, assuming that the first bias current value is less than the second bias current value, the first bias current value may produce a voltage offset in the first source operational amplifier, which is greater than the voltage offset produced by the second bias current value. For example, when the corresponding display component operates at a frame rate of 60Hz or 30Hz, a low bias current value may be used; and when the corresponding display component operates at a frame rate of 1Hz or 0.016Hz, a high bias current value may be used. Alternatively or additionally, if there is an intermediate frame rate (such as 15Hz), the source operational amplifier may use an intermediate bias current value.

[0074] In one embodiment, when the specific display component is refreshed at a first refresh rate, the driving circuit may operate the first source operational amplifier at a first bias current value; and when the specific display component is refreshed at a second refresh rate, the driving circuit may operate the first source operational amplifier at a second bias current value. Assuming that the first refresh rate is higher than the second refresh rate, the first bias current value is less than the second bias current value.

[0075] Figure 6 Flowchart of the algorithm executed by the driving circuit of an embodiment of the present invention. When the driving circuit receives image data, a frequency calculation can be performed to determine the frame rate according to the image data, and then a suitable bias current setting is adopted accordingly. In this example, the source operational amplifier has three selectable bias current settings CONF1 to CONF3. When the display operation is performed at a normal frame rate (NFR), a bias current setting CONF1 with a minimum bias current value can be adopted; when the display operation is performed at a low frame rate (LFR), a bias current setting CONF2 with an intermediate bias current value can be adopted; when the display operation is performed at an ultra-low frame rate (ULFR), a bias current setting CONF3 with a maximum bias current value can be adopted. Then, based on the corresponding frame rate information, the driving circuit can output a data voltage corresponding to the received image data according to the selected frequency, and the source operational amplifier can adopt a bias current setting corresponding to the frame rate.

[0076] In an exemplary embodiment, the normal frame rate is 60 Hz, the low frame rate is 15 Hz, and the ultra-low frame rate is 1 Hz. In fact, the above frame rate values ​​are only examples, and the normal frame rate, the low frame rate, and the ultra-low frame rate can have any and suitable values, which are not limited to the contents proposed in this specification. As long as these frame rates satisfy the relative relationship that the normal frame rate is greater than the low frame rate and the low frame rate is greater than the ultra-low frame rate, the bias current setting is feasible. Through such a frame rate configuration method, setting the bias current value of CONF1 to CONF3 will satisfy the relative relationship that the bias current value of setting CONF1 is less than the bias current value of setting CONF2 and the bias current value of setting CONF2 is less than the bias current value of setting CONF3.

[0077] Figure 7 An exemplary operation mode of a driving circuit under a variable frame rate in an embodiment of the present invention is shown. Similarly, the vertical synchronization signal Vsync defines the frame period by periodic pulses. In one embodiment, the vertical synchronization signal Vsync is equivalent to a tearing effect signal provided by a timing controller to the driving circuit. Figure 3A and Figure 3B Similarly, the source data voltage and the associated display operation are also shown in Figure 7 . Figure 7 A bias current setting and a frame skipping number FSC are also shown. The bias current setting can be used to drive one or more source operational amplifiers included in the driving circuit. The frame skipping number FSC is a parameter used to determine the display operation, that is, to determine whether to refresh during each frame period.

[0078] In an exemplary embodiment, the bias current setting can be used for all source operational amplifiers in the driving circuit, and the display operation can indicate the refresh of all display components on the display screen. Figure 7 As shown, the source operational amplifier can output the data voltage when the display component is refreshed, and stop outputting the data voltage when the display component is not refreshed. The counter of the frame skip number FSC can count the consecutive unrefreshed frame periods in the display sequence. In this example, the display operation enters the extremely low frame rate of 1Hz from the normal frame rate of 60Hz, which has a gradually decreasing frame rate setting from 60Hz, 30Hz, 15Hz, and then to 1Hz. Since the length of a frame period is 16.6 milliseconds, under the frame rate of 60Hz, the display component is refreshed during each frame period. Under the frame rate of 30Hz, the display component is refreshed during one frame period and then skips (does not refresh) the next frame period. Under the lower frame rate of 15Hz, the display component is refreshed in one of every four frame periods. Under the ultra-low frame rate of 1Hz, the display component is refreshed in one of every 60 frame periods.

[0079] In this example, the driver circuit can be pre-set to operate with a display sequence having a dynamically decreasing frame rate (from 60 Hz, 30 Hz, 15 Hz, to 1 Hz), and the display element can be refreshed at these frame rates accordingly. Therefore, the source operational amplifier can adopt corresponding bias current settings under different frame rates. In detail, if Figure 7 As shown, a low bias current setting (such as CONF1) can be used for frame rates of 60 Hz and 30 Hz, an intermediate bias current setting (such as CONF2) can be used for a frame rate of 15 Hz, and a high bias current setting (such as CONF3) can be used for a frame rate of 1 Hz.

[0080] It is worth noting that during the non-refresh frame period, since the source operational amplifier does not need to output the data voltage, the bias current of the source operational amplifier can be turned off or set to high impedance (Hi-Z) to avoid unnecessary power consumption caused by the bias current.

[0081] Therefore, when the driving circuit receives input image data, it can obtain the display sequence settings of the next few frame periods, and allocate refresh frame periods and non-refresh frame periods according to the frame rate changes in the display sequence. In this case, the driving circuit can set the bias current of the source operational amplifier accordingly. The source operational amplifier can then operate with the appropriate bias current settings during the corresponding frame period under different frame rates, such as Figure 7 shown.

[0082] In another embodiment, the driving circuit can set the bias current of the source operational amplifier according to the counting result of the counter related to the frame skipping number FSC, and the frame skipping number FSC can be used to calculate the consecutive non-refreshed frame periods to determine the current refresh rate. Then, according to the number of consecutive non-refreshed frame periods indicated by the counting result, the source operational amplifier can be operated at a suitable bias current setting to respond to the change of the refresh rate.

[0083] Figure 8 FIG. 1 shows another exemplary operation mode of the driving circuit under variable frame rate of the first embodiment of the present invention, which can use the counting result during the non-refresh frame period to obtain the bias current setting. Figure 8 As shown, the configuration of the refresh frame period and the non-refresh frame period is the same as Figure 7The situation shown is the same. In this example, the frame rate is first at 60Hz, so the source operational amplifier is set to operate at a low bias current setting. The subsequent bias current setting can be obtained after the frame rate is determined based on the result of the frame skip number FSC, and the frame skip number FSC can determine the frame rate based on the number of consecutive unrefreshed frame periods calculated. When the driving circuit determines that there are 3 consecutive unrefreshed frame periods (i.e., the frame skip number FSC continuously outputs 1, 2, and 3) and then enters a new refresh frame period (i.e., the frame skip number FSC returns to 0), the source operational amplifier can determine that the frame rate is 15Hz and use the intermediate bias current setting during the new frame period. In a similar manner, after the frame skip number FSC indicates 59 consecutive unrefreshed frame periods, the source operational amplifier can enter a high bias current setting, and the frame rate can be seen from the indication of the frame skip number FSC that the frame rate is equal to 1Hz. In this example, the change in the bias current setting is later than the frame rate change, but the visual effect can still be improved under long-term display.

[0084] In another embodiment, the driving circuit can achieve a lower frame rate by entering an inter-frame touch drive mode (long-Vmode). In this embodiment, the back porch or front porch of the display timing can be extended to increase the blank interval where no data voltage is output and no refresh is performed, thereby achieving a lower frame rate. Under the inter-frame touch drive mode, the length of the back porch or the front porch is variable and has any suitable value, so that the frame rate can be flexibly set. Based on the operation of the inter-frame touch drive mode, the refresh of the display component does not need to skip the entire frame period. For example, if the maximum frame rate is 120Hz, by configuring an implementation of the unrefreshed frame period, a frame rate of 60Hz can be achieved by refreshing the display component in one of every two frame periods, but it is not easy to achieve a frame rate of 90Hz. In contrast, a frame rate of 90Hz can be easily achieved by controlling the display timing to extend the back porch or the front porch to a suitable length.

[0085] Fig. 9 FIG. 1 shows an exemplary implementation of a driving circuit of Embodiment 1 of the present invention using an inter-frame touch driving mode to achieve a variable frame rate, wherein the driving circuit also drives the display screen with a display sequence having a gradually decreasing frame rate setting (i.e., from 60 Hz to 30 Hz, 15 Hz, and 1 Hz). In this example, different frame rates can be achieved by different corridor lengths. Fig. 9 As shown, each frame period may include 400 line times, and a porch count PC may be used to calculate the line time in a non-refreshed frame period, where a line time represents the period during which a line of pixels on the display screen is scanned.

[0086] In one embodiment, the bias current setting may be determined according to a preset frame rate in a display sequence, that is, a low bias current setting (such as CONF1) is used at frame rates of 30 Hz and 60 Hz, an intermediate bias current setting (such as CONF2) is used at a frame rate of 15 Hz, and a high bias current setting (such as CONF3) is used at a frame rate of 1 Hz.

[0087] In another embodiment, the bias current setting may be performed using the count result of the counter related to the corridor number PC, which calculates the row time during the non-refresh frame period. According to the calculation result of the row time, the source operational amplifier of the driving circuit may operate at the selected bias current setting. For example, Fig. 9 As shown in FIG. 1 , if the corridor number PC reaches 1199 and then returns to 0, the driver circuit can determine that the current frame rate may be 15 Hz, and thus adjust the bias current setting to an intermediate level during the next refresh frame. In a similar manner, after the corridor number PC reaches 23599 and then returns to 0, the source operational amplifier can enter a high bias current setting. Figure 8 The implementation method for calculating the number of frames is similar and will not be repeated here.

[0088] It is worth noting that Fig. 9 The value of the middle corridor number PC and its related implementation are only used to illustrate an example of calculating the row time during the non-refresh period to determine the display frame rate. In fact, each display frame period defined by the vertical synchronization signal Vsync includes a back corridor and a front corridor. In order to simplify the diagram, Fig. 9 The corridors during the refresh frame period are omitted. Since the corridors during the refresh frame period usually include only tens of row times at most, the number of row times in the corridor calculated during the refresh frame period is usually small, and it can be omitted without affecting the description of this embodiment. In one embodiment, the corridor counter is only enabled during the non-refresh frame period, and can be set to 0 to stop counting during the refresh frame period. When the first non-refresh frame period after the end of a refresh frame period begins, the corridor number can be reset to 0 and counted again from 0.

[0089] Please refer back Figure 5In the driving process 50, the first source operational amplifier can be used to drive a display component, so the bias current of the first source operational amplifier can be determined according to the refresh rate of the display component. Alternatively or additionally, the first source operational amplifier can be set to drive multiple display components, so the bias current of the first source operational amplifier can be determined according to the refresh rate of these display components driven by the first source operational amplifier. It should be understood by those skilled in the art that a source operational amplifier in a driving circuit can be used to drive one or more columns of sub-pixels on a display screen. In this case, based on the refresh rates of these sub-pixels, this source operational amplifier can operate at different bias current values. If these sub-pixels have different refresh rates, the source operational amplifier will operate at different bias current values ​​to drive these sub-pixels.

[0090] For example, if the display component driven by the first source operational amplifier has a first refresh rate in a first time interval, the first source operational amplifier can operate at a first bias current value in the first time interval to refresh the display component(s); and if the display component driven by the first source operational amplifier has a second refresh rate in a second time interval, the first source operational amplifier can operate at a second bias current value in the second time interval to refresh the display component(s).

[0091] In an exemplary embodiment, the first refresh rate may be a normal refresh rate, such as 60 Hz or 30 Hz, and thus the first source operational amplifier may have a low bias current setting with a lower bias current value. The second refresh rate may be a low refresh rate, such as 1 Hz, and thus the first source operational amplifier may have a high bias current setting with a higher bias current value.

[0092] In one embodiment, the driving circuit may drive the display screen under the application of Multi-Area Frame Rate (MAFR), wherein an image frame of the display screen may be divided into a plurality of areas, and the areas are assigned with different frame rates. Fig.10 As shown, the display screen includes an information column, a video area, and a text area. The video area is required to be displayed at a higher frame rate to maintain the image quality; the text area that does not require high image quality should preferably be displayed at a lower frame rate to save power consumption; the top information column only displays time, battery or other static information, so the image content of the information column does not change frequently and can be displayed at an ultra-low frame rate. In this example, the video area is refreshed at a high frame rate or a normal frame rate (such as 60Hz), the text area is refreshed at a low frame rate (such as 15Hz), and the upper information column is refreshed at an ultra-low frame rate (such as 1Hz).

[0093] As described above, a source operational amplifier of a driving circuit can be used to drive one or more columns of display components on a display screen, and these display components may be allocated to different areas with different frame rate settings. For example, a first source operational amplifier can be set to drive multiple display components on a display screen, including a first display component and a second display component located at different positions on the display screen. Therefore, when the first display component is refreshed, the first source operational amplifier can be operated at a first bias current value to drive the first display component; and when the second display component is refreshed, the first source operational amplifier can be operated at a second bias current value to drive the second display component. If the first display component and the second display component are located in the same area and have the same frame rate, the first bias current value may be the same as the second bias current value. If the first display component and the second display component are located in different areas and are set to have different frame rates, the first bias current value may be different from the second bias current value.

[0094] It is worth noting that the driving circuit may include multiple driving channels. Therefore, the driving circuit may have multiple source operational amplifiers for driving multiple columns of display components on the display screen. In one embodiment, the driving circuit may have a first source operational amplifier and a second source operational amplifier implemented in different driving channels. Correspondingly, the display screen may include multiple display components, wherein a first display component corresponds to a first source operational amplifier (such as driven by the first source operational amplifier) ​​and a second display component corresponds to a second source operational amplifier (such as driven by the second source operational amplifier). In this case, when the first display component is refreshed, the first source operational amplifier may operate at a first bias current value to respond to the refresh rate of the first display component; and when the second display component is refreshed, the second source operational amplifier may operate at a second bias current value to respond to the refresh rate of the second display component. Under the application of multi-zone frame rate, the first display component and the second display component may be located in different areas and set to have different frame rates, so the first bias current value may be different from the second bias current value.

[0095] Please refer back Figure 6 When a multi-zone frame rate is used, in addition to receiving input image data, the driving circuit may also receive one or more zone flags that are used to define zones with different frame rates. Therefore, based on the frame rates of these zones under the multi-zone frame rate application, the source operational amplifier used to drive each zone may be set accordingly to select different bias current settings for different zones during a frame period.

[0096] In one embodiment, the driving circuit may receive the region flag from the video providing unit at the front end when receiving the video / image data. Alternatively, the driving circuit may also generate the region flag according to the video / image content and / or refresh status indicated by the video / image data from the video providing unit.

[0097] Fig.11 FIG. 1 shows an exemplary operation mode of a driving circuit in accordance with an embodiment of the present invention under a variable frame rate with a multi-zone frame rate (MAFR) application. Fig.10 The situation is similar to that of FIG. 1 , where the display screen is divided into three areas A1 to A3. Area A1 (which can display an information column) is refreshed at 1 Hz, area A2 (which can be a video area) is refreshed at 60 Hz, and area A3 (which can be a text area) is refreshed at 15 Hz. Therefore, the three frame skipping numbers FSC_A1, FSC_A2, and FSC_A3 can be used to calculate the non-refresh frame period in the corresponding areas A1 to A3, respectively.

[0098] like Fig.11 As shown, based on the frame rate configuration under the multi-zone frame rate application, each image frame can adopt one of three states. State 1 is that all display components on the image frame are refreshed, state 2 is that only area A2 on the image frame is refreshed, and state 3 is that areas A2 and A3 on the image frame are refreshed but area A1 is not refreshed.

[0099] In one embodiment, the first image frame may be refreshed in state 1. Since only area A2 is continuously refreshed, the second image frame may be refreshed in state 2, and the frame skipping numbers FSC_A1 and FSC_A3 of the other two areas A1 and A3 begin to accumulate during the subsequent non-refreshed frames. When the frame skipping number FSC_A3 indicates that area A3 has not been refreshed for three consecutive frames, the next image frame will enter state 3, and the frame skipping number FSC_A1 continues to accumulate. Then, the next image frame returns to state 2, and the frame skipping number FSC_A3 starts to accumulate again from 0.

[0100] Likewise, after the frame skip number FSC_A1 indicates that the area A1 has not been refreshed during 59 consecutive frames, the next image frame will enter state 1. Then, the display operation repeats the same sequence every 60 consecutive image frames until the frame rate setting is changed.

[0101] Based on the above state change operation, different frame rates can be achieved in different areas on an image frame. Therefore, under the chopper operation, different bias current settings can be used for different areas to generate different brightness deviations to correspond to the frame rate values ​​of different areas. Fig.12The figure shows the brightness deviation caused by the voltage offset of the chopper on an image frame F(X), wherein, since region A1 has the smallest frame rate, the source operational amplifier used to drive region A1 can adopt the largest bias current value to achieve a lower brightness deviation; since region A2 has the largest frame rate, the source operational amplifier used to drive region A2 can adopt the smallest bias current value, which causes a higher brightness deviation; in addition, the source operational amplifier used to drive region A3 can adopt an intermediate bias current value, which is accompanied by a medium brightness deviation.

[0102] It is worth noting that the implementation method of multi-zone frame rate can also be applied to the inter-frame touch driving mode, such as Fig.13 As shown, the variable frame rate can be achieved by extending the corridor length. In this example, three corridor numbers PC_A1, PC_A2 and PC_A3 can be used to calculate the unrefreshed row time for areas A1 to A3 respectively. The row time calculation method under the multi-zone frame rate application is similar to the unrefreshed frame period calculation method under the multi-zone frame rate application, where each area has a specific frame rate and a corresponding counter. Those skilled in the art can refer to the description of the above paragraphs to obtain the detailed operation method, which will not be repeated here.

[0103] Similarly, in multi-zone frame rate applications, bias currents of source operational amplifiers for different zones may be set according to a preset frame rate configuration obtained from input image data; alternatively, the setting may be performed using calculation results of an unrefreshed (skipped) frame counter or a gallery counter.

[0104] It is worth noting that the bias current setting determines the brightness deviation caused by the voltage offset of the source operational amplifier. Fig.14 FIG. 1 is a schematic diagram of a source operational amplifier 140 according to an embodiment of the present invention. The source operational amplifier 140 may be composed of two input stages, a gain stage, and an output stage, and receives power supply voltages AVDD and AVSS to operate.

[0105] Specifically, the input stage includes two differential input pairs IN_P and IN_N and two bias control circuits BIAS_P1 and BIAS_N1. The differential input pairs IN_P and IN_N can receive an input signal V IN , and is coupled to the output terminal of the source operational amplifier 140 to receive an output voltage V of the source operational amplifier 140 OUT , thereby realizing an output buffer for driving the display component. Fig.14As shown, the bias control circuit BIAS_P1 is used to supply a bias current to the differential input pair IN_P, and the bias current can be generated by receiving a bias voltage AVBPO2. The bias control circuit BIAS_N1 is used to supply a bias current to the differential input pair IN_N, and the bias current can be generated by receiving a bias voltage AVBNO2. The bias control circuits BIAS_P1 and BIAS_N1 are coupled to a bias voltage generator 1402 to receive bias voltages AVBPO2 and AVBNO2, respectively.

[0106] The gain stage of the source operational amplifier 140 includes two current source pairs MP and MN and two bias control circuits BIAS_P2 and BIAS_N2. The current source pairs MP and MN are respectively coupled to the input pairs IN_N and IN_P to provide the operating current required by the gain stage of the source operational amplifier 140. Fig.14 As shown, each current source pair MP and MN can be implemented by a current mirror. The bias control circuit BIAS_P2 is used to supply a bias current to the current source pair MP, and its bias current can be generated by receiving a bias voltage AVBPO3. The bias control circuit BIAS_N2 is used to supply a bias current to the current source pair MN, and its bias current can be generated by receiving a bias voltage AVBNO3. The bias control circuits BIAS_P2 and BIAS_N2 are coupled to the bias voltage generator 1402 (or another bias voltage generator) to receive the bias voltages AVBPO3 and AVBNO3, respectively.

[0107] The source operational amplifier mentioned in the above embodiment may have the following features: Fig.14 The structure shown in the figure, wherein the bias current setting of the source operational amplifier can be realized by modifying the bias voltage of the source operational amplifier. For example, in order to drive the display component on the display screen, when the refresh rate of the display component driven by the source operational amplifier 140 changes, the bias current generated by any bias control circuit BIAS_P1, BIAS_N1, BIAS_P2 and BIAS_N2 can be adjusted accordingly, and the adjustment method can be realized by modifying the bias voltage AVBPO2, AVBNO2, AVBPO3 and / or AVBNO3.

[0108] For example, the bias current generated by the bias control circuit BIAS_P1 can be adjusted to correspond to the refresh rate of a display component driven by the source operational amplifier 140. If the display component is refreshed at a first refresh rate, the bias current generated by the bias control circuit BIAS_P1 can have a first value; if the display component is refreshed at a second refresh rate different from the first refresh rate, the bias current generated by the bias control circuit BIAS_P1 can have a second value different from the first value. In a similar manner, the bias currents generated by the bias control circuits BIAS_N1, BIAS_P2 and / or BIAS_N2 can be adjusted in response to the refresh rate of the display component.

[0109] As described above, a higher bias current generally results in a smaller voltage offset and is therefore suitable for a lower refresh rate, while a lower bias current generally results in a larger voltage offset and is therefore suitable for a higher refresh rate. In this case, if the first refresh rate is greater than the second refresh rate, the first value of the bias current will be less than the second value of the bias current.

[0110] Specifically, the source operational amplifier 140 may have an offset voltage V OS , which comes from the mismatch of the input stage and / or gain stage. Fig.14 As shown, the mismatch of the input stage may include the ΔI generated by the differential input pair IN_P P1 and the ΔI generated by the differential input pair IN_N N1 , and the mismatch of the gain stage may include the ΔI generated by the current source to MP P2 And the ΔI generated by the current source to MN N2 Due to these mismatches, the offset voltage V OS It can be calculated as follows:

[0111]

[0112] Among them, gm N1 is the transconductance of the differential input pair IN_N, gm P1 is the transconductance of the differential input pair IN_P, gm N2 is the transconductance of the current source to MN, gm P2 is the transconductance of the current source to MP, ΔVt N1 is the threshold voltage mismatch of the differential input pair IN_N, ΔVt P1 is the threshold voltage mismatch of the differential input pair IN_P, ΔVt N2 is the mismatch between the current source and the threshold voltage of MN, ΔVt P2is the mismatch between the threshold voltage of the current source and MP.

[0113] In one embodiment, according to the above equation, in order to reduce the offset voltage V OS , which can reduce the transconductance gm of the current source to MP and MN P2 and gm N2 , which can be achieved by increasing the bias current of the current source in the gain stage to MP and MN. In this case, the bias current can be increased by increasing the bias voltage AVBNO3 and / or decreasing the bias voltage AVBPO3. Alternatively or additionally, the increase of the bias current in the gain stage can also be achieved by adjusting other bias voltages APDI1, ANDI1, APDI2, and / or ANDI2 output to the gain stage.

[0114] Offset voltage V OS The reduction of can also be achieved by other means. For example, according to the above equation, the offset voltage V OS It is also related to the transconductance gm of the differential input pair IN_P and IN_N P1 and gm N1 , so the tail current of the input pair IN_P and IN_N can be modified to reduce the offset voltage V OS That is, the bias current generated by the bias control circuits BIAS_P1 and BIAS_N1 can be adjusted to reduce the offset voltage V OS .

[0115] In another embodiment, the bias current for the current source pair MN and MP can also be adjusted by adjusting the width-length ratio of the transistor and / or changing the number of transistor units used to implement the internal components of the current source pair MN and MP. The embodiments of the present invention can adopt various ways of modifying the voltage offset value to achieve different bias current settings for the source operational amplifier at different refresh rates, and the related implementations should all fall within the scope of the present invention.

[0116] In summary, the present invention proposes a novel driving method for a display screen and a related source operational amplifier, which can be implemented in a driving circuit and used to drive the display screen. The driving circuit can use chopper technology to remove the brightness deviation caused by the voltage offset of the source operational amplifier by setting different chopper settings / polarities and visually averaging the output data voltages of adjacent sub-pixels and / or frames. However, the brightness deviation is more obvious and easily perceived by the human eye at low frame rates, and the brightness deviation can be alleviated by increasing the bias current of the source operational amplifier. Therefore, in order to achieve optimized visual effects while maintaining ideal power consumption, in the driving circuit of the display screen, the source operational amplifier can dynamically switch between different bias current settings when the frame rate changes. More specifically, at lower frame rates, a higher bias current value can be used to reduce the brightness deviation caused by the voltage offset of the chopper; and at normal or higher frame rates, a lower bias current value can be used to save power consumption. In one embodiment, a multi-zone frame rate application can configure different frame rates for different regions on an image frame, and thus, corresponding bias current settings can be allocated to source operational amplifiers used to drive regions with different frame rates. In this way, different bias current settings can be achieved between different frame periods and / or between different source operational amplifiers.

[0117] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A driving method, characterized in that: include: A source operational amplifier is configured to drive a display element; When the display component is refreshed at a first refresh rate, the source operational amplifier is operated at a first bias current value; as well as When the display component is refreshed at a second refresh rate different from the first refresh rate, the source operational amplifier is operated at a second bias current value different from the first bias current value.

2. The driving method according to claim 1, characterized in that: The first refresh rate is greater than the second refresh rate, and the first bias current value is less than the second bias current value.

3. The driving method according to claim 2, characterized in that: A voltage offset of the source operational amplifier caused by the first bias current value is greater than a voltage offset of the source operational amplifier caused by the second bias current value.

4. The driving method according to claim 1, characterized in that: The source operational amplifier is included in a driving circuit, and the driving method further includes: receiving a series of image frames through the driving circuit; Determining a refresh rate of the display element according to the series of image frames; and The source operational amplifier is operated at the first bias current value or the second bias current value according to the refresh rate.

5. The driving method according to claim 4, characterized in that: The step of determining the refresh rate of the display component according to the series of image frames comprises: Unrefreshed frames are counted to determine the refresh rate of the display device.

6. The driving method according to claim 5, characterized in that: The step of operating the source operational amplifier at the first bias current value or the second bias current value according to the refresh rate includes: operating the source operational amplifier at the first bias current value or the second bias current value according to the number of consecutive unrefreshed frames.

7. The driving method according to claim 4, characterized in that: The step of determining the refresh rate of the display component according to the series of image frames comprises: The row time in a non-refresh period is counted to determine the refresh rate of the display element.

8. The driving method according to claim 7, characterized in that: The step of operating the source operational amplifier at the first bias current value or the second bias current value according to the refresh rate includes: operating the source operational amplifier at the first bias current value or the second bias current value according to the number of row times in the non-refresh period.

9. A driving method for driving a plurality of display components, characterized in that: The driving method includes: configuring a source operational amplifier to drive the plurality of display components; When a first display element among the plurality of display elements is refreshed at a first refresh rate, operating the source operational amplifier at a first bias current value; and When a second display element among the plurality of display elements is refreshed at a second refresh rate different from the first refresh rate, the source operational amplifier is operated at a second bias current value different from the first bias current value.

10. The driving method according to claim 9, characterized in that: The first display component and the second display component are different display components at different positions on a display screen, and the steps of operating the source operational amplifier include: operating the source operational amplifier at the first bias current value to drive the first display element; and The source operational amplifier is operated at the second bias current value to drive the second display element.

11. The driving method according to claim 9, characterized in that: The steps of operating the source operational amplifier include: operating the source operational amplifier at the first bias current value during a first time interval to refresh one or more display elements of the plurality of display elements at the first refresh rate; and The source operational amplifier is operated at the second bias current value during a second time interval to refresh the one or more display components at the second refresh rate.

12. A driving circuit, characterized in that: include: a source operational amplifier for driving a plurality of display components; When a first display component among the multiple display components is refreshed at a first refresh rate, the source operational amplifier operates at a first bias current value, and when a second display component among the multiple display components is refreshed at a second refresh rate different from the first refresh rate, the source operational amplifier operates at a second bias current value different from the first bias current value.

13. The driving circuit according to claim 12, characterized in that: The first display component and the second display component are the same display component on a display screen.

14. The driving circuit according to claim 12, characterized in that: The first display component and the second display component are different display components at different positions on a display screen.

15. The driving circuit according to claim 14, characterized in that: The source operational amplifier operates at the first bias current value to drive the first display element, and operates at the second bias current value to drive the second display element.

16. The driving circuit according to claim 12, characterized in that: The source operational amplifier operates at the first bias current value in a first time interval to refresh one or more display components among the multiple display components at the first refresh rate, and operates at the second bias current value in a second time interval to refresh the one or more display components at the second refresh rate.

17. A driving circuit, characterized in that: include: a first source operational amplifier, used to drive a first display element on a display screen; as well as A second source operational amplifier is used to drive a second display component on the display screen, wherein when the first display component is refreshed at a first refresh rate, the first source operational amplifier operates at a first bias current value, and when the second display component is refreshed at a second refresh rate different from the first refresh rate, the second source operational amplifier operates at a second bias current value different from the first bias current value.

18. A source operational amplifier for driving a plurality of display components on a display screen, characterized in that: The source operational amplifier includes: a differential input pair, used to receive an input signal of the source operational amplifier; a current source pair for providing an operating current to the source operational amplifier; and a first bias control circuit for supplying a first bias current to one of the differential input pair and the current source pair; When a refresh rate of a display element among the plurality of display elements driven by the source operational amplifier changes, the first bias current generated by the first bias control circuit is adjusted accordingly.

19. The source operational amplifier according to claim 18, wherein: Also includes: a second bias control circuit for supplying a second bias current to the other of the differential input pair and the current source pair; When the refresh rate of the display component changes, the second bias current generated by the second bias control circuit is adjusted accordingly.

20. The source operational amplifier according to claim 18, wherein: The first bias control circuit is coupled to a bias voltage generator to receive a bias voltage from the bias voltage generator, wherein the bias voltage is modified to adjust the first bias current.

21. The source operational amplifier according to claim 18, wherein: When the display component is refreshed at a first refresh rate, the first bias current has a first value, and when the display component is refreshed at a second refresh rate different from the first refresh rate, the first bias current has a second value different from the first value.

22. The source operational amplifier according to claim 21, wherein: The first refresh rate is greater than the second refresh rate, and the first value is less than the second value.

23. The source operational amplifier according to claim 18, wherein: The plurality of display components include a first display component and a second display component at different positions on the display screen, and when the first display component is refreshed, the first bias current has a first value, and when the second display component is refreshed, the first bias current has a second value; The first display component and the second display component are refreshed at different refresh rates.

24. The source operational amplifier of claim 18, wherein: The first bias current has a first value in a first time interval and a second value in a second time interval, wherein in the first time interval, the source operational amplifier refreshes one or more display components of the multiple display components at a first refresh rate, and in the second time interval, the source operational amplifier refreshes the one or more display components at a second refresh rate different from the first refresh rate.

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