Integrated power device and method of manufacturing the same

Abstract

The application discloses an integrated power device, which comprises a main MOSFET, a current sensor, a temperature sensor and a voltage sensor integrated together. The unit structure of the main MOSFET and the unit structure of the current sensor both adopt the same MOSFET unit structure. The MOSFET unit structure comprises a drift region, a body region, a first gate structure, a source region and a drain region; the first gate structure adopts a trench type separate gate. The temperature sensor comprises a drift region, a body region and a second gate structure; the top of the body region and the second source conductive material layer of the second gate structure are connected to a first electrode composed of a front metal layer, and the first electrode and the drain electrode constitute two measuring electrodes of the temperature sensor. The voltage sensor comprises a drift region, a first contact region of a first conductive type and a third gate structure; the top of the first contact region and the top of the third source conductive material layer of the third gate structure are both connected to a second electrode. The application further provides a manufacturing method of the integrated power device.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to an integrated power device. This invention also relates to a method for manufacturing an integrated power device. Background Technology

[0002] Existing traditional MOS layouts and process solutions only include the main MOS design and cannot detect abnormal MOS operating states. Once overstressed, the device is prone to burnout.

[0003] If various sensors can be integrated into the power device of the main MOSFET, the device performance can be monitored in real time and the device can be protected. Summary of the Invention

[0004] The technical problem to be solved by this invention is to provide an integrated power device that integrates a trench-type split-gate main MOSFET and multiple sensors, thereby enabling accurate detection of the power chip status and timely protection of the chip, while simultaneously reducing the device's on-resistance, increasing its breakdown voltage, and improving its switching speed. To this end, this invention also provides a method for manufacturing the integrated power device.

[0005] To solve the above-mentioned technical problems, the integrated power device provided by the present invention includes a main MOSFET, a current sensor, a temperature sensor and a voltage sensor integrated together.

[0006] The main MOSFET and the current sensor both use the same MOSFET cell structure.

[0007] The MOSFET unit structure includes: a drift region doped with a first conductivity type, a body region of a second conductivity type formed on the surface region of the drift region, a first gate structure, a source region heavily doped with a first conductivity type formed on the surface region of the body region, and a drain region heavily doped with a first conductivity type formed on the back side of the drift region; the first gate structure adopts a trench-type split gate, including a source conductive material layer and a gate conductive material layer formed in a first gate trench, a first dielectric layer is isolated between the source conductive material layer and the first gate trench, a second dielectric layer is isolated between the source conductive material layer and the gate conductive material layer, a gate dielectric layer is isolated between the gate conductive material layer and the side of the first gate trench, and the gate conductive material layer passes through the body region; the source region and the source conductive material layer are both connected to a source electrode composed of a front metal layer through corresponding contact holes at the top, the gate conductive material layer is connected to a gate electrode composed of a front metal layer through the corresponding contact holes at the top, and a drain electrode composed of a back metal layer is formed on the back side of the drain region.

[0008] The temperature sensor includes: the drift region, the body region, and the second gate structure; the second gate structure includes the third dielectric layer formed on the inner surface of the second gate trench and the second source conductive material layer filled in the second gate trench; no first conductivity type doped region is formed on the surface of the body region, and the top of the body region and the top of the second source conductive material layer are connected to the first electrode composed of the front metal layer through the corresponding contact holes, and the first electrode and the drain electrode constitute the two measuring electrodes of the temperature sensor.

[0009] The voltage sensor includes: a drift region, a first contact region heavily doped with a first conductivity type formed in the surface region of the drift region, and a third gate structure; the third gate structure includes a fourth dielectric layer formed on the inner surface of a third gate trench and a third source conductive material layer filled in the third gate trench; the body region is not formed on the surface of the drift region, and the top of the first contact region and the top of the third source conductive material layer are connected to a second electrode composed of the front metal layer through corresponding contact holes, and the second electrode and the drain electrode constitute the two measuring electrodes of the voltage sensor.

[0010] A further improvement is that the first dielectric layer is composed of a thermal oxide layer or is composed of a thermal oxide layer and a CVD oxide layer stacked together.

[0011] The process structures of the third dielectric layer and the fourth dielectric layer are the same as those of the first dielectric layer.

[0012] A further improvement is that the source conductive material layer, the second source conductive material layer, and the third source conductive material layer are all composed of a first polycrystalline silicon layer.

[0013] The gate conductive material layer is composed of a second polycrystalline silicon layer.

[0014] A further improvement is that the temperature sensor includes a plurality of second gate trenches, and the second gate trenches include an outermost second gate trench and an inner second gate trench located between the outermost second gate trenches.

[0015] The outermost second gate trench has a width greater than the inner second gate trench and is formed simultaneously, and the depth of the outermost second gate trench is greater than the depth of the inner second gate trench.

[0016] The first gate trench and the inner second gate trench have the same process structure and are formed simultaneously.

[0017] A further improvement is that the voltage sensor forming region is surrounded by a first isolation structure, the first isolation structure including a fourth gate structure.

[0018] The fourth gate structure includes the fifth dielectric layer formed on the inner surface of the fourth gate trench and the fourth source conductive material layer filled in the fourth gate trench.

[0019] The width of the fourth gate trench is greater than the width of the third gate trench and they are formed simultaneously, and the depth of the fourth gate trench is greater than the depth of the third gate trench.

[0020] The first gate trench and the third gate trench have the same process structure and are formed simultaneously.

[0021] The fourth source conductive material layer and the third source conductive material layer have the same process structure and are formed simultaneously. The top of the fourth source conductive material layer is isolated from the second electrode.

[0022] A further improvement is that the first isolation structure further includes a bottom well region formed in the drift region at the bottom of the fourth gate trench and extending to the bottom of the drift region.

[0023] A further improvement is that the trench-type separation gate corresponding to the first gate structure is a top-bottom structure or a left-right structure.

[0024] A further improvement is that the first conductivity type is N-type and the second conductivity type is P-type; or, the first conductivity type is P-type and the second conductivity type is N-type.

[0025] To solve the above-mentioned technical problems, the present invention provides a method for manufacturing an integrated power device, wherein the integrated power device includes a main MOSFET, a current sensor, a temperature sensor, and a voltage sensor integrated together; the unit structure of the main MOSFET and the unit structure of the current sensor both adopt the same MOSFET unit structure; the steps for forming each of the MOSFET unit structures, the temperature sensor, and the voltage sensor include:

[0026] A semiconductor substrate is provided, and a drift region doped with a first conductivity type is formed on the top surface of the semiconductor substrate.

[0027] Simultaneously, a first gate trench is formed for each of the MOSFET unit structures, a second gate trench for the temperature sensor, and a third gate trench for the voltage sensor.

[0028] Using the same dielectric growth process, a first dielectric layer is formed on the inner surface of the first gate trench, a third dielectric layer is formed on the inner surface of the second gate trench, and a fourth dielectric layer is formed on the inner surface of the third gate trench.

[0029] The process involves growing a first conductive material layer and then etching it back, while simultaneously filling the first gate trench with a source conductive material layer, filling the second gate trench with a second source conductive material layer, and filling the third gate trench with a third source conductive material layer. The second gate structure comprises the third dielectric layer and the second source conductive material layer, and the third gate structure comprises the fourth dielectric layer and the third source conductive material layer.

[0030] The source conductive material layer is etched back so that it is located in the bottom region of the first gate trench.

[0031] A second dielectric layer is formed on the surface of the source conductive material layer after the etch-back, and the first dielectric layer on the side of the first gate trench above the top surface of the second dielectric layer is removed.

[0032] A gate dielectric layer is formed on the side of the first gate trench above the top surface of the second dielectric layer.

[0033] A second conductive material layer is grown and etched back into the first gate trench above the top surface of the second dielectric layer to form a gate conductive material layer; the first gate structure adopts a trench-type split gate, and the structure includes the first dielectric layer, the source conductive material layer, the second dielectric layer, the gate dielectric layer and the gate conductive material layer.

[0034] Body implantation and annealing, involving second conductivity type doping, are used to advance the formation of body regions in the drift region surface regions of the MOSFET cell structure formation region and the temperature sensor formation region.

[0035] The source implantation and annealing process, which involves heavy doping of the first conductivity type, simultaneously forms a source region on the surface region of the body region of each MOSFET cell structure formation region and a first contact region on the surface region of the drift region of the voltage sensor.

[0036] A contact hole and a front metal layer are formed. The front metal layer is patterned to form a gate, a source, a first electrode, and a second electrode. The source region and the source conductive material layer are both connected to the source through corresponding contact holes at the top. The gate conductive material layer is connected to the gate through corresponding contact holes at the top. The top of the body region and the top of the second source conductive material layer are both connected to the first electrode through corresponding contact holes. The top of the first contact region and the top of the third source conductive material layer are both connected to the second electrode through corresponding contact holes.

[0037] The semiconductor substrate is thinned and a heavily doped drain region of the first conductivity type is formed on the back side of the drift region.

[0038] A drain electrode composed of a back metal layer is formed on the back side of the drain region; the first electrode and the drain electrode constitute the two measuring electrodes of the temperature sensor; the second electrode and the drain electrode constitute the two measuring electrodes of the voltage sensor.

[0039] A further improvement is that the first dielectric layer is formed by a thermal oxidation process; or, the first dielectric layer is formed by a combination of thermal oxidation and CVD processes.

[0040] A further improvement is that the film layer formed by the first growth of the conductive material layer is a first polycrystalline silicon layer.

[0041] The film formed by the growth of the second conductive material layer is a second polycrystalline silicon layer.

[0042] A further improvement is that the temperature sensor includes a plurality of second gate trenches, and the second gate trenches include an outermost second gate trench and an inner second gate trench located between the outermost second gate trenches.

[0043] The width of the outermost second gate trench is greater than the width of the inner second gate trench, and the depth of the outermost second gate trench is greater than the depth of the inner second gate trench.

[0044] The first gate trench and the inner second gate trench have the same process structure.

[0045] A further improvement is that, while forming the first gate trench, a fourth gate trench is also formed on the periphery of the forming region of the voltage sensor.

[0046] The width of the fourth gate trench is greater than the width of the third gate trench, and the depth of the fourth gate trench is greater than the depth of the third gate trench.

[0047] The first gate trench and the third gate trench have the same process structure.

[0048] The process of forming the first dielectric layer also includes the step of forming a fifth dielectric layer on the inner surface of the fourth gate trench.

[0049] The first conductive material layer growth and etch-back process also simultaneously fills the fourth source conductive material layer in the fourth gate trench; the top of the fourth source conductive material layer is isolated from the second electrode; the fifth dielectric layer and the fourth source conductive material layer form a fourth gate structure, which serves as a component of the first isolation structure.

[0050] A further improvement is that, after the formation of the fourth gate trench and before the formation of the first dielectric layer, the method further includes:

[0051] A bottom well region is formed in the drift region at the bottom of the fourth gate trench by well injection, and the bottom well region extends to the bottom of the drift region.

[0052] The fourth gate structure and the bottom well region together form part of the first isolation structure.

[0053] A further improvement is that the first conductivity type is N-type and the second conductivity type is P-type; or, the first conductivity type is P-type and the second conductivity type is N-type.

[0054] The main MOSFET of this invention adopts a trench-type split gate, which can reduce the on-resistance of the device, improve the breakdown voltage and switching speed of the device; at the same time, this invention can also integrate three sensors, namely a current sensor, a temperature sensor and a voltage sensor, so as to accurately detect the status of the power chip and protect the chip in time.

[0055] Furthermore, in the integrated structure, the unit structure of the current sensor is the same as that of the main MOSFET. The temperature sensor and voltage sensor adopt the second gate structure and the third gate structure, respectively. The gate trench, the dielectric layer on the inner surface of the second gate structure and the third gate structure, as well as the conductive material layer filled therein, can be formed simultaneously with the first gate trench, the first dielectric layer and the source conductive material layer of the trench-type split gate, i.e., the first gate structure. This not only improves the detection accuracy of the sensor, but also improves the performance of the temperature sensor and voltage sensor formation regions. For example, it can reduce the on-resistance of the temperature sensor and voltage sensor formation regions and improve the withstand voltage capability of the temperature sensor and voltage sensor formation regions. Finally, it can improve the overall performance of the integrated power device. Attached Figure Description

[0056] The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments:

[0057] Figure 1 This is a cross-sectional structural schematic diagram of the integrated power device according to an embodiment of the present invention;

[0058] Figures 2A-2K This is a schematic diagram of the cross-sectional structure of the device in each step of the manufacturing method of the integrated power device according to an embodiment of the present invention. Detailed Implementation

[0059] like Figure 1 The diagram shown is a cross-sectional view of an integrated power device according to an embodiment of the present invention. The integrated power device according to an embodiment of the present invention includes a main MOSFET, a current sensor, a temperature sensor, and a voltage sensor integrated together.

[0060] The main MOSFET and the current sensor both use the same MOSFET cell structure. Figure 1 The image shows the cross-sectional structure of three regions, namely regions 101a, 101b and 101c. Region 101a corresponds to the formation region of the MOSFET unit structure, region 101b corresponds to the formation region of the temperature sensor, and region 101c corresponds to the formation region of the voltage sensor.

[0061] The MOSFET cell structure includes: a drift region 102 doped with a first conductivity type, a body region 103 of a second conductivity type formed in the surface region of the drift region 102, a first gate structure, a source region 109 heavily doped with a first conductivity type formed in the surface region of the body region 103, and a drain region heavily doped with a first conductivity type formed on the back side of the drift region 102. The drain region is composed of a thinned semiconductor substrate 101 heavily doped with a first conductivity type or is formed by back-side implantation of a thinned semiconductor substrate 101 heavily doped with a first conductivity type.

[0062] The first gate structure employs a trench-type split gate, including a source conductive material layer 1061 and a gate conductive material layer 108 formed in a first gate trench 1041. A first dielectric layer 1051 is isolated between the source conductive material layer 1061 and the first gate trench 1041. A second dielectric layer 1052 is isolated between the source conductive material layer 1061 and the gate conductive material layer 108. A gate dielectric layer 107 is isolated between the gate conductive material layer 108 and the sidewall of the first gate trench 1041. The gate conductive material layer 108 passes through the body region 103. The source region 109 and the source conductive material layer 1061 are both connected to the source electrode composed of the front metal layer 113 through corresponding top contact holes 112. The gate conductive material layer 108 is connected to the gate electrode composed of the front metal layer 113 through corresponding top contact holes 112. A drain electrode composed of a back metal layer (not shown) is formed on the back side of the drain region. The contact holes 112 pass through the interlayer film 111.

[0063] In this embodiment of the invention, the trench-type separation gate corresponding to the first gate structure is a top-bottom structure. In other embodiments, the trench-type separation gate corresponding to the first gate structure can also be a left-right structure.

[0064] The temperature sensor includes a drift region 102, a body region 103, and a second gate structure. The second gate structure includes a third dielectric layer 1053 formed on the inner surface of a second gate trench 1042 and a second source conductive material layer 1062 filled in the second gate trench 1042. No first conductivity type doped region is formed on the surface of the body region 103. The top of the body region 103 and the top of the second source conductive material layer 1062 are connected to a first electrode composed of a front metal layer 113 through corresponding contact holes 112. The first electrode and the drain electrode constitute the two measuring electrodes of the temperature sensor.

[0065] In this embodiment of the invention, the temperature sensor includes a plurality of second gate trenches 1042, and the second gate trenches 1042 include an outermost second gate trench 1042a and an inner second gate trench 1042 located between the outermost second gate trench 1042a. Figure 1 In the diagram, the outermost second gate trench is designated by the symbol 1042a, while the inner second gate trench is still designated by the symbol 1042.

[0066] The outermost second gate trench 1042a has a width greater than the inner second gate trench 1042 and is formed simultaneously, and the depth of the outermost second gate trench 1042a is greater than the depth of the inner second gate trench 1042.

[0067] The first gate trench 1041 and the inner second gate trench 1042 have the same process structure and are formed simultaneously.

[0068] In this embodiment of the invention, the first electrode and the drain form the two electrodes of the body diode between the body region 103 and the drift region 102. When the temperature of the region where the body diode is located changes, the working performance of the body diode will change. Therefore, temperature detection can be performed through the first electrode and the drain.

[0069] In this embodiment of the invention, the introduction of the second gate structure can further improve the performance of the temperature sensor region, for example, it can reduce the on-resistance of the drift region 102 in the region and increase the breakdown voltage of the region.

[0070] The voltage sensor includes: a drift region 102, a first contact region 109a heavily doped with a first conductivity type formed in the surface region of the drift region 102, and a third gate structure; the third gate structure includes a fourth dielectric layer 1054 formed on the inner surface of a third gate trench 1043 and a third source conductive material layer 1063 filled in the third gate trench 1043; no body region 103 is formed on the surface of the drift region 102, and the top of the first contact region 109a and the top of the third source conductive material layer 1063 are connected to a second electrode composed of a front metal layer 113 through corresponding contact holes 112. The second electrode and the drain electrode constitute the two measuring electrodes of the voltage sensor.

[0071] In this embodiment of the invention, the current between the second electrode and the drain flows through the drift region 102. Therefore, the voltage detected between the second electrode and the drain represents the product of the resistance and current of the corresponding drift region 102, which can provide overcurrent protection during switching or use.

[0072] In this embodiment of the invention, the voltage sensor forming region is surrounded by a first isolation structure, which includes a fourth gate structure.

[0073] The fourth gate structure includes a fifth dielectric layer 1055 formed on the inner surface of the fourth gate trench 1044 and a fourth source conductive material layer 1064 filled in the fourth gate trench 1044.

[0074] The width of the fourth gate trench 1044 is greater than the width of the third gate trench 1043 and they are formed simultaneously. The depth of the fourth gate trench 1044 is greater than the depth of the third gate trench 1043.

[0075] The first gate trench 1041 and the third gate trench 1043 have the same process structure and are formed simultaneously.

[0076] The fourth source conductive material layer 1064 and the third source conductive material layer 1063 have the same process structure and are formed simultaneously. The top of the fourth source conductive material layer 1064 is isolated from the second electrode.

[0077] The first isolation structure also includes a bottom well region 110, which is formed in the drift region 102 at the bottom of the fourth gate trench 1044 and extends to the bottom of the drift region 102. The bottom well region 110 enhances the isolation effect. In other embodiments, the bottom well region 110 may be omitted.

[0078] Since the first isolation structure is also mainly formed using a gate structure, it can be integrated with the first gate structure of the trench-type split gate, resulting in lower process costs.

[0079] Meanwhile, the introduction of the third gate structure can further improve the performance of the voltage sensor region, for example, it can reduce the on-resistance of the drift region 102 in the region and increase the breakdown voltage of the region.

[0080] In this embodiment of the invention, the first dielectric layer 1051 is composed of a thermal oxidation layer or is composed of a thermal oxidation layer and a CVD oxidation layer stacked together.

[0081] The process structures of the third dielectric layer 1053, the fourth dielectric layer 1054, and the fifth dielectric layer 1055 are the same as those of the first dielectric layer 1051.

[0082] The first source conductive material layer 1061, the second source conductive material layer 1062, and the third source conductive material layer 1063 are all composed of the first polycrystalline silicon layer.

[0083] The gate conductive material layer 108 is composed of a second polysilicon layer.

[0084] In this embodiment of the invention, the main MOSFET is an N-type device, the first conductivity type is N-type, and the second conductivity type is P-type. In other embodiments, the main MOSFET can also be a P-type device, with the first conductivity type being P-type and the second conductivity type being N-type.

[0085] The main MOSFET in this embodiment of the invention adopts a trench-type split gate, which can reduce the on-resistance of the device, improve the breakdown voltage and switching speed of the device; at the same time, this embodiment of the invention can also integrate three sensors, namely a current sensor, a temperature sensor and a voltage sensor, so as to accurately detect the status of the power chip and protect the chip in a timely manner.

[0086] Furthermore, in the integrated structure, the unit structure of the current sensor is the same as that of the main MOSFET. The temperature sensor and the voltage sensor adopt the second gate structure and the third gate structure, respectively. The gate trench and the dielectric layer on the inner surface of the second gate structure and the third gate structure, as well as the conductive material layer filled therein, can be formed simultaneously with the first gate trench 1041, the first dielectric layer 1051 and the source conductive material layer 1061 of the trench-type split gate, i.e., the first gate structure. This not only improves the detection accuracy of the sensor, but also improves the performance of the temperature sensor and the voltage sensor formation area. For example, it can reduce the on-resistance of the temperature sensor and the voltage sensor formation area and improve the withstand voltage of the temperature sensor and the voltage sensor formation area. Finally, it can improve the overall performance of the integrated power device.

[0087] like Figures 2A to 2K The diagram shown is a schematic cross-sectional view of the device structure in each step of the manufacturing method of the integrated power device according to an embodiment of the present invention. In the manufacturing method of the integrated power device according to an embodiment of the present invention, the integrated power device includes a main MOSFET, a current sensor, a temperature sensor, and a voltage sensor integrated together. The unit structure of the main MOSFET and the unit structure of the current sensor both adopt the same MOSFET unit structure. The steps for forming each MOSFET unit structure, the temperature sensor, and the voltage sensor include:

[0088] Step S1, as follows Figure 2A As shown, a semiconductor substrate 101 is provided, and a drift region 102 doped with a first conductivity type is formed on the top surface of the semiconductor substrate 101.

[0089] Figure 2A The image shows the cross-sectional structure of three regions, namely regions 101a, 101b and 101c. Region 101a corresponds to the formation region of the MOSFET unit structure, region 101b corresponds to the formation region of the temperature sensor, and region 101c corresponds to the formation region of the voltage sensor.

[0090] Step S2, as follows Figure 2B As shown, a first gate trench 1041, a second gate trench 1042 for a temperature sensor, and a third gate trench 1043 for a voltage sensor are formed simultaneously in the structure of each MOSFET unit.

[0091] In the method of this embodiment of the invention, the number of second gate trenches 1042 included in the temperature sensor includes a plurality of second gate trenches 1042, including an outermost second gate trench 1042a and an inner second gate trench 1042 located between the outermost second gate trench 1042a.

[0092] The width of the outermost second gate trench 1042a is greater than the width of the inner second gate trench 1042, and the depth of the outermost second gate trench 1042a is greater than the depth of the inner second gate trench 1042.

[0093] The first gate trench 1041 and the inner second gate trench 1042 have the same process structure, for example, their width and depth are the same.

[0094] In the method of this embodiment, while forming the first gate trench 1041, a fourth gate trench 1044 is also formed on the periphery of the voltage sensor forming region.

[0095] The width of the fourth gate trench 1044 is greater than the width of the third gate trench 1043, and the depth of the fourth gate trench 1044 is greater than the depth of the third gate trench 1043.

[0096] The first gate trench 1041 and the third gate trench 1043 have the same process structure.

[0097] In some embodiments, after the fourth gate trench 1044 is formed and before the first dielectric layer 1051 is formed, such as Figure 2C As shown, it also includes:

[0098] A bottom well region 110 is formed in the drift region 102 at the bottom of the fourth gate trench 1044 by well injection, and the bottom well region 110 extends to the bottom of the drift region 102.

[0099] The fourth gate structure and the bottom well region 110 together form part of the first isolation structure.

[0100] Step S3, as follows Figure 2D As shown, the same dielectric growth process is used to simultaneously form a first dielectric layer 1051 on the inner surface of the first gate trench 1041, a third dielectric layer 1053 on the inner surface of the second gate trench 1042, and a fourth dielectric layer 1054 on the inner surface of the third gate trench 1043.

[0101] In the method of this embodiment, the first dielectric layer 1051 is formed by thermal oxidation; or, the first dielectric layer 1051 is formed by thermal oxidation plus CVD.

[0102] In the method of this embodiment of the invention, while forming the first dielectric layer 1051, a fifth dielectric layer 1055 is also formed on the inner surface of the fourth gate trench 1044.

[0103] Step S4, as follows Figure 2E As shown, the first conductive material layer is grown and etched back, while the first gate trench 1041 is filled with the source conductive material layer 1061, the second gate trench 1042 is filled with the second source conductive material layer 1062, and the third gate trench 1043 is filled with the third source conductive material layer 1063. The second gate structure includes a third dielectric layer 1053 and a second source conductive material layer 1062, and the third gate structure includes a fourth dielectric layer 1054 and a third source conductive material layer 1063.

[0104] In the method of this embodiment of the invention, the first conductive material layer growth and etch-back process also simultaneously fills the fourth source conductive material layer 1064 in the fourth gate trench 1044; the top of the fourth source conductive material layer 1064 is isolated from the second electrode; the fourth gate structure is formed by the fifth dielectric layer 1055 and the fourth source conductive material layer 1064, and the fourth gate structure is a component of the first isolation structure.

[0105] In the method of this invention embodiment, the film layer formed by the first growth of the conductive material layer is the first polycrystalline silicon layer.

[0106] Step S5, as follows Figure 2F As shown, the source conductive material layer 1061 is etched back so that the source conductive material layer 1061 is located in the bottom region of the first gate trench 1041.

[0107] Step S6, as follows Figure 2F As shown, a second dielectric layer 1052 is formed on the surface of the source conductive material layer 1061 after etch-back, and the first dielectric layer 1051 on the side of the first gate trench 1041 above the top surface of the second dielectric layer 1052 is removed.

[0108] Step S7, as follows Figure 2G As shown, a gate dielectric layer 107 is formed on the side of the first gate trench 1041 above the top surface of the second dielectric layer 1052.

[0109] Step S8, as follows Figure 2H As shown, a second conductive material layer is grown and etched back onto the top surface of the second dielectric layer 1052 to fill the first gate trench 1041 to form a gate conductive material layer 108; the first gate structure adopts a trench-type split gate, and the structure includes a first dielectric layer 1051, a source conductive material layer 1061, a second dielectric layer 1052, a gate dielectric layer 107 and a gate conductive material layer 108.

[0110] In the method of this invention embodiment, the film layer formed by the second growth of the conductive material layer is a second polycrystalline silicon layer.

[0111] Step S9, as follows Figure 2I As shown, a body region 103 is formed in the surface region of the drift region 102 of each MOSFET cell structure formation region and the temperature sensor formation region by body implantation and annealing for second conductivity type doping.

[0112] Step S10, as follows Figure 2J As shown, source implantation and annealing are performed to advance the first conductivity type heavy doping, while a source region 109 is formed on the surface region of the body region 103 of each MOSFET unit structure formation region and a first contact region 109a is formed on the surface region of the drift region 102 of the voltage sensor.

[0113] Step S11, as follows Figure 2K As shown, an interlayer membrane 111 is formed, and a contact hole opening 112a is formed.

[0114] In some embodiments, the method also includes performing a second conductivity type heavy doping implantation to form a body contact region at the bottom of the contact hole opening 112a.

[0115] like Figure 1 As shown, the contact hole 112 is formed by filling the contact hole opening 112a with metal.

[0116] A front metal layer 113 is formed, and the front metal layer 113 is patterned to form a gate, a source, a first electrode, and a second electrode. The source region 109 and the source conductive material layer 1061 are both connected to the source through corresponding contact holes 112 at the top. The gate conductive material layer 108 is connected to the gate through corresponding contact holes 112 at the top. The top of the body region 103 and the top of the second source conductive material layer 1062 are both connected to the first electrode through corresponding contact holes 112. The top of the first contact region 109a and the top of the third source conductive material layer 1063 are both connected to the second electrode through corresponding contact holes 112.

[0117] After that, the subsequent front-side process is completed.

[0118] After completing the front-side process, the back-side process is carried out, including:

[0119] The semiconductor substrate 101 is thinned and a heavily doped drain region of the first conductivity type is formed on the back side of the drift region 102.

[0120] A drain electrode composed of a back metal layer is formed on the back side of the drain region; the first electrode and the drain electrode form the two measuring electrodes of the temperature sensor; the second electrode and the drain electrode form the two measuring electrodes of the voltage sensor.

[0121] In the method of this embodiment, the main MOSFET is an N-type device, the first conductivity type is N-type, and the second conductivity type is P-type. In other embodiments, the main MOSFET can also be a P-type device, with the first conductivity type being P-type and the second conductivity type being N-type.

[0122] The current sensor integrated in this invention can monitor the operating current of the MOSFET in real time, facilitating system detection of the MOSFET's state and current, and enabling timely system response and protection of the MOSFET. The temperature sensor can detect the MOSFET's temperature in real time, enabling timely over-temperature protection and current limiting. The voltage sensor can provide overcurrent protection during switching and operation, preventing the MOSFET from burning out due to overcurrent, simplifying the design of the intelligent control chip and improving detection accuracy.

[0123] This invention relates to a smart split-gate MOSFET device manufactured based on existing split-gate technology. The original MOS process is adjusted to integrate three components: a current sensor, a temperature sensor, and a voltage sensor, to achieve the final power control switch.

[0124] Compared with the prior art, the embodiments of the present invention have the following technical effects:

[0125] 1. The integrated current and temperature sensors and overcurrent protection in the power control chip enable more accurate detection of the power chip status and timely protection.

[0126] 2. Lower on-resistance

[0127] Because of the use of split-gate MOSFET technology, the on-resistance is reduced to less than 40% of that of ordinary trench MOSFETs for the same chip area.

[0128] Existing technologies generally employ the manufacturing techniques of ordinary trench MOSFETs or planar MOSFETs. Planar MOSFETs have a lower on-resistance than trench MOSFETs. However, due to the connection between the bottom electrode and the source of the device, the split-gate MOSFET technology generates a transverse electric field on both sides of the bottom electrode when the device is biased by a high voltage at the DS electrode, which increases the breakdown voltage. Thus, to obtain the same breakdown voltage, the resistivity of the epitaxial layer can be significantly reduced, thereby reducing the on-resistance.

[0129] 3. Faster switching speed

[0130] Because it uses split-gate MOSFET technology, the Qg is extremely low, and the area is only 40% of that of a conventional AC MOSFET for the same on-resistance. The upper electrode of the split-gate technology is the gate, which is placed vertically and can be made within the micrometer level in width. The overlap area between the gate and drain can be made extremely small. Furthermore, there is an oxide layer with a thickness of thousands of angstroms and a polysilicon layer with a thickness of micrometers between the gate and the bottom drain. Therefore, the Qgd can be much smaller than that of conventional trench MOSFETs and planar MOSFETs.

[0131] The present invention has been described in detail above through specific embodiments, but these are not intended to limit the invention. Many modifications and improvements can be made by those skilled in the art without departing from the principles of the invention, and these should also be considered within the scope of protection of the present invention.

Claims

1. An integrated power device, characterized in that: This includes an integrated main MOSFET, current sensor, temperature sensor, and voltage sensor; The main MOSFET and the current sensor both use the same MOSFET cell structure. The MOSFET unit structure includes: a drift region doped with a first conductivity type, a body region of a second conductivity type formed on the surface region of the drift region, a first gate structure, a source region heavily doped with a first conductivity type formed on the surface region of the body region, and a drain region heavily doped with a first conductivity type formed on the back side of the drift region; the first gate structure adopts a trench-type split gate, including a source conductive material layer and a gate conductive material layer formed in a first gate trench, a first dielectric layer is isolated between the source conductive material layer and the first gate trench, a second dielectric layer is isolated between the source conductive material layer and the gate conductive material layer, a gate dielectric layer is isolated between the gate conductive material layer and the side of the first gate trench, and the gate conductive material layer passes through the body region; the source region and the source conductive material layer are both connected to a source electrode composed of a front metal layer through corresponding contact holes at the top, the gate conductive material layer is connected to a gate electrode composed of a front metal layer through the corresponding contact holes at the top, and a drain electrode composed of a back metal layer is formed on the back side of the drain region; The temperature sensor includes: the drift region, the body region, and the second gate structure; the second gate structure includes a third dielectric layer formed on the inner surface of the second gate trench and a second source conductive material layer filled in the second gate trench; no first conductivity type doped region is formed on the surface of the body region, and the top of the body region and the top of the second source conductive material layer are connected to a first electrode composed of the front metal layer through corresponding contact holes, and the first electrode and the drain electrode constitute the two measuring electrodes of the temperature sensor; The voltage sensor includes: a drift region, a first contact region heavily doped with a first conductivity type formed in the surface region of the drift region, and a third gate structure; the third gate structure includes a fourth dielectric layer formed on the inner surface of a third gate trench and a third source conductive material layer filled in the third gate trench; the body region is not formed on the surface of the drift region, and the top of the first contact region and the top of the third source conductive material layer are connected to a second electrode composed of the front metal layer through corresponding contact holes, and the second electrode and the drain electrode constitute the two measuring electrodes of the voltage sensor.

2. The integrated power device as described in claim 1, characterized in that: The first dielectric layer is composed of a thermally oxidized layer or is composed of a thermally oxidized layer and a CVD oxidized layer stacked together; The process structures of the third dielectric layer and the fourth dielectric layer are the same as those of the first dielectric layer.

3. The integrated power device as described in claim 2, characterized in that: The source conductive material layer, the second source conductive material layer, and the third source conductive material layer are all composed of a first polycrystalline silicon layer; The gate conductive material layer is composed of a second polycrystalline silicon layer.

4. The integrated power device as described in claim 1, characterized in that: The temperature sensor includes a plurality of second gate trenches, and the second gate trenches include an outermost second gate trench and an inner second gate trench located between the outermost second gate trenches. The outermost second gate trench has a width greater than the inner second gate trench and is formed simultaneously, and the depth of the outermost second gate trench is greater than the depth of the inner second gate trench. The first gate trench and the inner second gate trench have the same process structure and are formed simultaneously.

5. The integrated power device as described in claim 1, characterized in that: The voltage sensor is formed by a first isolation structure surrounding it, the first isolation structure including a fourth gate structure; The fourth gate structure includes a fifth dielectric layer formed on the inner surface of the fourth gate trench and a fourth source conductive material layer filled in the fourth gate trench; The width of the fourth gate trench is greater than the width of the third gate trench and they are formed simultaneously; the depth of the fourth gate trench is greater than the depth of the third gate trench. The first gate trench and the third gate trench have the same process structure and are formed simultaneously; The fourth source conductive material layer and the third source conductive material layer have the same process structure and are formed simultaneously. The top of the fourth source conductive material layer is isolated from the second electrode.

6. The integrated power device as described in claim 5, characterized in that: The first isolation structure further includes a bottom well region formed in the drift region at the bottom of the fourth gate trench and extending to the bottom of the drift region.

7. The integrated power device as described in claim 1, characterized in that: The trench-type separation gate corresponding to the first gate structure is either a top-bottom structure or a left-right structure.

8. The integrated power device according to any one of claims 1 to 7, characterized in that: The first conductivity type is N-type, and the second conductivity type is P-type; or, the first conductivity type is P-type, and the second conductivity type is N-type.

9. A method for manufacturing an integrated power device, characterized in that: Integrated power devices include a main MOSFET, a current sensor, a temperature sensor, and a voltage sensor integrated together; the main MOSFET and the current sensor both use the same MOSFET cell structure. The steps for forming each of the MOSFET cell structures, the temperature sensor, and the voltage sensor include: A semiconductor substrate is provided, and a drift region doped with a first conductivity type is formed on the top surface of the semiconductor substrate; Simultaneously, a first gate trench is formed for each of the MOSFET unit structures, a second gate trench for the temperature sensor, and a third gate trench for the voltage sensor; Using the same dielectric growth process, a first dielectric layer is formed on the inner surface of the first gate trench, a third dielectric layer is formed on the inner surface of the second gate trench, and a fourth dielectric layer is formed on the inner surface of the third gate trench. The process involves growing a first conductive material layer and then etching it back, while simultaneously filling the first gate trench with a source conductive material layer, filling the second gate trench with a second source conductive material layer, and filling the third gate trench with a third source conductive material layer. The second gate structure comprises the third dielectric layer and the second source conductive material layer, and the third gate structure comprises the fourth dielectric layer and the third source conductive material layer. The source conductive material layer is etched back so that it is located in the bottom region of the first gate trench; A second dielectric layer is formed on the surface of the source conductive material layer after the etch-back, and the first dielectric layer on the side of the first gate trench above the top surface of the second dielectric layer is removed. A gate dielectric layer is formed on the side of the first gate trench above the top surface of the second dielectric layer; A second conductive material layer is grown and etched back to fill the first gate trench above the top surface of the second dielectric layer to form a gate conductive material layer; the first gate structure adopts a trench-type split gate, and the structure includes the first dielectric layer, the source conductive material layer, the second dielectric layer, the gate dielectric layer and the gate conductive material layer; A second conductivity type doping process is performed, followed by annealing, to advance the formation of a body region in the surface region of the drift region of each of the MOSFET cell structure formation regions and the temperature sensor formation region; The source implantation and annealing process is carried out to advance the heavy doping of the first conductivity type, while the source region is formed on the surface region of the body region of each MOSFET cell structure formation region and the first contact region is formed on the surface region of the drift region of the voltage sensor. A contact hole and a front metal layer are formed. The front metal layer is patterned to form a gate, a source, a first electrode, and a second electrode. The source region and the source conductive material layer are both connected to the source through corresponding contact holes at the top. The gate conductive material layer is connected to the gate through corresponding contact holes at the top. The top of the body region and the top of the second source conductive material layer are both connected to the first electrode through corresponding contact holes. The top of the first contact region and the top of the third source conductive material layer are both connected to the second electrode through corresponding contact holes. The semiconductor substrate is thinned and a heavily doped drain region of the first conductivity type is formed on the back side of the drift region; A drain electrode composed of a back metal layer is formed on the back side of the drain region; the first electrode and the drain electrode constitute the two measuring electrodes of the temperature sensor; the second electrode and the drain electrode constitute the two measuring electrodes of the voltage sensor.

10. The manufacturing method of the integrated power device as described in claim 9, characterized in that: The first dielectric layer is formed by thermal oxidation; or, the first dielectric layer is formed by thermal oxidation combined with CVD.

11. The method for manufacturing an integrated power device as described in claim 10, characterized in that: The film layer formed by the first growth of the conductive material layer is a first polycrystalline silicon layer; The film formed by the growth of the second conductive material layer is a second polycrystalline silicon layer.

12. The method for manufacturing an integrated power device as described in claim 9, characterized in that: The temperature sensor includes a plurality of second gate trenches, and the second gate trenches include an outermost second gate trench and an inner second gate trench located between the outermost second gate trenches. The width of the outermost second gate trench is greater than the width of the inner second gate trench, and the depth of the outermost second gate trench is greater than the depth of the inner second gate trench. The first gate trench and the inner second gate trench have the same process structure.

13. The method for manufacturing an integrated power device as described in claim 9, characterized in that: While forming the first gate trench, a fourth gate trench is also formed on the periphery of the forming region of the voltage sensor; The width of the fourth gate trench is greater than the width of the third gate trench, and the depth of the fourth gate trench is greater than the depth of the third gate trench. The first gate trench and the third gate trench have the same process structure; The process of forming the first dielectric layer also includes the step of forming a fifth dielectric layer on the inner surface of the fourth gate trench. The first conductive material layer growth and etch-back process also simultaneously fills the fourth source conductive material layer in the fourth gate trench; The top of the fourth source conductive material layer is isolated from the second electrode. A fourth gate structure is formed by the fifth dielectric layer and the fourth source conductive material layer, and the fourth gate structure is a component of the first isolation structure.

14. The method for manufacturing an integrated power device as described in claim 13, characterized in that: After the fourth gate trench is formed and before the first dielectric layer is formed, the method further includes: A bottom well region is formed in the drift region at the bottom of the fourth gate trench by well injection, and the bottom well region extends to the bottom of the drift region; The fourth gate structure and the bottom well region together form part of the first isolation structure.

15. The method for manufacturing an integrated power device as described in any one of claims 9 to 14, characterized in that: The first conductivity type is N-type, and the second conductivity type is P-type; or, the first conductivity type is P-type, and the second conductivity type is N-type.

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