Embedded CAN baud rate automatic matching algorithm and device, server and computer readable storage medium

Abstract

The invention provides an embedded CAN baud rate automatic matching algorithm and device, a server and a computer readable storage medium, and relates to the field of communication. The algorithm comprises the following steps: initializing a CAN controller; reading a first numerical value of an LEC bit in an error state register ESR and a passive error state EPVF flag; judging whether the first numerical value of the LEC bit is equal to 0 or not, and judging whether a passive error state EPVF flag is triggered or not; if it is judged that the first numerical value of the LEC bit is equal to 0 and it is judged that a passive error state EPVF mark is triggered, data are sent to a bus; reading a second numerical value of an LEC bit in an error state register ESR and a passive error state EPVF flag; judging whether a second numerical value of the LEC bit is equal to 0 or not, and judging whether a passive error state EPVF flag is triggered or not; if it is judged that the second value of the LEC bit is equal to 0 and it is judged that a passive error state EPVF mark is triggered, it is judged that Baud rate matching succeeds. The method has the advantages of being fast, simple and reliable in algorithm, and is particularly suitable for application occasions where embedded MCU resources are in shortage.

Description

Technical Field

[0001] The invention relates to the field of communications, and in particular to an embedded CAN baud rate automatic matching algorithm, a device, a server and a computer-readable storage medium. Background Art

[0002] CAN bus (Controller Area Network) is one of the most widely used field buses in the world. It has outstanding reliability, real-time performance and flexibility, and is widely used in automobiles, industrial control, robotics, aerospace and other fields.

[0003] On the CAN LAN bus, the number of nodes supported by conventional CAN transceivers is up to 110, which are distinguished by node IDs. Each node must follow a unified communication modulation rate, namely the baud rate (Baud Rate), in order to communicate normally. That is to say, when a new node is connected to the CAN bus, it needs to match the baud rate on the CAN LAN bus to access the CAN bus LAN. However, the CAN bus baud rate setting range is generally between 50Kbps and 1Mbps. If the LAN bus baud rate is unknown in advance, how can we ensure that the newly connected CAN node can quickly and accurately match the LAN bus baud rate? In the prior art, there are two types of baud rate matching algorithms, one of which is active detection. Active detection is when a new node is connected to the LAN bus, it actively sends a message to the bus, and determines whether the baud rate matches by receiving the reply message from other nodes or the error counter statistics generated by itself. This type of matching method will cause other nodes on the bus to enter an error state because it will send data with inconsistent baud rates to the bus, and in some cases will cause error state processing.

[0004] The other is passive detection. Passive detection is to prevent the newly connected node from actively sending data. By monitoring the data on the bus, setting the sampling clock, detecting the transition time of two adjacent levels, and calculating the difference to obtain the baud rate value, this method has a more complex algorithm and requires more MCU resources in embedded systems.

[0005] In summary, passive detection requires processing complex level jump recognition and calculation processes, while active detection will affect the communication of other nodes on the CAN bus when the baud rate does not match. Summary of the invention

[0006] The purpose of the present invention includes, for example, to provide an embedded CAN baud rate automatic matching algorithm, device, server and computer-readable storage medium, which has the characteristics of fast, simple and reliable algorithm, and is particularly suitable for applications where embedded MCU resources are scarce.

[0007] The embodiments of the present invention can be implemented as follows: In a first aspect, an embodiment of the present invention provides an embedded CAN baud rate automatic matching algorithm, comprising: Initialize CAN controller; Read the first value of the LEC bit in the error status register ESR and the passive error status EPVF flag; Determine whether the first value of the LEC bit is equal to 0, and determine whether to trigger the passive error state EPVF flag; If it is determined that the first value of the LEC bit is equal to 0, and it is determined that the passive error state EPVF flag is triggered, data is sent to the bus; Read the second value of the LEC bit in the error status register ESR and the passive error status EPVF flag; Determine whether the second value of the LEC bit is equal to 0, and determine whether to trigger the passive error state EPVF flag; If it is determined that the second value of the LEC bit is equal to 0, and it is determined that the passive error state EPVF flag is triggered, then it is determined that the baud rate matching is successful.

[0008] Further, in an optional embodiment, after the step of reading the first value of the LEC bit in the error status register ESR and the passive error status EPVF flag, the algorithm further includes: Set the first detection timeout; If the time for executing the step of reading the first value of the LEC bit in the error status register ESR exceeds the first detection timeout period, the step of determining whether the first value of the LEC bit is equal to 0 and determining whether to trigger the passive error state EPVF flag is executed.

[0009] Furthermore, in an optional embodiment, the method further includes: If it is determined that the first value of the LEC bit is not equal to 0, or if it is determined that the passive error state EPVF flag is not triggered, the next baud rate is set and the step of initializing the CAN controller is re-executed.

[0010] Further, in an optional embodiment, after the step of reading the second value of the LEC bit in the error status register ESR and the passive error status EPVF flag, the algorithm further includes: Set the second detection timeout; If the time for executing the step of reading the second value of the LEC bit in the error status register ESR exceeds the second detection timeout period, the step of determining whether the second value of the LEC bit is equal to 0 and determining whether to trigger the passive error state EPVF flag is executed.

[0011] Furthermore, in an optional embodiment, the method further includes: If it is determined that the second value of the LEC bit is not equal to 0, or if it is determined that the passive error state EPVF flag is not triggered, the next baud rate is set and the step of initializing the CAN controller is re-executed.

[0012] In a second aspect, an embodiment of the present invention provides an embedded CAN baud rate automatic matching device, comprising: Initialization module: used to initialize the CAN controller; The first reading module is used to read the first value of the LEC bit in the error status register ESR and the passive error status EPVF flag; A first judgment module: used to judge whether the first value of the LEC bit is equal to 0, and judge whether to trigger the passive error state EPVF flag; A data sending module: used for sending data to the bus if it is determined that the first value of the LEC bit is equal to 0 and the passive error state EPVF flag is triggered; A second reading module: used for reading a second value of the LEC bit in the error status register ESR and a passive error status EPVF flag; A second judgment module: used to judge whether the second value of the LEC bit is equal to 0, and judge whether to trigger the passive error state EPVF flag; A determination module is used for determining that the baud rate matching is successful if it is determined that the second value of the LEC bit is equal to 0 and the passive error state EPVF flag is triggered.

[0013] In a third aspect, the present invention provides a server, comprising: a memory storing a computer-readable program; A processor is used to read and execute the program on the memory to implement the aforementioned algorithm.

[0014] In a fourth aspect, the present invention provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and when the computer program is read and executed by a processor, the aforementioned algorithm is implemented. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for use in the embodiments are briefly introduced below. It should be understood that the following drawings only illustrate certain embodiments of the present invention and should not be regarded as limiting the scope. For those of ordinary skill in the art, other related drawings can also be obtained based on these drawings without creative work.

[0016] Figure 1 It is a structural diagram of a server according to a specific embodiment of the present invention; Figure 2 A schematic diagram of an embedded CAN baud rate automatic matching algorithm according to a specific embodiment of the present invention; Figure 3 Schematic diagram of the structure of the embedded CAN baud rate automatic matching algorithm described in this embodiment.

[0017] Icon: 10-server; 100-embedded CAN baud rate automatic matching device; 200-memory; 300-processor. DETAILED DESCRIPTION

[0018] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0019] The embedded CAN baud rate automatic matching algorithm and device provided in the embodiments of the present invention are applied to a server, which may be, but is not limited to, a desktop computer, a laptop computer, a tablet computer, or a mobile phone. Figure 1 , is a schematic diagram of the structure of the server provided by an embodiment of the present invention. The service terminal is used to run the program of the embedded CAN baud rate automatic matching algorithm. The server includes a memory 200, a processor 300 and an embedded CAN baud rate automatic matching device 100. The embedded CAN baud rate automatic matching algorithm and device provided by the embodiment of the present invention have the characteristics of fast, simple and reliable algorithm, and are particularly suitable for applications where embedded MCU resources are scarce.

[0020] The memory 200 and the processor 300 are electrically connected to each other directly or indirectly to realize data transmission or interaction. For example, these elements can be electrically connected to each other through one or more communication buses or signal lines. The embedded CAN baud rate automatic matching device 100 includes at least one software function module that can be stored in the memory 200 in the form of software or firmware or solidified in the operating system (OS) of the service terminal. The processor 300 is used to execute the executable module stored in the memory 200, such as the software function module and computer program included in the embedded CAN baud rate automatic matching device 100.

[0021] The memory 200 may be, but is not limited to, a random access memory (RAM), a read only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable read-only memory (EEPROM), etc. The memory 200 is used to store a program, and the processor 300 executes the program after receiving an execution instruction.

[0022] In addition, the functional modules in the various embodiments of the present invention may be integrated together to form an independent part, or each module may exist independently, or two or more modules may be integrated to form an independent part.

[0023] If the functions are implemented in the form of software function modules and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium, including several instructions for enabling a computer device (which can be a personal computer, server, or network device, etc.) to perform all or part of the steps of the methods described in various embodiments of the present invention. The aforementioned storage media include: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk, and other media that can store program codes.

[0024] See also Figure 2 , this embodiment provides an embedded CAN baud rate automatic matching algorithm, including the following steps.

[0025] Step S100: Initialize the CAN controller.

[0026] Step S200: Read the first value of the LEC bit in the error status register ESR and the passive error status EPVF flag.

[0027] Step S300: Determine whether the first value of the LEC bit is equal to 0, and determine whether the passive error state EPVF flag is triggered.

[0028] Step S400: If it is determined that the first value of the LEC bit is equal to 0, and it is determined that the passive error state EPVF flag is triggered, data is sent to the bus.

[0029] Step S500: Read the second value of the LEC bit in the error status register ESR and the passive error status EPVF flag.

[0030] Step S600: Determine whether the second value of the LEC bit is equal to 0, and determine whether the passive error state EPVF flag is triggered.

[0031] Step S700: If it is determined that the second value of the LEC bit is equal to 0, and it is determined that the passive error state EPVF flag is triggered, it is determined that the baud rate matching is successful.

[0032] In this embodiment, after the step of reading the first value of the LEC bit in the error status register ESR and the passive error status EPVF flag, the algorithm also includes: setting a first detection timeout; if the time for executing the step of reading the first value of the LEC bit in the error status register ESR exceeds the first detection timeout, executing the step of determining whether the first value of the LEC bit is equal to 0, and determining whether to trigger the passive error status EPVF flag.

[0033] Optionally, the first detection timeout period may be set to 100 ms.

[0034] In this embodiment, the method further includes: if it is determined that the first value of the LEC bit is not equal to 0, or it is determined that the passive error state EPVF flag is not triggered, setting the next baud rate and re-performing the step of initializing the CAN controller.

[0035] In this embodiment, after the step of reading the second value of the LEC bit in the error status register ESR and the passive error status EPVF flag, the algorithm also includes: setting a second detection timeout; if the time for executing the step of reading the second value of the LEC bit in the error status register ESR exceeds the second detection timeout, executing the step of determining whether the second value of the LEC bit is equal to 0, and determining whether to trigger the passive error status EPVF flag.

[0036] Optionally, the second detection timeout period may be set to 100 ms.

[0037] In this embodiment, the method further includes: if it is determined that the second value of the LEC bit is not equal to 0, or it is determined that the passive error state EPVF flag is not triggered, setting the next baud rate and re-executing the step of initializing the CAN controller.

[0038] See also Figure 3When a new node is connected to the bus, the CAN controller is first initialized, passive detection is started, active data on the CAN bus is monitored, the detection timeout is set to 100ms, and the LEC bit (last error code) in the error register ESR is judged in real time. When the LEC bit is not 0, it indicates that the CAN communication of the node has a fault. The fault may be a bit error, a bit fill error, a CRC error, a format error, a response error, etc. However, this cannot be used to determine that the baud rate does not match, because occasional communication errors may also be caused by interference factors such as bus terminal resistance mismatch or unreasonable setting of the CAN bus bit timing. Therefore, it is necessary to determine whether the passive error flag EPVF is triggered to further confirm whether the baud rate does not match. The passive error flag EPVF triggers when the CAN controller hardware continuously detects more than 127 bus faults. If the LEC bit is continuously not 0 and the EPVF bit is set, it can be considered that the baud rate does not match. The CAN controller is reinitialized and switched to the next baud rate to continue judging. If the LEC bit is not detected to be greater than 0 and the EPVF is not set within the timeout period of 100ms, active detection can be started.

[0039] Active detection allows the newly connected node to send data to the CAN bus, sets the timeout to 100ms, and re-checks whether LEC is greater than 0 and whether the EPVF flag is set. If the LEC bit is continuously 0 and the EPVF is not set, it indicates that the CAN bus matches successfully. Otherwise, switch to the next baud rate and perform passive detection again.

[0040] For the current baud rate matching method, passive detection needs to process complex level jump recognition and calculation processes, and active detection will affect the communication of other nodes on the CAN bus when the baud rate does not match. This patent proposes a detection method based on error register flag judgment, combining passive detection and active detection to achieve conventional baud rate matching.

[0041] First, the passive detection method is started. By judging whether the LEC bit (last error code) in the error status register ESR is equal to 0 and whether the passive error status EPVF flag is triggered within a certain time range, it is judged whether the baud rate of the newly connected node matches the baud rate of the CAN local area network, avoiding the complex level jump identification and calculation process. When the LEC bit (last error code) in the error status register ESR is equal to 0 and the passive error status EPVF flag is not triggered, it is preliminarily considered that the baud rate match is successful.

[0042] In order to increase the accuracy of the successful baud rate matching, data is sent to the bus through the active detection method, and the LEC bit (last error code) in the error status register ESR is judged again to be greater than 0 and whether the passive error status EPVF flag is triggered. When the LEC bit (last error code) in the error status register ESR is equal to 0 and the passive error status EPVF flag is not triggered, the baud rate is finally considered to be matched successfully. By preliminarily judging the baud rate success through passive detection in advance and then performing active detection, the risk of sending data to the bus when the baud rate does not match, thereby affecting the communication of other nodes, is avoided. The detection method combining passive detection and active detection proposed in this patent makes the baud rate matching process simple, fast and reliable.

[0043] The embodiment of the present invention further provides an embedded CAN baud rate automatic matching device 100, comprising: an initialization module, a first reading module, a first judging module, a data sending module, a second reading module, a second judging module and a determination module.

[0044] The initialization module is used to initialize the CAN controller; in the embodiment of the present invention, the above step S100 is executed by the initialization module.

[0045] The first reading module is used to read the first value of the LEC bit in the error status register ESR and the passive error status EPVF flag; in the embodiment of the present invention, the above step S200 is executed by the first reading module.

[0046] The first judgment module is used to judge whether the first value of the LEC bit is equal to 0, and judge whether the passive error state EPVF flag is triggered; in the embodiment of the present invention, the above step S300 is executed by the first judgment module.

[0047] The data sending module is used to send data to the bus if it is determined that the first value of the LEC bit is equal to 0 and the passive error state EPVF flag is triggered; in the embodiment of the present invention, the above step S400 is executed by the data sending module.

[0048] The second reading module is used to read the second value of the LEC bit in the error status register ESR and the passive error status EPVF flag; in the embodiment of the present invention, the above step S500 is executed by the second reading module.

[0049] The second judgment module is used to judge whether the second value of the LEC bit is equal to 0, and judge whether to trigger the passive error state EPVF flag; in the embodiment of the present invention, the above step S600 is executed by the second judgment module.

[0050] The determination module is used to determine that the baud rate matching is successful if it is determined that the second value of the LEC bit is equal to 0 and the passive error state EPVF flag is triggered. In the embodiment of the present invention, the above step S700 is executed by the determination module.

[0051] In several embodiments provided in the present application, it should be understood that the disclosed devices and methods can also be implemented in other ways. The device embodiments described above are merely schematic. For example, the flowcharts and block diagrams in the accompanying drawings show the possible architecture, functions and operations of the devices, methods and computer program products according to multiple embodiments of the present invention. In this regard, each box in the flowchart or block diagram can represent a module, a program segment or a part of a code, and the module, a program segment or a part of a code contains one or more executable instructions for implementing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the box can also occur in a different order from the order marked in the accompanying drawings. For example, two consecutive boxes can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram and / or flowchart, and the combination of boxes in the block diagram and / or flowchart can be implemented with a dedicated hardware-based system that performs a specified function or action, or can be implemented with a combination of dedicated hardware and computer instructions.

[0052] In addition, the functional modules in the various embodiments of the present invention may be integrated together to form an independent part, or each module may exist independently, or two or more modules may be integrated to form an independent part.

[0053] If the functions are implemented in the form of software function modules and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes: various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory, a random access memory, a magnetic disk or an optical disk.

[0054] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.

[0055] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.

Claims

1. An embedded CAN baud rate automatic matching algorithm, characterized in that: include: Initialize CAN controller; Read the first value of the LEC bit in the error status register ESR and the passive error status EPVF flag; Determine whether the first value of the LEC bit is equal to 0, and determine whether to trigger the passive error state EPVF flag; If it is determined that the first value of the LEC bit is equal to 0, and it is determined that the passive error state EPVF flag is triggered, data is sent to the bus; Read the second value of the LEC bit in the error status register ESR and the passive error status EPVF flag; Determine whether the second value of the LEC bit is equal to 0, and determine whether to trigger the passive error state EPVF flag; If it is determined that the second value of the LEC bit is equal to 0, and it is determined that the passive error state EPVF flag is triggered, then it is determined that the baud rate matching is successful.

2. The embedded CAN baud rate automatic matching algorithm according to claim 1, characterized in that: After the step of reading the first value of the LEC bit in the error status register ESR and the passive error status EPVF flag, the algorithm further includes: Set the first detection timeout; If the time for executing the step of reading the first value of the LEC bit in the error status register ESR exceeds the first detection timeout period, the step of determining whether the first value of the LEC bit is equal to 0 and determining whether to trigger the passive error state EPVF flag is executed.

3. The embedded CAN baud rate automatic matching algorithm according to claim 2 is characterized in that: The method further comprises: If it is determined that the first value of the LEC bit is not equal to 0, or if it is determined that the passive error state EPVF flag is not triggered, the next baud rate is set and the step of initializing the CAN controller is re-executed.

4. The embedded CAN baud rate automatic matching algorithm according to claim 1 is characterized in that: After the step of reading the second value of the LEC bit in the error status register ESR and the passive error status EPVF flag, the algorithm further includes: Set the second detection timeout; If the time for executing the step of reading the second value of the LEC bit in the error status register ESR exceeds the second detection timeout period, the step of determining whether the second value of the LEC bit is equal to 0 and determining whether to trigger the passive error state EPVF flag is executed.

5. The embedded CAN baud rate automatic matching algorithm according to claim 4 is characterized in that: The method further comprises: If it is determined that the second value of the LEC bit is not equal to 0, or if it is determined that the passive error state EPVF flag is not triggered, the next baud rate is set and the step of initializing the CAN controller is re-executed.

6. An embedded CAN baud rate automatic matching device, characterized in that: include: Initialization module: used to initialize the CAN controller; The first reading module is used to read the first value of the LEC bit in the error status register ESR and the passive error status EPVF flag; A first judgment module: used to judge whether the first value of the LEC bit is equal to 0, and judge whether to trigger the passive error state EPVF flag; A data sending module: used for sending data to the bus if it is determined that the first value of the LEC bit is equal to 0 and the passive error state EPVF flag is triggered; A second reading module: used for reading a second value of the LEC bit in the error status register ESR and a passive error status EPVF flag; A second judgment module: used to judge whether the second value of the LEC bit is equal to 0, and judge whether to trigger the passive error state EPVF flag; A determination module is used for determining that the baud rate matching is successful if it is determined that the second value of the LEC bit is equal to 0 and the passive error state EPVF flag is triggered.

7. A server, characterized in that: include: a memory storing a computer-readable program; A processor, wherein the processor is used to read and execute the program on the memory to implement the algorithm according to any one of claims 1 to 6.

8. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is read and executed by a processor, the algorithm described in any one of claims 1 to 6 is implemented.

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