Display panel and display device

Abstract

The embodiment of the invention provides a display panel and a display device, and relates to the technical field of display. In the display panel, an isolation structure is located on one side of a substrate, a first wiring layer is located between the substrate and the isolation structure, the first wiring layer comprises a first conductive wire used for transmitting a first power signal, and in a display area, the isolation structure is connected with the first conductive wire. According to the design, the connection area of the first power supply signal wire and the isolation structure is increased through the first conductive wire in the display area, so that the connection resistance is reduced, the heat generated by the display panel in a highlight display state due to large current is reduced, the burn of the display panel caused by the heat is avoided, the normal work of the display panel is ensured, and the display efficiency is improved. The working stability of the display panel is improved, meanwhile, the display power consumption of the display panel can be reduced, and the cruising ability of the display device carrying the display panel is improved.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular, to a display panel and a display device. Background Art

[0002] Organic Light Emitting Diode (OLED) is considered to be the next generation display technology after liquid crystal display technology. It is widely used in various consumer electronic products such as smart phones, TVs, laptops, desktop computers, car displays, wearable devices, etc. due to its excellent color and picture quality, and has become the mainstream technology in display panels.

[0003] However, the process performance of current OLED display products needs to be further improved. Summary of the invention

[0004] In order to overcome the technical problems mentioned in the above technical background, the present application provides a display panel and a display device.

[0005] In a first aspect of the present application, a display panel is provided, the display panel comprising a display area and a frame area at least partially surrounding the display area, the display panel further comprising:

[0006] substrate;

[0007] An isolation structure, located on one side of the substrate;

[0008] The first wiring layer is located between the substrate and the isolation structure. The first wiring layer includes at least one first conductive wiring for transmitting a first power signal. In the display area, the isolation structure is connected to at least one first conductive wiring.

[0009] In a possible implementation of the present application, in the display area, the orthographic projection of the first conductive trace on the substrate is located within the orthographic projection of the isolation structure on the substrate.

[0010] In a possible implementation of the present application, the first conductive trace extends along a second direction, and a plurality of the first conductive traces are parallel to each other and arranged along the first direction, wherein the first direction intersects with the second direction;

[0011] Preferably, the display panel further comprises a second wiring layer, the second wiring layer is located between the substrate and the first wiring layer, the second wiring layer comprises at least one second conductive wiring, the at least one second conductive wiring is connected to at least one first conductive wiring, and the second conductive wiring extends along the first direction;

[0012] Preferably, the second direction is perpendicular to the first direction;

[0013] Preferably, at least one of the second conductive traces is connected to at least one of the first conductive traces through a first via;

[0014] Preferably, the first via hole is located at an overlapping position of an orthographic projection of the first conductive trace on the substrate and an orthographic projection of the second conductive trace on the substrate.

[0015] In a possible implementation of the present application, the first wiring layer further includes at least one second power signal wiring, the second power signal wiring is parallel to the first conductive wiring, and the second power signal wiring is insulated from the first conductive wiring;

[0016] Preferably, the display area includes a first sub-display area and a second sub-display area, the first wiring layer further includes at least one third conductive wiring, and the third conductive wiring is insulated from the first conductive wiring.

[0017] The first conductive trace is located in the first sub-display area, and the third conductive trace is located in the second sub-display area.

[0018] In a possible implementation of the present application, in the first sub-display area, the isolation structure is connected to at least one of the first conductive traces, and in the second sub-display area, the second power signal trace is connected to at least one of the third conductive traces;

[0019] Preferably, the at least one first conductive trace and the at least one third conductive trace are located in the same column;

[0020] Preferably, the first sub-display area and the second sub-display area are arranged along the second direction.

[0021] In a possible implementation manner of the present application, the display panel further includes a first conductive layer, a second conductive layer, a third conductive layer, a fourth conductive layer, and an insulating layer located between adjacent conductive layers, which are stacked sequentially on the substrate in a direction away from the substrate, the first routing layer is located in the fourth conductive layer, and the second routing layer is located in the third conductive layer; or,

[0022] The display panel also includes a first conductive layer, a second conductive layer, a third conductive layer, a fourth conductive layer, a fifth conductive layer and an insulating layer located between adjacent conductive layers and stacked in sequence on the substrate in a direction away from the substrate, the first routing layer is located in the fifth conductive layer, and the second routing layer is located in the fourth conductive layer.

[0023] In a possible implementation of the present application, the display panel further includes a third routing layer, the third routing layer is located on a side of the first routing layer away from the substrate, the third routing layer includes at least one second power signal routing line, the second power signal routing line extends along a second direction, the first conductive routing line extends along a first direction, and the first direction intersects with the second direction;

[0024] Preferably, the first direction is perpendicular to the second direction.

[0025] In a possible implementation of the present application, the display area includes a first sub-display area and a second sub-display area, the first wiring layer further includes at least one fourth conductive wiring, the fourth conductive wiring is insulated from the first conductive wiring, and the fourth conductive wiring extends along the second direction;

[0026] In the first sub-display area, the isolation structure is connected to the at least one first conductive trace, and in the second sub-display area, the second power signal trace is connected to at least one fourth conductive trace;

[0027] Preferably, the first conductive trace is located in the first sub-display area, and the fourth conductive trace is located in the second sub-display area;

[0028] Preferably, the first sub-display area and the second sub-display area are arranged along the second direction.

[0029] In a possible implementation of the present application, the display panel further includes a first conductive layer, a second conductive layer, a third conductive layer, a fourth conductive layer and an insulating layer located between adjacent conductive layers and stacked sequentially on the substrate in a direction away from the substrate, the first routing layer is located in the third conductive layer, and the third routing layer is located in the fourth conductive layer; or,

[0030] The display panel also includes a first conductive layer, a second conductive layer, a third conductive layer, a fourth conductive layer, a fifth conductive layer and an insulating layer located between adjacent conductive layers and stacked in sequence on the substrate in a direction away from the substrate, the first routing layer is located in the fourth conductive layer, and the third routing layer is located in the fifth conductive layer.

[0031] In a possible implementation of the present application, the display panel further includes an insulating layer located between the isolation structure and the first conductive layer, the insulating layer includes an insulating layer through hole, and the isolation structure is connected to the first conductive trace through the insulating layer through hole;

[0032] Preferably, the isolation structure comprises a first isolation portion and a second isolation portion, the first isolation portion and the second isolation portion are stacked in sequence in a direction away from the substrate, and the first isolation portion is connected to the first conductive trace through the insulating layer through hole;

[0033] Preferably, the orthographic projection of the first isolation portion on the substrate is located within the orthographic projection of the second isolation portion on the substrate;

[0034] Preferably, the isolation structure encloses an isolation opening on the substrate, and the cross-sectional shape of the isolation structure is T-shaped on a cross section perpendicular to the plane where the substrate is located and passing through the center of the isolation opening;

[0035] Preferably, the orthographic projection of the insulating layer through hole on the substrate is located within the orthographic projection on the substrate of an intersection of the isolation structure extending along the first direction and the isolation structure extending along the second direction.

[0036] In a possible implementation of the present application, the isolation structure further includes a third isolation portion, and in a direction away from the substrate, the third isolation portion, the first isolation portion, and the second isolation portion are stacked in sequence;

[0037] The orthographic projection of the first isolation portion on the substrate is located within the orthographic projection of the third isolation portion on the substrate,

[0038] The third isolation portion is connected to the first conductive trace through the insulating layer through hole;

[0039] Preferably, in a cross section perpendicular to the plane where the substrate is located and passing through the center of the isolation opening, the cross-sectional shape of the isolation structure is an I-shape;

[0040] Preferably, the material of the first isolation portion includes aluminum, silver or copper, and / or the material of the second isolation portion includes titanium or molybdenum, and / or the material of the third isolation portion includes molybdenum or titanium.

[0041] In a possible implementation of the present application, the insulating layer includes a pixel defining layer, the pixel defining layer is located between the first conductive layer and the isolation structure, the pixel defining layer includes a pixel defining layer through hole, and the isolation structure is connected to the first conductive trace through the pixel defining layer through hole.

[0042] In a possible implementation of the present application, the insulating layer further includes a planarization layer, the planarization layer is located between the first conductive layer and the pixel defining layer, and the planarization layer includes a planarization layer through hole.

[0043] The isolation structure is connected to the first conductive trace through the pixel definition layer through hole and the planarization layer through hole;

[0044] Preferably, the orthographic projection of the planarization layer through hole on the substrate is located within the orthographic projection of the pixel definition layer through hole on the substrate.

[0045] In a possible implementation of the present application, an orthographic projection of the pixel definition layer through hole on the substrate and an orthographic projection of the planarization layer through hole on the substrate are located outside an orthographic projection of the isolation opening on the substrate;

[0046] Preferably, the orthographic projections of the pixel defining layer through hole and the planarizing layer through hole on the substrate are located within the orthographic projections of the intersection of the isolation structure extending along the first direction and the isolation structure extending along the second direction on the substrate.

[0047] In a possible implementation of the present application, the display panel further includes a first power line and a second power line located in the border area;

[0048] The first power line is connected to the first conductive trace, and the second power line is connected to the second power signal trace, wherein a voltage of a first power signal provided by the first power line is lower than a voltage of a second power signal provided by the second power line.

[0049] In a possible implementation of the present application, the display panel further includes a light emitting device;

[0050] The isolation structure is enclosed on the substrate to form an isolation opening, and at least part of the light emitting device is located in the isolation opening;

[0051] Preferably, in the display area, the light emitting devices are distributed in an array along a first direction and a second direction, the light emitting devices are arranged along the first direction to form a pixel row, and a plurality of the pixel rows are arranged along the second direction.

[0052] In a possible implementation of the present application, the display panel further includes a pixel defining layer, the pixel defining layer is located on one side of the substrate, the isolation structure is located on a side of the pixel defining layer away from the substrate, the pixel defining layer includes a pixel opening, at least part of the light emitting device is located in the pixel opening, and the pixel opening is located in the isolation opening;

[0053] The light emitting device comprises a first electrode, a light emitting material layer and a second electrode, and in a direction away from the substrate, the first electrode, the light emitting material layer and the second electrode are stacked in sequence;

[0054] At least a portion of the first electrode is exposed from the pixel opening position, and the second electrode overlaps the isolation structure.

[0055] In a possible implementation of the present application, the frame area includes a first sub-frame area, a second sub-frame area, a third sub-frame area and a fourth sub-frame area, wherein the first sub-frame area and the third sub-frame area are arranged opposite to each other in the second direction, and the second sub-frame area and the fourth sub-frame area are arranged opposite to each other in the first direction;

[0056] The first power line is distributed along the second sub-frame area, the third sub-frame area and the fourth sub-frame area, and is distributed in a partial area of ​​the first sub-frame area;

[0057] The second power line is distributed in the first sub-frame area, and the first power line is insulated from the second power line;

[0058] Preferably, the first conductive trace is connected to a first power line in at least one of the first sub-frame area, the second sub-frame area, the third sub-frame area and the fourth sub-frame area.

[0059] In a possible implementation of the present application, a first power line distributed in the first sub-border area is connected to the isolation structure.

[0060] A second aspect of the present application further provides a display device, comprising a display panel in any possible implementation manner of the first aspect.

[0061] The embodiment of the present application provides a display panel and a display device, in which an isolation structure is located on one side of a substrate, a first wiring layer is located between the substrate and the isolation structure, the first wiring layer includes a first conductive wiring for transmitting a first power supply signal, and in a display area, the isolation structure is connected to the first conductive wiring. With such a design, the connection area with the isolation structure can be increased through the first conductive wiring in the display area, thereby reducing the connection resistance, reducing the heat generated by the large current when the display panel is in a high-brightness display state, avoiding the display panel from being burned due to the above-mentioned heat, ensuring that the display panel can work normally, improving the stability of the display panel, and at the same time reducing the display power consumption of the display panel, and improving the battery life of the display device equipped with the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0062] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0063] Figure 1 A schematic diagram illustrating the regional distribution of the display panel provided in this embodiment;

[0064] Figure 2 A schematic diagram illustrating the positional relationship between the isolation structure and the isolation opening provided in this embodiment;

[0065] Figure 3 Example Figure 2 One of the cross-sectional diagrams at the AA position;

[0066] Figure 4 One of the schematic diagrams of wiring distribution in various areas of the display panel provided in this embodiment is illustrated;

[0067] Figure 5 The second schematic diagram illustrating the distribution of wiring in various areas of the display panel provided in this embodiment;

[0068] Figure 6 Example Figure 2 The second cross-sectional diagram at the AA position;

[0069] Figure 7 The third schematic diagram illustrates the distribution of wiring in various areas of the display panel provided in this embodiment;

[0070] Figure 8 One of the schematic diagrams of stacking the conductive layer on the substrate is illustrated;

[0071] Fig. 9 The second schematic diagram of stacking the conductive layer on the substrate is illustrated;

[0072] Fig.10 A fourth schematic diagram illustrating the distribution of wiring in various areas of the display panel provided in this embodiment;

[0073] Fig.11 Example Figure 2 The third cross-sectional diagram at the AA position;

[0074] Fig.12 Example Figure 2 The fourth cross-sectional diagram at the AA position;

[0075] Fig.13 Example Figure 2 The fifth cross-sectional diagram at the AA position;

[0076] Fig.14 Example Figure 2 The sixth cross-sectional diagram at the AA position;

[0077] Fig.15A schematic diagram illustrating the positional relationship between the pixel definition layer through hole, the planarization layer through hole and the isolation opening;

[0078] Fig.16 Example Figure 2 One of the cross-sectional diagrams at the mid-BB position;

[0079] Fig.17 Example Figure 2 The second cross-sectional diagram of the middle BB position;

[0080] Fig.18 The schematic diagram illustrates the positional relationship between the edge of the thin film encapsulation layer and the wiring provided in this embodiment.

[0081] Icons: 1-display panel; 11-substrate; 12-isolation structure; 1201-isolation opening; 121-first isolation portion; 122-second isolation portion; 123-third isolation portion; 131-first routing layer; 1311-first conductive routing; 1312-second power signal routing; 1313-third conductive routing; 1314-fourth conductive routing; 132-second routing layer; 1321-second conductive routing; 133-third routing layer; 141-first conductive layer; 142-second conductive layer; 143-third conductive layer; 144-fourth conductive layer; 145-fifth conductive layer; 15-insulating layer; 1501-insulating layer Through hole; 151-pixel defining layer; 1511-pixel defining layer through hole; 1512-pixel opening; 152-planarization layer; 1521-planarization layer through hole; 16-light-emitting device; 161-first electrode; 162-light-emitting material layer; 163-second electrode; 17-thin film encapsulation layer; 171-first encapsulation layer; 1711-encapsulation unit; 172-second encapsulation layer; 173-third encapsulation layer; AA-display area; AA1-first sub-display area; AA2-second sub-display area; AB-border area; AB1-first sub-border area; AB2-second sub-border area; AB3-third sub-border area; AB4-fourth sub-border area. DETAILED DESCRIPTION

[0082] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. The components of the embodiments of the present application described and shown in the drawings here can be arranged and designed in various different configurations.

[0083] In the description of the present application, it should be noted that the terms "upper", "lower", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, or are the orientations or positional relationships in which the product of the application is usually placed when in use. They are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.

[0084] Improving the density of light-emitting devices in a display panel (i.e., pixel density) is an important way to improve the display effect. However, the display panels currently made using fine metal evaporation mask (FMM) technology are unable to further increase the density of light-emitting devices due to technical limitations. After long-term research, the inventors found that in order to solve the technical problem that the density of light-emitting devices cannot be further increased, an isolation structure is set in some display panels. When the light-emitting material layer and the cathode are evaporated in the entire layer, the light-emitting material layer and the cathode can be disconnected at the isolation structure position. Through multiple evaporation and multiple etching processes, light-emitting devices of different colors can be formed in different isolation openings. The above process is also called light-emitting device patterning.

[0085] Patent CN118251982A, Patent 202410864269.8, Patent PCT / CN2024 / 098407, Patent PCT / CN2024 / 102783, Patent PCT / CN2024 / 098217, PCT / CN2024 / 099419, Patent PCT / CN2024 / 099072, Patent CN117979755A, Patent CN117998900A, Patent CN 117062489A, patent CN117580403A, patent CN116583155A, patent CN116669477A, ​​patent CN117396039A, patent CN116669480A, patent CN116600606A and patent CN117500332A record related technical solutions of isolation structure (or partition structure or isolation column) and encapsulation layer, and their contents are incorporated into this application by reference for reference.

[0086] In the above-mentioned display panel, there is heat damage in the high-brightness display state, which causes the display panel to be unable to work stably, which affects the display effect of the display panel and further reduces the user experience.

[0087] In order to solve the above problems, the inventor innovatively designed the following technical solution, and the specific implementation scheme of the present application will be described in detail below in conjunction with the accompanying drawings. It should be noted that the defects existing in the above solutions in the prior art are the results obtained by the inventor after practice and careful research. Therefore, the discovery process of the above technical problems and the solutions proposed in this embodiment below for the above problems should all be the contributions made by the inventor to the present application in the process of invention and creation, and should not be understood as the technical content known to those skilled in the art.

[0088] Please refer to Figure 1 , Figure 2 , Figure 3 and Figure 4 , Figure 1 The schematic diagram of the regional distribution of the display panel provided by this embodiment is illustrated. Figure 2 The schematic diagram of the positional relationship between the isolation structure and the isolation opening is illustrated. Figure 3 Example Figure 2 Schematic diagram of the cross section at the AA position in the middle. Figure 4 The following example shows the distribution of wiring in various areas of the display panel. Figure 1 As shown, the display panel 1 includes a display area AA and a frame area AB, wherein the frame area AB at least partially surrounds the display area AA, wherein the frame area AB may correspond to a non-display area of ​​the display panel 1 .

[0089] In this embodiment, the display panel 1 includes a substrate 11, an isolation structure 12 and a first wiring layer 131. The isolation structure 12 is located on one side of the substrate 11. The first wiring layer 131 is located between the substrate 11 and the isolation structure 12. The first wiring layer 131 includes at least one first conductive wiring 1311 for transmitting a first power supply signal. In the display area AA, the isolation structure 12 is connected to at least one first conductive wiring 1311. Exemplarily, in the display area AA, the isolation structure 12 is connected to the first conductive wiring 1311 thereunder.

[0090] In the above scheme, the connection area with the isolation structure 12 is increased in the display area AA through the first conductive trace 1311, so as to reduce the connection resistance, reduce the heat generated by the large current when the display panel 1 is in the highlight display state, avoid the display panel burn caused by the above heat, ensure that the display panel 1 can work normally, improve the working stability of the display panel 1, and at the same time reduce the display power consumption of the display panel 1, and improve the battery life of the display device equipped with the display panel 1.

[0091] Further, please refer again to Figure 2 and Figure 3In the display area AA, the isolation structure 12 includes an isolation opening 1201, and the first conductive trace 1311 can be arranged below the isolation structure 12, that is, the orthographic projection of the first conductive trace 1311 on the substrate 11 is located within the orthographic projection of the isolation structure 12 on the substrate 11. With such a design, the first conductive trace 1311 can avoid the isolation opening 1201. On the one hand, it can prevent the first conductive trace 1311 from affecting the flatness of the film layer inside the isolation opening 1201 when it is located below the isolation opening 1201, thereby affecting the light intensity at different angles. On the other hand, it can prevent the first conductive trace 1311 from reflecting ambient light and affecting the display effect when it is located in the isolation opening 1201.

[0092] In one implementation of this embodiment, please refer again to Figure 4 The first conductive trace 1311 extends along the second direction (the Y direction in the figure), and the multiple first conductive traces 1311 are parallel to each other and arranged along the first direction (the X direction in the figure), wherein the first direction intersects with the second direction, and optionally, the first direction and the second direction are perpendicular to each other.

[0093] Please refer to Figure 5 and Figure 6 In the present embodiment, the display panel 1 further includes a second wiring layer 132, the second wiring layer 132 is located between the substrate 11 and the first wiring layer 131, the second wiring layer 132 and the first wiring layer 131 are insulated from each other, an insulating layer 15 can be provided between the second wiring layer 132 and the first wiring layer 131, the second wiring layer 132 includes at least one second conductive wiring 1321, the second conductive wiring 1321 extends along a first direction (X direction in the figure), that is, the first conductive wiring 131 and the second conductive wiring 1321 form a grid pattern; at least one second conductive wiring 1321 is connected to at least one first conductive wiring 131, specifically, at least one second conductive wiring 1321 is connected to at least one first conductive wiring 1311 through a first via 201, wherein the first via 201 can penetrate the insulating layer between the second wiring layer 132 and the first wiring layer 131.

[0094] Optionally, in this embodiment, the first via 201 is located at the overlapping position of the orthographic projection of the first conductive trace 1311 on the substrate 11 and the orthographic projection of the second conductive trace 1321 on the substrate 11. Such a design can make the first conductive trace 1311 and the second conductive trace 1321 connected together through the shortest path, thereby reducing the connection resistance. In addition, the first conductive trace 1311 and the second conductive trace 1321 are connected together to reduce the transmission resistance of the first power supply signal, thereby ensuring that the first power supply signals obtained at different positions in the display area AA are substantially the same, thereby improving the display uniformity of the display panel 1.

[0095] For further information, please refer to Figure 7, the first wiring layer 131 also includes at least one second power signal wiring 1312, the second power signal wiring 1312 is parallel to the first conductive wiring 1311, and the second power signal wiring 1312 is insulated from the first conductive wiring 1311. Optionally, the display area AA includes a first sub-display area AA1 and a second sub-display area AA2, wherein the first sub-display area AA1 and the second sub-display area AA2 can be arranged along a second direction (Y direction in the figure). The first wiring layer 131 also includes at least one third conductive wiring 1313, and the third conductive wiring 1313 is insulated from the first conductive wiring 1311. In this embodiment, the first conductive wiring 1311 is located in the first sub-display area AA1, and the third conductive wiring 1313 is located in the second sub-display area AA2.

[0096] In this embodiment, in the first sub-display area AA1, the isolation structure 12 is connected to at least one first conductive trace 1311, and in the second sub-display area AA2, the second power signal trace 1312 is connected to at least one third conductive trace 1313, wherein the connection between the second power signal trace 1312 and the third conductive trace 1313 can increase the trace width and thereby reduce the resistance of the trace where the second power signal trace 1312 is located, which can reduce the IR-drop of the second power signal during transmission and enhance the display uniformity of the display panel.

[0097] Optionally, in this embodiment, at least one first conductive trace 1311 and at least one third conductive trace 1313 are located in the same column, that is, an extension line of at least one first conductive trace 1311 along the column direction coincides with an extension line of at least one third conductive trace 1313 along the column direction.

[0098] Please refer to Figure 8 , when the display panel 1 further includes a first conductive layer 141, a second conductive layer 142, a third conductive layer 143, and a fourth conductive layer 144 which are stacked sequentially on the substrate 11 in a direction away from the substrate 11, an insulating layer 15 is provided between adjacent conductive layers, wherein the first conductive layer 141, the second conductive layer 142, the third conductive layer 143, and the fourth conductive layer 144 may be metal conductive layers, and the first conductive layer 141, the second conductive layer 142, the third conductive layer 143, and the fourth conductive layer 144 may form a pixel circuit for driving a light-emitting device. The first wiring layer 131 may be located in the fourth conductive layer 144, and the second wiring layer 132 may be located in the third conductive layer 143, that is, the wiring in the first wiring layer 131 may be formed by the fourth conductive layer 144, and the wiring in the second wiring layer 132 may be formed by the third conductive layer 143.

[0099] Please refer to Fig. 9, when the display panel 1 further includes a first conductive layer 141, a second conductive layer 142, a third conductive layer 143, a fourth conductive layer 144 and a fifth conductive layer stacked sequentially on the substrate 11 in a direction away from the substrate 11, wherein an insulating layer 15 is provided between adjacent conductive layers, wherein the first conductive layer 141, the second conductive layer 142, the third conductive layer 143, the fourth conductive layer 144 and the fifth conductive layer 145 may be metal conductive layers, and the first conductive layer 141, the second conductive layer 142, the third conductive layer 143, the fourth conductive layer 144 and the fifth conductive layer 145 may form a pixel circuit for driving the light-emitting device. The first wiring layer 131 may be located in the fifth conductive layer 145, and the second wiring layer 132 may be located in the fourth conductive layer 144, that is, the wiring in the first wiring layer 131 may be formed by the fifth conductive layer 145, and the wiring in the second wiring layer 132 may be formed by the fourth conductive layer 144.

[0100] In another implementation of this embodiment, please refer to Fig.10 The display panel 1 also includes a third routing layer 133, which is located on a side of the first routing layer 131 away from the substrate 11. The third routing layer 133 includes at least one second power signal routing line 1312, and the second power signal routing line 1312 extends along a second direction (Y direction in the figure). The first conductive routing line 1311 extends along a first direction (X direction in the figure). The first direction intersects with the second direction. Optionally, the first direction is perpendicular to the second direction.

[0101] In this embodiment, please refer again to Fig.10 The display area AA includes a first sub-display area AA1 and a second sub-display area AA2, wherein the first sub-display area AA1 and the second sub-display area AA2 may be arranged along a second direction (the Y direction in the figure). The first wiring layer 131 also includes at least one fourth conductive wiring 1314, the fourth conductive wiring 1314 is insulated from the first conductive wiring 1311, and the fourth conductive wiring 1314 extends along the second direction (the Y direction in the figure).

[0102] In the first sub-display area AA1, the isolation structure 12 is connected to at least one first conductive trace 1311, and in the second sub-display area AA2, the second power signal trace 1312 is connected to at least one fourth conductive trace 1314, wherein the connection between the second power signal trace 1312 and the fourth conductive trace 1314 can increase the trace width and thereby reduce the resistance of the trace where the second power signal trace 1312 is located, which can reduce the IR-drop of the second power signal during transmission and enhance the display uniformity of the display panel.

[0103] Optionally, the first conductive trace 1311 is located in the first sub-display area AA1, and the fourth conductive trace 1314 is located in the second sub-display area AA2.

[0104] Please refer again Figure 8 , when the display panel 1 further includes a first conductive layer 141, a second conductive layer 142, a third conductive layer 143, and a fourth conductive layer 144 which are stacked sequentially on the substrate 11 in a direction away from the substrate 11, an insulating layer 15 is provided between adjacent conductive layers, wherein the first conductive layer 141, the second conductive layer 142, the third conductive layer 143, and the fourth conductive layer 144 may be metal conductive layers. The first wiring layer 131 may be located in the third conductive layer 143, and the third wiring layer 133 may be located in the fourth conductive layer 144, that is, the wiring in the first wiring layer 131 may be formed by the third conductive layer 143, and the wiring of the third wiring layer 133 may be formed by the fourth conductive layer 144.

[0105] Please refer again Fig. 9 , when the display panel 1 further includes a first conductive layer 141, a second conductive layer 142, a third conductive layer 143, a fourth conductive layer 144 and a fifth conductive layer stacked sequentially on the substrate 11 in a direction away from the substrate 11, an insulating layer 15 is provided between adjacent conductive layers, wherein the first conductive layer 141, the second conductive layer 142, the third conductive layer 143, the fourth conductive layer 144 and the fifth conductive layer 145 may be metal conductive layers. The first wiring layer 131 may be located in the fourth conductive layer 145, and the third wiring layer 133 may be located in the fifth conductive layer 144, that is, the wiring in the first wiring layer 131 may be formed by the fourth conductive layer 144, and the wiring in the third wiring layer 133 may be formed by the fifth conductive layer 145.

[0106] In this embodiment, please refer to Fig.11 The display panel 1 further includes an insulating layer 15 located between the isolation structure 12 and the first conductive layer 131 . The insulating layer 15 includes an insulating layer through hole 1501 . The isolation structure 12 is connected to the first conductive trace 131 through the insulating layer through hole 1501 .

[0107] The isolation structure 12 includes a first isolation portion 121 and a second isolation portion 122. In the direction away from the substrate 11, the first isolation portion 121 and the second isolation portion 122 are stacked in sequence. The orthographic projection of the first isolation portion 131 on the substrate 11 is located within the orthographic projection of the second isolation portion 132 on the substrate 11. The first isolation portion 121 is connected to the first conductive trace 131 through an insulating layer through hole 1501.

[0108] Optionally, in a cross section perpendicular to the plane of the substrate 11 and passing through the center of the isolation opening 1201 , the cross section of the isolation structure 12 is T-shaped, so that different light-emitting devices can be formed in different isolation openings 1201 when the film layer of the light-emitting device is evaporated on the entire surface.

[0109] Optionally, the orthographic projection of the insulating layer through hole 1501 on the substrate 11 is located within the orthographic projection of the intersection of the isolation structure 12 extending along the first direction (X direction in the figure) and the isolation structure 12 extending along the second direction (Y direction in the figure) on the substrate 11.

[0110] For further information, please refer to Fig.12 The isolation structure 12 further includes a third isolation portion 123. In the direction away from the substrate 11, the third isolation portion 123, the first isolation portion 121 and the second isolation portion 122 are stacked in sequence, and the orthographic projection of the first isolation portion 121 on the substrate 11 is located within the orthographic projection of the third isolation portion 123 on the substrate 11. The third isolation portion 123 is connected to the first conductive trace 1311 through the insulating layer through hole 1501.

[0111] Optionally, in a cross section perpendicular to the plane where the substrate 11 is located and passing through the center of the isolation opening 1201 , the cross-sectional shape of the isolation structure 12 is an I-shape.

[0112] In this embodiment, the material of the first isolation portion 121 includes aluminum, silver or copper, the material of the second isolation portion 122 includes titanium or molybdenum, and the material of the third isolation portion 123 includes molybdenum or titanium.

[0113] In this embodiment, please refer to Fig.13 , the insulating layer 15 includes a pixel defining layer 151, the pixel defining layer 151 is located between the first conductive layer 131 and the isolation structure 12, the isolation structure 12 is located on the side of the pixel defining layer 141 away from the substrate 11, and the pixel defining layer 151 includes a pixel defining layer through hole 1511. In this embodiment, the pixel defining layer 151 can be an organic pixel defining layer or an inorganic pixel defining layer. Preferably, the pixel defining layer 151 is an inorganic pixel defining layer. When the pixel defining layer 151 is an inorganic pixel defining layer, the pixel defining layer 151 can be a single-layer structure of silicon oxide (SiOx) or silicon nitride (SiNx), or a stacked structure formed alternately of silicon oxide and silicon nitride.

[0114] Optionally, the isolation structure 12 is connected to the first conductive trace 1311 through the pixel definition layer through hole 1511 .

[0115] For further information, please refer to Fig.14 In this embodiment, the insulating layer 15 may further include a planarization layer 152, the planarization layer 152 is located between the first conductive layer 131 and the pixel defining layer 151, and the planarization layer 142 includes a planarization layer through hole 1521. The isolation structure 12 is connected to the first conductive trace 1311 through the pixel defining layer through hole 1511 and the planarization layer through hole 1521.

[0116] Optionally, the orthographic projection of the planarization layer through hole 1521 on the substrate 11 is located within the orthographic projection of the pixel definition layer through hole 1511 on the substrate 11 .

[0117] The orthographic projection of the pixel defining layer through hole 1511 on the substrate 11 and the orthographic projection of the planarization layer through hole 1521 on the substrate 11 are located outside the orthographic projection of the isolation opening 1201 on the substrate 11, that is, the orthographic projection of the pixel defining layer through hole 1511 on the substrate 11 and the orthographic projection of the planarization layer through hole 1521 on the substrate 11 are located inside the orthographic projection of the isolation structure 12 on the substrate 11.

[0118] Optionally, see Fig.15 , the orthographic projections of the pixel defining layer through hole 1511 and the planarizing layer through hole 1521 on the substrate 11 are located within the orthographic projections of the isolation structure 12 extending along the first direction (X direction in the figure) and the isolation structure 12 extending along the second direction (Y direction in the figure) on the substrate 11. With such a design, the pixel defining layer through hole 1511 and the planarizing layer through hole 1521 can be far away from the isolation opening 1201, and will not affect the normal light emission of the light emitting device located in the isolation opening 1201.

[0119] Please refer again Figure 4 , Figure 5 , Figure 7 and Fig.10 The display panel 1 further includes a first power line 210 and a second power line 220 located in the border area AB. The first power line 210 is connected to the first conductive trace 1311, and is used to provide a first power signal (e.g., an ELVSS signal) to the first conductive trace 1311; the second power line 220 is connected to the second power signal trace 1312, and is used to provide a second power signal (e.g., an ELVDD signal) to the second power signal trace 1312. The voltage of the first power signal provided by the first power line 210 is less than the voltage of the second power signal provided by the second power line 220.

[0120] In this embodiment, please refer to Fig.16 , Fig.16 The cross-sectional schematic diagram of the display panel when the first conductive trace 1311 is formed by the fourth conductive layer M4 is illustrated. The display panel 1 also includes a light-emitting device 16 . The isolation structure 12 encloses an isolation opening 1201 on the substrate 11 . At least part of the light-emitting device 16 is located in the isolation opening 1201 .

[0121] Preferably, in display area AA, the light emitting devices 16 are arrayed along a first direction (X direction in the figure) and a second direction (Y direction in the figure), the light emitting devices 16 are arranged along the first direction to form pixel rows, and multiple pixel rows are arranged along the second direction.

[0122] Furthermore, the isolation structure 12 is located on a side of the pixel defining layer 151 away from the substrate 11 . The pixel defining layer 151 includes a pixel opening 1512 . At least part of the light emitting device 16 is located in the pixel opening 1512 . The pixel opening 1512 is located in the isolation opening 1201 .

[0123] The light-emitting device 16 includes a first electrode 161, a light-emitting material layer 162 and a second electrode 163. In the direction away from the substrate 11, the first electrode 161, the light-emitting material layer 162 and the second electrode 163 are stacked in sequence, at least a portion of the first electrode 161 is exposed from the pixel opening 1512, and the second electrode 163 overlaps the isolation structure 12. Exemplarily, the second electrode 163 can overlap the first isolation portion 121 and / or the third isolation portion 123 in the isolation structure 12.

[0124] For example, in this embodiment, please refer to Figure 7 and Fig.10 The frame area AB includes a first sub-frame area AB1, a second sub-frame area AB2, a third sub-frame area AB3 and a fourth sub-frame area AB4. The first sub-frame area AB1 and the third sub-frame area AB3 are arranged opposite to each other in the second direction (the Y direction in the figure), and the second sub-frame area AB2 and the fourth sub-frame area AB4 are arranged opposite to each other in the first direction (the X direction in the figure).

[0125] In a possible implementation, the first power line 210 may be distributed along the second sub-frame area AB2, the third sub-frame area AB3 and the fourth sub-frame area AB4, and distributed in a partial area of ​​the first sub-frame area AB1. The second power line 210 is distributed in the first sub-frame area AB1, and the first power line 210 and the second power line 210 are insulated.

[0126] In this embodiment, the first conductive trace 131 may be connected to the first power line 210 in at least one of the first sub-frame area AB1 , the second sub-frame area AB2 , the third sub-frame area AB3 , and the fourth sub-frame area AB4 .

[0127] In this embodiment, the first power lines 210 distributed in the first sub-frame area AB1 are connected to the isolation structure 12. That is, in the first sub-frame area AB1, the first power lines 210 are connected to the isolation structure 12.

[0128] Please refer to Fig.17, the display panel 1 further includes a thin film encapsulation layer 17, which covers the light emitting device 17. In the present embodiment, the thin film encapsulation layer 17 includes a first encapsulation layer 171, and the first encapsulation layer 171 includes a plurality of encapsulation units 1711, and different encapsulation units 1711 are used to encapsulate the light emitting devices 16 in different isolation openings 1201, and each encapsulation unit 1711 is used to independently encapsulate the light emitting device 16 in at least one isolation opening 1201. When the light emitting devices 16 in adjacent isolation openings 1201 are light emitting devices of the same color, two adjacent encapsulation units 1711 are connected on the side of the isolation structure 12 away from the substrate 11. When the light emitting devices 16 in adjacent isolation openings 1201 are light emitting devices of different colors, two adjacent encapsulation units 1711 are disconnected on the side of the isolation structure 12 away from the substrate 11.

[0129] Further, please refer again to Fig.17 , the thin film encapsulation layer 17 also includes a second encapsulation layer 172 and a third encapsulation layer 173, the second encapsulation layer 172 covers the isolation structure 12 and the light-emitting device 16, and the side of the second encapsulation layer 172 away from the substrate 11 includes a flat surface. The third encapsulation layer 173 is located on the side of the second encapsulation layer 172 away from the substrate 11. Among them, the first encapsulation layer 171 and the third encapsulation layer 173 are inorganic encapsulation layers, and the second encapsulation layer 172 is an organic encapsulation layer. For example, the first encapsulation layer 171 and the third encapsulation layer 173 can be formed by chemical vapor deposition (Chemical Vapor Deposition, CVD), and the second encapsulation layer 172 can be formed by inkjet printing (Ink-jet Printing, IJP).

[0130] It is understandable that the display panel 1 may also include a touch function layer, an optical adhesive layer, a polarizer, a cover plate and other film layers stacked in sequence on the side of the third packaging layer 173 away from the substrate 11. The above film layers are conventional film layers of the display panel and will not be described in detail here.

[0131] Please refer to Fig.18 , the edge of the orthographic projection of the thin film encapsulation layer 17 on the substrate 11 is at least partially located within the orthographic projections of the first power line 210 and the second power line 210 on the substrate 11. Exemplarily, the edge of the orthographic projection of the thin film encapsulation layer 17 on the substrate 11 is located in the frame area AB, wherein the orthographic projection edges of the thin film encapsulation layer 17 in the second sub-frame area AB2, the third sub-frame area AB3, and the fourth sub-frame area AB4 are located within the orthographic projections of the first power line 210 of the corresponding sub-frame area on the substrate 11. The orthographic projection edge of the thin film encapsulation layer 17 in the first sub-frame area AB1 is partially located within the orthographic projections of the first power line 210 and the second power line 220 of the corresponding sub-frame area on the substrate 11.

[0132] Based on the same inventive concept, an embodiment of the present application also provides a display device, which includes the display panel provided in the present application, or includes a display panel prepared by the display panel preparation method provided in the present embodiment. The display device may include a smart phone, a tablet computer, a car display device, a smart wearable device, a television, a laptop computer, and other devices with a display function.

[0133] The embodiments of the present application provide a display panel, a method for preparing a display panel, and a display device. In the display panel, an isolation structure is located on one side of a substrate, a first wiring layer is located between the substrate and the isolation structure, the first wiring layer includes a first conductive wiring for transmitting a first power signal, and in the display area, the isolation structure is connected to the first conductive wiring. With such a design, the connection area between the first power signal wiring and the isolation structure is increased by the first conductive wiring in the display area, thereby reducing the connection resistance, reducing the heat generated by the large current when the display panel is in a high-brightness display state, avoiding the display panel from being burned due to the above-mentioned heat, ensuring that the display panel can work normally, providing stability in the operation of the display panel, and at the same time reducing the display power consumption of the display panel, and improving the battery life of the display device equipped with the display panel.

[0134] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A display panel, characterized in that: The display panel includes a display area and a frame area at least partially surrounding the display area, and the display panel further includes: substrate; An isolation structure, located on one side of the substrate; The first wiring layer is located between the substrate and the isolation structure. The first wiring layer includes at least one first conductive wiring for transmitting a first power signal. In the display area, the isolation structure is connected to at least one first conductive wiring.

2. The display panel according to claim 1, wherein: In the display area, the orthographic projection of the first conductive trace on the substrate is located within the orthographic projection of the isolation structure on the substrate.

3. The display panel according to claim 1, wherein: The first conductive trace extends along a second direction, and a plurality of the first conductive traces are parallel to each other and arranged along the first direction, wherein the first direction intersects with the second direction; Preferably, the display panel further comprises a second wiring layer, the second wiring layer is located between the substrate and the first wiring layer, the second wiring layer comprises at least one second conductive wiring, the at least one second conductive wiring is connected to at least one first conductive wiring, and the second conductive wiring extends along the first direction; Preferably, the second direction is perpendicular to the first direction; Preferably, at least one of the second conductive traces is connected to at least one of the first conductive traces through a first via; Preferably, the first via hole is located at an overlapping position of an orthographic projection of the first conductive trace on the substrate and an orthographic projection of the second conductive trace on the substrate.

4. The display panel according to claim 3, wherein: The first wiring layer further includes at least one second power signal wiring, the second power signal wiring is parallel to the first conductive wiring, and the second power signal wiring is insulated from the first conductive wiring; Preferably, the display area includes a first sub-display area and a second sub-display area, the first wiring layer further includes at least one third conductive wiring, and the third conductive wiring is insulated from the first conductive wiring. The first conductive trace is located in the first sub-display area, and the third conductive trace is located in the second sub-display area.

5. The display panel according to claim 4, wherein: In the first sub-display area, the isolation structure is connected to at least one of the first conductive traces, and in the second sub-display area, the second power signal trace is connected to at least one of the third conductive traces; Preferably, the at least one first conductive trace and the at least one third conductive trace are located in the same column; Preferably, the first sub-display area and the second sub-display area are arranged along the second direction.

6. The display panel according to claim 3, wherein: The display panel further includes a first conductive layer, a second conductive layer, a third conductive layer, a fourth conductive layer and an insulating layer located between adjacent conductive layers and stacked sequentially on the substrate in a direction away from the substrate, the first wiring layer is located in the fourth conductive layer, and the second wiring layer is located in the third conductive layer; or The display panel also includes a first conductive layer, a second conductive layer, a third conductive layer, a fourth conductive layer, a fifth conductive layer and an insulating layer located between adjacent conductive layers and stacked in sequence on the substrate in a direction away from the substrate, the first routing layer is located in the fifth conductive layer, and the second routing layer is located in the fourth conductive layer.

7. The display panel according to claim 1, wherein: The display panel further includes a third wiring layer, the third wiring layer is located on a side of the first wiring layer away from the substrate, the third wiring layer includes at least one second power signal wiring, the second power signal wiring extends along a second direction, the first conductive wiring extends along a first direction, and the first direction intersects with the second direction; Preferably, the first direction is perpendicular to the second direction.

8. The display panel according to claim 7, wherein: The display area includes a first sub-display area and a second sub-display area, the first wiring layer further includes at least one fourth conductive wiring, the fourth conductive wiring is insulated from the first conductive wiring, and the fourth conductive wiring extends along the second direction; In the first sub-display area, the isolation structure is connected to the at least one first conductive trace, and in the second sub-display area, the second power signal trace is connected to at least one fourth conductive trace; Preferably, the first conductive trace is located in the first sub-display area, and the fourth conductive trace is located in the second sub-display area; Preferably, the first sub-display area and the second sub-display area are arranged along the second direction.

9. The display panel according to claim 8, wherein: The display panel further comprises a first conductive layer, a second conductive layer, a third conductive layer, a fourth conductive layer and an insulating layer located between adjacent conductive layers and stacked sequentially on the substrate in a direction away from the substrate, the first routing layer is located in the third conductive layer, and the third routing layer is located in the fourth conductive layer; or The display panel also includes a first conductive layer, a second conductive layer, a third conductive layer, a fourth conductive layer, a fifth conductive layer and an insulating layer located between adjacent conductive layers and stacked in sequence on the substrate in a direction away from the substrate, the first routing layer is located in the fourth conductive layer, and the third routing layer is located in the fifth conductive layer.

10. The display panel according to any one of claims 1 to 9, characterized in that: The display panel further includes an insulating layer located between the isolation structure and the first conductive layer, the insulating layer includes an insulating layer through hole, and the isolation structure is connected to the first conductive trace through the insulating layer through hole; Preferably, the isolation structure comprises a first isolation portion and a second isolation portion, the first isolation portion and the second isolation portion are stacked in sequence in a direction away from the substrate, and the first isolation portion is connected to the first conductive trace through the insulating layer through hole; Preferably, the orthographic projection of the first isolation portion on the substrate is located within the orthographic projection of the second isolation portion on the substrate; Preferably, the isolation structure encloses an isolation opening on the substrate, and the cross-sectional shape of the isolation structure is T-shaped on a cross section perpendicular to the plane where the substrate is located and passing through the center of the isolation opening; Preferably, the orthographic projection of the insulating layer through hole on the substrate is located within the orthographic projection on the substrate of an intersection of the isolation structure extending along the first direction and the isolation structure extending along the second direction.

11. The display panel according to claim 10, wherein: The isolation structure further includes a third isolation portion, and in a direction away from the substrate, the third isolation portion, the first isolation portion and the second isolation portion are stacked in sequence; The orthographic projection of the first isolation portion on the substrate is located within the orthographic projection of the third isolation portion on the substrate, The third isolation portion is connected to the first conductive trace through the insulating layer through hole; Preferably, in a cross section perpendicular to the plane where the substrate is located and passing through the center of the isolation opening, the cross-sectional shape of the isolation structure is an I-shape; Preferably, the material of the first isolation portion includes aluminum, silver or copper, and / or the material of the second isolation portion includes titanium or molybdenum, and / or the material of the third isolation portion includes molybdenum or titanium.

12. The display panel according to claim 10, wherein: The insulating layer includes a pixel defining layer, the pixel defining layer is located between the first conductive layer and the isolation structure, the pixel defining layer includes a pixel defining layer through hole, and the isolation structure is connected to the first conductive trace through the pixel defining layer through hole.

13. The display panel according to claim 12, wherein: The insulating layer further includes a planarization layer, the planarization layer is located between the first conductive layer and the pixel defining layer, and the planarization layer includes a planarization layer through hole. The isolation structure is connected to the first conductive trace through the pixel definition layer through hole and the planarization layer through hole; Preferably, the orthographic projection of the planarization layer through hole on the substrate is located within the orthographic projection of the pixel definition layer through hole on the substrate.

14. The display panel according to claim 13, wherein: The orthographic projection of the pixel definition layer through hole on the substrate and the orthographic projection of the planarization layer through hole on the substrate are located outside the orthographic projection of the isolation opening on the substrate; Preferably, the orthographic projections of the pixel defining layer through hole and the planarizing layer through hole on the substrate are located within the orthographic projections of the intersection of the isolation structure extending along the first direction and the isolation structure extending along the second direction on the substrate.

15. The display panel according to any one of claims 1 to 9, characterized in that: The display panel further includes a first power line and a second power line located in the frame area; The first power line is connected to the first conductive trace, and the second power line is connected to the second power signal trace, wherein a voltage of a first power signal provided by the first power line is lower than a voltage of a second power signal provided by the second power line.

16. The display panel according to claim 15, wherein: The display panel further includes a light emitting device; The isolation structure is enclosed on the substrate to form an isolation opening, and at least part of the light emitting device is located in the isolation opening; Preferably, in the display area, the light emitting devices are distributed in an array along a first direction and a second direction, the light emitting devices are arranged along the first direction to form a pixel row, and a plurality of the pixel rows are arranged along the second direction.

17. The display panel according to claim 16, wherein: The display panel further comprises a pixel defining layer, the pixel defining layer is located on one side of the substrate, the isolation structure is located on a side of the pixel defining layer away from the substrate, the pixel defining layer comprises a pixel opening, at least part of the light emitting device is located in the pixel opening, and the pixel opening is located in the isolation opening; The light emitting device comprises a first electrode, a light emitting material layer and a second electrode, and in a direction away from the substrate, the first electrode, the light emitting material layer and the second electrode are stacked in sequence; At least a portion of the first electrode is exposed from the pixel opening position, and the second electrode overlaps the isolation structure.

18. The display panel according to claim 16, wherein: The frame area includes a first sub-frame area, a second sub-frame area, a third sub-frame area and a fourth sub-frame area, wherein the first sub-frame area and the third sub-frame area are arranged opposite to each other in the second direction, and the second sub-frame area and the fourth sub-frame area are arranged opposite to each other in the first direction; The first power line is distributed along the second sub-frame area, the third sub-frame area and the fourth sub-frame area, and is distributed in a partial area of ​​the first sub-frame area; The second power line is distributed in the first sub-frame area, and the first power line is insulated from the second power line; Preferably, the first conductive trace is connected to a first power line in at least one of the first sub-frame area, the second sub-frame area, the third sub-frame area and the fourth sub-frame area.

19. The display panel according to claim 18, wherein: A first power line distributed in the first sub-frame area is connected to the isolation structure.

20. A display device, characterized in that: The display device comprises the display panel according to any one of claims 1-19.

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