Display device

Abstract

A display device includes: a display panel; a circuit board disposed on the display panel and including a plurality of bump electrodes; and a conductive adhesive member electrically connecting the display panel and the circuit board. The display panel includes: a base layer; a plurality of pads disposed on the base layer and spaced apart from each other in the first direction; and a heat absorbing layer disposed between the base layer and the pad, and overlapping the pad in a plan view.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to and all benefits arising from Korean Patent Application No. 10-2023-0076670, filed on Jun. 15, 2023, the contents of which are incorporated herein by reference in their entirety. Technical Field

[0003] Embodiments of the present disclosure described herein relate to a display device. Background Art

[0004] Display devices such as televisions, monitors, smart phones, and tablet personal computers ("PCs") that provide images to users include display panels that display images. Various display panels such as liquid crystal display panels, organic light emitting display panels, electrowetting display panels, and electrophoretic display panels have been developed as display panels.

[0005] With the recent technological development of display devices, display devices including flexible display panels are being developed. The display panel includes a plurality of pixels that display an image and a driving circuit for driving the pixels. In order to make the display device thinner, the pixels may be arranged in a display area of ​​the display panel, and a circuit board on which the driving circuit is mounted may be connected to a non-display area of ​​the display panel. Summary of the invention

[0006] Embodiments of the present disclosure provide a display device having improved bonding reliability.

[0007] In an embodiment, a display device includes: a display panel; a circuit board disposed on the display panel and including a plurality of bump electrodes; and a conductive adhesive member electrically connecting the display panel and the circuit board. The display panel includes: a base layer; a plurality of pads arranged on the base layer and spaced apart from each other in a first direction; and a heat absorption layer disposed between the base layer and the pads, and the heat absorption layer overlaps the pads in a plan view.

[0008] In an embodiment, a display device includes: a display panel including a plurality of pad regions and a plurality of non-pad regions, the plurality of non-pad regions being arranged alternately with the pad regions in a first direction; a circuit board disposed on the display panel and including a plurality of bump electrodes; and a conductive adhesive member electrically connecting the display panel and the circuit board. The display panel further includes a heat absorption layer overlapping the pad regions and the non-pad regions. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] The above and other embodiments, advantages and features of the present disclosure will become apparent by describing in detail embodiments of the present disclosure with reference to the attached drawings.

[0010] Figure 1is a perspective view of a display device according to an embodiment of the present disclosure.

[0011] Figure 2A and Figure 2B is an exploded perspective view of a display device according to an embodiment of the present disclosure.

[0012] Figure 3 yes Figure 2A A cross-sectional view of a display module is shown in FIG.

[0013] Figure 4 yes Figure 3 A plan view of the display panel shown in FIG.

[0014] Figure 5 yes Figure 4 A cross-sectional view of a pixel is shown in FIG.

[0015] Figure 6 yes Figure 4 A perspective view of the display panel shown in FIG.

[0016] Figure 7 It is along Figure 6 A cross-sectional view taken along line II' shown in FIG.

[0017] Figure 8 It is along Figure 6 A cross-sectional view taken along line II-II' shown in FIG.

[0018] 9A to 9C is a view for describing another embodiment of the present disclosure.

[0019] Fig.10 is a view for describing another embodiment of the present disclosure.

[0020] Fig.11 is a view for describing another embodiment of the present disclosure. DETAILED DESCRIPTION

[0021] The advantages and features of the present disclosure and the methods for achieving the advantages and features will become apparent with reference to the embodiments described in detail below in conjunction with the accompanying drawings. However, the present disclosure is not limited to the embodiments described below, but will be implemented in various forms, and the embodiments shown only complete the disclosure of the present disclosure, provide the embodiments shown to fully inform the scope of the present disclosure to those skilled in the art to which the present disclosure belongs, and the embodiments shown are limited only by the scope of the appended claims. Throughout the specification, the same reference numerals represent the same components.

[0022] When a first element or layer is referred to as being disposed “on” or “over” a second element or layer, this includes both the case where the first element or layer is directly on or over the second element or layer and the case where a third element or layer is interposed therebetween. On the other hand, when a first element is referred to as being directly disposed “on” or “over” a second element, this means that a third element or layer is not interposed therebetween. The term “and / or” includes each of the mentioned items and all combinations of one or more of the mentioned items.

[0023] Spatially relative terms such as "below," "beneath," "below," "above," and "on" may be used to easily describe the relationship between a first element or component and a second element or component as shown in the drawings. Spatially relative terms should be understood as terms that include different orientations of an element during use or operation in addition to the orientation shown in the drawings. Like reference numerals denote like components throughout the specification.

[0024] Although the terms "first", "second", etc. are used to describe various elements, various components and / or various parts, it is apparent that these elements, these components and / or these parts are not limited by these terms. These terms are only used to distinguish an element, a component or a part from another element, another component or another part. Therefore, it is apparent that within the technical spirit of the present disclosure, the first element, the first component or the first part mentioned below may be the second element, the second component or the second part.

[0025] The embodiments described herein will be described with reference to the plan views and cross-sectional views which are idealized schematic diagrams of the present disclosure. Therefore, the shapes of the exemplary drawings may be modified due to manufacturing techniques and / or tolerances. Therefore, the embodiments of the present disclosure are not limited to the shapes specifically shown, but also include changes in shapes generated according to manufacturing processes. Therefore, the regions shown in the drawings are schematic in nature, and the shapes of the regions shown in the drawings are intended to illustrate specific shapes of the regions of the elements and are not intended to limit the scope of the present disclosure.

[0026] Hereinafter, embodiments of the present disclosure will be described in more detail with reference to the accompanying drawings.

[0027] Figure 1 is a perspective view of a display device according to an embodiment of the present disclosure. Figure 2A and Figure 2B is an exploded perspective view of an embodiment of a display device according to an embodiment of the present disclosure.

[0028] Figure 2B Shows Figure 2A 0 is an embodiment of a state in which the bending area BA is bent.

[0029] refer to Figure 1In this specification, a display device DD of a mobile phone terminal is shown as an example. The display device DD according to the present disclosure can be applied to medium and small electronic devices such as tablets, vehicle navigation systems, game consoles, and smart watches, as well as large electronic devices such as televisions and monitors.

[0030] The display device DD may have a quadrilateral shape in a plan view, for example, a rectangular shape having short sides extending in a first direction DR1 and long sides extending in a second direction DR2 intersecting the first direction DR1. However, the present disclosure is not limited thereto, and the display device DD may have various shapes such as a circle and a polygon in a plan view.

[0031] Hereinafter, a direction substantially perpendicular to a plane defined by the first direction DR1 and the second direction DR2 is defined as a third direction DR3. In this specification, the wording "in a plan view" means a view in the third direction DR3.

[0032] The display device DD may be rigid or flexible. The term "flexible" may mean a property that can be bent, and includes both a completely folded structure and a structure that can be bent by a few nanometers. In an embodiment, for example, a flexible display device DD may include a curved electronic device, a rollable electronic device, and a foldable display device.

[0033] The display device DD may display an image IM through a display surface DD-IS. An icon image is shown as an example of the image IM. The display surface DD-IS may be parallel to a plane defined by the first direction DR1 and the second direction DR2.

[0034] The display surface DD-IS may include a display area DD-DA displaying an image IM and a non-display area DD-NDA adjacent to the display area DD-DA. The non-display area DD-NDA may be an area where an image is not displayed. However, the present disclosure is not limited thereto, and the non-display area DD-NDA may be adjacent to one side of the display area DD-DA or may be omitted.

[0035] refer to Figure 2A and Figure 2B , the display device DD may include a window WM, a display module DM and a storage member BC.

[0036] The window WM may be disposed on the display module DM and transmit an image provided from the display module DM to the outside. The window WM may include a transmission area TA and a non-transmission area NTA. The transmission area TA may be connected to Figure 1The display area DD-DA shown in the figure overlaps and has a shape corresponding to the display area DD-DA. Although not shown, the window WM may include a base layer and a functional layer arranged on the base layer. The functional layer may include a protective layer, an anti-fingerprint layer, etc. The base layer of the window WM may include glass, sapphire or plastic or may be composed of glass, sapphire or plastic. The base layer of the window WM may include an optically transparent insulating material. In an embodiment, for example, the base layer of the window WM may include glass or a plastic film, or may include a glass substrate and a plastic film bonded by an adhesive.

[0037] The non-transmitting area NTA may be Figure 1 , and has a shape corresponding to the non-display area DD-NDA. The non-transmission area NTA may be an area having a relatively low transmittance compared to the transmittance of the transmission area TA. The non-transmission area NTA may be defined by a frame pattern in a partial area of ​​the base layer of the window WM, and an area in which the frame pattern is not provided may be defined as the transmission area TA. However, the present disclosure is not limited thereto, and the non-transmission area NTA may be omitted.

[0038] Although not shown, an anti-reflection layer may be provided between the window WM and the display module DM. The anti-reflection layer may reduce the reflectivity of an external light beam input from outside the display device DD. The anti-reflection layer may include a color filter. The color filter may have a predetermined arrangement. In an embodiment, for example, the color filter may be arranged in consideration of the luminous color of a pixel included in the display panel DP to be described below. In addition, the anti-reflection layer may further include a black matrix adjacent to the color filter.

[0039] According to an embodiment of the present disclosure, the display module DM may include a display panel DP and an input sensor ISU.

[0040] The display panel DP may be one of a liquid crystal display panel, an electrophoretic display panel, a micro-electromechanical system display panel, an electrowetting display panel, an organic light-emitting display panel, an inorganic light-emitting display panel, and a quantum dot light-emitting display panel. However, the present disclosure is not necessarily limited thereto. Hereinafter, the display panel DP will be described as an organic light-emitting display panel.

[0041] The input sensor ISU may include any one of a capacitive sensor, an optical sensor, an ultrasonic sensor, and an electromagnetic induction sensor. The input sensor ISU may be formed on the display panel DP through a subsequent process, or may be manufactured separately and then attached to the upper side of the display panel DP through an adhesive layer, and the present disclosure is not limited to a specific embodiment.

[0042] The display module DM may include a circuit board CB. The circuit board CB may include a driving chip DC and a printed circuit board CF. Figure 2AAn embodiment is shown in which the driving chip DC is disposed (eg, mounted) on the display panel DP, but the present disclosure is not limited thereto. The driving chip DC may generate a driving signal required for the operation of the display panel DP based on a control signal transmitted from the printed circuit board CF.

[0043] The display panel DP may include the bending area BA, and first and second non-bending areas NBA1 and NBA2 spaced apart from each other in the second direction DR2 with the bending area BA interposed therebetween.

[0044] The bending area BA may be defined as an area in which the display panel DP is bent along a virtual bending axis BX extending in the first direction DR1. The first non-bending area NBA1 may be defined as an area overlapping the transmissive area TA, and the second non-bending area NBA2 may be defined as an area to which the printed circuit board CF is connected. When the bending area BA is bent relative to the virtual bending axis BX, the printed circuit board CF and the driving chip DC may be bent in a direction toward the rear surface of the display panel DP and arranged under the rear surface of the display panel DP. Although not shown, additional components may be arranged to compensate for the step difference between the rear surface of the display panel DP and the circuit board CB caused by the bending area BA.

[0045] According to an embodiment, the width of the first non-bending area NBA1 in the first direction DR1 may be greater than the widths of the bending area BA and the second non-bending area NBA2. However, the present disclosure is not limited thereto. The width of the bending area BA in the first direction DR1 may be set to a shape that becomes narrower from the first non-bending area NBA1 to the second non-bending area NBA2. The present disclosure is not limited to a specific embodiment.

[0046] like Figure 2B As shown in FIG. 1 , as a portion of the display panel DP is bent, a printed circuit board CF electrically bonded to the display panel DP may be disposed on a rear surface of the display panel DP.

[0047] The storage member BC may accommodate the display module DM and may be coupled to the window WM. The printed circuit board CF may be disposed at one end of the display panel DP and may be electrically connected to the display module DM. Figure 3 Although not shown, the display device DD may further include a main board, an electronic module disposed (eg, mounted) on the main board, a camera module, a power module, and the like.

[0048] In the above, an example of the display device DD has been described as a mobile phone terminal, but in this specification, the display device DD may include two or more electrically coupled electronic components. The display panel DP and the driver chip DC disposed (e.g., mounted) on the display panel DP may correspond to different electronic components, only the display panel DP and the driver chip DC may constitute the display device DD, and the present disclosure is not limited to a specific embodiment.

[0049] In an embodiment, only the display panel DP and the printed circuit board CF connected to the display panel DP may constitute the display device DD, and only the main board and the electronic module disposed (e.g., mounted) on the main board may constitute the display device DD. Hereinafter, the display device DD according to the present disclosure will be described while focusing on the bonding structure of the display panel DP and the driving chip DC disposed (e.g., mounted) on the display panel DP.

[0050] Figure 3 yes Figure 2A A cross-sectional view of a display module is shown in FIG.

[0051] refer to Figure 3 The display panel DP may include a base layer BL, a circuit element layer DP-CL disposed on the base layer BL, a display element layer DP-OLED, and an upper insulating layer TFL. The input sensor ISU may be disposed on the upper insulating layer TFL.

[0052] The display panel DP may include a display area DP-DA and a non-display area DP-NDA. The display area DP-DA of the display panel DP may be Figure 1 The display area shown in DD-DA or Figure 2A The transmission area TA shown in FIG. 1 corresponds to the transmission area TA, and the non-display area DP-NDA may correspond to the transmission area TA shown in FIG. Figure 1 The non-display area DD-NDA or Figure 2A It corresponds to the non-transmitting area NTA shown in .

[0053] The base layer BL may include at least one plastic film.The base layer BL is a flexible substrate and may include a plastic substrate, a glass substrate, a metal substrate, or an organic / inorganic composite material substrate.

[0054] The circuit element layer DP-CL may include at least one intermediate insulating layer and at least one circuit element. The intermediate insulating layer may include at least one intermediate inorganic layer and at least one intermediate organic layer. The circuit element may include a signal line, a driving circuit of a pixel, etc.

[0055] The display element layer DP-OLED may include a plurality of organic light emitting diodes. The display element layer DP-OLED may further include an organic layer such as a pixel defining film.

[0056] The upper insulating layer TFL may seal the display element layer DP-OLED. The upper insulating layer TFL may be disposed on the display element layer DP-OLED. The upper insulating layer TFL may overlap the display area DP-DA and the non-display area DP-NDA. The upper insulating layer TFL may overlap at least a portion of the non-display area DP-NDA. In an embodiment, for example, the upper insulating layer TFL may include a thin film encapsulation layer. The thin film encapsulation layer may include a laminated structure of an inorganic layer, an organic layer, and an inorganic layer. The upper insulating layer TFL may protect the display element layer DP-OLED from foreign matter such as moisture, oxygen, and dust particles. However, the present disclosure is not limited thereto, and the upper insulating layer TFL may further include an additional insulating layer in addition to the thin film encapsulation layer. In an embodiment, for example, the upper insulating layer TFL may further include an optical insulating layer for controlling a refractive index.

[0057] In an embodiment of the present disclosure, a package substrate may be provided instead of the upper insulating layer TFL. In this case, the package substrate faces the base layer BL, and the circuit element layer DP-CL and the display element layer DP-OLED may be arranged between the package substrate and the base layer BL.

[0058] The input sensor ISU may be directly disposed on the display panel DP. In the present specification, the wording "component A is directly disposed on component B" means that no separate layer is disposed between component A and component B. In an embodiment, the input sensor ISU may be manufactured together with the display panel DP through a continuous process. However, the technical concept of the present disclosure is not limited thereto, and the input sensor ISU may be provided as a separate panel and coupled to the display panel DP through an adhesive layer. As an example, the input sensor ISU may be omitted.

[0059] Figure 4 yes Figure 3 A plan view of the display panel shown in FIG.

[0060] refer to Figure 4 , the display panel DP may include a plurality of pixels PX, a gate driving circuit GDC, a plurality of signal lines SGL, and a plurality of display pads SD.

[0061] The pixels PX may be arranged in the display area DP-DA. Each of the pixels PX may include an organic light emitting diode and a pixel driving circuit connected thereto. The gate driving circuit GDC and the signal line SGL may be included in Figure 3 The circuit element layer DP-CL shown in FIG.

[0062] The gate driving circuit GDC may sequentially output gate signals to the plurality of gate lines GL. The gate driving circuit GDC may include a plurality of thin film transistors formed by the same process as that of the driving circuit of the pixel PX (e.g., a low temperature polycrystalline silicon (“LTPS”) process or a low temperature polycrystalline oxide (“LTPO”) process). The display panel DP may further include another driving circuit that provides a light emitting control signal to the pixel PX.

[0063] The signal lines SGL may include gate lines GL, data lines DL, power lines PL, and control signal lines CSL. Each of the gate lines GL may extend in a first direction DR1 and may be connected to a corresponding pixel PX among the pixels PX, and each of the data lines DL may extend in a second direction DR2 and may be connected to a corresponding pixel PX among the pixels PX. The power lines PL may extend in the first direction DR1 and the second direction DR2 and may be connected to the pixels PX. The control signal lines CSL may provide a control signal to the scan driving circuit.

[0064] The signal line SGL may overlap the display area DP-DA and the non-display area DP-NDA. Each of the signal lines SGL may include a pad portion and a line portion. The line portion may overlap the display area DP-DA and the non-display area DP-NDA. The pad portion may be connected to the distal end of the line portion. The pad portion may overlap the pad area to be described below.

[0065] The display panel DP may include a plurality of display pads SD. The plurality of display pads SD may be spaced apart from each other by a predetermined distance. The plurality of display pads SD according to an embodiment may be arranged in the connection area CA of the second non-bending area NBA2. The connection area CA may be defined as an area of ​​the second non-bending area NBA2 in which the display pads SD are arranged. The driving chip DC (reference Figure 2A ) and printed circuit board CF (reference Figure 2A ) can be attached to the connection area CA.

[0066] The display pad SD may include a first pad DP-PD and a second pad DP-CPD. The first pad DP-PD may be arranged to overlap the connection area CA. The driving chip DC (refer to Figure 2A ) may be disposed (eg, mounted) in the second non-bending area NBA2. The first pads DP-PD may be electrically connected to the driving chip DC to transmit an electrical signal received from the driving chip DC to the signal line SGL.

[0067] The first pads DP-PD may be arranged in the first direction DR1 and the second direction DR2. The first pads DP-PD may include a first row of pads DP-PD1 and a second row of pads DP-PD2 spaced apart from the first row of pads DP-PD1 in the second direction DR2 and arranged in the first direction DR1. The second row of pads DP-PD2 may be an input pad that receives a signal from the driving chip DC, and the first row of pads DP-PD1 may be an output pad that outputs a signal to the driving chip DC.

[0068] However, the present disclosure is not limited thereto, and the first pads DP-PD may be arranged in one row or in three or more rows in the second direction DR2.

[0069] The second pad DP-CPD may be arranged to overlap the connection area CA. The first pad DP-PD and the second pad DP-CPD may be connected to each other through the bridge signal line S-CL.

[0070] Similar to the first pads DP-PD, the second pads DP-CPD may also be arranged in the first direction DR1. The second pads DP-CPD may be arranged to be spaced apart from each other in the first direction DR1.

[0071] The printed circuit board CF may include a substrate bump electrode CF-PD electrically connected to the display panel DP. The arrangement of the substrate bump electrode CF-PD included in the printed circuit board CF may be set as the arrangement of the second pad DP-CPD. In an embodiment, when the second pad DP-CPD is arranged in the first direction DR1, the substrate bump electrode CF-PD may be arranged in the first direction DR1. However, this is an example, and the present disclosure is not limited thereto.

[0072] The second pad DP-CPD may be electrically connected to the substrate bump electrode CF-PD included in the printed circuit board CF, and transmits an electrical signal received from the printed circuit board CF to the first pad DP-PD. The printed circuit board CF may be rigid or flexible. In an embodiment, for example, when the printed circuit board CF is flexible, the printed circuit board CF may be provided as a flexible printed circuit board.

[0073] Although not shown, the printed circuit board CF may include a timing control circuit for controlling the operation of the display panel DP. The timing control circuit may be provided (e.g., mounted) on the printed circuit board CF in the form of an integrated chip. In addition, although not shown, the printed circuit board CF may include a control Figure 3 The input detection circuit of the input sensor ISU shown in FIG.

[0074] It has been described that the display panel DP of the present disclosure includes a Figure 2AThe structure of the first pad DP-PD of the driving chip DC is shown in FIG. 1 , but the present disclosure is not limited thereto. The driving chip DC may be disposed (eg, mounted) on the printed circuit board CF, and in this case, the first pad DP-PD may be omitted.

[0075] Figure 5 yes Figure 4 A cross-sectional view of a pixel is shown in FIG.

[0076] refer to Figure 5 , the display area DP-DA may include a light emitting area PXA and a non-light emitting area NPXA. Each of the pixels PX may include an organic light emitting diode ("OLED") and a pixel driving circuit connected thereto. In detail, the pixel PX may include a first transistor TR1, a second transistor TR2, and an OLED. In an embodiment, the first transistor TR1 and the second transistor TR2 may be collectively referred to as a transistor TR.

[0077] Figure 5 An embodiment of two transistors TR1 and TR2 is shown, but the present disclosure is not limited thereto. The pixel PX may include seven transistors and at least one capacitor, and the seven transistors and the capacitor are electrically connected to each other.

[0078] The display panel DP may include a plurality of insulating layers, semiconductor patterns, conductive patterns, signal lines, etc. The insulating layers, semiconductor layers, and conductive layers are formed by coating, deposition, etc. Thereafter, the insulating layers, semiconductor layers, and conductive layers may be selectively patterned by photolithography. In this way, semiconductor patterns, conductive patterns, signal lines, etc. included in the circuit element layer DP-CL and the display element layer DP-OLED are formed.

[0079] The base layer BL may include a synthetic resin film. The base layer BL may have a multilayer structure. In an embodiment, for example, the base layer BL may have a three-layer structure of a synthetic resin layer, an inorganic layer, and a synthetic resin layer. In particular, for example, the synthetic resin layer may be a polyimide-based resin layer, and its material is not necessarily limited thereto. In addition, the base layer BL may include a glass substrate, a metal substrate, an organic / inorganic composite material substrate, etc.

[0080] At least one inorganic layer is disposed on the upper surface of the base layer BL. The inorganic layer may be formed into multiple layers. The multiple inorganic layers may constitute a barrier layer and / or a buffer layer. In an embodiment, it is shown that the display panel DP includes a buffer layer BFL.

[0081] The semiconductor pattern is disposed on the buffer layer BFL. The semiconductor pattern may include polycrystalline silicon. However, the present disclosure is not limited thereto, and the semiconductor pattern may include amorphous silicon or metal oxide.

[0082] Figure 5 Only a portion of the semiconductor pattern is shown, and the semiconductor pattern may also be arranged in another area of ​​the pixel PX in the plan view. The semiconductor pattern may be arranged across the pixel PX in a predetermined rule. Depending on whether the semiconductor pattern is doped, the semiconductor pattern has different electrical properties. The semiconductor pattern may include a first area and a second area. The first area may be doped with an N-type dopant or a P-type dopant. The P-type transistor includes a doped area doped with a P-type dopant.

[0083] The conductivity of the first region is greater than that of the second region, and the first region is substantially used as an electrode or a signal line. The second region has a relatively low doping concentration or may be a non-doped region and substantially corresponds to an active region (or channel region) of a transistor. In other words, a portion of the semiconductor pattern may be an active region of a transistor, another portion of the semiconductor pattern may be a source region or a drain region of the transistor, and another portion of the semiconductor pattern may be a connecting electrode or a connecting signal line.

[0084] like Figure 5 As shown in FIG. 1 , a first source region S1 , a first active region A1 , and a first drain region D1 of the first transistor TR1 are formed of a semiconductor pattern, and a second source region S2 , a second active region A2 , and a second drain region D2 of the second transistor TR2 are formed of a semiconductor pattern.

[0085] Figure 5 A portion of a connection signal line SCL formed of a semiconductor pattern is shown. Although not shown separately, the connection signal line SCL may be electrically connected to the second drain region D2 of the second transistor TR2 in a plan view. Another transistor may be provided between the connection signal line SCL and the second drain region D2 of the second transistor TR2.

[0086] The first insulating layer 10 is disposed on the buffer layer BFL. The first insulating layer 10 overlaps with the plurality of pixels PX in common and covers the semiconductor pattern. The first gate G1 and the second gate G2 are disposed on the first insulating layer 10. The first gate G1 and the second gate G2 may be part of the metal pattern. The first gate G1 overlaps with the first active area A1, and the second gate G2 overlaps with the second active area A2. In the process of doping the semiconductor pattern, the first gate G1 and the second gate G2 are used as masks.

[0087] A second insulating layer 20 covering the first gate G1 and the second gate G2 is disposed on the first insulating layer 10. The second insulating layer 20 overlaps the pixel PX in common. An upper electrode UE may be disposed on the second insulating layer 20. The upper electrode UE may overlap the second gate G2 of the second transistor TR2. The upper electrode UE may be a portion of a metal pattern. A portion of the second gate G2 and the upper electrode UE overlapping the portion of the second gate G2 may define a capacitor.

[0088] The third insulating layer 30 covering the upper electrode UE is disposed on the second insulating layer 20. The first connection electrode CNE1 disposed on the third insulating layer 30 may be connected to the connection signal line SCL through a contact hole CNT-1 passing through the first insulating layer 10 to the third insulating layer 30.

[0089] The fourth insulating layer 40 covering the first connection electrode CNE1 is disposed on the third insulating layer 30. The first to fourth insulating layers 10 to 40 may be inorganic layers and / or organic layers, and may have a single-layer or multi-layer structure.

[0090] The fifth insulating layer 50 is disposed on the fourth insulating layer 40. The fifth insulating layer 50 may be an organic layer. The second connection electrode CNE2 may be disposed on the fifth insulating layer 50. The second connection electrode CNE2 may be connected to the first connection electrode CNE1 through a contact hole CNT-2 passing through the fourth insulating layer 40 and the fifth insulating layer 50.

[0091] The sixth insulating layer 60 covering the second connection electrode CNE2 is disposed on the fifth insulating layer 50. The sixth insulating layer 60 may be an organic layer. The first electrode AE ​​is disposed on the sixth insulating layer 60. The first electrode AE ​​is connected to the second connection electrode CNE2 through a contact hole CNT-3 passing through the sixth insulating layer 60.

[0092] The pixel opening OPN is defined in the pixel defining film PDL. The pixel opening OPN of the pixel defining film PDL exposes at least a portion of the first electrode AE. In an embodiment, the light emitting area PXA is defined to correspond to a partial area of ​​the first electrode AE ​​exposed by the pixel opening OPN.

[0093] The hole control layer HCL is commonly disposed in the light emitting area PXA and the non-light emitting area NPXA. The hole control layer HCL may include a hole transport layer and may further include a hole injection layer. The light emitting layer EML is disposed on the hole control layer HCL. The light emitting layer EML may be disposed in an area corresponding to the pixel opening OPN. That is, the light emitting layer EML may be formed in each pixel PX, respectively. However, the present disclosure is not limited thereto, and the light emitting layer EML may be commonly formed in a plurality of pixels PX using an opening mask.

[0094] The electron control layer ECL is disposed on the light emitting layer EML. The electron control layer ECL may include an electron transport layer and may further include an electron injection layer. The hole control layer HCL and the electron control layer ECL may be commonly formed in a plurality of pixels PX using an open mask. The second electrode CE is disposed on the electron control layer ECL. The second electrode CE has an integral shape and is commonly disposed in a plurality of pixels PX. The upper insulating layer TFL is disposed on the second electrode CE. The upper insulating layer TFL may include a plurality of thin films.

[0095] Figure 6 yes Figure 4 A perspective view of the display panel shown in FIG. Figure 7 It is along Figure 6 A cross-sectional view taken along line II' shown in FIG. Figure 8 It is along Figure 6 A cross-sectional view taken along line II-II' shown in FIG.

[0096] Figure 6 2 is a view showing an embodiment of a partial area of ​​the second non-bending area NBA2.

[0097] Figure 6 is a schematic diagram showing an embodiment of some components arranged to correspond to the second non-bending area NBA2.

[0098] because Figure 7 The second pad DP-CPD and the base layer BL are connected to Figure 4 The second pad DP-CPD and Figure 5 The base layer BL is the same as that of FIG. 1 , and thus a repeated description thereof will be omitted or simplified.

[0099] Figure 7 and Figure 8 An embodiment of the second pad DP-CPD and the base layer BL, the heat absorption layer HAL and the insulating layer IL overlapping the second pad DP-CPD is shown, but the base layer BL, the heat absorption layer HAL and the insulating layer IL overlapping the first pad DP-PD may also have the same configuration.

[0100] For ease of description, Figure 7 and Figure 8 , the second pad DP-CPD, the display panel DP overlapping the second pad DP-CPD, and the substrate bump electrode CF-PD are mainly described. However, the present disclosure is not limited thereto, and the first pad DP-PD, the display panel DP overlapping the first pad DP-PD, and the chip bump electrode DC-PD may have substantially the same configuration.

[0101] refer to Figures 6 to 8 , the display device DD may include a circuit board CB, a conductive adhesive member ACF, and a display panel DP. Figure 6 In the embodiment, for convenience of description, the display panel DP, the conductive adhesive member ACF, and the circuit board CB are disassembled and spaced apart from each other. Figure 8 As shown in , the display panel DP, the conductive adhesive member ACF, and the circuit board CB may be coupled to each other. That is, at least a portion of the display panel DP may contact the conductive adhesive member ACF, and at least a portion of the circuit board CB may contact the conductive adhesive member ACF.

[0102] A region of the second non-bending area NBA2 in which the printed circuit board CF is bonded may be defined as a first connection area CA1 , and a region in which the driving chip DC is bonded may be defined as a second connection area CA2 .

[0103] The circuit board CB may include a plurality of bump electrodes LD. The plurality of bump electrodes LD may include substrate bump electrodes CF-PD disposed (eg, mounted) on the printed circuit board CF and chip bump electrodes DC-PD disposed (eg, mounted) on the driving chip DC.

[0104] The printed circuit board CF may include an upper surface CF-US and a lower surface CF-DS. The lower surface CF-DS of the printed circuit board CF may be defined as a surface facing the display panel DP. The substrate bump electrodes CF-PD may be disposed on the lower surface CF-DS of the printed circuit board CF.

[0105] The substrate bump electrodes CF-PD may be arranged on the lower surface CF-DS of the printed circuit board CF in the first direction DR1. The substrate bump electrodes CF-PD may be arranged to be spaced apart from each other in the first direction DR1. In a plan view, the arrangement shape of the substrate bump electrodes CF-PD may be the same as the arrangement shape of the second pads DP-CPD arranged on the display panel DP.

[0106] like Figure 8 As shown in , the substrate bump electrode CF-PD may have a shape exposed to the outside from the lower surface CF-DS of the printed circuit board CF.

[0107] The driving chip DC may include an upper surface DC-US and a lower surface DC-DS. The lower surface DC-DS of the driving chip DC may be a surface facing the display panel DP. The chip bump electrode DC-PD may be disposed on the lower surface DC-DS of the driving chip DC.

[0108] The chip bump electrodes DC-PD may be arranged in a first direction DR1 and a second direction DR2. The chip bump electrodes DC-PD may include a first row of chip bump electrodes DC-PD1 arranged in the first direction DR1 and a second row of chip bump electrodes DC-PD2 spaced apart from the first row of chip bump electrodes DC-PD1 in the second direction DR2 and arranged in the first direction DR1. In a plan view, the arrangement shape of the chip bump electrodes DC-PD may be the same as the arrangement shape of the first pads DP-PD arranged on the display panel DP.

[0109] Although not shown, the chip bump electrode DC-PD may have a shape exposed to the outside from the lower surface DC-DS of the driving chip DC.

[0110] refer to Figure 7 and Figure 8 , the second pads DP-CPD may be arranged on the base layer BL. When viewed in the second direction DR2, the second pads DP-CPD may be spaced apart from each other in the first direction DR1 and arranged in the first direction DR1.

[0111] Display panel DP (reference Figure 4 ) may include a plurality of pad areas PA and a plurality of non-pad areas NPA. The pad area PA may be defined as an area overlapping with the second pad DP-CPD. The non-pad area NPA may be defined as an area between the second pads DP-CPD adjacent to each other in the first direction DR1. When viewed in the second direction DR2, the pad area PA and the non-pad area NPA may be alternately arranged in the first direction DR1.

[0112] The heat absorption layer HAL may be disposed on the base layer BL. The heat absorption layer HAL may be disposed between the base layer BL and the second pad DP-CPD.

[0113] When viewed in the second direction DR2, the heat absorption layer HAL may extend in the first direction DR1. The heat absorption layer HAL may overlap the pad area PA and the non-pad area NPA.

[0114] The heat absorption layer HAL may include a metal. In an embodiment, the heat absorption layer HAL may include any one of molybdenum (Mo), titanium (Ti), and nickel (Ni), but the present disclosure is not limited thereto, and the heat absorption layer HAL may include other metals. In addition, the heat absorption layer HAL may include an inorganic material.

[0115] The insulating layer IL may be disposed on the heat absorption layer HAL. The insulating layer IL may cover the heat absorption layer HAL. The heat absorption layer HAL including metal may be insulated from the second pad DP-CPD by the insulating layer IL. Since the insulating layer IL is provided, the second pads DP-CPD may be prevented from being short-circuited to each other through the heat absorption layer HAL including metal.

[0116] The insulating layer IL may be an inorganic layer. In an embodiment, the insulating layer IL may include silicon oxide (SiO X ) or silicon nitride (SiN X ), but the present disclosure is not limited thereto, and the insulating layer IL may include other inorganic materials.

[0117] refer to Figure 6 and Figure 8 , the conductive adhesive member ACF may be disposed between the circuit board CB and the display panel DP. The conductive adhesive member ACF may be an anisotropic conductive film. In an embodiment, for example, the conductive adhesive member ACF may include an adhesive resin and conductive balls ACB dispersed in the adhesive resin. In an alternative embodiment, the conductive adhesive member ACF may be a non-conductive film. In an embodiment, for example, the conductive adhesive member ACF may be an adhesive resin that does not include conductive particles or is not composed of conductive particles. The conductive adhesive member ACF may include a thermosetting resin.

[0118] The conductive adhesive member ACF may include a first conductive adhesive member AF-C disposed between the printed circuit board CF and the display panel DP and a second conductive adhesive member AF-D disposed between the driving chip DC and the display panel DP.

[0119] The first conductive adhesive member AF-C may bond the printed circuit board CF to the first connection area CA1 of the display panel DP. The printed circuit board CF may be bonded to the first connection area CA1 by the first conductive adhesive member AF-C. Each of the substrate bump electrodes CF-PD may be electrically connected to a corresponding second pad DP-CPD of the second pads DP-CPD by the first conductive adhesive member AF-C. The substrate bump electrodes CF-PD and the second pads DP-CPD may be electrically connected to each other by the conductive balls ACB. Thus, the printed circuit board CF may be electrically connected to the display panel DP.

[0120] The second conductive adhesive member AF-D may bond the driving chip DC to the second connection area CA2 of the display panel DP. The driving chip DC may be bonded to the second connection area CA2 by the second conductive adhesive member AF-D. Each of the chip bump electrodes DC-PD may be electrically connected to a corresponding first pad DP-PD of the first pads DP-PD by the second conductive adhesive member AF-D. Although not shown, the chip bump electrodes DC-PD and the first pads DP-PD may be electrically connected to each other by the conductive balls ACB. Therefore, the driving chip DC may be electrically connected to the display panel DP.

[0121] Although not shown, when the circuit board CB and the display panel DP are arranged adjacent to the conductive adhesive member ACF, a near-infrared laser beam may be irradiated from the lower side of the base layer BL in the third direction DR3. As the near-infrared laser beam is irradiated, the conductive adhesive member ACF may be cured. As the conductive adhesive member ACF is cured, the circuit board CB and the display panel DP may be connected to each other.

[0122] When the display panel DP does not include the heat absorption layer HAL, the near-infrared laser beam may pass through the base layer BL and the conductive adhesive member ACF, and may be absorbed by the circuit board CB. The circuit board CB may absorb the near-infrared laser beam and convert it into a high temperature state. The circuit board CB converted into a high temperature state may dissipate heat. The heat dissipated from the circuit board CB may move toward the conductive adhesive member ACF, and the conductive adhesive member ACF may be cured. In this case, the circuit board CB may expand by the heat. That is, the driving chip DC and the printed circuit board CF may expand.

[0123] When the driving chip DC and the printed circuit board CF expand in the first direction DR1 or the second direction DR2, the positions of the substrate bump electrode CF-PD and the chip bump electrode DC-PD may be changed. Therefore, the positions of the chip bump electrode DC-PD and the substrate bump electrode CF-PD may not correspond to the positions of the first pad DP-PD and the second pad DP-CPD on the display panel DP. Therefore, a bonding failure between the display panel DP and the circuit board CB may occur.

[0124] However, when the heat absorption layer HAL is disposed between the base layer BL and the second pad DP-CPD, the near-infrared laser beam irradiated from the lower side of the base layer BL is absorbed by the heat absorption layer HAL. The heat absorption layer HAL absorbing the near-infrared laser beam may be in a high temperature state, and the heat absorption layer HAL may radiate heat to the pad area PA and the non-pad area NPA. The heat may be transferred to the conductive adhesive member ACF, and the conductive adhesive member ACF may be cured.

[0125] Therefore, while curing the conductive adhesive member ACF, the circuit board CB can be prevented from being in a high temperature state, and thus the circuit board CB can be prevented from expanding due to heat. Since the circuit board CB does not expand due to heat, the positions of the chip bump electrodes DC-PD and the substrate bump electrodes CF-PD may not change. Therefore, the bonding reliability between the display panel DP and the circuit board CB can be improved.

[0126] 9A to 9C is a view for describing another embodiment of the present disclosure.

[0127] 9A to 9C It is a cross-sectional view of an embodiment.

[0128] exist 9A to 9C In the embodiment shown in , except that the sizes of the first heat absorption layers HAL1a, HAL1b, and HAL1c in the first direction DR1 are different from each other, the other configurations may be the same.

[0129] because 9A to 9C The base layer BL, the second pad DP-CPD, the pad area PA and the non-pad area NPA Figure 7 The base layer BL, the second pads DP-CPD, the pad area PA, and the non-pad area NPA are the same, so the description thereof will be omitted or simplified.

[0130] refer to Figure 6 and Fig. 9A , the heat absorption layer HALa may include a plurality of (1-1)th heat absorption layers HAL1a and a plurality of second heat absorption layers HAL2. Each of the (1-1)th heat absorption layer HAL1a and the second heat absorption layer HAL2 may include a metal. In an embodiment, the (1-1)th heat absorption layer HAL1a and the second heat absorption layer HAL2 may include any one of titanium (Ti), molybdenum (Mo), and nickel (Ni), but the present disclosure is not limited thereto, and the (1-1)th heat absorption layer HAL1a and the second heat absorption layer HAL2 may include other metals.

[0131] The (1-1)th heat absorption layer HAL1a may be disposed on the base layer BL. The (1-1)th heat absorption layer HAL1a may be arranged in the first direction DR1. The (1-1)th heat absorption layers HAL1a may be spaced apart from each other in the first direction DR1.

[0132] The width of the (1-1)th heat absorption layer HAL1a in the first direction DR1 may be the same as the width of the non-pad area NPA in the first direction DR1.

[0133] The first insulating layer IL1 may be disposed on the base layer BL. The first insulating layer IL1 may be disposed to cover the (1-1)th heat absorption layer HAL1a disposed on the base layer BL. Therefore, the (1-1)th heat absorption layer HAL1a may not be electrically connected to the second heat absorption layer HAL2.

[0134] The first insulating layer IL1 may be an organic layer. In an embodiment, the first insulating layer IL1 may include silicon oxide (SiO X ) or silicon nitride (SiN X ), but the present disclosure is not limited thereto, and the first insulating layer IL1 may include other inorganic materials.

[0135] The second heat absorption layer HAL2 may be disposed on the first insulating layer IL1. The second heat absorption layer HAL2 may be arranged in the first direction DR1. The second heat absorption layers HAL2 may be spaced apart from each other in the first direction DR1. In an embodiment, the second insulating layer IL2 may be disposed on the first insulating layer IL1 and the second heat absorption layer HAL2.

[0136] refer to Fig. 9B , when viewed in the second direction DR2, the size of the (1-2)th heat absorption layer HAL1b in the first direction DR1 may be smaller than the width of the non-pad area NPA in the first direction DR1. The (1-2)th heat absorption layer HAL1b may not overlap the pad area PA. The (1-2)th heat absorption layer HAL1b may not overlap the second pad DP-CPD.

[0137] refer to Fig. 9C , the width of the (1-3)th heat absorption layer HAL1c in the first direction DR1 may be greater than the width of the non-pad area NPA in the first direction DR1. The (1-3)th heat absorption layer HAL1c may overlap the pad area PA and the non-pad area NPA. The (1-3)th heat absorption layer HAL1c may overlap the edge of the second pad DP-CPD. The (1-3)th heat absorption layer HAL1c may overlap a portion of the second heat absorption layer HAL2.

[0138] refer to Figure 6 and 9A to 9C When the near-infrared laser beam is irradiated from the lower side of the base layer BL in the third direction DR3, the first heat absorption layers HAL1a, HAL1b, and HAL1c absorbing the near-infrared laser beam may be directed toward the conductive adhesive member ACF (reference Figure 6 ) to dissipate heat. The second heat absorption layer HAL2 that absorbs the near-infrared laser beam may be directed toward the conductive adhesive member ACF (reference Figure 6 ) to dissipate heat. Therefore, the conductive adhesive member ACF may be cured to bond the display panel DP and the circuit board CB.

[0139] In addition, since the near-infrared laser beam is absorbed by the first heat absorption layer HAL1a, HAL1b and HAL1c and the second heat absorption layer HAL2, the amount of the near-infrared laser beam absorbed by the circuit board CB may be relatively small. Therefore, the circuit board CB may not be in a high temperature state caused by the near-infrared laser beam, and the circuit board CB may not be deformed by heat. That is, the position of the bump electrode LD may correspond to the position of the display pad SD. Therefore, the bonding reliability between the display panel DP and the circuit board CB may be improved.

[0140] Fig.10 is a view for describing another embodiment of the present disclosure. Fig.11 is a view for describing another embodiment of the present disclosure.

[0141] Fig.10 is a perspective view of an embodiment, and Fig.11 It is along Fig.10 A cross-sectional view along line III-III' shown in FIG.

[0142] Fig.10 2 is a view showing an embodiment of a partial area of ​​the second non-bending area NBA2.

[0143] Fig.10 is a schematic diagram showing an embodiment of some components arranged to correspond to the second non-bending area NBA2.

[0144] because Fig.10 The circuit board CB, the conductive adhesive member ACF and the display pad SD are Figure 6 The circuit board CB, the conductive adhesive member ACF and the display pad SD are the same, so their description will be omitted or simplified.

[0145] because Fig.11 The base layer BL, the second pad DP-CPD, the pad area PA and the non-pad area NPA Figure 7 The base layer BL, the second pads DP-CPD, the pad area PA, and the non-pad area NPA are the same, so the description thereof will be omitted or simplified.

[0146] refer to Fig.10 and Fig.11 In a plan view, the heat absorption layer HALb may be disposed in the connection area CA. The heat absorption layer HALb may be exposed to the outside from the upper surface of the display panel DP.

[0147] like Fig.11 As shown in FIG. 1 , the heat absorption layer HALb may be disposed on the base layer BL. The heat absorption layer HALb may overlap the pad area PA and the non-pad area NPA.

[0148] The heat absorption layer HALb may be an inorganic layer. In an embodiment, the heat absorption layer HALb may include antimony tin oxide ("ATO"), but the present disclosure is not limited thereto and the heat absorption layer HALb may include other inorganic materials that can absorb a near infrared laser beam.

[0149] The display pad SD may be disposed on the upper surface of the heat absorption layer HALb. The display pad SD may be disposed directly on the upper surface of the heat absorption layer HALb.

[0150] and Figure 7 Since the heat absorption layer HALb includes an inorganic material, even when the second pads DP-CPD are directly disposed on the heat absorption layer HALb, the second pads DP-CPD may not be short-circuited with each other. Figure 7 ) may not be provided on the heat absorption layer HALb.

[0151] The near-infrared laser beam irradiated from the lower side of the base layer BL in the third direction DR3 may be absorbed by the heat absorption layer HALb. The heat absorption layer HALb absorbing the near-infrared laser beam may radiate heat toward the conductive adhesive member ACF disposed between the display panel DP and the circuit board CB. Therefore, the conductive adhesive member ACF may be cured to bond the display panel DP and the circuit board CB.

[0152] In addition, since the near-infrared laser beam is absorbed by the heat absorption layer HALb, the circuit board CB may not be converted into a high temperature state due to the absorption of the near-infrared laser beam. Therefore, the circuit board CB may not expand by heat, and the arrangement of the bump electrodes LD of the circuit board CB may correspond to the arrangement of the display pads SD. Therefore, the bonding reliability between the display panel DP and the circuit board CB may be improved.

[0153] According to an embodiment of the present disclosure, a heat absorption layer having a higher heat absorption rate than that of the circuit board may be provided between the base substrate and the pad. Therefore, when the lower surface of the base substrate is irradiated with a near-infrared laser beam, the heat absorption layer may absorb the near-infrared laser beam to dissipate heat, and the dissipated heat may be transferred to the conductive adhesive member provided between the pad and the circuit board. In this case, since the near-infrared laser beam is absorbed by the heat absorption layer, the circuit board may be maintained at a temperature lower than that of the heat absorption layer, and the circuit board may not expand by heat. Therefore, the bonding reliability between the display panel and the circuit board may be improved.

[0154] Although the embodiments have been described above, it will be appreciated by those skilled in the art that the present disclosure may be variously modified and altered without departing from the spirit and scope of the present disclosure described in the appended claims. In addition, it should be understood that the embodiments disclosed in the present disclosure are not intended to limit the technical spirit of the present disclosure, and all technical spirits within the appended claims and their equivalents are included in the scope of the present disclosure.

Claims

1. A display device, include: Display panel, including: Base layer; a plurality of pads arranged on the base layer and spaced apart from each other in a first direction; and a heat absorption layer disposed between the base layer and the plurality of pads and overlapping the plurality of pads in a plan view; a circuit board disposed on the display panel and comprising a plurality of bump electrodes; and A conductive adhesive member electrically connects the display panel and the circuit board.

2. The display device according to claim 1, in, The heat absorption layer overlaps a region between the plurality of pads spaced apart from each other in the first direction in the plan view.

3. The display device according to claim 2, further comprising: include: an insulating layer disposed between the heat absorption layer and the plurality of pads, and Wherein, the heat absorption layer comprises metal.

4. The display device according to claim 2, in, The heat absorption layer includes at least one of titanium, molybdenum and nickel.

5. The display device according to claim 3, in, The insulating layer covers the heat absorbing layer, and the heat absorbing layer and the plurality of pads are insulated from each other.

6. The display device according to claim 3, in, The insulating layer comprises: A first insulating layer disposed on the base layer; and The second insulating layer is disposed between the first insulating layer and the plurality of pads.

7. The display device according to claim 6, in, The heat absorption layer comprises: a plurality of first heat absorption layers arranged on the base layer and covered by the first insulating layer; and a plurality of second heat absorbing layers arranged on the first insulating layer and covered by the second insulating layer, and In the plan view, the plurality of first heat absorption layers overlap regions between the plurality of pads adjacent to each other in the first direction, and the plurality of second heat absorption layers overlap the plurality of pads.

8. The display device according to claim 7, in, The plurality of first heat absorbing layers and the plurality of second heat absorbing layers are arranged in different layers.

9. The display device according to claim 7, in, Edges of the plurality of first heat absorption layers overlap edges of the plurality of pads in the plan view.

10. The display device according to claim 2, in, The heat absorption layer includes an inorganic material.

11. The display device according to claim 2, in, The plurality of pads are arranged on an upper surface of the heat absorption layer.

12. The display device according to claim 2, in, The heat absorption layer extends in the first direction in the plan view.

13. The display device according to claim 12, in, In the plan view, an extending direction of the heat absorption layer and an extending direction of the plurality of pads intersect each other.

14. A display device, include: Display panel, including: a plurality of pad regions and a plurality of non-pad regions, the plurality of non-pad regions being arranged alternately with the plurality of pad regions in a first direction; and a heat absorption layer overlapping the plurality of pad regions and the plurality of non-pad regions; a circuit board disposed on the display panel and including a plurality of bump electrodes; and a conductive adhesive member electrically connecting the display panel and the circuit board.

15. The display device according to claim 14, in, The display panel further includes: a base layer disposed below the heat absorbing layer; and a plurality of pads arranged on the heat absorption layer and overlapping the plurality of pad areas, and The heat absorption layer is disposed between the base layer and the plurality of pads.

16. The display device according to claim 15, in, The display panel further includes an insulating layer disposed between the heat absorption layer and the plurality of pads, and The insulating layer covers the heat absorbing layer, and the heat absorbing layer includes metal.

17. The display device according to claim 16, in, The metal includes any one of molybdenum, titanium and nickel.

18. The display device according to claim 16, in, The insulating layer comprises: A first insulating layer disposed on the base layer; and The second insulating layer is disposed between the first insulating layer and the plurality of pads.

19. The display device according to claim 18, in, The heat absorption layer comprises: a plurality of first heat absorption layers overlapping the plurality of non-pad regions; and a plurality of second heat absorption layers overlapping the plurality of pad regions, and The first insulating layer covers the plurality of first heat absorbing layers, and the second insulating layer covers the plurality of second heat absorbing layers.

20. The display device according to claim 15, in, The heat absorption layer includes an inorganic material, and the plurality of pads are arranged on an upper surface of the heat absorption layer.

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