Display optimized dynamic configuration

CN119156809APending Publication Date: 2024-12-17QUALCOMM INC
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Patent Information

Application Number
CN202280094695.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2022-04-18
Publication Date
2024-12-17

AI Technical Summary

Technical Problem

Prior art In wireless communications and small handheld devices, the demand for graphics or display processing increases, but it is difficult to optimize the visual quality of the camera and the display, especially when switching between the camera and the display, resulting in poor visual quality.

Method used

By adopting dynamic or adjustable duty cycles and switching frequency in cameras and displays, adaptive adjustments are made based on ambient light sensor (ALS) values, optimizing exposure time and emission time of cameras and displays, enabling synchronous operation of cameras and displays. .

Benefits of technology

Improves the visual quality of the camera and monitor, matches the light emitting environment, optimizes the running time of the camera and monitor, reduces the luminous interference of the monitor, and improves the visual effect.

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Abstract

Aspects presented herein relate to methods and apparatus for display processing, including devices, such as DPUs. The apparatus may obtain an ALS value for at least one of a camera run-time or a display run-time. The apparatus may also calculate at least one of a camera duty cycle of the camera, a display duty cycle of the display, or a switching frequency based on the ALS value. Further, the apparatus may adjust at least one of the camera duty cycle, the display duty cycle, or the switching frequency based on at least one of the camera runtime, the display runtime, the ALS value, the camera margin time, or the display margin time.
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Description

Technical Field

[0001] The present disclosure relates generally to processing systems and, more particularly, to one or more techniques for display processing. Background Art

[0002] Computing devices typically perform graphics and / or display processing (e.g., using a graphics processing unit (GPU), a central processing unit (CPU), a display processor, etc.) to render and display visual content. Such computing devices may include, for example, computer workstations, mobile phones (such as smart phones), embedded systems, personal computers, tablet computers, and video game consoles. The GPU is configured to execute a graphics processing pipeline that includes one or more processing stages that operate together to execute graphics processing commands and output frames. The central processing unit (CPU) can control the operation of the GPU by issuing one or more graphics processing commands to the GPU. Modern CPUs are typically capable of executing multiple applications concurrently, each of which may need to utilize a GPU during execution. The display processor is configured to convert digital information received from the CPU into analog values, and may issue commands to a display panel to display visual content. A device that provides content for visual presentation on a display may utilize a GPU and / or a display processor.

[0003] The GPU of a device may be configured to perform processes in a graphics processing pipeline. Additionally, a display processor or display processing unit (DPU) may be configured to perform processes for display processing. However, with the advent of wireless communications and smaller handheld devices, the need for improved graphics or display processing continues to increase. Summary of the invention

[0004] The following presents the summary of one or more aspects in order to provide a basic understanding of these aspects. This summary is not an extensive overview of all contemplated aspects, and is neither intended to identify the key or important elements of all aspects, nor to describe the scope of any or all aspects. Its sole purpose is to present some concepts of one or more aspects in a simplified form as a prelude to a more detailed description presented later.

[0005] In one aspect of the present disclosure, a method, a computer-readable medium, and a device are provided. The device may be a display processing unit (DPU) or any device that can perform display processing. The device may obtain an ambient light sensor (ALS) value of at least one of a camera operating time or a display operating time. The device may also calculate at least one of a camera duty cycle of a camera, a display duty cycle of a display, or a switching frequency based on the ALS value. Additionally, the device may calculate at least one of the camera margin time of the camera, the camera phase of the camera, the display margin time of the display, or the display phase of the display, wherein at least one of the camera duty cycle, the display duty cycle, or the switching frequency is adjusted based on at least the calculated camera margin time, the calculated camera phase, the calculated display margin time, or the calculated display phase. The device may activate a camera sensor during the camera operation time or activate a display module during the display operation time based on at least one of the camera duty cycle, the display duty cycle, the switching frequency, the camera margin time, or the display margin time, wherein at least one of the camera duty cycle, the display duty cycle, or the switching frequency is adjusted based on the activated camera sensor or the activated display module. Moreover, the device may adjust at least one of the camera duty cycle, the display duty cycle, or the switching frequency based on at least one of the camera operation time, the display operation time, the ALS value, the camera margin time, or the display margin time. The device may also modify at least one of the color value of the display or the brightness value of the display based on at least one of the activation of the display, the deactivation of the display, the activation of the camera, or the deactivation of the camera. The device may also store data associated with at least one of the adjusted camera duty cycle, the adjusted display duty cycle, or the adjusted switching frequency in a memory or a buffer.

[0006] The details of one or more examples of the disclosure are set forth in the accompanying drawings and the description below. Other features, objects, and advantages of the disclosure will become apparent from the description and drawings, and from the claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Figure 1 is a block diagram illustrating an example content generation system.

[0008] Figure 2 An example graphics processing unit (GPU) is illustrated.

[0009] Figure 3 An example display framework including a display processor and a display is illustrated.

[0010] Figure 4 is a diagram illustrating an example mask layer for display processing.

[0011] Figure 5 is a diagram illustrating example display timing and camera timing for display processing.

[0012] Figure 6 is a diagram illustrating example display light emission times and camera exposure times for display processing.

[0013] Figure 7 is a diagram illustrating example display light emission times and camera exposure times for display processing.

[0014] Figure 8 is a diagram illustrating example display timing and camera timing for display processing.

[0015] Fig. 9 is a communication flow diagram illustrating example communications between a camera, a DPU, and a memory.

[0016] Fig.10 is a flowchart illustrating a method of display processing.

[0017] Fig.11 is a flowchart illustrating a method of display processing. DETAILED DESCRIPTION

[0018] Some aspects of display processing can utilize multiple different locations for display cameras. For example, a camera below the display (i.e., a camera located below at least one display layer in the device) is an example of a camera location design in modern smart phones and mobile handset devices. The location of the display camera can be selected based on multiple different categories (such as convenience and visual quality improvement). Additionally, in order to optimize camera visual quality, the camera exposure time and the display light emission time can be time division multiplexed (TDM). By time division multiplexing the camera exposure time and the display light emission time, this can help optimize the camera visual quality by reducing the amount of display light emission interference. This can be achieved by utilizing a fixed time division duplex (TDD) duty cycle for both the camera exposure time (i.e., camera duty cycle) and the display light emission time (i.e., display duty cycle). For example, the camera duty cycle can be a fixed camera TDD duty cycle, and the display duty cycle can be a fixed display TDD duty cycle. As indicated above, the camera duty cycle and the display duty cycle can be finely tuned to a TDD duty cycle. For example, the camera duty cycle and the display duty cycle can be finely tuned and fixed in a predetermined location such as a laboratory. In addition, the camera duty cycle and the display duty cycle can be fixed to a constant time period (i.e., a constant duty cycle). This type of constant duty cycle can be relatively easy to implement, but it may not be an ideal solution because both the display light time and the camera exposure time may need to be increased or decreased in order to produce improved visual quality. In fact, the constant duty cycle may not allow dynamic configuration of the display light time and / or camera exposure time. For example, the camera may need an increased exposure time, while the display may need an increased light time in order to increase the display brightness. Moreover, the display may need a reduced light time in order to reduce display burn-in and aging. As indicated above, one challenge of working with certain types of display cameras (e.g., cameras below the display) is that the visual quality of the camera and the display may not be ideal when time division multiplexing is utilized. For example, when the display is turned on, in order for the display to work correctly, the camera may need to be turned off. Similarly, in order for the camera to work correctly and when the camera is activated, the display may need to be turned off. In addition, due to the switching between the activation of the display and the activation of the camera, the camera may not receive enough exposure time and the display may not receive enough display light time. Aspects of the present disclosure may utilize dynamic or adjustable camera duty cycles and display duty cycles. For example, aspects of the present disclosure may utilize a camera duty cycle that is an adjustable time division duplex (TDD) camera duty cycle and a display duty cycle that is an adjustable TDD display duty cycle. Additionally, in some examples, aspects of the present disclosure may utilize an adjustable switching frequency of a camera and / or display. For example, aspects of the present disclosure may utilize an adjustable switching frequency based on an ambient light sensor (ALS) value of a camera runtime and a display runtime.That is, aspects presented herein can utilize adaptive TDD region duty cycle for ambient light and / or exposure time.Furthermore, aspects presented herein can utilize adaptive display runtime calibration.

[0019] Various aspects of the system, device, computer program product and method will be described more fully below with reference to the accompanying drawings. However, the present disclosure can be embodied in many different forms and should not be interpreted as being limited to any specific structure or function presented throughout the present disclosure. On the contrary, these aspects are provided so that the present disclosure will be thorough and complete, and the scope of the present disclosure will be fully conveyed to those skilled in the art. Based on the teachings of this article, it should be understood by those skilled in the art that the scope of the present disclosure is intended to cover any aspect of the system, device, computer program product and method disclosed herein, whether it is implemented independently of other aspects of the present disclosure or implemented in combination with other aspects of the present disclosure. For example, any number of aspects set forth herein can be used to implement a device or practice method. In addition, the scope of the present disclosure is intended to cover such a device or method that is practiced using other structures, functionality, or structure and functionality other than the various aspects of the disclosure set forth herein or different from the various aspects of the disclosure set forth herein. Any aspect disclosed herein can be embodied by one or more elements of the claims.

[0020] Although various aspects are described herein, many variations and permutations of these aspects fall within the scope of the present disclosure. Although some potential benefits and advantages of various aspects of the present disclosure are mentioned, the scope of the present disclosure is not intended to be limited to specific benefits, uses or objectives. On the contrary, various aspects of the present disclosure are intended to be widely applicable to different wireless technologies, system configurations, networks and transmission protocols, some of which are illustrated by way of example in the drawings and the description below. The specific embodiments and drawings merely illustrate the present disclosure and do not limit the present disclosure, and the scope of the present disclosure is defined by the attached claims and their equivalent technical solutions.

[0021] Several aspects are presented with reference to various devices and methods. These devices and methods are described in the following detailed description and illustrated in the accompanying drawings by various blocks, components, circuits, processes, algorithms, etc. (collectively referred to as "elements"). These elements can be implemented using electronic hardware, computer software, or any combination thereof. Whether these elements are implemented as hardware or software depends on the specific application and the design constraints imposed on the overall system.

[0022] For example, an element, or any part of an element, or any combination of elements may be implemented as a "processing system" including one or more processors (which may also be referred to as a processing unit). Examples of processors include microprocessors, microcontrollers, graphics processing units (GPUs), general-purpose GPUs (GPGPUs), central processing units (CPUs), application processors, digital signal processors (DSPs), reduced instruction set computing (RISC) processors, systems on chips (SOCs), baseband processors, application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), programmable logic devices (PLDs), state machines, gated logic devices, discrete hardware circuits, and other suitable hardware configured to perform various functionalities described in the present disclosure. One or more processors in a processing system may execute software. Software may be broadly interpreted as meaning instructions, instruction sets, codes, code segments, program codes, programs, subroutines, software components, applications, software applications, software packages, routines, subroutines, objects, executable files, threads of execution, processes, functions, etc., whether expressed in software, firmware, middleware, microcode, hardware description languages, or other terms. The term "application" may refer to software. As described herein, one or more technologies may refer to an application, i.e., software, configured to perform one or more functions. In such examples, the application may be stored in a memory (e.g., an on-chip memory of a processor, a system memory, or any other memory). The hardware described herein (such as a processor) may be configured to execute an application. For example, an application may be described as including code that, when executed by hardware, causes the hardware to perform one or more technologies described herein. As an example, the hardware may access code from a memory and execute the code accessed from the memory to perform one or more technologies described herein. In some examples, components are identified in the present disclosure. In such examples, components may be hardware, software, or a combination thereof. Each component may be a separate component or a subcomponent of a single component.

[0023] Accordingly, in one or more examples described herein, the functions described may be implemented in hardware, software, or any combination thereof. If implemented with software, the functions may be stored or encoded on a computer-readable medium as one or more instructions or codes. Computer-readable media include computer storage media. Storage media may be any available medium that can be accessed by a computer. As an example and not limitation, such computer-readable media may include random access memory (RAM), read-only memory (ROM), electrically erasable programmable ROM (EEPROM), optical disk storage, magnetic disk storage, other magnetic storage devices, a combination of computer-readable media of the above types, or any other medium that can be used to store instructions or data structures that can be accessed by a computer.

[0024] In summary, this disclosure describes techniques for having a graphics processing pipeline in a single device or multiple devices to improve rendering of graphics content and / or reduce load on a processing unit (i.e., any processing unit, such as a GPU, configured to perform one or more of the techniques described herein). For example, this disclosure describes techniques for performing graphics processing in any device that utilizes graphics processing. Other example benefits are described throughout this disclosure.

[0025] As used herein, instances of the term "content" may refer to "graphics content," "images," and vice versa. This is true regardless of whether these terms are used as adjectives, nouns, or other parts of speech. In some examples, as used herein, the term "graphics content" may refer to content produced by one or more processes of a graphics processing pipeline. In some examples, as used herein, the term "graphics content" may refer to content produced by a processing unit configured to perform graphics processing. In some examples, as used herein, the term "graphics content" may refer to content produced by a graphics processing unit.

[0026] In some examples, as used herein, the term "display content" may refer to content generated by a processing unit configured to perform display processing. In some examples, as used herein, the term "display content" may refer to content generated by a display processing unit. Graphics content may be processed to become display content. For example, a graphics processing unit may output graphics content (such as a frame) to a buffer (which may be referred to as a frame buffer). The display processing unit may read graphics content (such as one or more frames) from the buffer and perform one or more display processing techniques thereon to generate display content. For example, the display processing unit may be configured to perform synthesis on one or more rendering layers to generate a frame. As another example, the display processing unit may be configured to synthesize, blend or otherwise combine two or more layers into a single frame. The display processing unit may be configured to perform scaling on a frame, such as zooming in or out. In some examples, a frame may refer to a layer. In other examples, a frame may refer to two or more layers that have been mixed together to form the frame, that is, the frame includes two or more layers, and the frame including two or more layers may be subsequently mixed.

[0027] Figure 11 is a block diagram illustrating an example content generation system 100 configured to implement one or more techniques of the present disclosure. The content generation system 100 includes a device 104. The device 104 may include one or more components or circuits for performing various functions described herein. In some examples, one or more components of the device 104 may be components of a SOC. The device 104 may include one or more components configured to perform one or more techniques of the present disclosure. In the example shown, the device 104 may include a processing unit 120, a content encoder / decoder 122, and a system memory 124. In some aspects, the device 104 may include multiple components, such as a communication interface 126, a transceiver 132, a receiver 128, a transmitter 130, a display processor 127, and one or more displays 131. References to the display 131 may refer to one or more displays 131. For example, the display 131 may include a single display or multiple displays. The display 131 may include a first display and a second display. The first display may be a left-eye display, and the second display may be a right-eye display. In some examples, the first display and the second display may receive different frames for presentation thereon. In other examples, the first display and the second display may receive the same frame for presentation thereon. In further examples, the results of the graphics processing may not be displayed on the device, for example, the first display and the second display may not receive any frames for presentation thereon. Instead, the frames or graphics processing results may be passed to another device. In some aspects, this may be referred to as split rendering.

[0028] Processing unit 120 may include internal memory 121. Processing unit 120 may be configured to perform graphics processing, such as in graphics processing pipeline 107. Content encoder / decoder 122 may include internal memory 123. In some examples, device 104 may include a display processor (such as display processor 127) to perform one or more display processing techniques on one or more frames generated by processing unit 120 before being presented by one or more displays 131. Display processor 127 may be configured to perform display processing. For example, display processor 127 may be configured to perform one or more display processing techniques on one or more frames generated by processing unit 120. One or more displays 131 may be configured to display or otherwise present frames processed by display processor 127. In some examples, one or more displays 131 may include one or more of the following: a liquid crystal display (LCD), a plasma display, an organic light emitting diode (OLED) display, a projection display device, an augmented reality display device, a virtual reality display device, a head mounted display, or any other type of display device.

[0029] Memory external to the processing unit 120 and the content encoder / decoder 122, such as the system memory 124, may be accessible to the processing unit 120 and the content encoder / decoder 122. For example, the processing unit 120 and the content encoder / decoder 122 may be configured to read from and / or write to the external memory, such as the system memory 124. The processing unit 120 and the content encoder / decoder 122 may be communicatively coupled to the system memory 124 via a bus. In some examples, the processing unit 120 and the content encoder / decoder 122 may be communicatively coupled to each other via the bus or a different connection.

[0030] The content encoder / decoder 122 may be configured to receive graphics content from any source, such as the system memory 124 and / or the communication interface 126. The system memory 124 may be configured to store the received encoded or decoded graphics content. The content encoder / decoder 122 may be configured to receive the encoded or decoded graphics content in the form of encoded pixel data, for example, from the system memory 124 and / or the communication interface 126. The content encoder / decoder 122 may be configured to encode or decode any graphics content.

[0031] Internal memory 121 or system memory 124 may include one or more volatile or non-volatile memories or storage devices. In some examples, internal memory 121 or system memory 124 may include RAM, SRAM, DRAM, erasable programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), flash memory, magnetic data media, or optical storage media, or any other type of memory.

[0032] According to some examples, the internal memory 121 or the system memory 124 may be a non-transitory storage medium. The term "non-transitory" may indicate that the storage medium is not embodied in a carrier wave or propagation signal. However, the term "non-transitory" should not be interpreted to mean that the internal memory 121 or the system memory 124 is non-removable or that its contents are static. As an example, the system memory 124 may be removed from the device 104 and moved to another device. As another example, the system memory 124 may not be removable from the device 104.

[0033] The processing unit 120 may be a central processing unit (CPU), a graphics processing unit (GPU), a general purpose GPU (GPGPU), or any other processing unit that may be configured to perform graphics processing. In some examples, the processing unit 120 may be integrated into the motherboard of the device 104. In some examples, the processing unit 120 may be present on a graphics card installed in a port in the motherboard of the device 104, or may be otherwise incorporated into a peripheral device configured to interoperate with the device 104. The processing unit 120 may include one or more processors, such as one or more microprocessors, GPUs, application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), arithmetic logic units (ALUs), digital signal processors (DSPs), discrete logic, software, hardware, firmware, other equivalent integrated or discrete logic circuits, or any combination thereof. If the technology is partially implemented in software, the processing unit 120 may store instructions for the software in a suitable non-transitory computer-readable storage medium (e.g., internal memory 121), and may use one or more processors to execute instructions in hardware to perform the technology of the present disclosure. Any of the above (including hardware, software, a combination of hardware and software, etc.) may be considered to be one or more processors.

[0034] The content encoder / decoder 122 may be any processing unit configured to perform content decoding. In some examples, the content encoder / decoder 122 may be integrated into the mainboard of the device 104. The content encoder / decoder 122 may include one or more processors, such as one or more microprocessors, application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), arithmetic logic units (ALUs), digital signal processors (DSPs), video processors, discrete logic, software, hardware, firmware, other equivalent integrated or discrete logic circuits, or any combination thereof. If the technology is partially implemented in software, the content encoder / decoder 122 may store instructions for the software in a suitable non-transitory computer-readable storage medium (e.g., internal memory 123), and may use one or more processors to execute instructions in hardware to perform the technology of the present disclosure. Any of the above (including hardware, software, a combination of hardware and software, etc.) may be considered to be one or more processors.

[0035] In some aspects, the content generation system 100 may include a communication interface 126. The communication interface 126 may include a receiver 128 and a transmitter 130. The receiver 128 may be configured to perform any receiving functions described herein with respect to the device 104. Additionally, the receiver 128 may be configured to receive information from another device, such as eye or head position information, rendering commands, or positioning information. The transmitter 130 may be configured to perform any sending functions described herein with respect to the device 104. For example, the transmitter 130 may be configured to send information to another device, which may include a request for content. The receiver 128 and the transmitter 130 may be combined into a transceiver 132. In such examples, the transceiver 132 may be configured to perform any receiving functions and / or sending functions described herein with respect to the device 104.

[0036] Reference again Figure 1 In certain aspects, the display processor 127 may include an adjustment component 198 configured to obtain an ambient light sensor (ALS) value for at least one of a camera runtime or a display runtime. The adjustment component 198 may also be configured to calculate at least one of a camera duty cycle of the camera, a display duty cycle of the display, or a switching frequency based on the ALS value. The adjustment component 198 may also be configured to calculate at least one of a camera margin time of the camera, a camera phase of the camera, a display margin time of the display, or a display phase of the display, wherein at least one of the camera duty cycle, the display duty cycle, or the switching frequency is adjusted based on at least the calculated camera margin time, the calculated camera phase, the calculated display margin time, or the calculated display phase. The adjustment component 198 may also be configured to activate the camera sensor during the camera run time or activate the display module during the display run time based on at least one of the camera duty cycle, the display duty cycle, the switching frequency, the camera margin time, or the display margin time, wherein at least one of the camera duty cycle, the display duty cycle, or the switching frequency is adjusted based on the activated camera sensor or the activated display module. The adjustment component 198 may also be configured to adjust at least one of the camera duty cycle, the display duty cycle, or the switching frequency based on at least one of the camera run time, the display run time, the ALS value, the camera margin time, or the display margin time. The adjustment component 198 may also be configured to modify at least one of the color value of the display or the brightness value of the display based on at least one of the activation of the display, the deactivation of the display, the activation of the camera, or the deactivation of the camera. The adjustment component 198 may also be configured to store data associated with at least one of the adjusted camera duty cycle, the adjusted display duty cycle, or the adjusted switching frequency in a memory or a buffer. Although the following description may focus on display processing, the concepts described herein may be applicable to other similar processing technologies.

[0037] As described herein, a device such as device 104 may refer to any device, apparatus or system configured to perform one or more technologies described herein. For example, a device may be a server, a base station, a user equipment, a client device, a station, an access point, a computer (e.g., a personal computer, a desktop computer, a laptop computer, a tablet computer, a computer workstation or a mainframe computer), a final product, an apparatus, a phone, a smart phone, a server, a video game platform or console, a handheld device (e.g., a portable video game device or a personal digital assistant (PDA)), a wearable computing device (e.g., a smart watch, an augmented reality device or a virtual reality device), a non-wearable device, a display or display device, a television, a television set-top box, an intermediate network device, a digital media player, a video streaming device, a content streaming device, an onboard computer, any mobile device, any device configured to generate graphics content, or any device configured to perform one or more technologies described herein. The process herein may be described as being performed by a specific component (e.g., a GPU), but in further embodiments, other components (e.g., a CPU) consistent with the disclosed embodiments may be used to perform.

[0038] The GPU may process multiple types of data or data packets in the GPU pipeline. For example, in some aspects, the GPU may process two types of data or data packets, such as context register packets and draw call data. The context register packet may be a collection of global state information, such as information about global registers, shaders, or constant data, which may adjust how the graphics context is to be processed. For example, the context register packet may include information about the color format. In some aspects of the context register packet, there may be a bit indicating which workload belongs to the context register. In addition, there may be multiple functions or programs running simultaneously and / or in parallel. For example, a function or program may describe an operation, such as a color mode or color format. Accordingly, the context register may define multiple states of the GPU.

[0039] The context state may be used to determine how an independent processing unit (e.g., a vertex fetcher (VFD), a vertex shader (VS), a shader processor, or a geometry processor) operates and / or in which mode the processing unit operates. To this end, the GPU may use context registers and programming data. In some aspects, the GPU may generate workloads (e.g., vertex or pixel workloads) in a pipeline based on context register definitions of a mode or state. Certain processing units (e.g., VFDs) may use these states to determine certain functions, such as how to assemble vertices. Since these modes or states may change, the GPU may need to change the corresponding context. Additionally, the workload corresponding to the mode or state may follow the changed mode or state.

[0040] Figure 2 An example GPU 200 is illustrated in accordance with one or more techniques of this disclosure. Figure 2 As shown, GPU 200 includes a command processor (CP) 210, a draw call group 212, a VFD 220, a VS 222, a vertex cache (VPC) 224, a triangle setup engine (TSE) 226, a rasterizer (RAS) 228, a Z pass engine (ZPE) 230, a pixel interpolator (PI) 232, a fragment shader (FS) 234, a rendering back end (RB) 236, a second level (L2) cache (UCHE) 238, and a system memory 240. Although Figure 2 GPU 200 is shown to include processing units 220-238, but GPU 200 may include multiple additional processing units. Additionally, processing units 220-238 are merely examples, and any combination or order of processing units may be used with a GPU according to the present disclosure. GPU 200 also includes command buffer 250, context register group 260, and context state 261.

[0041] like Figure 2 As shown, the GPU may parse the command buffer into context register packets (e.g., context register packets 260) and / or draw call data packets (e.g., draw call packets 212) using a CP (e.g., CP 210) or a hardware accelerator. Then, the CP 210 may transmit the context register packets 260 or the draw call packets 212 to the processing units or blocks in the GPU through separate paths. In addition, the command buffer 250 may alternate different states of context registers and draw calls. For example, the command buffer may be constructed in the following manner: context registers of context N, draw calls of context N, context registers of context N+1, and draw calls of context N+1.

[0042] The GPU can render images in a variety of different ways. In some instances, the GPU can use rendering and / or tile rendering to render images. In a tile rendering GPU, the image can be divided or separated into different sections or tiles. After the image is divided, each section or tile can be rendered separately. The tile rendering GPU can divide the computer graphics image into a grid format so that each part of the grid (i.e., tile) is rendered separately. In some aspects, during the binning process, the image can be divided into different boxes or tiles. In some aspects, during the binning process, a visibility stream can be constructed in which visible primitives or drawing calls can be identified. In contrast to tile rendering, direct rendering does not divide the frame into smaller boxes or tiles. On the contrary, in direct rendering, the entire frame is rendered at once. Additionally, some types of GPUs may allow both tile rendering and direct rendering.

[0043] Figure 3 is a block diagram 300 illustrating an example display framework including a processing unit 120 , a system memory 124 , a display processor 127 , and a display 131 , as may be identified in connection with device 104 .

[0044] The GPU may be included in a device that provides content for visual presentation on a display. For example, the processing unit 120 may include a GPU 310 configured to render graphics data for display on a computing device (e.g., device 104), which may be a computer workstation, a mobile phone, a smart phone or other smart device, an embedded system, a personal computer, a tablet computer, a video game console, etc. The operation of the GPU 310 may be controlled based on one or more graphics processing commands provided by the CPU 315. The CPU 315 may be configured to execute multiple applications concurrently. In some cases, each of the multiple applications executed concurrently may utilize the GPU 310 at the same time. The processing technology may be performed by outputting frames via the processing unit 120 over a physical or wireless communication channel.

[0045] System memory 124, which may be executed by processing unit 120, may include user space 320 and kernel space 325. User space 320 (sometimes referred to as "application space") may include software applications and / or application frameworks. For example, software applications may include operating systems, media applications, graphics applications, workspace applications, etc. The application framework may include a framework used by one or more software applications, such as libraries, services (e.g., display services, input services, etc.), application program interfaces (APIs), etc. Kernel space 325 may further include a display driver 330. Display driver 330 may be configured to control display processor 127. For example, display driver 330 may cause display processor 127 to synthesize a frame and send data of the frame to a display.

[0046] Display processor 127 includes display control block 335 and display interface 340. Display processor 127 may be configured to manipulate functions of display 131 (e.g., based on input received from display driver 330). Display control block 335 may be further configured to output image frames to display 131 via display interface 340. In some examples, display control block 335 may additionally or alternatively perform post-processing of image data provided based on execution of processing unit 120 on system memory 124.

[0047] The display interface 340 may be configured to cause the display 131 to display an image frame. The display interface 340 may output image data to the display 131 according to an interface protocol such as, for example, MIPIDSI (Mobile Industry Processor Interface, Display Serial Interface). That is, the display 131 may be configured according to the MIPIDSI standard. The MIPIDSI standard supports a video mode and a command mode. In an example where the display 131 operates in the video mode, the display processor 127 may continuously refresh the graphics content of the display 131. For example, the entire graphics content may be refreshed in each refresh cycle (e.g., line by line). In an example where the display 131 operates in the command mode, the display processor 127 may write the graphics content of the frame to the buffer 350.

[0048] In some such examples, display processor 127 may not continuously refresh the graphics content of display 131. Instead, display processor 127 may use vertical synchronization (Vsync) pulses to coordinate the rendering and consumption of graphics content at buffer 350. For example, when a Vsync pulse is generated, display processor 127 may output new graphics content to buffer 350. Thus, the generation of a Vsync pulse may indicate that current graphics content has been rendered at buffer 350.

[0049] Based on the display controller 345, the display client 355, and the buffer 350, the frame is displayed at the display 131. The display controller 345 may receive image data from the display interface 340 and store the received image data in the buffer 350. In some examples, the display controller 345 may output the image data stored in the buffer 350 to the display client 355. Thus, the buffer 350 may represent a local memory to the display 131. In some examples, the display controller 345 may output the image data received from the display interface 340 directly to the display client 355.

[0050] The display client 355 may be associated with a touch panel that senses interactions between a user and the display 131. When a user interacts with the display 131, one or more sensors in the touch panel may output a signal to the display controller 345 indicating which of the one or more sensors has sensor activity, the duration of the sensor activity, the pressure applied to the one or more sensors, etc. The display controller 345 may use the sensor output to determine the manner in which the user is interacting with the display 131. The display 131 may further be associated with / include other devices that operate in conjunction with the display client 355, such as a camera, a microphone, and / or a speaker.

[0051] Some processing techniques of device 104 may be performed through three stages (e.g., stage 1: rendering stage; stage 2: composition stage; and stage 3: display / delivery stage). However, other processing techniques may combine the composition stage and the display / delivery stage into a single stage, such that the processing technique may be performed based on a total of two stages (e.g., stage 1: rendering stage; and stage 2: composition / display / delivery stage). During the rendering stage, GPU 310 may process a content buffer based on the execution of an application that generates content on a pixel-by-pixel basis. During the composition and display stages, pixel elements may be assembled to form a frame that is delivered to a physical display panel / subsystem (e.g., display 131) that displays the frame.

[0052] Instructions executed by the CPU (e.g., software instructions) or instructions executed by the display processor may cause the CPU or display processor to search and / or generate a synthesis strategy for synthesizing frames based on dynamic priorities and runtime statistics associated with one or more synthesis strategy groups. A frame to be displayed by a physical display device (such as a display panel) may include multiple layers. In addition, the synthesis of a frame may be based on combining multiple layers into a frame (e.g., based on a frame buffer). After combining multiple layers into a frame, the frame may be provided to a display panel for display on the display panel. The process of combining each layer in a plurality of layers into a frame may be referred to as synthesis, frame synthesis, synthesis process, synthesis program, etc.

[0053] The frame synthesis process or synthesis strategy may correspond to a technique for synthesizing different layers in a plurality of layers into a single frame. The plurality of layers may be stored in a double data rate (DDR) memory. Each layer in the plurality of layers may further correspond to a separate buffer. A synthesizer or hardware synthesizer (HWC) associated with a block or function may determine the input of each layer / buffer and perform a frame synthesis process to generate an output indicating a synthesized frame. That is, the input may be a layer, and the output may be a frame synthesis process for synthesizing a frame to be displayed on a display panel.

[0054] Some aspects of display processing may utilize different types of mask layers, such as shape mask layers. A mask layer is a layer that can represent a portion of a display or display panel. For example, an area of ​​a mask layer may correspond to an area of ​​a display, but the entire mask layer may depict a portion of the content that is actually displayed at the display or panel. For example, a mask layer may include a top portion and a bottom portion of a display area, but the middle portion of the mask layer may be empty. In some examples, there may be multiple mask layers to represent different portions of the display area. In addition, for certain portions of the display area, the contents of different mask layers may overlap with each other. Accordingly, a mask layer may represent a portion of a display area that may or may not overlap with other mask layers.

[0055] Figure 44 is a diagram illustrating an example mask layer for display processing. More specifically, diagram 400 depicts one type of mask layer that can represent portions of a display panel. Figure 4 As shown, diagram 400 includes a mask layer 402, which includes a top region 410 and a bottom region 420. The top region 410 includes regions 411, 412, 413, and 414, and the bottom region 420 includes regions 421, 422, 423, and 424. Figure 4 As depicted, mask layer 402 may represent different areas displayed on the display panel.

[0056] Some types of displays may use a certain type of mask layer (e.g., a shape mask layer) to reshape the display frame. For example, the mask layer may reshape the display frame to provide a more optimized visual shape at the display panel (e.g., improved rounded corners, improved circular shape, improved rectangular shape, etc.). These types of mask layers (e.g., shape mask layers) may be processed by software (e.g., graphics processing unit (GPU) software or central processing unit (CPU) software), or by hardware (e.g., display processing unit (DPU) hardware). In addition, these mask layers may be processed by other specific types of hardware logic modules (e.g., modules in display driver integrated circuits (DDICs) or bridge chips). In some aspects, these types of mask layers (e.g., shape mask layers) may be based on a certain unit, such as a pixel. That is, the shape generation base unit of the shape mask layer may be a single pixel.

[0057] Some aspects of display processing may utilize multiple different locations for display cameras. For example, an under-display camera (i.e., a camera located below at least one display layer in a device) is an example of a camera location design in modern smartphones and mobile handset devices. The location of the display camera may be selected based on multiple different categories, such as convenience and visual quality improvement. Additionally, in order to optimize camera visual quality, the camera exposure time and the display light emission time may be time division multiplexed (TDM). By time division multiplexing the camera exposure time and the display light emission time, this may help optimize the camera visual quality by reducing the amount of display light emission interference. This may be achieved by utilizing a fixed time division duplex (TDD) duty cycle for both the camera exposure time (i.e., camera duty cycle) and the display light emission time (i.e., display duty cycle). For example, the camera duty cycle may be a fixed camera TDD duty cycle, and the display duty cycle may be a fixed display TDD duty cycle.

[0058] Figure 5 5 is a diagram illustrating an example of display timing and camera timing at a display device. More specifically, diagram 500 depicts a display device 502 including a display / camera unified timing controller 510. Figure 5 As shown, diagram 500 includes display device 502 , area 504 , display / camera unified timing controller 510 , under-display camera timing controls 520 , and display light emission timing controls 530 . Figure 5 The example display timing (i.e., display light emission time and / or display duty cycle) and the camera timing (i.e., camera exposure time and / or camera duty cycle) can be synchronized under the display / camera unified timing controller 510. That is, Figure 5 Depicts a fixed camera duty cycle and a fixed display duty cycle that are unified and synchronized together. Figure 5 As depicted, below-display camera timing controls 520 are located proximate area 504 in display device 502 (eg, the location of a below-display camera in display device 502 ).

[0059] As indicated above, the camera duty cycle and the display duty cycle can be finely tuned to a TDD duty cycle. For example, the camera duty cycle and the display duty cycle can be finely tuned and fixed in a predetermined location such as a laboratory. In addition, the camera duty cycle and the display duty cycle can be fixed to a constant time period (i.e., a constant duty cycle). This type of constant duty cycle can be relatively easy to implement, but it may not be an ideal solution because both the display light emission time and the camera exposure time may need to be increased or reduced in order to produce improved visual quality. In fact, the constant duty cycle may not allow dynamic configuration of the display light emission time and / or camera exposure time. For example, the camera may need an increased exposure time, while the display may need an increased light emission time in order to increase the display brightness. Moreover, the display may need a reduced light emission time in order to reduce display burnout and aging (e.g., organic light emitting diode (OLED) burnout and aging). However, in some scenarios (e.g., indoor environments, outdoor environments, and dark luminous scenarios), a fixed TDD duty cycle may not cause damage to both the camera and the display.

[0060] Figure 6 The present invention includes diagrams 600, 620, and 640 illustrating examples of different fixed display light emission times and camera exposure times. More specifically, diagrams 600 / 620 / 640 show reduced camera exposure times and corresponding increased display light emission times. Figure 6 As shown, diagram 600 includes a display light emission time 601 (i.e., display duty cycle) and a camera exposure time 611 (i.e., camera duty cycle). Display light emission time 601 is a fixed display light emission time including a relatively short display duty cycle, and camera exposure time 611 is a fixed camera exposure time including a relatively long camera duty cycle. Figure 6As further shown, diagram 620 includes display light emission time 621 (i.e., display duty cycle) and camera exposure time 631 (i.e., camera duty cycle). Display light emission time 621 is a fixed display light emission time, including a display duty cycle that is approximately equal to the camera duty cycle of camera exposure time 631 (i.e., fixed camera exposure time). Diagram 620 also shows that display light emission time 621 corresponds to the display sub-region light emission of a specific frame (e.g., frame M), and camera exposure time 631 corresponds to the camera exposure of a specific frame (e.g., frame N). Figure 6 As further shown, diagram 640 includes display light emission time 641 (i.e., display duty cycle) and camera exposure time 651 (i.e., camera duty cycle). Display light emission time 641 is a fixed display light emission time including a relatively long display duty cycle, and camera exposure time 651 is a fixed camera exposure time including a relatively short camera duty cycle.

[0061] As indicated above, one challenge of working with certain types of display cameras (e.g., cameras below the display) is that the visual quality of the camera and display may not be ideal when time division multiplexing is utilized. For example, when the display is turned on, in order for the display to work properly, the camera may need to be turned off. Similarly, in order for the camera to work properly and when the camera is activated, the display may need to be turned off. In addition, due to the switching between the activation of the display and the activation of the camera, the camera may not receive enough exposure time and the display may not receive enough display light emission time. Therefore, based on the above, it may be beneficial to utilize dynamic or adjustable camera duty cycle and display duty cycle. For example, it may be beneficial to utilize a camera duty cycle as an adjustable time division duplex (TDD) camera duty cycle and a display duty cycle as an adjustable TDD display duty cycle. It may also be beneficial to utilize an adjustable switching frequency of the camera and / or display.

[0062] Aspects of the present disclosure may utilize dynamic or adjustable camera duty cycles and display duty cycles. For example, aspects of the present disclosure may utilize a camera duty cycle as an adjustable time division duplex (TDD) camera duty cycle and a display duty cycle as an adjustable TDD display duty cycle. Additionally, in some instances, aspects of the present disclosure may utilize an adjustable switching frequency of a camera and / or display. For example, aspects of the present disclosure may utilize an adjustable switching frequency based on an ambient light sensor (ALS) value of a camera runtime and a display runtime. That is, the aspects presented herein may utilize an adaptive TDD regional duty cycle for ambient light and / or exposure time. Moreover, the aspects presented herein may utilize an adaptive display runtime calibration.

[0063] In some instances, aspects of the present disclosure may utilize the TDD duty cycle of the camera and the TDD duty cycle of the display, which are dynamically changed together with the ambient light sensor (ALS) value. The ALS value may be obtained from an ambient light sensor (e.g., an ambient light sensor located in a camera) or a camera sensor. Before the camera starts capturing a picture or starts previewing, the various aspects presented herein may obtain the latest ALS value from the ALS sensor. In addition, before the camera session starts, the display duty cycle may be a certain value (e.g., a value of 100%). Depending on the current ALS value, the various aspects presented herein may determine the camera duty cycle and the display duty cycle (e.g., the display startup duty cycle). After determining the camera duty cycle and the display duty cycle, the various aspects presented herein may start or turn on the camera sensor. In some environments (e.g., outdoor environments), the camera may have a duty cycle that is reduced compared to the duty cycle of the display (i.e., the display may have a duty cycle that is increased compared to the camera). In other environments (eg, indoor environments), the camera may have an increased duty cycle compared to the duty cycle of the display (ie, the display may have a reduced duty cycle compared to the camera).

[0064] In some aspects, during the camera run time, the various aspects presented herein may dynamically change the camera duty cycle and / or the display duty cycle. For example, the various aspects presented herein may dynamically change the camera TDD duty cycle and / or the display TDD duty cycle according to the average picture exposure time. Additionally, a margin time may also be added after each display is switched from on to off (i.e., from on display to off display). The margin time may be a camera margin time and / or a display margin time. In addition, the camera margin time may be inserted before the camera on time and / or the display margin time may be inserted before the display on time. In addition, the margin time (i.e., the camera margin time and / or the display margin time) may be changed together with the dynamic TDD cycle. In some instances, the margin time may be tuned or adjusted before the camera on time or the display on time (e.g., the margin time coefficient may be tuned in the lab). For example, the display cycle may be 30% of the cycle, and the camera cycle may be 65% of the cycle. Thus, in some examples, there may be some timing margin for switching (e.g., 5% timing margin for switching). Additionally, if the display cycle is 10% of the cycle and the camera cycle is 88% of the cycle, there may be a 2% timing margin for switching.

[0065] In some examples, along with the adjustment of the display duty cycle, the display color and display brightness can be adjusted. To compensate for this adjustment, the various aspects presented herein can increase / decrease certain pixel values ​​(e.g., pixel brightness values ​​or pixel color values). For example, the pixel brightness / color values ​​can be adjusted when the camera is turned off to compensate for any luminance loss. In some aspects, such as to shift pixel color values, the various aspects presented herein can use different parameters (e.g., color parameters and gamma calibration parameters) to calibrate the display. To shift the color values, aspects presented herein may map the color values ​​from one color space to another color space (e.g., mapping the color values ​​from a red (r) green (g) blue (b) (RGB) color space to an R'G'B' color space. These color spaces may be mapped using a three-dimensional (3D) lookup table (LUT). For example, a 3D LUT may map a certain color space value (e.g., 100, 100, 121) to another color space value (e.g., 99, 03, 106). When the color space values ​​are mapped using a 3D LUT, for a certain 3D LUT (e.g., 3D LUT 0), a duty cycle calibration parameter may be set to a certain value (e.g., a 20% duty cycle calibration parameter). Additionally, for another 3D LUT (e.g., 3D LUT 1), the duty cycle calibration parameter may be set to another value (e.g., a 50% duty cycle calibration parameter).

[0066] In some aspects, in order to shift the pixel brightness value, the various aspects presented herein may use certain values ​​(e.g., brightness adjustment ratios) to calibrate the display. The aspects presented herein may also utilize different gamma tables to perform calibration. For a certain gamma table, the various aspects presented herein may utilize different pixel brightness values ​​to perform calibration. For example, for gamma table A, the various aspects presented herein may perform calibration based on 20% of the pixel brightness value and the brightness adjustment ratio. In addition, for gamma table B, the various aspects presented herein may perform calibration based on 50% of the pixel brightness value and the brightness adjustment ratio. Moreover, in order to dynamically adjust the duty cycle (e.g., the camera TDD duty cycle and the display TDD duty cycle), the various aspects presented herein may apply different calibration parameters to the display. For example, in order to dynamically adjust the duty cycle, the various aspects presented herein may apply three-dimensional (3D) lookup table (LUT) parameters, brightness adjustment ratio parameters, and / or gamma table parameters.

[0067] Figure 7 The present invention includes diagrams 700, 720, and 740 illustrating examples of adjustable display light emission time and adjustable camera exposure time. More specifically, diagrams 700 / 720 / 740 show a reduced dynamic camera exposure time and a corresponding increased dynamic display light emission time. Figure 7As shown, diagram 700 includes display light emission time 701 (i.e., display duty cycle), display light emission time 702, display light emission time 703, and display light emission time 704. In addition, diagram 700 includes camera exposure time 711 (i.e., camera duty cycle), camera exposure time 712, camera exposure time 713, and camera exposure time 714. Display light emission time 701-704 is an adjustable display light emission time including a relatively short display duty cycle, and camera exposure time 711-714 is an adjustable camera exposure time including a relatively long camera duty cycle. For example, diagram 700 includes a long exposure time 706 and a low ALS value 708. In addition, since the camera exposure time is adjustable, a margin time 710 is inserted before each of the camera exposure times 711 to 714. The margin time 710 can allow the display to be turned off before the camera is activated, and allow the camera to be turned off before the display is activated.

[0068] like Figure 7 As further shown, diagram 720 includes display light-emitting time 721 (i.e., display duty cycle), display light-emitting time 722, display light-emitting time 723, and display light-emitting time 724. In addition, diagram 720 includes camera exposure time 731 (i.e., camera duty cycle), camera exposure time 732, camera exposure time 733, and camera exposure time 734. Display light-emitting times 721-724 are adjustable display light-emitting times, including medium display duty cycles greater than display light-emitting times 701-704. For example, diagram 720 includes medium exposure time 726 and medium ALS value 728. Moreover, since the camera exposure time is adjustable, margin time 730 is inserted before each of the camera exposure times 731 to 734. Margin time 730 allows the display to be turned off before the camera is activated, and allows the camera to be turned off before the display is activated. As Figure 7 As further shown, diagram 740 includes display light time 741 (i.e., display duty cycle), display light time 742, display light time 743, and display light time 744. In addition, diagram 740 includes camera exposure time 751 (i.e., camera duty cycle), camera exposure time 752, camera exposure time 753, and camera exposure time 754. Display light time 741-744 is an adjustable display light time, including a relatively long display duty cycle greater than display light time 721-724. For example, diagram 740 includes a short exposure time 746 and a high ALS value 748.

[0069] Additionally, in some examples, the aspects presented herein may include multiple different timing controls, such as a display zone TDD timing control. In a display zone TDD timing control, the display zone on top of the camera may have a separate TDD timing controller. In addition, these zones may have different display TDD duty cycles compared to the global display timing controller. In some examples, specific zones may follow the TDD cycle of a certain type of camera (e.g., a camera below the display) and may be affected by the TDD timing control. However, other global display zones may not be affected by the TDD timing control. This can help avoid global display flickering and color shifting.

[0070] Figure 8 8 is a diagram illustrating an example of display timing and camera timing at a display device. More specifically, diagram 800 depicts a display device 802 including a regional TDD duty cycle timing controller 810. Figure 8 As shown, diagram 800 includes a display device 802 , a region 804 , a regional TDD duty cycle timing controller 810 , an under-display camera timing control 820 , and a global display duty cycle timing controller 830 . Figure 8 The example display timing (i.e., display light emission time or display duty cycle) and camera timing (i.e., camera exposure time or camera duty cycle) may be adjustable. That is, Figure 8 An adjustable camera duty cycle and an adjustable display duty cycle are depicted. The adjustable camera duty cycle and the adjustable display duty cycle may be controlled by a regional TDD duty cycle timing controller 810 and a global display duty cycle timing controller 830 . Figure 8 An example of a TDD duty cycle 812 corresponding to the regional TDD duty cycle timing controller 810 is also shown. Figure 8 As depicted, below-display camera timing controls 820 are located proximate area 804 in display device 802 (eg, the location of a below-display camera in display device 802 ).

[0071] As mentioned herein, the various aspects presented herein may utilize ALS values ​​to determine or initiate duty cycles. The aspects presented herein may also utilize exposure time or camera exposure time to determine the run time duty cycle. In addition, the various aspects of the present disclosure may utilize dynamic margin time adjustment along with duty cycle adjustment. The various aspects of the present disclosure may also utilize dynamic display calibration for different TDD duty cycles. Moreover, the various aspects presented herein may utilize regional TDD display timing controllers and global display timing controllers.

[0072] Various aspects of the present disclosure may include multiple benefits or advantages. For example, various aspects of the present disclosure may optimize the visual quality of both the camera and the display. By doing so, the various aspects presented herein may include the ability to match the lighting environment based on the camera visual quality and the display visual quality. For example, for certain environments where the display may need to be brighter (e.g., outdoor environments), the various aspects presented herein may allow more time for the display lighting time and less time for the camera exposure time. For other environments where the camera may need more exposure time (e.g., indoor environments), the various aspects presented herein may allow more time for the camera exposure time and less time for the display lighting time. Therefore, the various aspects presented herein may provide adjustable camera exposure time and adjustable display lighting time.

[0073] Fig. 9 FIG. 9 is a communication flow diagram 900 showing a process according to one or more techniques of the present disclosure. Fig. 9 As shown, diagram 900 includes example communications between a DPU 902 (or other display processor), a camera 904, and memory 906 (eg, device storage), in accordance with one or more techniques of this disclosure.

[0074] At 910, the DPU 902 may obtain an ambient light sensor (ALS) value for at least one of a camera runtime or a display runtime (eg, obtain an ALS value 912 from the camera 904). The ALS value may be obtained from an ALS sensor in the camera or a camera sensor in the camera.

[0075] At 920, the DPU 902 may calculate at least one of a camera duty cycle of the camera, a display duty cycle of the display, or a switching frequency based on the ALS value. The camera may be an under-display camera in the display or an over-display camera in the display, or the camera may be adjacent to the display.

[0076] At 930, the DPU 902 may calculate at least one of a camera margin time of the camera, a camera phase of the camera, a display margin time of the display, or a display phase of the display, wherein at least one of a camera duty cycle, a display duty cycle, or a switching frequency is adjusted based on at least the calculated camera margin time, the calculated camera phase, the calculated display margin time, or the calculated display phase.

[0077] At 940, the DPU 902 may activate a camera sensor during a camera runtime or a display module during a display runtime based on at least one of a camera duty cycle, a display duty cycle, a switching frequency, a camera margin time, or a display margin time, wherein at least one of the camera duty cycle, the display duty cycle, or the switching frequency is adjusted based on the activated camera sensor or the activated display module. The camera duty cycle may correspond to the camera sensor and the display duty cycle may correspond to the display module, and the camera sensor may be associated with a camera timing controller and the display module may be associated with a display timing controller. The camera timing controller may be a time division duplex (TDD) camera timing controller, and the display timing controller may be at least one of a regional TDD display timing controller or a global display timing controller.

[0078] At 950, the DPU 902 may adjust at least one of a camera duty cycle, a display duty cycle, or a switching frequency based on at least one of a camera run time, a display run time, an ALS value, a camera margin time, or a display margin time. In some aspects, the camera duty cycle may be adjusted based on a combination of a camera run time and a camera margin time. The combination of the camera run time and the camera margin time may include inserting a camera margin time before the camera run time based on an average exposure time during the camera run time. In some instances, the display duty cycle may be adjusted based on a combination of a display run time and a display margin time. The combination of the display run time and the display margin time may include inserting a display margin time before the display run time based on an average light emission time during the display run time.

[0079] In some aspects, the camera margin time may be based on the activation of the camera or the deactivation of the camera, and the display margin time may be based on the activation of the display or the deactivation of the display. In addition, at least one of the camera duty cycle, the display duty cycle, or the switching frequency may be adjusted based on one or more calibration parameters, and the one or more calibration parameters may include at least one of a three-dimensional (3D) lookup table (LUT) parameter, a brightness adjustment ratio parameter, or a gamma table parameter. The camera duty cycle may be a time division duplex (TDD) camera duty cycle, and the display duty cycle may be a TDD display duty cycle. In addition, at least one of the camera duty cycle, the display duty cycle, or the switching frequency may be adjusted by a display processing unit (DPU) or a display processor.

[0080] At 960, the DPU 902 may modify at least one of a color value of the display or a brightness value of the display based on at least one of the activation of the display, the deactivation of the display, the activation of the camera, or the deactivation of the camera.

[0081] At 970, the DPU 902 may store data associated with at least one of the adjusted camera duty cycle, the adjusted display duty cycle, or the adjusted switching frequency in a memory or buffer (eg, store data 972 in memory 906).

[0082] Fig.10 1000 is a flowchart of an example display processing method according to one or more techniques of the present disclosure. The method may be performed by a DPU, a DDIC, an apparatus for display processing, a display processor, a wireless communication device, and / or a combination thereof. Figures 1 to 9 The examples may be performed using any device that can perform display processing.

[0083] At 1002, the DPU may obtain an ambient light sensor (ALS) value for at least one of a camera runtime or a display runtime, such as in conjunction with Figures 1 to 9 For example, Fig. 9 As described in 910, DPU 902 may obtain an ambient light sensor (ALS) value of at least one of the camera operating time or the display operating time. In addition, step 1002 may be performed by Figure 1 The ALS value may be obtained from an ALS sensor in the camera or a camera sensor in the camera.

[0084] At 1004, the DPU may calculate at least one of a camera duty cycle of the camera, a display duty cycle of the display, or a switching frequency based on the ALS value, such as in combination with Figures 1 to 9 For example, Fig. 9 As described in 920, DPU 902 may calculate at least one of the camera duty cycle of the camera, the display duty cycle of the display, or the switching frequency based on the ALS value. In addition, step 1004 may be performed by Figure 1 The display processor 127 in the display is executed. The camera can be a camera below the display in the display or a camera above the display in the display, or the camera can be adjacent to the display.

[0085] At 1010, the DPU may adjust at least one of a camera duty cycle, a display duty cycle, or a switching frequency based on at least one of a camera run time, a display run time, an ALS value, a camera margin time, or a display margin time, such as in combination with Figures 1 to 9 For example, Fig. 9 As described in 950, DPU 902 may adjust at least one of the camera duty cycle, the display duty cycle, or the switching frequency based on at least one of the camera operating time, the display operating time, the ALS value, the camera margin time, or the display margin time. In addition, step 1010 may be performed by Figure 1The display processor 127 in the display device 100 is executed. In some aspects, the camera duty cycle can be adjusted based on a combination of a camera run time and a camera margin time. The combination of the camera run time and the camera margin time may include inserting the camera margin time before the camera run time based on an average exposure time during the camera run time. In some instances, the display duty cycle can be adjusted based on a combination of a display run time and a display margin time. The combination of the display run time and the display margin time may include inserting the display margin time before the display run time based on an average light emission time during the display run time.

[0086] In some aspects, the camera margin time may be based on the activation of the camera or the deactivation of the camera, and the display margin time may be based on the activation of the display or the deactivation of the display. In addition, at least one of the camera duty cycle, the display duty cycle, or the switching frequency may be adjusted based on one or more calibration parameters, and the one or more calibration parameters may include at least one of a three-dimensional (3D) lookup table (LUT) parameter, a brightness adjustment ratio parameter, or a gamma table parameter. The camera duty cycle may be a time division duplex (TDD) camera duty cycle, and the display duty cycle may be a TDD display duty cycle. In addition, at least one of the camera duty cycle, the display duty cycle, or the switching frequency may be adjusted by a display processing unit (DPU) or a display processor.

[0087] Fig.11 1100 is a flowchart of an example method of display processing according to one or more techniques of the present disclosure. The method may be performed by a DPU, a DDIC, an apparatus for display processing, a display processor, a wireless communication device, and / or a combination thereof. Figures 1 to 9 The examples may be performed using any device that can perform display processing.

[0088] At 1102, the DPU may obtain an ambient light sensor (ALS) value for at least one of a camera runtime or a display runtime, such as in conjunction with Figures 1 to 9 For example, Fig. 9 As described in step 910, DPU 902 may obtain an ambient light sensor (ALS) value of at least one of the camera operating time or the display operating time. In addition, step 1102 may be performed by Figure 1 The ALS value may be obtained from an ALS sensor in the camera or a camera sensor in the camera.

[0089] At 1104, the DPU may calculate at least one of a camera duty cycle of the camera, a display duty cycle of the display, or a switching frequency based on the ALS value, such as in combination with Figures 1 to 9 For example, Fig. 9As described in 920, DPU 902 may calculate at least one of the camera duty cycle of the camera, the display duty cycle of the display, or the switching frequency based on the ALS value. In addition, step 1104 may be performed by Figure 1 The display processor 127 in the display is executed. The camera can be a camera below the display in the display or a camera above the display in the display, or the camera can be adjacent to the display.

[0090] At 1106, the DPU may calculate at least one of a camera margin time for the camera, a camera phase for the camera, a display margin time for the display, or a display phase for the display, wherein at least one of a camera duty cycle, a display duty cycle, or a switching frequency is adjusted based on at least the calculated camera margin time, the calculated camera phase, the calculated display margin time, or the calculated display phase, as combined with Figures 1 to 9 For example, Fig. 9 As described in 930, the DPU 902 may calculate at least one of a camera margin time of a camera, a camera phase of a camera, a display margin time of a display, or a display phase of a display, wherein at least one of a camera duty cycle, a display duty cycle, or a switching frequency is adjusted based on at least the calculated camera margin time, the calculated camera phase, the calculated display margin time, or the calculated display phase. In addition, step 1106 may be performed by Figure 1 The display processor 127 in is executed.

[0091] At 1108, the DPU may activate a camera sensor within the camera runtime or activate a display module within the display runtime based on at least one of a camera duty cycle, a display duty cycle, a switching frequency, a camera margin time, or a display margin time, wherein at least one of the camera duty cycle, the display duty cycle, or the switching frequency is adjusted based on the activated camera sensor or the activated display module, such as in combination with Figures 1 to 9 For example, Fig. 9 As described in 940, DPU 902 may activate the camera sensor during the camera operation time or activate the display module during the display operation time based on at least one of the camera duty cycle, the display duty cycle, the switching frequency, the camera margin time, or the display margin time, wherein at least one of the camera duty cycle, the display duty cycle, or the switching frequency is adjusted based on the activated camera sensor or the activated display module. In addition, step 1108 may be performed by Figure 1The display processor 127 in the display controller 126 may be executed. The camera duty cycle may correspond to the camera sensor and the display duty cycle may correspond to the display module, and the camera sensor may be associated with a camera timing controller and the display module may be associated with a display timing controller. The camera timing controller may be a time division duplex (TDD) camera timing controller, and the display timing controller may be at least one of a regional TDD display timing controller or a global display timing controller.

[0092] At 1110, the DPU may adjust at least one of a camera duty cycle, a display duty cycle, or a switching frequency based on at least one of a camera run time, a display run time, an ALS value, a camera margin time, or a display margin time, such as in combination with Figures 1 to 9 For example, Fig. 9 As described in 950, DPU 902 may adjust at least one of the camera duty cycle, the display duty cycle, or the switching frequency based on at least one of the camera operating time, the display operating time, the ALS value, the camera margin time, or the display margin time. In addition, step 1110 may be performed by Figure 1 The display processor 127 in the display device 100 is executed. In some aspects, the camera duty cycle can be adjusted based on a combination of a camera run time and a camera margin time. The combination of the camera run time and the camera margin time may include inserting the camera margin time before the camera run time based on an average exposure time during the camera run time. In some instances, the display duty cycle can be adjusted based on a combination of a display run time and a display margin time. The combination of the display run time and the display margin time may include inserting the display margin time before the display run time based on an average light emission time during the display run time.

[0093] In some aspects, the camera margin time may be based on the activation of the camera or the deactivation of the camera, and the display margin time may be based on the activation of the display or the deactivation of the display. In addition, at least one of the camera duty cycle, the display duty cycle, or the switching frequency may be adjusted based on one or more calibration parameters, and the one or more calibration parameters may include at least one of a three-dimensional (3D) lookup table (LUT) parameter, a brightness adjustment ratio parameter, or a gamma table parameter. The camera duty cycle may be a time division duplex (TDD) camera duty cycle, and the display duty cycle may be a TDD display duty cycle. In addition, at least one of the camera duty cycle, the display duty cycle, or the switching frequency may be adjusted by a display processing unit (DPU) or a display processor.

[0094] At 1112, the DPU may modify at least one of a color value of the display or a brightness value of the display based on at least one of activation of the display, deactivation of the display, activation of the camera, or deactivation of the camera, such as in conjunction with Figures 1 to 9 For example, Fig. 9 As described in 960, DPU 902 may modify at least one of the color value of the display or the brightness value of the display based on at least one of the activation of the display, the deactivation of the display, the activation of the camera, or the deactivation of the camera. In addition, step 1112 may be performed by Figure 1 The display processor 127 in is executed.

[0095] At 1114, the DPU may store data associated with at least one of the adjusted camera duty cycle, the adjusted display duty cycle, or the adjusted switching frequency in a memory or buffer, such as in conjunction with Figures 1 to 9 For example, Fig. 9 As described in 970, DPU 902 may store data associated with at least one of the adjusted camera duty cycle, the adjusted display duty cycle, or the adjusted switching frequency in a memory or buffer. In addition, step 1114 may be performed by Figure 1 The display processor 127 in is executed.

[0096] In various configurations, a method or apparatus for display processing is provided. The apparatus may be a DPU, a DDIC, a display processor, or some other processor that can perform display processing. In various aspects, the apparatus may be a display processor 127 within the device 104, or may be some other hardware within the device 104 or another device. The apparatus (e.g., the display processor 127) may include: a component for obtaining an ambient light sensor (ALS) value for at least one of a camera run time or a display run time; a component for calculating at least one of a camera duty cycle of a camera, a display duty cycle of a display, or a switching frequency based on the ALS value; a component for adjusting at least one of a camera duty cycle, a display duty cycle, or a switching frequency based on at least one of the camera run time, the display run time, the ALS value, a camera margin time, or a display margin time; a component for activating a camera sensor within the camera run time or activating a display module within the display run time based on at least one of the camera duty cycle, the display duty cycle, the switching frequency, the camera margin time, or the display margin time, wherein at least one of the camera duty cycle, the display duty cycle, or the switching frequency One is adjusted based on an activated camera sensor or an activated display module; a component for calculating at least one of a camera margin time of a camera, a camera phase of a camera, a display margin time of a display, or a display phase of a display, wherein at least one of a camera duty cycle, a display duty cycle, or a switching frequency is adjusted based on at least the calculated camera margin time, the calculated camera phase, the calculated display margin time, or the calculated display phase; a component for modifying at least one of a color value of a display or a brightness value of a display based on at least one of activation of a display, deactivation of a display, activation of a camera, or deactivation of a camera; and a component for storing data associated with at least one of the adjusted camera duty cycle, the adjusted display duty cycle, or the adjusted switching frequency in a memory or a buffer.

[0097] The subject matter described herein can be implemented to achieve one or more benefits or advantages. For example, the display processing techniques described can be used by a DPU, a display processor, or some other processor that can perform display processing to implement the display optimized dynamic configuration techniques described herein. This can also be implemented at a low cost compared to other display processing techniques. Moreover, the display processing techniques herein can improve or accelerate data processing or execution. In addition, the display processing techniques herein can improve resource or data utilization and / or resource efficiency. Additionally, various aspects of the present disclosure can utilize display optimized dynamic configuration techniques to improve memory bandwidth efficiency and / or increase processing speed at the DPU.

[0098] It should be understood that the specific order or hierarchy of the blocks in the disclosed process / flowchart is merely an illustration of the exemplary method. It should be understood that the specific order or hierarchy of the blocks in the process / flowchart can be rearranged based on design preferences. In addition, some blocks can be combined or omitted. The attached method claims provide the elements of each block in a sample order, but are not meant to be limited to the specific order or hierarchy presented.

[0099] The foregoing description is provided to enable any person skilled in the art to practice the various aspects described herein. Various modifications to these aspects will be apparent to those skilled in the art, and the general principles defined herein may be applied to other aspects. Therefore, the claims are not intended to be limited to the various aspects shown herein, but should be given the full scope consistent with the language of the claims, wherein unless otherwise specified, references to elements in the singular are not intended to mean "one and only one", but rather "one or more". The wording "exemplary" is used herein to mean "used as an example, instance, or illustration". Any aspect described herein as "exemplary" is not necessarily to be construed as being preferred or having advantages over other aspects.

[0100] Unless specifically stated otherwise, the term “some” refers to one or more, and the term “or” may be interpreted as “and / or” if the context does not dictate otherwise. Combinations such as “at least one of A, B, or C,” “one or more of A, B, or C,” “at least one of A, B and C,” “one or more of A, B, and C,” and “A, B, C, or any combination thereof” include any combination of A, B, and / or C, and may include multiple A, multiple B, or multiple C. Specifically, combinations such as “at least one of A, B, or C,” “one or more of A, B, or C,” “at least one of A, B, and C,” “one or more of A, B, and C,” and “A, B, C, or any combination thereof” may be only A, only B, only C, A and B, A and C, B and C, or A and B and C, where any such combination may include one or more members of A, B, or C. All structural and functional equivalents of the elements of the various aspects described throughout this disclosure that are known or will later become known to those of ordinary skill in the art are expressly incorporated herein by reference and are intended to be covered by the claims. Moreover, regardless of whether such disclosure is explicitly recited in the claims, nothing disclosed herein is intended to be disclosed to the public. Words such as "module," "mechanism," "element," and "device" are not substituted for the word "component." Therefore, no claim element will be understood to be a component plus function unless the element is explicitly stated using the phrase "component for..."

[0101] In one or more examples, the functionality described herein may be implemented in hardware, software, firmware, or any combination thereof. For example, although the term "processing unit" is used throughout this disclosure, such processing unit may be implemented in hardware, software, firmware, or any combination thereof. If any functionality, processing unit, technique, or other module described herein is implemented in software, the functionality, processing unit, technique, or other module described herein may be stored or sent as one or more instructions or codes on a computer-readable medium.

[0102] According to the present disclosure, the term "or" may be understood as "and / or" in the absence of a context that dictates otherwise. Additionally, while phrases such as "one or more" or "at least one" may have been used for some features disclosed herein but not for other features, in the absence of additional context dictates, features that do not use such language may be understood to have such implicit meanings.

[0103] In one or more examples, the functions described herein may be implemented in hardware, software, firmware, or any combination thereof. For example, although the term "processing unit" is used throughout this disclosure, such processing unit may be implemented in hardware, software, firmware, or any combination thereof. If any function, processing unit, technique, or other module described herein is implemented in software, the function, processing unit, technique, or other module described herein may be stored on a computer-readable medium or sent on a computer-readable medium as one or more instructions or codes. Computer-readable media may include computer data storage media and communication media, including any media that facilitates the transfer of computer programs from one place to another. In this way, computer-readable media may generally correspond to (1) a non-transient tangible computer-readable storage medium or (2) a communication medium such as a signal or carrier wave. Data storage media may be any available medium that can be accessed by one or more computers or one or more processors to extract instructions, codes, and / or data structures for implementing the techniques described in this disclosure. As an example and not limitation, such computer-readable media may include RAM, ROM, EEPROM, CD-ROM, or other optical disk storage devices, magnetic disk storage devices, or other magnetic storage devices. Disk and disc as used herein include compact disc (CD), laser disc, optical disc, digital versatile disc (DVD), floppy disk and Blu-ray disc, where disks usually reproduce data magnetically, while discs reproduce data optically using lasers. Combinations of the above should also be included within the scope of computer-readable media. A computer program product may include a computer-readable medium.

[0104] The code may be executed by one or more processors, such as one or more digital signal processors (DSPs), general-purpose microprocessors, application-specific integrated circuits (ASICs), arithmetic logic units (ALUs), field programmable logic arrays (FPGAs), or other equivalent integrated or discrete logic circuits. Accordingly, the term "processor" as used herein may refer to any of the above structures or any other structure suitable for implementing the techniques described herein. In addition, these techniques may be fully implemented in one or more circuits or logic elements.

[0105] The technology of the present disclosure can be implemented in a variety of devices or apparatuses, including wireless mobile phones, integrated circuits (ICs) or IC sets (e.g., chip sets). Various components, modules or units are described in the present disclosure to emphasize the functional aspects of devices configured to perform the disclosed technology, but they do not necessarily need to be implemented by different hardware units. Specifically, as described above, the various units can be combined in any hardware unit, or provided by a collection of interoperable hardware units (including one or more processors as described above) in combination with suitable software and / or firmware. Accordingly, the term "processor" as used herein may refer to any of the above structures or any other structure suitable for implementing the technology described herein. In addition, these technologies can be fully implemented in one or more circuits or logic elements.

[0106] The following aspects are merely illustrative and may be combined with other aspects or teachings described herein without limitation.

[0107] Aspect 1 is a device for display processing, the device comprising at least one processor, the at least one processor being coupled to a memory and configured to: obtain an ambient light sensor (ALS) value of at least one of a camera operating time or a display operating time; calculate at least one of a camera duty cycle of a camera, a display duty cycle of a display, or a switching frequency based on the ALS value; and adjust at least one of the camera duty cycle, the display duty cycle, or the switching frequency based on at least one of the camera operating time, the display operating time, the ALS value, a camera margin time, or a display margin time.

[0108] Aspect 2 is a device according to Aspect 1, wherein the at least one processor is further configured to: activate a camera sensor within the camera operating time or activate a display module within the display operating time based on at least one of the camera duty cycle, the display duty cycle, the switching frequency, the camera margin time, or the display margin time, wherein at least one of the camera duty cycle, the display duty cycle, or the switching frequency is adjusted based on the activated camera sensor or the activated display module.

[0109] Aspect 3 is an apparatus according to any one of Aspects 1 and 2, wherein the camera duty cycle corresponds to the camera sensor and the display duty cycle corresponds to the display module, and wherein the camera sensor is associated with a camera timing controller and the display module is associated with a display timing controller.

[0110] Aspect 4 is an apparatus according to any one of aspects 1 to 3, wherein the camera timing controller is a time division duplex (TDD) camera timing controller, and wherein the display timing controller is at least one of a regional TDD display timing controller or a global display timing controller.

[0111] Aspect 5 is an apparatus according to any one of Aspects 1 to 4, wherein the at least one processor is further configured to: calculate at least one of the camera margin time of the camera, the camera phase of the camera, the display margin time of the display, or the display phase of the display, wherein at least one of the camera duty cycle, the display duty cycle, or the switching frequency is adjusted based on at least the calculated camera margin time, the calculated camera phase, the calculated display margin time, or the calculated display phase.

[0112] Aspect 6 is an apparatus according to any one of aspects 1 to 5, wherein the camera duty cycle is adjusted based on a combination of the camera operating time and the camera margin time.

[0113] Aspect 7 is an apparatus according to any one of Aspects 1 to 6, wherein the combination of the camera run time and the camera margin time includes: inserting the camera margin time before the camera run time based on an average exposure time during the camera run time.

[0114] Aspect 8 is an apparatus according to any one of aspects 1 to 7, wherein the display duty cycle is adjusted based on a combination of the display operating time and the display margin time.

[0115] Aspect 9 is a device according to any one of Aspects 1 to 8, wherein the combination of the display operating time and the display margin time includes: inserting the display margin time before the display operating time based on the average light emission time during the display operating time.

[0116] Aspect 10 is an apparatus according to any one of Aspects 1 to 9, wherein the at least one processor is further configured to: modify at least one of the color value of the display or the brightness value of the display based on at least one of activation of the display, deactivation of the display, activation of the camera, or deactivation of the camera.

[0117] Aspect 11 is an apparatus according to any one of Aspects 1 to 10, wherein the at least one processor is further configured to: store data associated with at least one of the adjusted camera duty cycle, the adjusted display duty cycle, or the adjusted switching frequency in a memory or a buffer.

[0118] Aspect 12 is an apparatus according to any one of aspects 1 to 11, wherein the camera margin time is based on activation of the camera or deactivation of the camera, and wherein the display margin time is based on activation of the display or deactivation of the display.

[0119] Aspect 13 is a device according to any one of Aspects 1 to 12, wherein at least one of the camera duty cycle, the display duty cycle, or the switching frequency is adjusted based on one or more calibration parameters, and wherein the one or more calibration parameters include at least one of a three-dimensional (3D) lookup table (LUT) parameter, a brightness adjustment ratio parameter, or a gamma table parameter.

[0120] Aspect 14 is an apparatus according to any one of aspects 1 to 13, wherein the camera duty cycle is a time division duplex (TDD) camera duty cycle, and the display duty cycle is a TDD display duty cycle.

[0121] Aspect 15 is an apparatus according to any one of aspects 1 to 14, wherein the ALS value is obtained from an ALS sensor in the camera or a camera sensor in the camera.

[0122] Aspect 16 is an apparatus according to any one of aspects 1 to 15, wherein the camera is a below-display camera in the display or an above-display camera in the display, or wherein the camera is adjacent to the display.

[0123] Aspect 17 is a device according to any one of aspects 1 to 16, wherein at least one of the camera duty cycle, the display duty cycle, or the switching frequency is adjusted by a display processing unit (DPU) or a display processor.

[0124] Aspect 18 is an apparatus according to any one of aspects 1 to 17, wherein the apparatus is a wireless communication device, the apparatus further comprising at least one of an antenna or a transceiver coupled to the at least one processor.

[0125] Aspect 19 is a method for implementing the display processing of any one of aspects 1 to 18.

[0126] Aspect 20 is an apparatus for display processing, the apparatus comprising: means for implementing any one of aspects 1 to 18.

[0127] Aspect 21 is a non-transitory computer readable medium storing computer executable code, which, when executed by at least one processor, causes the at least one processor to implement any one of aspects 1 to 18.

Claims

1. A device for display processing, the device include: Memory; and at least one processor coupled to the memory and configured to: obtaining an ambient light sensor (ALS) value of at least one of a camera operating time or a display operating time; calculating at least one of a camera duty cycle of a camera, a display duty cycle of a display, or a switching frequency based on the ALS value; as well as At least one of the camera duty cycle, the display duty cycle, or the switching frequency is adjusted based on at least one of the camera run time, the display run time, the ALS value, a camera margin time, or a display margin time.

2. The apparatus of claim 1 , wherein the at least one processor is further configured to: A camera sensor is activated within the camera operating time or a display module is activated within the display operating time based on at least one of the camera duty cycle, the display duty cycle, the switching frequency, the camera margin time or the display margin time, wherein at least one of the camera duty cycle, the display duty cycle or the switching frequency is adjusted based on the activated camera sensor or the activated display module.

3. The apparatus of claim 2, wherein the camera duty cycle corresponds to the camera sensor and the display duty cycle corresponds to the display module, and wherein the camera sensor is associated with a camera timing controller and the display module is associated with a display timing controller.

4. The apparatus of claim 3, wherein the camera timing controller is a time division duplex (TDD) camera timing controller, and wherein the display timing controller is at least one of a regional TDD display timing controller or a global display timing controller.

5. The apparatus of claim 1 , wherein the at least one processor is further configured to: At least one of the camera margin time of the camera, the camera phase of the camera, the display margin time of the display, or the display phase of the display is calculated, wherein at least one of the camera duty cycle, the display duty cycle, or the switching frequency is adjusted based on at least the calculated camera margin time, the calculated camera phase, the calculated display margin time, or the calculated display phase. The apparatus of claim 1 , wherein the camera duty cycle is adjusted based on a combination of the camera operating time and the camera margin time.

7. The apparatus of claim 6, wherein the combination of the camera operating time and the camera margin time include: The camera margin time is inserted before the camera run time based on an average exposure time during the camera run time.

8. The apparatus of claim 1, wherein the display duty cycle is adjusted based on a combination of the display on time and the display margin time.

9. The apparatus of claim 8, wherein the combination of the display operating time and the display margin time include: The display margin time is inserted before the display run time based on an average light emission time during the display run time.

10. The apparatus of claim 1, wherein the at least one processor is further configured to: At least one of a color value of the display or a brightness value of the display is modified based on at least one of activation of the display, deactivation of the display, activation of the camera, or deactivation of the camera.

11. The apparatus of claim 1 , wherein the at least one processor is further configured to: Data associated with at least one of the adjusted camera duty cycle, the adjusted display duty cycle, or the adjusted switching frequency is stored in a first memory or a first buffer.

12. The apparatus of claim 1, wherein the camera margin time is based on activation of the camera or deactivation of the camera, and wherein the display margin time is based on activation of the display or deactivation of the display.

13. The apparatus of claim 1 , wherein at least one of the camera duty cycle, the display duty cycle, or the switching frequency is adjusted based on one or more calibration parameters, and wherein the one or more calibration parameters include at least one of a three-dimensional (3D) lookup table (LUT) parameter, a brightness adjustment ratio parameter, or a gamma table parameter.

14. The apparatus of claim 1, wherein the camera duty cycle is a time division duplex (TDD) camera duty cycle and the display duty cycle is a TDD display duty cycle.

15. The apparatus of claim 1, wherein the ALS value is obtained from an ALS sensor in the camera or a camera sensor in the camera.

16. The apparatus of claim 1, wherein the camera is a below-display camera in the display or an above-display camera in the display, or wherein the camera is adjacent to the display.

17. The device according to claim 1, further comprising: include: At least one of an antenna or a transceiver coupled to the at least one processor, wherein the apparatus is a wireless communication device, and wherein at least one of the camera duty cycle, the display duty cycle, or the switching frequency is adjusted by a display processing unit (DPU) or a display processor.

18. A method for display processing, the method include: obtaining an ambient light sensor (ALS) value of at least one of a camera operating time or a display operating time; calculating at least one of a camera duty cycle of a camera, a display duty cycle of a display, or a switching frequency based on the ALS value; as well as At least one of the camera duty cycle, the display duty cycle, or the switching frequency is adjusted based on at least one of the camera run time, the display run time, the ALS value, a camera margin time, or a display margin time.

19. The method according to claim 18, further comprising: include: A camera sensor is activated within the camera operating time or a display module is activated within the display operating time based on at least one of the camera duty cycle, the display duty cycle, the switching frequency, the camera margin time or the display margin time, wherein at least one of the camera duty cycle, the display duty cycle or the switching frequency is adjusted based on the activated camera sensor or the activated display module.

20. The method of claim 19, wherein the camera duty cycle corresponds to the camera sensor and the display duty cycle corresponds to the display module, wherein the camera sensor is associated with a camera timing controller and the display module is associated with a display timing controller, and wherein the camera timing controller is a time division duplex (TDD) camera timing controller, and wherein the display timing controller is at least one of a regional TDD display timing controller or a global display timing controller.

21. The method according to claim 18, further comprising: include: At least one of the camera margin time of the camera, the camera phase of the camera, the display margin time of the display, or the display phase of the display is calculated, wherein at least one of the camera duty cycle, the display duty cycle, or the switching frequency is adjusted based on at least the calculated camera margin time, the calculated camera phase, the calculated display margin time, or the calculated display phase.

22. The method of claim 18, wherein the camera duty cycle is adjusted based on a combination of the camera operating time and the camera margin time, and wherein the combination of the camera operating time and the camera margin time include: The camera margin time is inserted before the camera run time based on an average exposure time during the camera run time.

23. The method of claim 18, wherein the display duty cycle is adjusted based on a combination of the display on time and the display margin time, and wherein the combination of the display on time and the display margin time include: The display margin time is inserted before the display run time based on an average light emission time during the display run time.

24. The method according to claim 18, further comprising: include: At least one of a color value of the display or a brightness value of the display is modified based on at least one of activation of the display, deactivation of the display, activation of the camera, or deactivation of the camera.

25. The method according to claim 18, further comprising: include: Data associated with at least one of the adjusted camera duty cycle, the adjusted display duty cycle, or the adjusted switching frequency is stored in a memory or buffer.

26. The method of claim 18, wherein the camera margin time is based on activation of the camera or deactivation of the camera, and wherein the display margin time is based on activation of the display or deactivation of the display.

27. The method of claim 18, wherein at least one of the camera duty cycle, the display duty cycle, or the switching frequency is adjusted based on one or more calibration parameters, and wherein the one or more calibration parameters include at least one of a three-dimensional (3D) lookup table (LUT) parameter, a brightness adjustment ratio parameter, or a gamma table parameter.

28. The method of claim 18, wherein the camera duty cycle is a time division duplex (TDD) camera duty cycle and the display duty cycle is a TDD display duty cycle, wherein the ALS value is obtained from an ALS sensor in the camera or a camera sensor in the camera, wherein the camera is an under-display camera in the display or an over-display camera in the display, or wherein the camera is adjacent to the display, and wherein at least one of the camera duty cycle, the display duty cycle, or the switching frequency is adjusted by a display processing unit (DPU) or a display processor.

29. A device for display processing, the device include: means for obtaining an ambient light sensor (ALS) value of at least one of a camera runtime or a display runtime; means for calculating at least one of a camera duty cycle of a camera, a display duty cycle of a display, or a switching frequency based on the ALS value; and Means for adjusting at least one of the camera duty cycle, the display duty cycle, or the switching frequency based on at least one of the camera run time, the display run time, the ALS value, a camera margin time, or a display margin time.

30. A computer readable medium storing computer executable code for display processing, the code when executed by a processor causing the processor to: obtaining an ambient light sensor (ALS) value of at least one of a camera operating time or a display operating time; calculating at least one of a camera duty cycle of a camera, a display duty cycle of a display, or a switching frequency based on the ALS value; as well as At least one of the camera duty cycle, the display duty cycle, or the switching frequency is adjusted based on at least one of the camera run time, the display run time, the ALS value, a camera margin time, or a display margin time.