Display panel and display device

Abstract

The invention provides a display panel and a display device.The display panel comprises a substrate, the substrate comprises a display area and a non-display area surrounding the display area, and the non-display area comprises a first frame area and a second frame area with a binding area; the blocking dams are located in the non-display area and arranged around the display area, the blocking dams comprise the first blocking dam and the second blocking dam, and the first blocking dam is located between the second blocking dam and the display area; the first flat layer, the second flat layer and the third flat layer are located on the substrate; wherein the second blocking dam comprises the first flat layer and the third flat layer in the first frame area, and the second blocking dam comprises the second flat layer and the third flat layer in the second frame area.

Description

Display panel and display device Technical Field

[0001] The present disclosure relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] Organic light-emitting diodes (OLEDs) have the advantages of self-luminescence, fast response, wide viewing angle, high brightness, bright colors, and light weight, and are widely used.

[0003] As consumers pursue the ultimate in display products, the design requirements for OLED display panels are becoming increasingly stringent. In order to increase the screen-to-body ratio and enhance visual enjoyment, a narrow bezel design is essential.

[0004] Summary of the Invention

[0005] The present disclosure provides a display panel and a display device, the specific solutions of which are as follows:

[0006] An embodiment of the present disclosure provides a display panel, comprising:

[0007] a base substrate, the base substrate comprising a display area and a non-display area surrounding the display area, the non-display area comprising a first frame area and a second frame area having a binding area;

[0008] a barrier dam located in the non-display area and arranged around the display area, the barrier dam comprising a first barrier dam and a second barrier dam, the first barrier dam being located between the second barrier dam and the display area;

[0009] a first flat layer, a second flat layer and a third flat layer located on the base substrate;

[0010] The second blocking dam includes the first flat layer and the third flat layer in the first border area, and the second blocking dam includes the second flat layer and the third flat layer in the second border area.

[0011] Optionally, in an embodiment of the present disclosure, the overall thickness of the second barrier dam in the first border area and the second border area is approximately uniform.

[0012] Optionally, in an embodiment of the present disclosure, a pixel definition layer and a spacer are further included, and the first flat layer, the second flat layer, the third flat layer, the pixel definition layer and the spacer are arranged in sequence away from the base substrate, and the second blocking dam also includes the pixel definition layer and the spacer in the first border area, and the second blocking dam also includes the pixel definition layer in the second border area.

[0013] Optionally, in the embodiment of the present disclosure, it also includes a first source-drain layer located between the first flat layer and the base substrate, a second source-drain layer located between the first flat layer and the second flat layer, and a third source-drain layer located between the second flat layer and the third flat layer, and the first source-drain layer, the second source-drain layer and the third source-drain layer respectively at least partially overlap with the second blocking dam.

[0014] Optionally, in an embodiment of the present disclosure, in the first border area, the display panel includes a plurality of crack detection lines and low-potential wiring; wherein the low-potential wiring includes a first structure, a second structure, and a third structure stacked in sequence away from the base substrate, the first structure and each of the crack detection lines are arranged in the same layer as the first source-drain layer, the second structure is arranged in the same layer as the second source-drain layer, and the third structure is arranged in the same layer as the third source-drain layer. Optionally, in an embodiment of the present disclosure, the orthographic projection of at least one of the multiple crack detection lines on the base substrate completely falls within the area of ​​the orthographic projection of the second blocking dam on the base substrate, and the at least one crack detection line is completely covered by the first flat layer; in the area corresponding to the second blocking dam in the first border area, the first structure, the second structure, and the third structure are all arranged to partially overlap with the first flat layer.

[0015] Optionally, in an embodiment of the present disclosure, in the second border area, the display panel includes a high-potential wiring and a low-potential wiring; wherein the high-potential wiring includes a fourth structure, a fifth structure and a sixth structure stacked in sequence away from the substrate substrate, the sixth structure is arranged in the same layer as the third source and drain layer, the fifth structure is arranged in the same layer as the second source and drain layer, and the fourth structure is arranged in the same layer as the first source and drain layer.

[0016] Optionally, in an embodiment of the present disclosure, the sixth structure completely penetrates the second blocking dam, and in the area corresponding to the second blocking dam in the second border area, the fourth structure and the fifth structure are partially overlapped, and the second flat layer completely covers the overlapping part of the fourth structure and the fifth structure.

[0017] Optionally, in an embodiment of the present disclosure, the second blocking dam further includes a transition portion extending from the first border area to the second border area, and the first flat layer included in the transition portion and the second flat layer included in the second blocking dam in the second border area are arranged approximately flush with the surface on the side facing away from the base substrate.

[0018] Optionally, in an embodiment of the present disclosure, in the first border area, the first blocking dam includes the third flat layer, the pixel definition layer and the spacer, and in the area corresponding to the first blocking dam, the low potential trace is located between the first blocking dam and the base substrate.

[0019] Optionally, in an embodiment of the present disclosure, the display panel further includes an anode layer located between the pixel definition layer and the third flat layer, and in the first border area, the anode layer is electrically connected to the low potential wiring, and the low potential wiring is electrically connected to the cathode layer through the portion of the anode layer located in the first border area.

[0020] Optionally, in an embodiment of the present disclosure, in the second border area, the first blocking dam includes a first sub-dam and a second sub-dam arranged in sequence, the first sub-dam is located between the second sub-dam and the second blocking dam, and the first sub-dam includes the third flat layer, the pixel definition layer and the spacer, the second sub-dam includes the third flat layer and the pixel definition layer, and the thickness of the first sub-dam is greater than the thickness of the second sub-dam.

[0021] Optionally, in an embodiment of the present disclosure, in the second border region, in the regions corresponding to the first sub-dam and the second sub-dam, the high-potential trace is located between the first sub-dam and the base substrate, and between the second sub-dam and the base substrate. Accordingly, an embodiment of the present disclosure provides a display device, comprising:

[0022] A display panel as described in any one of the above. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] FIG1 is a schematic diagram of a top view of a display panel provided in an embodiment of the present disclosure;

[0024] FIG2 is a schematic diagram of a cross-sectional structure along the direction indicated by MM in FIG1 ;

[0025] FIG3 is a schematic diagram of a cross-sectional structure along the direction NN in FIG1 ;

[0026] FIG4 is a schematic diagram of another cross-sectional structure along the direction indicated by MM in FIG1 ;

[0027] FIG5 is a schematic diagram of another cross-sectional structure along the direction indicated by NN in FIG1 ;

[0028] FIG6 is a schematic diagram of another top view of the structure of a display panel provided in an embodiment of the present disclosure;

[0029] FIG7 is a schematic diagram of a partial cross-sectional structure of the second barrier dam corresponding to area Q in FIG6 ;

[0030] FIG8 is a schematic structural diagram of a display device provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0031] In order to make the purpose, technical solutions and advantages of the embodiments of the present disclosure clearer, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings of the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. And in the absence of conflict, the embodiments in the present disclosure and the features in the embodiments can be combined with each other. Based on the described embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

[0032] Unless otherwise defined, technical or scientific terms used in this disclosure should have the same general meaning as those generally understood by persons skilled in the art in the field to which this disclosure pertains. Words such as "include" or "comprise" used in this disclosure mean that the elements or objects preceding the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects.

[0033] It should be noted that the sizes and shapes of the figures in the accompanying drawings do not reflect the actual scale and are only for the purpose of illustrating the present invention. The same or similar reference numerals throughout represent the same or similar elements or elements with the same or similar functions.

[0034] In the narrow-frame design of OLED display products, a three-layer metal routing design is often used to reduce the RC loading. In this case, the design of the package barrier (Dam) involves the design of three organic layers. During the design process, it is necessary not only to consider the overflow effect of the package Dam blocking the inkjet printing (IJP) material, but also to consider the touch effect of the touch screen panel (TSP) routing above the package Dam. If the organic layer at the package Dam is too thick, the TSP routing will be uneven, affecting the touch. If the organic layer at the Dam is too thin, it will not block the IJP material, thus affecting the package effect.

[0035] In view of this, embodiments of the present disclosure provide a display panel and a display device for ensuring a narrow frame design while taking into account both packaging and touch effects.

[0036] In conjunction with Figures 1 to 3, Figure 1 is a schematic diagram of a top view of a display panel provided in an embodiment of the present disclosure, Figure 2 is a schematic diagram of a cross-sectional structure along the direction indicated by line MM in Figure 1, and Figure 3 is a schematic diagram of a cross-sectional structure along the direction indicated by line NN in Figure 1. Specifically, the display panel includes:

[0037] A base substrate 10, comprising a display area A and a non-display area B surrounding the display area A, wherein the non-display area B comprises a first frame area B1 and a second frame area B2 having a binding area C;

[0038] a barrier dam 20 located in the non-display area B and surrounding the display area A, the barrier dam 20 including a first barrier dam 201 and a second barrier dam 202, wherein the first barrier dam 201 is located between the second barrier dam 202 and the display area A;

[0039] A first flat layer 21, a second flat layer 22 and a third flat layer 23 located on the base substrate 10;

[0040] The second blocking dam 202 includes the first flat layer 21 and the third flat layer 23 in the first border area B1 , and the second blocking dam 202 includes the second flat layer 22 and the third flat layer 23 in the second border area B2 .

[0041] In the specific implementation process, the base substrate 10 included in the display panel can be a rigid substrate or a flexible substrate, which is not limited here. When the base substrate 10 is a flexible substrate, the material of the flexible substrate can be a polyimide film (PI) or polyethylene terephthalate (PET), etc., which is not limited here. The flexible substrate can be a structure including a single-layer flexible base layer, or a structure including multiple flexible base layers, such as a structure with two layers of flexible base layers, or a structure with three layers of flexible base layers, which is not limited here. In addition, a support layer (Barrier) can be provided between two adjacent flexible base layers.

[0042] Moreover, the base substrate 10 includes a display area A and a non-display area B surrounding the display area A, wherein the non-display area B includes a first border area B1 and a second border area B2 having a binding area C. For example, for the same display panel, the first border area B1 can be a border area located on the left side of the display panel, or a border area located on the right side of the display panel, or a border area located on the upper side of the display panel; the second border area B2 can be a border area located on the lower side of the display panel. For example, the distribution of the display area A, the non-display area B, the binding area C, the first border area B1, and the second border area B2 is shown in FIG1 . Of course, the distribution of the display area A, the non-display area B, the binding area C, the first border area B1, and the second border area B2 can also be set according to actual application needs, which is not limited here.

[0043] In addition, the display panel further includes a barrier dam 20 located within the non-display area B and surrounding the display area A. The barrier dam 20 includes a first barrier dam 201 and a second barrier dam 202, wherein the first barrier dam 201 is located between the second barrier dam 202 and the display area A. Thus, the first barrier dam 201 and the second barrier dam 202 can effectively improve the preparation effect of the subsequent thin-film encapsulation layer.

[0044] Furthermore, the display panel further includes a first flat layer 21, a second flat layer 22, and a third flat layer 23 located on the base substrate 10. The second barrier dam 202 includes the first flat layer 21 and the third flat layer 23 in the first border region B1, and includes the second flat layer 22 and the third flat layer 23 in the second border region B2. Still referring to Figures 2 and 3, Figure 2 illustrates one structural diagram of the second barrier dam 202 in the first border region B1, and Figure 3 illustrates one structural diagram of the second barrier dam 202 in the second border region B2. On the one hand, the thickness of the second blocking dam 202 in the first frame area B1 and the second frame area B2 is not too thin, which can effectively block the organic packaging material in the subsequent thin film packaging layer preparation process, thereby ensuring the packaging effect; on the other hand, in actual preparation, by setting the overall thickness of the first flat layer 21 and the third flat layer 23 to be approximately equal to the overall thickness of the second flat layer 22 and the third flat layer 23, it can be ensured that the thickness of the second blocking dam 202 in the first frame area B1 and the second frame area B2 is approximately equal, thereby ensuring the thickness uniformity of the second blocking dam 202 in the entire frame area, thereby avoiding the impact on the subsequently set TSP wiring touch function, thereby improving the performance of the display panel.

[0045] It should be noted that, for the specific configuration of the first flat layer 21 , the second flat layer 22 and the third flat layer 23 , as well as the specific configuration of the first barrier dam 201 and the second barrier dam 202 , please refer to the description of the relevant parts below and will not be described in detail here.

[0046] In the embodiment of the present disclosure, the overall thickness of the second barrier dam 202 in the first border area B1 and the second border area B2 is set to be approximately uniform. Exemplarily, the difference between the thickness of the second barrier dam 202 in the first border area B1 and the thickness of the second barrier dam 202 in the second border area B2 ranges from 1.5μm to 2.5μm. For example, 2.1μm. Of course, in the actual preparation process, the specific difference between the thickness of the second barrier dam 202 in different areas can also be set according to the actual process error, which is not limited here. In this way, the uniformity of the thickness of the second barrier dam 202 in the entire border area is effectively guaranteed, and the touch effect of the subsequent display panel can be guaranteed while taking into account the packaging effect.

[0047] In the embodiment of the present disclosure, with reference to Figures 4 and 5 , Figure 4 is a schematic diagram of a cross-sectional structure along the direction indicated by line MM in Figure 1 , and Figure 5 is a schematic diagram of a cross-sectional structure along the direction indicated by line NN in Figure 1 . Specifically, the display panel further includes a pixel definition layer 30 and a spacer 40. The first planar layer 21 , the second planar layer 22 , the third planar layer 23 , the pixel definition layer 30 , and the spacer 40 are sequentially arranged away from the base substrate 10 . The second barrier dam 202 further includes the pixel definition layer 30 and the spacer 40 in the first border region B1 , and the second barrier dam 202 further includes the pixel definition layer 30 in the second border region B2 .

[0048] Still referring to the exemplary embodiment shown in FIG4 , the second barrier dam 202 in the first border region B1 includes a first flat layer 21, a third flat layer 23, a pixel definition layer 30, and a spacer 40, which are sequentially disposed away from the base substrate 10. Still referring to the exemplary embodiment shown in FIG5 , the second barrier dam 202 in the second border region B2 includes a second flat layer 22, a third flat layer 23, and a pixel definition layer 30, which are sequentially disposed away from the base substrate 10. In this way, the second barrier dam 202 can be made relatively thick in both the first border region B1 and the second border region B2, which facilitates effective blocking of the organic encapsulation material in the subsequent thin-film encapsulation layer, thereby ensuring the encapsulation effect of the display panel.

[0049] In the embodiment of the present disclosure, the display panel also includes a first source-drain layer 50 located between the first flat layer 21 and the base substrate 10, a second source-drain layer 60 located between the first flat layer 21 and the second flat layer 22, and a third source-drain layer 70 located between the second flat layer 22 and the third flat layer 23. The first source-drain layer 50, the second source-drain layer 60 and the third source-drain layer 70 respectively overlap at least partially with the second blocking dam 202.

[0050] Still referring to Figures 4 and 5 , the display panel further includes a first source-drain layer 50 located between the first planar layer 21 and the base substrate 10, a second source-drain layer 60 located between the first planar layer 21 and the second planar layer 22, and a third source-drain layer 70 located between the second planar layer 22 and the third planar layer 23. Thus, the three-layer arrangement of the first source-drain layer 50, the second source-drain layer 60, and the third source-drain layer 70 reduces the resistive-capacitive load and ensures the display effect. For example, the first source-drain layer 50, the second source-drain layer 60, and the third source-drain layer 70 are made of the same material, namely, a titanium / aluminum / titanium (Ti / Al / Ti) composite material. Of course, the specific materials of the first source-drain layer 50, the second source-drain layer 60, and the third source-drain layer 70 can also be set according to actual application requirements and are not limited here. Furthermore, the first source-drain layer 50, the second source-drain layer 60, and the third source-drain layer 70 each at least partially overlap with the second blocking dam 202.

[0051] In the embodiment of the present disclosure, still in combination with Figure 4, in the first border area B1, the display panel includes a plurality of crack detection lines 80 and a low-potential trace 90; wherein, the low-potential trace 90 includes a first structure 901, a second structure 902 and a third structure 903 stacked in sequence away from the base substrate 10, the first structure 901 and each of the crack detection lines 80 are arranged in the same layer as the first source and drain layer 50, the second structure 902 is arranged in the same layer as the second source and drain layer 60, and the third structure 903 is arranged in the same layer as the third source and drain layer 70.

[0052] Still referring to the exemplary embodiment shown in FIG4 , in the first frame area B1, the display panel includes a plurality of crack detection (Panel Crack Detection, PCD) lines 80 and a low potential (VSS) line 90. Among them, the plurality of crack detection lines 80 are used to transmit crack detection signals, and the low potential line 90 is used to transmit VSS signals. Through the plurality of crack detection lines 80, crack detection can be performed on the periphery of the display panel, thereby ensuring the performance of the display panel. Of course, the specific number of the plurality of crack detection lines 80 can be set according to actual application needs, and is not limited here. Moreover, the low potential line 90 includes a first structure 901, a second structure 902, and a third structure 903, which are stacked and arranged in sequence away from the base substrate 10. In actual preparation, the first structure 901 and each crack detection line 80 are arranged in the same layer as the first source and drain layer 50, the second structure 902 is arranged in the same layer as the second source and drain layer 60, and the third structure 903 is arranged in the same layer as the third source and drain layer 70. In this way, the manufacturing process of the display panel is simplified and the manufacturing efficiency of the display panel is improved. In the embodiment of the present disclosure, the orthographic projection of at least one crack detection line 80 among the multiple crack detection lines 80 on the base substrate 10 completely falls within the area of ​​the orthographic projection of the second barrier dam 202 on the base substrate 10, and the at least one crack detection line 80 is completely covered by the first planar layer 21; in the area corresponding to the second barrier dam 202 in the first border area B1, the first structure 901, the second structure 902, and the third structure 903 are all arranged to partially overlap with the first planar layer 21.

[0053] During the specific implementation process, the orthographic projection of at least one crack detection line 80 among the multiple crack detection lines 80 on the base substrate 10 completely falls within the area of ​​the orthographic projection of the second blocking dam 202 on the base substrate 10, and at least one crack detection line 80 is completely covered by the first flat layer 21. In this way, the first flat layer 21 completely covers the corresponding crack detection line 80, effectively protecting the corresponding crack detection line 80. Among them, the at least one crack detection line 80 can be one or more, and the specific number of the at least one crack detection line 80 can be set according to actual application needs and is not limited here. In the exemplary embodiment shown in Figure 4, one crack detection line 80 is completely covered by the first flat layer 21.

[0054] Furthermore, in the area corresponding to the second barrier dam 202 in the first border region B1, the first structure 901, the second structure 902, and the third structure 903 are all partially overlapped with the first planar layer 21. The first structure 901, the second structure 902, and the third structure 903 are all extended in the direction from the first border region B1 toward the display region A, and the orthographic projections of the first structure 901 and the second structure 902 on the base substrate 10 completely fall within the area of ​​the orthographic projection of the third structure 903 on the base substrate 10. It should be noted that in the area corresponding to the second barrier dam 202 in the first border region B1, the end of the second structure 902 facing away from the display region A is completely covered by the end of the third structure 903 facing away from the display region A, and the third planar layer 203 completely covers the overlapping portion of the second structure 902 and the third structure 903, thereby effectively protecting the ends of the second structure 902 and the third structure 903 and improving the performance of the display panel.

[0055] In the embodiment of the present disclosure, still in combination with Figure 5, in the second border area B2, the display panel includes a high potential wiring 91 and a low potential wiring 90; wherein, the high potential wiring 91 includes a fourth structure 911, a fifth structure 912 and a sixth structure 913 stacked in sequence away from the base substrate 10, the sixth structure 913 and the low potential wiring 90 are arranged in the same layer as the third source and drain layer 70, the fifth structure 912 is arranged in the same layer as the second source and drain layer 60, and the fourth structure 911 is arranged in the same layer as the first source and drain layer 50.

[0056] Still referring to the exemplary embodiment shown in FIG5 , in the second border area B2, the display panel includes a high potential (VDD) trace 91 and a low potential (VSS) trace 90, and accordingly, the high potential trace 91 and the low potential trace 90 are intermittently arranged. Among them, the high potential trace 91 is used to transmit the VDD signal, and the low potential trace 90 is used to transmit the VSS signal, thereby ensuring the driving capability of the display panel. Moreover, the high potential trace 91 includes a fourth structure 911, a fifth structure 912, and a sixth structure 913 stacked in sequence away from the base substrate 10; in actual preparation, the sixth structure 913 is arranged in the same layer as the third source and drain layer 70, the fifth structure 912 is arranged in the same layer as the second source and drain layer 60, and the fourth structure 911 is arranged in the same layer as the first source and drain layer 50. In this way, the manufacturing process of the display panel is simplified and the manufacturing efficiency of the display panel is improved.

[0057] In the embodiment of the present disclosure, still in combination with Figure 5, the sixth structure 913 is arranged completely through the second blocking dam 202, and in the area corresponding to the second blocking dam 202 in the second border area B2, the fourth structure 911 and the fifth structure 912 are partially overlapped, and the second flat layer 22 completely covers the overlapping part of the fourth structure 911 and the fifth structure 912.

[0058] Still referring to the exemplary embodiment shown in FIG. 5 , the sixth structure 913 in the high-potential trace 91 is completely disposed through the second blocking dam 202 ; in the area corresponding to the second blocking dam 202 in the second border area B2 , the fourth structure 911 and the fifth structure 912 are partially overlapped; wherein, the second flat layer 22 completely covers the overlapping portion of the fourth structure 911 and the fifth structure 912 , and the second flat layer 22 extends in a direction away from the display area A. In this way, the second flat layer 22 can effectively protect the end of the overlapping portion of the fourth structure 911 and the fifth structure 912 away from the display area A, thereby improving the performance of the display panel. It should be noted that the fourth structure 911, the fifth structure 912, and the sixth structure 913 are all extended in a direction from the second border area B1 to the display area A.

[0059] In the embodiment of the present disclosure, referring to Figures 6 and 7 , Figure 6 is a schematic top view of a display panel, and Figure 7 is a schematic cross-sectional view of a portion of the second barrier dam 202 corresponding to region Q in Figure 6 . Specifically, the second barrier dam 202 further includes a transition portion 200 extending from the first border region B1 to the second border region B2. The first flat layer 21 included in the transition portion 200 and the second flat layer 22 included in the second border region B2 of the second barrier dam 202 are approximately flush with each other on a side facing away from the base substrate 10.

[0060] Still referring to Figures 6 and 7 , the second barrier dam 202 further includes a transition portion 200 extending from the first border region B1 to the second border region B2. The first flat layer 21 included in the transition portion 200 and the second flat layer 22 included in the second barrier dam 202 in the second border region B2 are arranged approximately flush with the surface of the side facing away from the base substrate 10. Exemplarily, the error range between the two is 1.5μm to 2.5μm. For example, 2.1μm. In this way, while achieving a differentiated design of the second barrier dam 202 in the first border region B1 and the second border region B2, the uniformity of the thickness of the second barrier dam 202 is ensured. It should be noted that FIG7 only illustrates a small portion of the structure for simplified illustration. The detailed structure of the second barrier dam 202 is described in detail in the aforementioned related sections and will not be repeated here. Furthermore, during the actual preparation of the first flat layer 21, the etching process imparts a certain slope angle to the first flat layer 21 in the region corresponding to the transition portion 200. This slope angle ensures that during the subsequent preparation of the second flat layer 22, only a small amount of the second flat layer 22 remains above the first flat layer 21, substantially unaffecting the flatness of the surface of the first flat layer 21 facing away from the base substrate 10. Consequently, at the transition position, the first flat layer 21 included in the transition portion 200 and the second flat layer 22 included in the second border region B2 of the second barrier dam 202 are substantially flush with each other, thereby ensuring the packaging effect of the display panel.

[0061] In the embodiment of the present disclosure, in the first border area B1, the first blocking dam 201 includes the third flat layer 23, the pixel definition layer 30 and the spacer 40, and in the corresponding area of ​​the first blocking dam 201, the low potential trace 90 is located between the first blocking dam 201 and the base substrate 10.

[0062] Still referring to the exemplary embodiments shown in Figures 4 and 5, in the first border area B1, the first blocking dam 201 includes a third flat layer 23, a pixel definition layer 30, and a spacer 40. In actual preparation, the same film layer of the first blocking dam 201 and the second blocking dam 202 can be made in the same layer, thereby simplifying the manufacturing process of the display panel while ensuring the performance of the display panel. Moreover, in the corresponding area of ​​the first blocking dam 201, the low-potential trace 90 is located between the first blocking dam 201 and the base substrate 10. Accordingly, the first structure 901, the second structure 902, and the third structure 903 included in the low-potential trace 90 are located between the first blocking dam 201 and the base substrate 10. In this way, while reducing RC loading, the power consumption of the display panel is reduced.

[0063] In the embodiment of the present disclosure, the display panel also includes an anode layer 92 located between the pixel definition layer 30 and the third flat layer 23, and in the first border area B1, the anode layer 92 is electrically connected to the low potential wiring 90, and the low potential wiring 90 is electrically connected to the cathode layer through the portion of the anode layer 92 located in the first border area B1.

[0064] Still referring to Figures 4 and 6 , the display panel further includes an anode layer 92 located between the pixel definition layer 30 and the third planar layer 23. In the first border region B1, the anode layer 92 is electrically connected to the low-potential trace 90. Furthermore, the low-potential trace 90 is electrically connected to the cathode layer via the portion of the anode layer 92 located in the first border region B1. Furthermore, the portion of the anode layer 92 located in the first border region B1 is separated from the portion located in the display region A. In this way, while taking into account the driving effect, the display effect of the display panel is also guaranteed.

[0065] In the embodiment of the present disclosure, in the second border area B2, the first blocking dam 201 includes a first sub-dam 2011 and a second sub-dam 2012 arranged in sequence, the first sub-dam 2011 is located between the second sub-dam 2012 and the second blocking dam 202, and the first sub-dam 2011 includes the third flat layer 23, the pixel definition layer 30 and the spacer 40, the second sub-dam 2012 includes the third flat layer 23 and the pixel definition layer 30, and the thickness of the first sub-dam 2011 is greater than the thickness of the second sub-dam 2012.

[0066] Still referring to the exemplary embodiment shown in FIG. 5 , in the second border region B2, the first barrier dam 201 includes a first sub-dam 2011 and a second sub-dam 2012 spaced apart from each other. The first sub-dam 2011 and the second sub-dam 2012 further enhance the barrier effect on the thin-film encapsulation material. Furthermore, the first sub-dam 2011 is located between the second sub-dam 2012 and the second barrier dam 202. The first sub-dam 2011 includes a third planarizing layer 23, a pixel definition layer 30, and spacers 40, while the second sub-dam 2012 includes the third planarizing layer 23 and the pixel definition layer 30. As a result, the thickness of the first sub-dam 2011 can be set to be slightly greater than that of the second sub-dam 2012.

[0067] In the embodiment of the present disclosure, in the second border area B2, in the corresponding areas of the first sub-dam 2011 and the second sub-dam 2012, the high-potential trace 91 is located between the first sub-dam 2011 and the base substrate 10, and between the second sub-dam 2012 and the base substrate 10.

[0068] During the specific implementation process, still combined with the exemplary embodiment shown in Figure 5, in the second border area B2, the corresponding areas of the first sub-dam 2011 and the second sub-dam 2012, the high potential trace 91 is located between the first sub-dam 2011 and the base substrate 10, and the high potential trace 91 is located between the second sub-dam 2012 and the base substrate 10, thereby ensuring the flatness of the first sub-dam 2011 and the second sub-dam 2012 during the preparation process and improving the preparation efficiency of the display panel.

[0069] It should be noted that, in addition to the film layer structure mentioned above, the display panel also includes a thin film encapsulation layer arranged on the side of the blocking dam 20 away from the base substrate 10, and the thin film encapsulation layer is used to encapsulate the display panel to block water and oxygen corrosion, and avoid water and oxygen corrosion causing failure of the light-emitting device. Exemplarily, the thin film encapsulation layer may include a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer that are sequentially away from the base substrate 10, wherein the material of the first inorganic encapsulation layer may be at least one of silicon oxide, silicon nitride, and silicon oxynitride, the material of the second inorganic encapsulation layer may be at least one of silicon oxide, silicon nitride, and silicon oxynitride, and the material of the organic encapsulation layer may be an organic material suitable for inkjet printing, which is not limited here. Of course, the thin film encapsulation layer may also include more film layers in which inorganic encapsulation layers and organic encapsulation layers are alternately arranged, which is not limited here. It should be noted that, regardless of the structure of the thin film encapsulation layer, the top layer of the thin film encapsulation layer is set as an inorganic encapsulation layer to effectively block water and oxygen.

[0070] In addition, the display panel also includes a touch structure (Flexible Multi-Layer On Cell, FMLOC) located on the side of the thin film encapsulation layer facing away from the base substrate 10. Accordingly, the various film layers of the touch structure can be directly fabricated on the thin film encapsulation layer, thereby providing the touch structure within the film layer structure. This eliminates the need for a separate touch substrate, thereby ensuring a lightweight and thin design for the display panel while also maintaining the touch function of the display panel. Of course, in addition to the aforementioned film layer structures, the display panel in the embodiments of the present disclosure may also include other film layer structures according to actual application needs. The specific configuration can be implemented with reference to the techniques in the related art and will not be described in detail here.

[0071] Based on the same disclosed concept, as shown in FIG8 , an embodiment of the present disclosure further provides a display device, which includes:

[0072] The display panel 100 as described in any one of the above items.

[0073] In specific implementations, the display device solves problems similar to the aforementioned display panel. Therefore, the implementation of the display device can refer to the implementation of the aforementioned display panel, and any repetitive details will not be repeated. Furthermore, the display device provided in the embodiments of the present disclosure can be a mobile phone, or any product or component with a display function, such as a tablet computer, a television, a monitor, a laptop computer, a digital photo frame, or a navigation system. The other essential components of the display device are well understood by those skilled in the art and will not be detailed here, nor should they be construed as limitations of the present disclosure.

[0074] Although the preferred embodiments of the present disclosure have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concepts. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the present disclosure.

[0075] Obviously, those skilled in the art may make various changes and modifications to the present disclosure without departing from the spirit and scope of the present disclosure. Thus, if these modifications and variations of the present disclosure fall within the scope of the claims of the present disclosure and their equivalents, the present disclosure is intended to include these modifications and variations.

Claims

1. A display panel, wherein: include: A base substrate, the base substrate comprising a display area and a non-display area surrounding the display area, the non-display area comprising a first frame area and a second frame area having a binding area; a barrier dam located in the non-display area and arranged around the display area, the barrier dam comprising a first barrier dam and a second barrier dam, the first barrier dam being located between the second barrier dam and the display area; A first flat layer, a second flat layer and a third flat layer located on the substrate; The second blocking dam includes the first flat layer and the third flat layer in the first border area, and the second blocking dam includes the second flat layer and the third flat layer in the second border area.

2. The display panel according to claim 1, wherein: The second barrier dam has an approximately uniform overall thickness in the first border region and the second border region.

3. The display panel according to claim 2, wherein: It also includes a pixel definition layer and a spacer. The first flat layer, the second flat layer, the third flat layer, the pixel definition layer and the spacer are arranged in sequence away from the base substrate. The second blocking dam also includes the pixel definition layer and the spacer in the first border area. The second blocking dam also includes the pixel definition layer in the second border area.

4. The display panel according to any one of claims 1 to 3, wherein: It also includes a first source-drain layer located between the first flat layer and the base substrate, a second source-drain layer located between the first flat layer and the second flat layer, and a third source-drain layer located between the second flat layer and the third flat layer, wherein the first source-drain layer, the second source-drain layer and the third source-drain layer at least partially overlap with the second blocking dam, respectively.

5. The display panel according to claim 4, wherein: In the first border area, the display panel includes a plurality of crack detection lines and low-potential wirings; wherein the low-potential wirings include a first structure, a second structure, and a third structure which are stacked in sequence away from the substrate substrate, the first structure and each of the crack detection lines are arranged on the same layer as the first source and drain layer, the second structure is arranged on the same layer as the second source and drain layer, and the third structure is arranged on the same layer as the third source and drain layer.

6. The display panel according to claim 5, wherein: The orthographic projection of at least one crack detection line among the multiple crack detection lines on the substrate completely falls within the area of ​​the orthographic projection of the second blocking dam on the substrate, and the at least one crack detection line is completely covered by the first flat layer; in the area corresponding to the second blocking dam in the first border area, the first structure, the second structure and the third structure are all arranged to partially overlap with the first flat layer.

7. The display panel according to claim 4, wherein: In the second border area, the display panel includes a high potential wiring and a low potential wiring; wherein the high potential wiring includes a fourth structure, a fifth structure and a sixth structure which are stacked in sequence away from the substrate substrate, the sixth structure is arranged on the same layer as the third source and drain layer, the fifth structure is arranged on the same layer as the second source and drain layer, and the fourth structure is arranged on the same layer as the first source and drain layer.

8. The display panel according to claim 7, wherein: The sixth structure completely penetrates the second blocking dam, and in the area corresponding to the second blocking dam in the second border area, the fourth structure and the fifth structure are partially overlapped, and the second flat layer completely covers the overlapping part of the fourth structure and the fifth structure.

9. The display panel according to any one of claims 1 to 8, wherein: The second blocking dam also includes a transition portion extending from the first border area to the second border area, and the first flat layer included in the transition portion and the second flat layer included in the second border area of ​​the second blocking dam are arranged approximately flush with a surface on a side facing away from the base substrate.

10. The display panel according to any one of claims 5 to 8, wherein: In the first border area, the first blocking dam includes the third flat layer, the pixel definition layer and the spacer, and in the area corresponding to the first blocking dam, the low potential wiring is located between the first blocking dam and the base substrate.

11. The display panel according to claim 10, wherein: The display panel also includes an anode layer located between the pixel definition layer and the third flat layer, and in the first border area, the anode layer is electrically connected to the low potential wiring, and the low potential wiring is electrically connected to the cathode layer through the portion of the anode layer located in the first border area.

12. The display panel according to claim 7, wherein: In the second border area, the first blocking dam includes a first sub-dam and a second sub-dam which are arranged in sequence at intervals, the first sub-dam is located between the second sub-dam and the second blocking dam, and the first sub-dam includes the third flat layer, the pixel definition layer and the spacer, the second sub-dam includes the third flat layer and the pixel definition layer, and the thickness of the first sub-dam is greater than the thickness of the second sub-dam.

13. The display panel according to claim 12, wherein: In the second border area, in the area corresponding to the first sub-dam and the second sub-dam, the high potential wiring is located between the first sub-dam and the base substrate, and between the second sub-dam and the base substrate.

14. A display device, wherein: include: A display panel as claimed in any one of claims 1 to 13.

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