System and method for testing dynamic on-resistance of power GaN device

Abstract

The invention discloses a system and a method for testing the dynamic on resistance of a power GaN device. The testing system comprises a low-voltage power supply, a booster circuit, a constant current source circuit, a clamping circuit and a driving circuit, the low-voltage power supply is connected with the booster circuit; the test module comprises a switch tube QC and tested device groups Q1, Q2... Qn, the drain electrode of the control tube QC is connected with one side of the booster circuit, the source electrode of the control tube QC is connected with the drain electrode of the GaN device Q1, the source electrode of the GaN device Q1 is connected with the drain electrode of the GaN device Q2, the source electrode of the GaN device Q2 is connected with the drain electrode of the GaN device Q3,..., and so on, the source electrode of the GaN device Qn-1 is connected with the drain electrode of the GaN device Qn, and the source electrode of the GaN device Qn is grounded; the grid electrode of the switching tube QC and the grid electrodes of the tested device groups Q1, Q2... Qn are connected with the driving circuit; source electrodes and drain electrodes of the tested device groups Q1, Q2... Qn are respectively connected in parallel with resistors R1, R2... Rn. The tested device groups Q1, Q2... Qn are connected with the constant current source circuit; two ends of the resistors R1, R2... Rn are respectively connected with a clamping circuit, and the clamping circuit is connected with a data acquisition system. The reliability of measuring the dynamic on-resistance of the gallium nitride device is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of gallium nitride device performance testing, and in particular to a system and method for testing the dynamic on-resistance of a power GaN device. Background Art

[0002] With the development of semiconductor technology and power electronics technology, the application field of semiconductor devices has expanded to important fields such as military industry, aerospace, and new energy power generation. Wide bandgap semiconductor devices represented by gallium nitride and silicon carbide have also been widely used with the general trend of high frequency and high power density of power electronics. Initially, gallium nitride devices were only used in military fields such as radar and laser. Due to the advancement of manufacturing technology, their cost has gradually decreased, which has gradually expanded the application scope of gallium nitride devices to the civilian field. However, gallium nitride devices are still in the early stages of development, and the dynamic on-resistance phenomenon is currently a major factor restricting their application. The dynamic on-resistance phenomenon refers to the on-resistance of gallium nitride devices is much greater than the static on-resistance due to the "virtual gate" effect caused by surface traps and the capture of channel hot electrons by the buffer layer when the gallium nitride device enters the on-state from the high-voltage blocking state. The dynamic on-resistance phenomenon will increase the conduction loss of gallium nitride devices and reduce the efficiency of the converter. Studying the change law of dynamic on-resistance is conducive to accurately evaluating the conduction loss of gallium nitride devices, optimizing the heat dissipation design of converters, and improving the power density of converters.

[0003] The circuit currently used to test the dynamic on-resistance of GaN devices is mainly a double-pulse test circuit, but this circuit has the following problems: 1) the duration of voltage stress cannot be controlled; 2) the inductor current injected into the device under test changes with time; 3) the circuit contains a large energy storage inductor, which makes it difficult to miniaturize the test circuit. Summary of the invention

[0004] In order to solve the above technical problems, the present invention provides a test system and method for the dynamic on-resistance of a power GaN device. The test system of the present invention has a simple structure and is convenient for measuring the dynamic on-resistance of a gallium nitride device, which is beneficial to improving the reliability of GaN power semiconductor devices and has practical application value.

[0005] The technical solution adopted by the present invention is:

[0006] A test system for dynamic on-resistance of a power GaN device, the system comprising:

[0007] Low voltage power supply, boost circuit, constant current source circuit, clamp circuit, data acquisition system, drive circuit;

[0008] The low voltage power supply is connected to a boost circuit, and the boost circuit is used to boost the input low voltage power supply to a high voltage;

[0009] The test module includes a switch tube Q C , the device group under test Q1, Q2...Q n , control tube Q C The drain is connected to one side of the boost circuit, and the control tube Q C The source is connected to the drain of GaN device Q1, the source of GaN device Q1 is connected to the drain of GaN device Q2, the source of GaN device Q2 is connected to the drain of GaN device Q3, and so on. n-1 Source connection GaN device Q n Drain, GaN device Q n The source is grounded;

[0010] The switch tube Q C The gate of the device under test group Q1, Q2...Q n The gates are all connected to the driving circuit;

[0011] The device group Q1, Q2...Q n The source and drain of are connected in parallel with resistors R1, R2, and R n ;

[0012] The device group Q1, Q2...Q n Connect a constant current source circuit, which is used to inject a constant current into the device under test when it is turned on;

[0013] The resistors R1, R2, ... n The two ends are respectively connected to a clamping circuit, which is used to clamp the voltage stress of the device under test and reflect the on-state voltage of the device under test; the clamping circuit is connected to a data acquisition system.

[0014] The system also includes a heating module, which is used to control the device groups Q1, Q2, ... n ambient temperature.

[0015] The constant current source circuit comprises a main circuit part and a control part;

[0016] The main circuit part includes a differential amplifier circuit, a sampling resistor Rs, a proportional-integral regulation circuit, and a P-type MOSFET;

[0017] The differential amplifier circuit is connected to the sampling resistor Rs and is used to sample the output current of the constant current source flowing through the sampling resistor Rs;

[0018] The proportional-integral regulation circuit is connected to the differential amplifier circuit and the P-type MOSFET tube respectively, and is used to connect the output of the differential amplifier circuit to V c The signal is compared and adjusted and then output to control the saturation degree of the P-type MOSFET tube in the saturation region;

[0019] The control part includes a variable gain amplifier circuit, which is connected to a proportional-integral regulation circuit and is used to provide different reference signals for the proportional-integral regulation circuit.

[0020] The differential amplifier circuit includes an operational amplifier OP1, a resistor R 211 , resistor R 212 , resistor R 221 , resistor R 222 ;

[0021] The negative terminal of the operational amplifier OP1 is connected to the resistor R 211 One end, resistor R 221 One end, the positive end of the operational amplifier OP1 is connected to the resistor R 212 One end, resistor R 222 One end; resistance R 221 The other end is connected to the anode of diode D1 and one end of sampling resistor Rs; the cathode of diode D1 is grounded; the resistor R 222 The other end is grounded;

[0022] The other end of the sampling resistor Rs is connected to the resistor R 212 The other end is the drain of the P-type MOSFET.

[0023] The proportional-integral regulation circuit includes an operational amplifier OP2, a resistor R 23 , resistor R 24 , capacitor C 22 ;

[0024] The positive terminal of the operational amplifier OP2 is connected to the resistor R 211 The other end, the output end of operational amplifier OP1, and the negative end of operational amplifier OP2 are connected to resistors R 23 One end, resistor R 24 One end, resistor R 23 The other end is connected to V C Terminal, resistor R 24 The other end is connected to capacitor C 22 One end, capacitor C 22 The other end is connected to the resistor R g One end, output end of operational amplifier OP2, resistor R g The other end is connected to the gate of the P-type MOSFET tube, and the source of the P-type MOSFET tube is connected to the capacitor C 21 One end, voltage source V CC Terminal, capacitor C 21 The other end is grounded.

[0025] The variable gain amplifier circuit includes an operational amplifier OP3, a resistor R 251 , resistor R252 , resistor R 26 , single-pole single-throw analog switch SW, inverter;

[0026] The positive terminal of the operational amplifier OP3 is connected to the resistor R 251 One end, resistor R 252 One end, resistor R 251 The other end is connected to V ref Terminal, resistor R 252 The other end is connected to V C The output of the operational amplifier OP3 is connected to V C The negative end of the operational amplifier OP3 is connected to the resistor R 26 One end, the first active end of the single-pole single-throw analog switch SW; the resistor R 26 The other end is connected to V ref The second active end of the single-pole single-throw analog switch SW is connected to the inverter, and the fixed end of the single-pole single-throw analog switch SW is grounded.

[0027] The clamping circuit includes: an N-channel MOSFET tube, a voltage source V G , diode D1, voltage regulator diode D2, acceleration capacitor C s ;

[0028] The gate of the N-channel MOSFET is connected to a voltage source V G The source of the N-channel MOSFET is connected to the anode of diode D1, the cathode of diode D1 is connected to the cathode of Zener diode D2, and the acceleration capacitor C s Connected in parallel with Zener diode D2.

[0029] When the device under test is turned on, the V GS >V GS,th , the N-channel MOSFET is turned on, and the measured voltage V at the anode end of diode D1 is DS,m is the on-state voltage of the device under test.

[0030] When the device under test is turned off, the voltage regulator diode D2 is turned on, and the source voltage of the N-channel MOSFET tube is the voltage regulator value V of D2. z , N-channel MOSFET tube V GS =V G -V z -V D1 = <V GS,th , N-channel MOSFET is turned off, and the voltage V is measured DS,m V is the voltage regulation value of D2 z The diode D1 conduction voltage V D1 The acceleration capacitor C sThe measured voltage at the anode end of the diode D1 can be weakened due to the voltage spike caused by the switching process of the device under test. The voltage spike will damage the N-channel MOSFET and cause the oscilloscope to be easily overdriven, thereby reducing the test accuracy. This protects the N-channel MOSFET tube and improves the test accuracy.

[0031] The present invention provides a test system for dynamic on-resistance of a power GaN device, and the technical effects are as follows:

[0032] 1) The test system of the present invention has a simple structure and is easy to implement. The constant current source circuit has the advantage of fast stability, so that the proposed test platform has the potential to monitor the dynamic on-resistance of gallium nitride devices online.

[0033] 2) The clamping circuit of the test system of the present invention is composed of an N-channel MOSFET, a diode D1, a voltage regulator diode D2 and an acceleration capacitor C s The structure has the advantage of being simple; furthermore, due to the introduction of the clamping circuit, the measurement voltage V is reduced. DS,m The maximum value of the voltage that can be measured by the oscilloscope increases (n-bit oscilloscope division value = V max / 2 n ); In addition, the acceleration capacitor C s It suppresses the peak of the measured voltage, protects the N-channel MOSFET, and improves the measurement accuracy of the clamping circuit.

[0034] 3) In the main circuit part of the constant current source circuit of the test system of the present invention, the proportional-integral circuit adjusts the output current of the constant current source according to the voltage of the Vc terminal, so that the constant current source circuit has the advantage of constant output current; in addition, the proportional-integral circuit and the differential amplifier circuit are composed of an operational amplifier with a high slew rate, so that the output current of the constant current source circuit has the advantages of fast response and rapid stability;

[0035] 4) The control part of the constant current source circuit of the test system of the present invention is composed of an operational amplifier, a resistor and a single-pole single-throw switch, and has the advantage of a simple structure; in addition, this part of the circuit adopts a high-slew rate operational amplifier, so that this part of the circuit can quickly adjust the output voltage of the Vc terminal.

[0036] 5) The test system of the present invention, wherein the device under test group comprises a plurality of devices under test connected in series, can simultaneously apply the same test stress to each device under test, and has the advantage of high test efficiency; the test voltage of the test system is generated by a low-voltage power supply through a boost circuit, and no dedicated high-voltage power supply is required, thereby reducing the test cost; the constant current source adopted by the test system has a fast dynamic response and a large output current, and can quickly inject the test current into each device in the device under test group; the clamping circuit adopted by the test system has a simple structure and high test accuracy, and can accurately reflect the on-state voltage of the device under test;

[0037] 6) The test method of the test system of the present invention introduces the control tube Q C , by adjusting Q C The on time t s And low-voltage power output, conveniently adjust the test conditions of the device under test; by adjusting the constant current source injection current time t m , in conjunction with the clamping circuit, the changing trend of the on-state voltage of the device under test at different time scales can be observed, thereby reflecting the changing trend of the on-state resistance of the device under test. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] Figure 1 This is a schematic diagram of the structure of the dynamic on-resistance test system for GaN devices.

[0039] Figure 2 This is the circuit diagram of the main circuit part of the constant current source circuit.

[0040] Figure 3 This is the circuit diagram of the control part of the constant current source circuit.

[0041] Figure 4 This is the clamping circuit diagram.

[0042] Figure 5 This is the driving circuit structure diagram.

[0043] Figure 6 This is the working principle diagram of the test system.

[0044] Figure 7 The on-state voltage curve of the device under test under different voltage stresses.

[0045] Figure 8 This is a curve of on-resistance changing with voltage stress. DETAILED DESCRIPTION

[0046] A test system for dynamic on-resistance of a power GaN device, the structure of the test system is as follows Figure 1 As shown in FIG. 1 , the test system is composed of a low-voltage power supply, a boost circuit, a constant current source circuit, a clamp circuit, a test module, a heating module, a data acquisition system and a drive circuit. The boost circuit is used to boost the input low-voltage power supply to the required higher voltage stress; the test module is composed of a switch tube Q C and the device group Q1, Q2...Q n and the device group Q1, Q2...Q n The resistors R1, R2, and R n This circuit, combined with the control timing, can provide test conditions for the device group under test;

[0047] The constant current source circuit injects a constant current into the device under test when it is turned on;

[0048] The clamping circuit is used to clamp the voltage stress of the device under test and truly reflect the on-state voltage of the device under test;

[0049] The driving circuit is used to drive the test module; the driving circuit adopts Figure 5 As shown, the driver chip uses the ACPL-P346 optocoupler driver from AVAGO. The chip pin 1 is connected to the current limiting resistor R L Connect to the GPIO pin of the microcontroller, pin 3 is connected to the DGND pin of the microcontroller; pin 4 is given a negative voltage V EE , and the decoupling capacitor C f2 Filtering; Pin 5 drives resistor R f Connected to the gate of the device under test, R f With the off resistance R b and diode D b Parallel connection; pin 6 is given a positive voltage V DD , and the decoupling capacitor C f1 When GPIO is set high, pin 5 outputs V DD , through R f Drive the gate of the device under test to turn on the device under test; when the GPIO is set to a low level, pin 5 outputs V EE , the gate of the device under test passes through R b and D b Shutdown by pin 5.

[0050] The heating module is used to control the ambient temperature of the device under test; the heating module adopts the "Fan Yuhang" SET high-precision digital display heating platform, and the PCB board where the device under test is located is fixed to the guardrail part of the heating platform through preset screw holes, so that the device under test is directly in contact with the aluminum heating part of the heating platform.

[0051] The data acquisition system is used to collect the measured data. The data acquisition system uses a Tektronix TDS3054C four-channel oscilloscope, which has a bandwidth of 500MHz and a sampling rate of 5GSa / s.

[0052] Figure 2 The main circuit of the constant current source circuit is composed of a differential amplifier circuit, a sampling resistor Rs, a proportional-integral adjustment circuit and a P-type MOSFET T. The differential amplifier circuit is composed of an operational amplifier OP1, a resistor R 211 , resistor R 212 , resistor R 221 , resistor R 222The proportional-integral circuit is composed of an operational amplifier OP2, a resistor R 23 , resistor R 24 , capacitor C 22 The structure is used to compare the output of the differential amplifier circuit with the Vc signal and adjust the output to control the saturation degree of the P-type MOSFET T in the saturation region, thereby adjusting the output current of the constant current source.

[0053] Figure 2 The control part of the constant current source circuit includes a variable gain amplifier circuit, which is composed of an operational amplifier OP3, a resistor R 251 , resistor R 252 , resistor R 26 , a single-pole single-throw analog switch SW, and an inverter. This part of the circuit is used to provide different reference signals for the proportional-integral circuit.

[0054] Combination Figure 2 and Figure 3 Explain the working principle of the constant current source circuit:

[0055] When the trigger signal Sc is at a low level, the single-pole single-throw analog switch SW control signal is at a high level, the single-pole single-throw analog switch SW is turned on, and the operational amplifier OP3 and the resistor R 251 , resistor R 252 An inverting amplifier is formed, the operational amplifier OP3 outputs Vc=-Vref, the operational amplifier OP2 is forward saturated so that the gate-source voltage VGS of the P-type MOSFET T is greater than VGS,th, the P-type MOSFET T is turned off, and the constant current source is cut off;

[0056] When the trigger pulse Sc is at a high level, the single-pole single-throw analog switch SW control signal is at a level, the single-pole single-throw analog switch SW is turned off, and the operational amplifier OP3 and the resistor R 251 , resistor R 252 , resistor R 26 A follower is formed, and the operational amplifier OP3 outputs Vc=Vref, and the P-type MOSFET T starts to turn on. After the P-type MOSFET T is turned on, the current is output through the sampling resistor Rs, and the voltage on the sampling resistor Rs is sampled by the differential amplifier circuit. The output signal of the operational amplifier OP1 is compared with Vc and then adjusted by the proportional-integral adjustment circuit. The output signal of the operational amplifier OP2 controls the saturation degree of the P-type MOSFET T in the saturation region, thereby adjusting the output current.

[0057] The clamping structure is as follows: Figure 4 As shown in the figure, the clamp circuit consists of an N-channel MOSFET tube M, a voltage source V G , resistor R0, voltage zener diode D2, voltage source VCC When the device under test DUT is turned on, the V GS >V GS,th , N-channel MOSFET tube M is turned on, and the voltage V is measured DS,m is the sum of the on-state voltage of the N-channel MOSFET tube M and the on-state voltage of the device under test; when the device under test is turned off, the source voltage of the N-channel MOSFET tube M is the regulated voltage value V of D2 z , N-channel MOSFET tube M's V GS <V GS,th , N-channel MOSFET tube M is turned off, and the voltage V is measured DS,m V is the voltage regulation value of D2 z Adjusting the size of R can limit the current flowing through the N-channel MOSFET tube M and prevent the N-channel MOSFET tube M from self-heating.

[0058] The working principle of the test system is as follows Figure 6 As shown, Q C Conducting, the device group under test Q1~Q n Turn off, Q1~Q n Each tube bears voltage stress, adjust R1~R n The voltage stress on each tube can be adjusted; in order to prevent Q C and Q1~Q n At the same time, the dead zone period t2 to t3 is introduced; during the period t3 to t4, Q C Turn off, Q1~Q n Turn on, constant current source is Q1~Q n Inject current and measure Q1~Q n The conduction voltage of each tube can be calculated by Ohm's theorem to obtain the conduction resistance of each tube. The period from t1 to t2 is t s , the period from t3 to t4 is t m .

[0059] According to the above test method, a test system prototype containing a device under test was made. Using this prototype, the effect of voltage stress on the dynamic on-resistance of GaN devices was tested. s =10μs, t m =10μs, T=25℃, the device under test is GSP61008P, the on-state voltage of the device under test under different voltage stress is tested, and the results are as follows Figure 7 In order to better reflect the relationship between on-resistance and blocking voltage, the static on-resistance is used as the reference value, and the relationship between the on-resistance average value and voltage stress within 10μs after turn-on is plotted, as shown in Figure 8 As shown in the test results, it can be seen that as the off-state voltage increases, the on-resistance of the device under test increases accordingly.

[0060] The test system of the present invention has a simple structure, is convenient for measuring the dynamic on-resistance of a gallium nitride device, is beneficial for improving the reliability of a GaN power semiconductor device, and has practical application value.

Claims

1. A test system for dynamic on-resistance of power GaN devices, characterized in that The system includes: Low voltage power supply, boost circuit, constant current source circuit, clamp circuit, data acquisition system, drive circuit; The low voltage power supply is connected to a boost circuit, and the boost circuit is used to boost the input low voltage power supply to a high voltage; The test module includes a switch tube Q C , the device group under test Q1, Q2...Q n , control tube Q C The drain is connected to one side of the boost circuit, and the control tube Q C The source is connected to the drain of GaN device Q1, the source of GaN device Q1 is connected to the drain of GaN device Q2, the source of GaN device Q2 is connected to the drain of GaN device Q3, and so on. n-1 Source connection GaN device Q n Drain, GaN device Q n The source is grounded; The switch tube Q C The gate of the device under test group Q1, Q2...Q n The gates are all connected to the driving circuit; The device group Q1, Q2...Q n The source and drain of are connected in parallel with resistors R1, R2, and R n ; The device group Q1, Q2...Q n Connect a constant current source circuit, which is used to inject a constant current into the device under test when it is turned on; The resistors R1, R2, ... n The two ends are respectively connected to a clamping circuit, which is used to clamp the voltage stress of the device under test and reflect the on-state voltage of the device under test; the clamping circuit is connected to a data acquisition system.

2. A test system for dynamic on-resistance of a power GaN device according to claim 1, characterized in that: The system also includes a heating module, which is used to control the device groups Q1, Q2, ... n ambient temperature.

3. A test system for dynamic on-resistance of a power GaN device according to claim 1, characterized in that: The constant current source circuit comprises a main circuit part and a control part; The main circuit part includes a differential amplifier circuit, a sampling resistor Rs, a proportional-integral regulation circuit, and a P-type MOSFET; The differential amplifier circuit is connected to the sampling resistor Rs and is used to sample the output current of the constant current source flowing through the sampling resistor Rs; The proportional-integral regulation circuit is connected to the differential amplifier circuit and the P-type MOSFET tube respectively, and is used to connect the output of the differential amplifier circuit to V c The signal is compared and adjusted and then output to control the saturation degree of the P-type MOSFET tube in the saturation region; The control part includes a variable gain amplifier circuit, which is connected to a proportional-integral regulation circuit and is used to provide different reference signals for the proportional-integral regulation circuit.

4. A test system for dynamic on-resistance of a power GaN device according to claim 1, characterized in that: The differential amplifier circuit includes an operational amplifier OP1, a resistor R 211 , resistor R 212 , resistor R 221 , resistor R 222 ; The negative terminal of the operational amplifier OP1 is connected to the resistor R 211 One end, resistor R 221 One end, the positive end of the operational amplifier OP1 is connected to the resistor R 212 One end, resistor R 222 One end; resistance R 221 The other end is connected to the anode of diode D1 and one end of sampling resistor Rs; the cathode of diode D1 is grounded; the resistor R 222 The other end is grounded; The other end of the sampling resistor Rs is connected to the resistor R 212 The other end is the drain of the P-type MOSFET.

5. A test system for dynamic on-resistance of a power GaN device according to claim 1, characterized in that: The proportional-integral regulation circuit includes an operational amplifier OP2, a resistor R 23 , resistor R 24 , capacitor C 22 ; The positive terminal of the operational amplifier OP2 is connected to the resistor R 211 The other end, the output end of operational amplifier OP1, and the negative end of operational amplifier OP2 are connected to resistors R 23 One end, resistor R 24 One end, resistor R 23 The other end is connected to V C Terminal, resistor R 24 The other end is connected to capacitor C 22 One end, capacitor C 22 The other end is connected to the resistor R g One end, output end of operational amplifier OP2, resistor R g The other end is connected to the gate of the P-type MOSFET tube, and the source of the P-type MOSFET tube is connected to the capacitor C 21 One end, voltage source V CC Terminal, capacitor C 21 The other end is grounded.

6. A test system for dynamic on-resistance of a power GaN device according to claim 1, characterized in that: The variable gain amplifier circuit includes an operational amplifier OP3, a resistor R 251 , resistor R 252 , resistor R 26 , single-pole single-throw analog switch SW, inverter; The positive terminal of the operational amplifier OP3 is connected to the resistor R 251 One end, resistor R 252 One end, resistor R 251 The other end is connected to V ref Terminal, resistor R 252 The other end is connected to V C The output of the operational amplifier OP3 is connected to V C The negative end of the operational amplifier OP3 is connected to the resistor R 26 One end, the first active end of the single-pole single-throw analog switch SW; the resistor R 26 The other end is connected to V ref The second active end of the single-pole single-throw analog switch SW is connected to the inverter, and the fixed end of the single-pole single-throw analog switch SW is grounded.

7. A test system for dynamic on-resistance of a power GaN device according to claim 1, characterized in that: The clamping circuit includes: an N-channel MOSFET tube, a voltage source V G , diode D1, voltage regulator diode D2, acceleration capacitor C s ; The gate of the N-channel MOSFET is connected to a voltage source V G The source of the N-channel MOSFET is connected to the anode of diode D1, the cathode of diode D1 is connected to the cathode of Zener diode D2, and the acceleration capacitor C s Connected in parallel with Zener diode D2.

8. A method for testing dynamic on-resistance of a power GaN device using a test system as claimed in any one of claims 1 to 7, characterized in that: When the device under test is turned on, the V GS >V GS,th , the N-channel MOSFET is turned on, and the measured voltage V at the anode end of diode D1 is DS,m is the on-state voltage of the device under test; When the device under test is turned off, the voltage regulator diode D2 is turned on, and the source voltage of the N-channel MOSFET tube is the voltage regulator value V of D2. z , N-channel MOSFET tube V GS =V G -V z -V D1 = <V GS,th , N-channel MOSFET is turned off, and the voltage V is measured DS,m V is the voltage regulation value of D2 z The diode D1 conduction voltage V D1 The sum of the acceleration capacitor C s The voltage spike at the anode end of the diode D1 caused by the switching process of the device under test can be weakened, thereby protecting the N-channel MOSFET tube and improving the test accuracy.

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