Dormancy wake-up circuit

By designing a variety of wake-up detection modules and power control circuits in electronic devices, efficient switching between sleep and wake-up states of MCU is achieved, and the problem of insufficient battery life in the prior art is solved, which significantly extends the standby time of the device and reduces the power consumption.

CN119165941APending Publication Date: 2024-12-20KUNSHAN HUANAN ELECTRONIC TECH CO LTD
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Patent Information

Application Number
CN202411223617.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-09-02
Publication Date
2024-12-20

AI Technical Summary

Technical Problem

The existing sleep wake-up mechanism is difficult to meet the battery life of electronic devices in some scenarios, especially when the power is off of the MCU, the wake-up method becomes limited, and increasing the wake-up method will lead to increased system power consumption.

Method used

A sleep wake-up circuit is designed, including a wake-up detection module, a trigger module and a power switch module. It detects wake-up events through various wake-up methods (such as vibration, open cover, remove, and local clock), and controls power supply through circuits such as MOSFET. Ensure efficient switching between sleep and wake-up states.

Benefits of technology

It significantly extends the standby time of electronic devices, reduces power consumption, avoids the limitation of wake-up mode, and improves the reliability and battery life of the system.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention provides a sleep wake-up circuit. The circuit comprises a wake-up detection module, a trigger module, a power switch module and a micro control unit (MCU), the MCU comprises a system normal working module. The trigger module is used for outputting a first level or a second level through the second pin according to the state of the MCU; and outputting a trigger signal through a fifth pin according to the detection result of the wake-up event. And the power switch module is used for controlling whether the power supply can supply power to the system normal working module or not according to the level output by the second pin and the trigger signal. The embodiment of the invention can be applied to the electronic equipment of the vehicle, and the endurance time of the battery can be greatly prolonged.
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Description

Technical Field

[0001] The present application relates to the technical field of integrated circuits, and more specifically, to a sleep wake-up circuit. Background Art

[0002] With the development of technology, electronic devices have more and more functions, and accordingly, the power consumption requirements are getting higher and higher. Taking the microcontroller unit (MCU) as an example, in order to extend the battery life, a sleep wake-up mechanism can be set for the MCU. In the non-working state, the MCU can enter the sleep state; when a wake-up event is triggered, it can be restored to the working state. In this way, the circuit life can be improved.

[0003] However, in some scenarios, even with the sleep-wake mechanism, it is still difficult to meet the battery life requirements. Summary of the invention

[0004] The present application provides a sleep wake-up circuit, which can significantly increase the circuit's battery life.

[0005] In a first aspect, a sleep-wake-up circuit is provided. The sleep-wake-up circuit comprises: a wake-up detection module, a trigger module, a power switch module and a microcontroller unit MCU; the MCU comprises a system normal operation module.

[0006] The MCU is used to: output a sleep signal when entering the sleep state, and the sleep signal is used to indicate that the MCU enters the sleep state; or, when the normal working module of the system is in the working state, send a reset signal, and the reset signal is used to indicate that the trigger module is reset. The wake-up detection module is used to: detect the wake-up event; when the wake-up event is detected, send a wake-up signal.

[0007] The trigger module includes a first pin, a second pin, a third pin, a fourth pin and a fifth pin. The trigger module is used to: receive a sleep signal through the first pin; output a first level through the second pin according to the sleep signal; receive a reset signal through the third pin, and output a second level through the second pin according to the reset signal; receive a wake-up signal through the fourth pin, and send a trigger signal through the fifth pin according to the wake-up signal; the power switch module is electrically connected to the second pin of the trigger module through the first circuit, and is electrically connected to the fifth pin of the trigger module through the second circuit.

[0008] The power switch module is used to: when the second pin outputs the first level and no trigger signal is detected, control the power supply to cut off the power to the normal working module of the system; or, when the second pin outputs the second level, or, when the second pin outputs the first level and a trigger signal is detected, control the power supply to supply power to the normal working module of the system.

[0009] Exemplarily, the power switch module may include a metal oxide semiconductor field effect transistor (MOSFET); MOSFET may be referred to as a MOS transistor. For example, the power switch module may include one or more MOS transistors.

[0010] In some possible implementations, the power switch module may include a first MOS tube and a second MOS tube. The first MOS tube may include: a sixth pin for grounding, a seventh pin for connecting to the second circuit, and an eighth pin for connecting to the second MOS tube. The second MOS tube may include: a ninth pin for grounding, a tenth pin, and an eleventh pin for connecting to the third circuit. Among them, the tenth pin can be used to connect to the first circuit and the fourth circuit; the fourth circuit can be used to connect the tenth pin to the eighth pin of the first MOS tube; the first circuit and the fourth circuit may be provided with a connection point at one end close to the tenth pin. The connection state between the ninth pin and the eleventh pin can be used to control the conduction or disconnection of the third circuit, and the third circuit can be a circuit for the power supply to supply power to the normal working module of the system.

[0011] In some possible implementations, when the ninth pin and the eleventh pin of the second MOS tube are in the disconnected state, the third circuit may be in the on state; or, when the ninth pin and the eleventh pin of the second MOS tube are in the on state, the third circuit may be in the off state.

[0012] In some possible implementations, when the trigger module outputs the second level, the ninth pin and the eleventh pin of the second MOS tube can be in a disconnected state; when the trigger module outputs the first level and the sixth pin and the eighth pin of the first MOS tube are in a disconnected state, the ninth pin and the eleventh pin of the second MOS tube can be in a disconnected state; or, when the trigger module outputs a first level signal through the first circuit and the sixth pin and the eighth pin of the first MOS tube are in a conductive state, the ninth pin and the eleventh pin of the second MOS tube can be in a conductive state.

[0013] In some possible implementations, when the power switch module does not receive a trigger signal, the sixth pin and the eighth pin of the first MOS tube may be in a disconnected state; or, when the power switch module receives a trigger signal, the sixth pin and the eighth pin of the first MOS tube may be in a conductive state.

[0014] In some possible implementations, the power switch module may include a first pull-down resistor and / or a second pull-down resistor, one end of the first pull-down resistor is connected to the seventh pin of the first MOS tube, and one end of the second pull-down resistor is connected to the tenth pin of the second MOS tube.

[0015] In some possible implementations, the wake-up detection module may include one or more of: a vibration wake-up detection module, a cover-opening wake-up detection module, a removal wake-up detection module, and a local clock wake-up detection module.

[0016] In some possible implementations, the MCU may further include a system clock module, and the power supply may normally supply power to the system clock module when the MCU is in a sleep state.

[0017] In some possible implementations, the power supply normally supplies power to the trigger module when the MCU is in a sleep state.

[0018] In a second aspect, an electronic device is provided, which may include the sleep-wake-up circuit in the first aspect and any possible implementation thereof. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 It is a structural schematic diagram of a sleep wake-up circuit provided in an embodiment of the present application;

[0020] Figure 2 is a structural schematic diagram of a power switch module provided in an embodiment of the present application;

[0021] Figure 3 It is a structural schematic diagram of another sleep wake-up circuit provided in an embodiment of the present application;

[0022] Figure 4 It is a schematic diagram of a working scenario of a sleep wake-up circuit provided in an embodiment of the present application. DETAILED DESCRIPTION

[0023] The technical solution in this application will be described below in conjunction with the accompanying drawings.

[0024] Electronic devices are widely used in all walks of life. For battery-powered electronic devices, by setting a sleep and wake-up mechanism, the power consumption of the electronic devices can be greatly reduced and the standby time of the electronic devices can be increased.

[0025] For example, the power consumption of the system is directly related to the number of components running in the system and the performance of the components. In the dormant state, the MCU, single-chip microcomputer and other processing units in the electronic device can disconnect the battery from supplying power to certain components to reduce power consumption; when awakened, these components can be restored to normal working state.

[0026] Considering the cost and system complexity, the MCU can control the sleep mode; after the MCU is in sleep mode, all external power supplies can be disconnected to achieve low power consumption. However, when the components outside the MCU are powered off, the wake-up methods of the system will become extremely limited; and if the wake-up methods are increased, the system power consumption will increase.

[0027] In view of this, an embodiment of the present application provides a sleep wake-up circuit.

[0028] For example, Figure 1 Schematic diagram of a sleep wake-up circuit provided by an embodiment of the present application. Figure 1 As shown, the sleep wake-up circuit 10 may include a wake-up detection module 11, a trigger module 12, a power switch module 13 and an MCU. The MCU may include a system normal operation module 15; the MCU may also include a system clock module 14.

[0029] For an electronic device including the sleep wake-up circuit, when there is no external power supply, the MCU and the trigger module 12 can be powered by its own power supply.

[0030] When the MCU enters the sleep state, a sleep signal may be output. For example, the sleep signal may be used to indicate that the MCU enters the sleep state. For another example, the sleep signal may be used to indicate that the power supply to the normal working module 15 of the system is cut off. Accordingly, the trigger module 12 may receive the sleep signal.

[0031] When the normal system operation module 15 in the MCU is in the working state, the MCU can send a reset signal to instruct the trigger module to reset. For example, the MCU can send the reset signal when the normal system operation module 15 enters the working state, or it can also send the reset signal after it enters the working state for a period of time.

[0032] The wake-up detection module 11 can be used to: detect a wake-up event; and send a wake-up signal when a wake-up event is detected. The wake-up signal can be used to instruct the MCU to wake up.

[0033] Exemplarily, the wake-up detection module 11 can detect one or more wake-up events. For example, the wake-up detection module 11 can support one or more wake-up modes such as vibration wake-up, cover opening wake-up, removal wake-up, and local clock wake-up (also called RTC wake-up).

[0034] In some embodiments, different wake-up methods can be implemented by different detection modules. For example, a vibration wake-up detection module can be used to detect a vibration wake-up method; a cover-opening wake-up detection module can be used to detect a cover-opening wake-up method; a removal wake-up detection module can be used to detect a removal wake-up method; and a local clock wake-up detection module can be used to wake up the MCU at a preset time according to a local clock. Accordingly, the wake-up detection module 11 can include one or more of a vibration wake-up detection module, a cover-opening wake-up detection module, a removal wake-up detection module, and a local clock wake-up detection module. For another example, an OR gate circuit can be used to connect different detection modules, so that the sleep wake-up circuit 10 can support a variety of different wake-up methods and avoid interference between different wake-up methods.

[0035] The trigger module 12 may include a plurality of pins, for example, a first pin to a fifth pin.

[0036] Exemplarily, the trigger module 12 may receive a sleep signal through a first pin; and output a first level through a second pin according to the sleep signal. The trigger module 12 may also receive a reset signal through a third pin; and output a second level through a second pin according to the reset signal. The trigger module 12 may also receive a wake-up signal through a fourth pin; and send a trigger signal through a fifth pin according to the wake-up signal. The trigger signal may be used to indicate that the power supply to the normal working module 15 of the system is restored. For example, the first level may be a high level, and the second level may be a low level.

[0037] It should be noted that in some possible implementations, the second level may be 0V; that is, at this time, the second pin of the trigger module 12 may not actually output a voltage to the outside. However, since the voltage corresponding to the second level is different from that corresponding to the first level, other components may have different performances based on the output state of the second pin; even if the second level is 0V, it can be understood that the second pin outputs a low level.

[0038] In some embodiments, the trigger module 12 may further include other pins, such as pins for connecting to a power source.

[0039] It is understandable that the first pin, the second pin, the third pin, the fourth pin or the fifth pin may be a single pin, or may include multiple pins. For example, in order to improve the reliability of the system, the trigger module 12 may include multiple pins for receiving a reset signal, and the multiple pins may be connected to the MCU respectively; in this scenario, the multiple pins may all correspond to the third pin. For another example, the trigger module 12 may be a single trigger; in this case, the first pin to the fifth pin are all pins of the trigger. For another example, the trigger module 12 may be constructed of multiple separate electronic devices and corresponding connection circuits; in this case, the first pin to the fifth pin may belong to different electronic devices in the trigger module 12.

[0040] The power switch module 13 can be electrically connected to the second pin of the trigger module 12 through the first circuit; and can also be electrically connected to the fifth pin of the trigger module 12 through the second circuit.

[0041] It is understandable that electronic components (such as resistors, diodes, etc.) may be provided in the first circuit and / or the second circuit. Figure 1 The electronic components included in the first circuit and the second circuit are not shown. The required electronic components can be arranged in the first circuit and / or the second circuit according to actual needs.

[0042] The power switch module 13 can be used to: when the wake-up module 12 outputs the first level and no trigger signal is detected, control the power supply to supply power to the normal operating module 15 of the system; when the wake-up module 12 outputs the first level and a trigger signal is detected, control the power supply to cut off the power to the normal operating module 15 of the system; or, when the wake-up module 12 outputs the second level, control the power supply to cut off the power to the normal operating module 15 of the system.

[0043] For example, the power switch module 13 may include multiple MOS tubes, and may also include a power supply circuit between the power supply and the system normal operation module 15; based on the level and trigger signal output by the wake-up module 12 at the second pin, the on and off state of the MOS tube can be controlled, and then the on and off state of the power supply circuit can be controlled.

[0044] In some possible implementations, the power switch module 13 may include a first MOS transistor and a second MOS transistor.

[0045] Exemplarily, the first MOS tube may include a sixth pin, a seventh pin, and an eighth pin. The sixth pin may be used for grounding; the seventh pin may be used for connecting to the second circuit; and the eighth pin may be used for connecting to the second MOS tube. For example, the seventh pin of the first MOS tube may be connected to the fifth pin of the trigger module 12 through the above-mentioned second circuit; accordingly, the first MOS tube may receive a trigger signal through the seventh pin. For another example, the trigger signal may be a high-level signal, and when the trigger signal is received, the sixth pin and the eighth pin of the first MOS tube may be turned on; and when the trigger signal is not received, the sixth pin and the eighth pin of the first MOS tube may be turned off.

[0046] Exemplarily, the second MOS tube may include a ninth pin, a tenth pin, and an eleventh pin. The ninth pin may be used for grounding. The tenth pin may be used for connecting with the first circuit and the fourth circuit; the fourth circuit may be used for connecting the tenth pin and the eighth pin of the first MOS tube; the fourth circuit and the first circuit may be provided with a connection point at one end close to the tenth pin. The eleventh pin may be used for connecting with the third circuit; the third circuit may be a circuit for the power supply to supply power to the normal working module 15 of the system.

[0047] The power switch module 13 can be used to control the third circuit to be turned on or off through the connection state between the ninth pin and the eleventh pin. In other words, the tenth pin can be the control pin of the second MOS tube, and the on and off control of the third circuit can be achieved by controlling the connection state between the ninth pin and the eleventh pin.

[0048] In some possible implementations, when the ninth pin and the eleventh pin are in a disconnected state, the third circuit may be in a turned-on state; or, when the ninth pin and the eleventh pin are in a turned-on state, the third circuit may be in a turned-off state.

[0049] In some possible implementations, when the trigger module outputs the second level, the ninth pin and the eleventh pin of the second MOS tube can be in a disconnected state; when the trigger module outputs the first level and the sixth pin and the eighth pin of the first MOS tube are in a disconnected state, the ninth pin and the eleventh pin of the second MOS tube can be in a disconnected state; or, when the trigger module outputs a first level signal through the first circuit and the sixth pin and the eighth pin of the first MOS tube are in a conductive state, the ninth pin and the eleventh pin of the second MOS tube can be in a conductive state.

[0050] In some possible implementations, when the power switch module does not receive a trigger signal, the sixth pin and the eighth pin of the first MOS tube are in a disconnected state; or, when the power switch module receives a trigger signal, the sixth pin and the eighth pin of the first MOS tube are in a conductive state.

[0051] Assuming that the first MOS tube and the second MOS tube are N-channel MOS tubes, the following combination Figure 2 The power switch module 13 is described as an example.

[0052] For example, Figure 2 It is a structural schematic diagram of a power switch module 13 provided in an embodiment of the present application.

[0053] like Figure 2 As shown, the power switch module 13 may include MOS transistors Q1 and Q2. Pin 1 of the MOS transistor Q1 may be grounded; pin 2 of the MOS transistor Q1 may be connected to the second circuit; pin 3 of the MOS transistor Q1 may be connected to the MOS transistor Q2. Pin 1 of the MOS transistor Q2 may be grounded; pin 2 of the MOS transistor Q2 may be connected to the first circuit and may also be connected to pin 2 of the MOS transistor Q1; pin 3 of the MOS transistor Q2 may be connected to the third circuit.

[0054] exist Figure 2 In the embodiment, the MOS transistor Q1 may correspond to the first MOS transistor, and pins 1 to 3 of the MOS transistor Q1 may correspond to the sixth to eighth pins respectively; the MOS transistor Q2 may correspond to the second MOS transistor, and pins 1 to 3 of the MOS transistor Q2 may correspond to the ninth to eleventh pins respectively.

[0055] In some embodiments, the circuit switch module 13 may include a pull-down resistor R1 and / or a pull-down resistor R2. One end of the pull-down resistor R1 may be connected to the pin 2 of the MOS transistor Q1; one end of the pull-down resistor R2 may be connected to the pin 2 of the MOS transistor Q2.

[0056] Assume that the first level is a high level, the second level is a low level, and the trigger signal is a high level signal. Figure 2 The working modes of the MOS tubes Q1 and Q2 and the third circuit are described by way of example.

[0057] When the MCU is in a dormant state, when the system does not detect a wake-up event, the trigger module 12 will not output a trigger signal through the fifth pin; accordingly, the pin 2 of the MOS tube Q1 is at a low level, and the pins 1 and 3 of the MOS tube Q1 will be in a disconnected state. Since the trigger module 12 can output a high level through the second pin when the MCU is in a dormant state; accordingly, the pin 2 of the MOS tube Q2 is at a high level, the pins 1 and 3 of the MOS tube Q2 will be turned on, the third circuit will be in a disconnected state, and the power supply to the normal working module 15 of the system will be disconnected.

[0058] When the MCU is in a dormant state, when the system detects a wake-up event, the trigger module 12 can output a trigger signal through the fifth pin; accordingly, the pin 2 of the MOS tube Q1 is high, so that the pins 1 and 3 of the MOS tube Q1 are turned on. In this scenario, the pin 2 of the MOS tube Q2 will be grounded, and even if the trigger module 12 outputs a high level through the second pin, the pins 1 and 3 of the MOS tube Q2 will be in a disconnected state; accordingly, the third circuit is in a conducting state, and the power supply can supply power to the normal working module of the system. The MCU will wake up from the dormant state and be in a working state.

[0059] When the MCU is in working state, by resetting the trigger module 12, the trigger module 12 can output a low level through the second pin; accordingly, pins 1 and 3 of the MOS tube Q2 will be in a disconnected state, the third circuit will be in a conducting state, and the power supply can normally supply power to the normal working module 15 of the system.

[0060] Combination of the above Figure 1 and Figure 2 The sleep wake-up circuit in the embodiment of the present application is exemplarily described. Figure 3 Another sleep-wake-up circuit provided in the embodiment of the present application is exemplarily described. The sleep-wake-up circuit can be understood as an extension or deformation of the sleep-wake-up circuit 10 .

[0061] For example, Figure 3 Schematic diagram of the sleep / wake-up circuit 20 provided in an embodiment of the present application.

[0062] in, Figure 3 (a) shows the wake-up detection module and the trigger module in the sleep wake-up circuit 20; Figure 3 (a) in FIG. 1 shows a power switch module in the sleep / wake-up circuit 20 .

[0063] like Figure 3 As shown, the sleep wake-up circuit 20 can support multiple wake-up modes: vibration wake-up, cover opening wake-up, removal wake-up and local clock wake-up.

[0064] For example, in the sleep wake-up circuit 20, the wake-up detection module may include wake-up detection chips U30 and U31, such as Figure 3 As shown. An OR gate circuit can be used to connect the chips U30, U31 and the trigger U4. When the MCU is in a dormant state, the dormant wake-up circuit 20 first detects which wake-up event, and then wakes up the MCU based on this wake-up event. In this way, multiple wake-up methods can be made non-conflicting, and no matter which wake-up method is used, the MCU can be successfully woken up.

[0065] Local clock wake-up and removal wake-up can be implemented by the wake-up detection chip U30. When the MCU is awakened by the local clock wake-up method, the chip U30 can receive the corresponding signal #1 through its pin A. When the MCU is awakened by the removal wake-up method, the chip U30 can receive the corresponding signal #2 through its pin B. Based on the wake-up event corresponding to the above wake-up method, the chip U30 can send a wake-up signal through its pin Y; accordingly, the trigger U4 can receive the signal.

[0066] Vibration wake-up and cover-open wake-up can be implemented by the wake-up detection chip U31. When the MCU is awakened by vibration wake-up, the chip U31 can receive the corresponding signal #3 through its pin A. When the MCU is awakened by cover-open wake-up, the chip U31 can receive the corresponding signal #4 through its pin B. Based on the wake-up events corresponding to the above wake-up methods, the chip U31 can send a wake-up signal through its pin Y; accordingly, the trigger U4 can receive the signal.

[0067] Exemplarily, in the sleep-wake-up circuit 20 , the trigger module may include a trigger U4 . The trigger U4 may include a plurality of pins, such as pins 1 to 14 .

[0068] Pin 1 and pin 13 of trigger U4 can be used to receive signal #5, and trigger U4 can reset itself according to the signal; that is, signal #5 corresponds to the reset signal, and pin 1 and pin 13 can correspond to the third pin. For example, after waking up, MCU can send a high pulse signal to pin 1 and / or 13 of trigger U4; trigger U4 can reset according to the high pulse signal, so as to be ready for the next sleep and wake-up.

[0069] The pin 11 of the trigger U4 can be used to receive the signal #6, and the trigger U4 can know that the MCU is in a sleep state according to the signal #6. That is, the signal #6 can correspond to the sleep signal, and the pin 11 can correspond to the first pin mentioned above.

[0070] Pin 9 of trigger U4 can be used to send signal #7, and pin 9 can also be called a sleep enable pin. The output state of pin 9 can include a high level state and a low level state. For example, when the MCU is in a sleep state, signal #7 can be output, and signal #7 can be a high level signal. For another example, after the trigger U4 is reset according to signal #5, a low level can be output through pin 9, and even its output can be 0. Pin 9 can correspond to the second pin mentioned above; the circuit for transmitting signal #7 between the trigger U4 and the MOS tube Q14 can correspond to the first circuit mentioned above.

[0071] Pin 3 of trigger U4 may be used to receive a wake-up signal sent by U30 and / or U31 ; the pin 3 may correspond to the fourth pin mentioned above.

[0072] Pin 5 of trigger U4 can be used to send signal #8; when the MCU is in sleep mode, when it is determined that the power supply to the normal working module of the MCU system needs to be restored, trigger U4 can output signal #8 through pin 5. Pin 5 can correspond to the fifth pin mentioned above; signal #8 can correspond to the trigger signal mentioned above; the circuit for transmitting signal #8 between trigger U4 and MOS tube Q15 can correspond to the second circuit mentioned above.

[0073] For example, Figure 3 The MOS tube Q15 in the Figure 2 The MOS tube Q1 in the Figure 3 The pull-down resistor R89 ​​in Figure 2 The pull-down resistor R1 in Figure 3 The MOS tube Q14 in the Figure 2 The MOS tube Q2 in the Figure 3 The pull-down resistor R84 in Figure 2 The pull-down resistor R2 in.

[0074] In one embodiment, the trigger U4 may be 74LVC74XTS14G / TR, or may be a trigger having the same or similar functions as 74LVC74XTS14G / TR. Figure 3 , combined with the relevant technical content of 74LVC74XTS14G / TR and other triggers, the functions / purposes of the above pins 1 to 14 are known, which will not be repeated here.

[0075] In another embodiment, the wake-up mode supported by the sleep wake-up circuit 20 may also include external DC power supply wake-up. Figure 3 As shown, the external DC power supply wake-up will generate signal #9, which will cause pins 1 and 3 of the MOS tube Q15 to be turned on, and the sleep wake-up circuit can cut off the power supply to the normal working module 15 of the system.

[0076] In another embodiment, the specifications of the electronic components such as resistors, capacitors, chips, etc. included in the sleep-wake-up circuit 20 can be determined according to actual conditions. For example, the resistance value of the resistor R89 ​​can be 1 (mega, M) ohm; the resistance value of the resistor R86 can be 100 kilo-, k) ohms.

[0077] Understandably, Figure 3 The specifications of the electronic components shown are only examples, and electronic components of other specifications may also be used according to actual needs.

[0078] The following combination Figure 4 The scenario shown is used to exemplify the working mode of the sleep wake-up circuit 20. Figure 4 When the power supply voltage of the external DC power supply (denoted as DC_IN), the power supply voltage of the battery (denoted as VBAT power supply), and the power supply voltage of the normal working module 15 of the system (denoted as 3V3VDD) are high levels, it can be indicated that it is in a power supply state; when DC_IN, VBAT power supply, and 3V3VDD are low levels, it can be indicated that it is in a non-power supply state.

[0079] like Figure 4 As shown, at time 0, DC_IN powers on the MCU, and the MCU sends a high-level signal #5 to reset the trigger U4, so that the trigger U4 is ready for the next sleep and wake-up process in advance. At time 1, the external DC power supply is powered off and switched to the battery to power the MCU. From time 0 to time 2, the MCU is in normal working state, and 3V3VDD is normally powered for the normal working module 15 of the system.

[0080] At time 2, the MCU enters the sleep state, and the MCU can output a high-level signal #6. Correspondingly, the trigger U4 can output a high-level signal #7; the trigger U4 can maintain a high-level output at its pin 9 until receiving the next signal #5. From time 2 to time 3, since no trigger event is detected, pins 1 and 3 of the MOS tube Q15 are disconnected, pin 2 of the MOS tube Q14 is high, and pins 1 and 3 of Q14 will be turned on; 3V3VDD no longer supplies power to the normal operation module 15 of the system.

[0081] At time 3, the sleep wake-up circuit detects a high-level signal #1, and the trigger U4 will output a high-level signal #8. Accordingly, the pin 2 of the MOS tube Q15 is at a high level, and its pins 1 and 3 will be turned on, so that the pin 2 of the MOS tube Q14 is grounded; the pin 2 of the MOS tube Q14 will be at a low level, and the pins 1 and 3 of the MOS tube Q14 will be disconnected; 3V3VDD resumes powering the normal operation module 15 of the system. The MCU is awakened from sleep.

[0082] At time 4, the MCU sends signal #5 to reset the trigger U4, so that the trigger U4 is ready for the next round of sleep and wake-up process in advance.

[0083] At time 5, the MCU enters the sleep state again, and the 3V3 VDD no longer supplies power to the normal operation module 15 of the system. At time 6, the MCU is awakened again. At time 7, the trigger U4 is reset again.

[0084] In some possible implementations, the MCU may enter the sleep state again in a short time after being awakened; if the trigger U4 fails to prepare for the next sleep and wake-up process in advance, the circuit 20 may not work as expected when entering the next round of sleep. In view of this, the time difference between time 3 and time 4 can be in the millisecond level. For example, 5 milliseconds, 10 milliseconds. In some implementations, the trigger U4 is even reset when the MCU is awakened.

[0085] It should be noted that in Figure 3 In the circuit shown, from time 0 to time 8, CPU_VBAT can normally supply power to the trigger U4 and the clock part of the MCU.

[0086] Combination of the above Figure 4 The working mode of the sleep-wake-up circuit 20 is described in an exemplary manner. The working mode of the sleep-wake-up circuit 20 is described in an exemplary manner in combination with the truth table corresponding to the sleep-wake-up circuit 20.

[0087] Exemplarily, the truth table corresponding to the sleep-wake-up circuit 20 may be as shown in Table 1.

[0088] Table 1 Truth table

[0089]

[0090]

[0091] As shown in Table 1, the sleep wake-up circuit 20 can support the input of two types of external DC power supplies, 12V and 5V. A to M can represent the voltage at different positions of the sleep wake-up circuit 20. The positions represented by A to M can refer to Figure 3 . For a certain position, a logic "1" can be used to indicate that the voltage at the position is a high level, and a logic "0" can be used to indicate that the voltage at the position is a low level. For the sleep wake-up circuit 20, for wake-up methods such as removal wake-up and vibration wake-up, the circuit supports rising edge wake-up, which is reflected as "01" in Table 1. "X" can indicate that the voltage at the position in this scenario can be any voltage.

[0092] For example, when the external DC power supply is used, the position A is at a high level, that is, the sleep wake-up circuit 20 allows 3V3VDD to power the normal operation module 15 of the system.

[0093] For another example, when the battery is normally powered, the MCU is in a normal working state, the position A is at a high level, and the sleep wake-up circuit 20 allows 3V3VDD to power the normal working module 15 of the system.

[0094] For another example, when in sleep mode, the trigger U4 outputs a high-level signal #7, position H is high, and pin 2 of the MOS tube Q14 (i.e., position E) is high; when the system does not detect a wake-up event, position M is low, and pin 2 of the MOS tube Q15 (i.e., position F) is low. The sleep wake-up circuit 20 disconnects the 3V3VDD power supply to the normal operation module 15 of the system, and position A is low.

[0095] For another example, when a wake-up event is detected (i.e., a rising edge appears at any of positions I, K, J, and L), the trigger U4 outputs a high-level signal #8, and position M is at a high level; accordingly, pin 2 of the MOS tube Q15 (i.e., position F) is at a high level, and pins 1 and 3 of the MOS tube Q15 are turned on, causing position E to become a low level; position A becomes a high level, that is, the sleep wake-up circuit 20 allows 3V3VDD to power the normal operating module 15 of the system.

[0096] For example, it is assumed that a circuit in which a certain MCU is located includes the above-mentioned sleep wake-up circuit 10 / 20, an anti-removal device, a GPS module, and a low-dropout regulator (LDO). The standby time of the MCU is exemplarily described in combination with different schemes in the following embodiments.

[0097] Table 2

[0098]

[0099] In one embodiment, when in standby mode, the MCU is set to a sleep state, and only a portion of the system clock module in the MCU is powered; the MCU can be awakened from sleep mode by means of removal awakening, local clock awakening, etc. This solution can be recorded as Solution 1.

[0100] In another embodiment, when in standby mode, the MCU is set to a sleep state, and all modules in the MCU are powered; the MCU can be awakened from sleep mode by means of removal awakening, local clock awakening, etc. This solution can be recorded as Solution 2.

[0101] In another embodiment, when in standby mode, the MCU is set to a sleep state, and all modules in the MCU are powered; the MCU can be awakened from sleep by means of removal awakening, local clock awakening, etc. This solution can be recorded as Solution 3.

[0102] The current and theoretical standby time of each part in Scheme 1 to Scheme 3 may be shown in Table 2 above.

[0103] For example, taking Scheme 1 as an example, in the sleep state, the theoretical current of the MCU is 0.77μA, the current of the trigger (such as trigger U4) is 17.7μA, the current of the LDO itself is 1μA, the current of the anti-removal device is 6.6μA, and the current of the GPS device is 10μA. In the standby state, the theoretical value of the current in the circuit can be 36.07μA; when the battery capacity is 200 milliampere hours (mAH), the theoretical standby time of the circuit is about 231 days. Compared with Scheme 2, the theoretical standby time of Scheme 1 can be significantly extended.

[0104] In addition, in actual scenarios, due to the influence of factors such as the pull-up circuit, in the standby state, the measured value of the current in the circuit may be greater than the theoretical value (for example, the measured value of Scheme 1 is about 108μA, which is greater than the theoretical value of 36.07μA). Compared with Scheme 1, since the power supply to the normal working module of the system in the MCU is not cut off in Scheme 2, the measured value of Scheme 2 will be much greater than the measured value of Scheme 1. Therefore, in terms of standby time, both the theoretical value and the measured value of Scheme 1 are significantly better than Scheme 2. Based on Scheme 1, the standby time of the battery can be greatly extended, the required battery capacity can be reduced, which is conducive to reducing costs and improving economic benefits.

[0105] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0106] In the several embodiments provided in the present application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0107] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0108] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0109] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application can be essentially or partly embodied in the form of a software product that contributes to the prior art. The computer software product is stored in a storage medium and includes several instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods described in the various embodiments of the present application. The aforementioned storage medium includes: various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory, a random access memory, a magnetic disk, or an optical disk.

[0110] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A sleep wake-up circuit, characterized in that: The sleep wake-up circuit includes: a wake-up detection module, a trigger module, a power switch module and a microcontroller unit MCU, wherein the MCU includes a system normal working module. The MCU is used to: output a sleep signal when entering a sleep state, the sleep signal is used to instruct the MCU to enter a sleep state; or, when the normal working module of the system is in a working state, send a reset signal, the reset signal is used to instruct the trigger module to reset; The wake-up detection module is used to: detect a wake-up event; and send a wake-up signal when the wake-up event is detected; The trigger module includes a first pin, a second pin, a third pin, a fourth pin and a fifth pin; The trigger module is used to: receive the sleep signal through the first pin; output the first level through the second pin according to the sleep signal; receive the reset signal through the third pin, and output the second level through the second pin according to the reset signal; receive the wake-up signal through the fourth pin, and send a trigger signal through the fifth pin according to the wake-up signal; The power switch module is electrically connected to the second pin of the trigger module through a first circuit, and is electrically connected to the fifth pin of the trigger module through a second circuit; The power switch module is used to: when the second pin outputs the first level and the trigger signal is not detected, control the power supply to cut off the power of the normal working module of the system; or, When the second pin outputs the second electrical level, or when the second pin outputs the first electrical level and the trigger signal is detected, the power supply is controlled to supply power to the normal operating module of the system.

2. The sleep wake-up circuit according to claim 1, characterized in that: The power switch module includes a first MOS tube and a second MOS tube. The first MOS transistor comprises: a sixth pin for grounding, a seventh pin for connecting to the second circuit, and an eighth pin for connecting to the second MOS transistor; The second MOS tube comprises: a ninth pin and a tenth pin for grounding, and an eleventh pin for connecting to the third circuit; The tenth pin is used to connect with the first circuit and the fourth circuit, the fourth circuit is used to connect the tenth pin and the eighth pin of the first MOS tube, and the first circuit and the fourth circuit are provided with a connection point at one end close to the tenth pin; The connection state between the ninth pin and the eleventh pin is used to control the third circuit to be turned on or off, and the third circuit is a circuit for the power supply to supply power to the normal working module of the system.

3. The sleep wake-up circuit according to claim 2, characterized in that: When the ninth pin and the eleventh pin of the second MOS tube are in a disconnected state, the third circuit is in a conducting state; or, When the ninth pin and the eleventh pin of the second MOS tube are in a conducting state, the third circuit is in a disconnected state.

4. The sleep wake-up circuit according to claim 3, characterized in that: When the trigger module outputs the second level, the ninth pin and the eleventh pin of the second MOS tube are in a disconnected state; When the trigger module outputs the first level and the sixth pin and the eighth pin of the first MOS tube are in a disconnected state, the ninth pin and the eleventh pin of the second MOS tube are in a disconnected state; or, When the trigger module outputs the first level through the first circuit and the sixth pin and the eighth pin of the first MOS tube are in a conducting state, the ninth pin and the eleventh pin of the second MOS tube are in a conducting state.

5. The sleep wake-up circuit according to claim 4, characterized in that: When the power switch module does not receive the trigger signal, the sixth pin and the eighth pin of the first MOS tube are in a disconnected state; or, When the power switch module receives the trigger signal, the sixth pin and the eighth pin of the first MOS tube are in a conducting state.

6. The sleep wake-up circuit according to any one of claims 2 to 5, characterized in that: The power switch module includes a first pull-down resistor and / or a second pull-down resistor, one end of the first pull-down resistor is connected to the seventh pin of the first MOS tube, and one end of the second pull-down resistor is connected to the tenth pin of the second MOS tube.

7. The sleep wake-up circuit according to any one of claims 1 to 5, characterized in that: The wake-up detection module includes one or more of a vibration wake-up detection module, a cover-opening wake-up detection module, a removal wake-up detection module, and a local clock wake-up detection module.

8. The sleep / wake-up circuit according to any one of claims 1 to 5, characterized in that: The MCU further includes a system clock module, and the power supply normally supplies power to the system clock module when the MCU is in a sleep state.

9. The sleep wake-up circuit according to any one of claims 1 to 5, characterized in that: The power supply normally supplies power to the trigger module when the MCU is in a sleep state.

10. The sleep / wake-up circuit according to any one of claims 1 to 5, characterized in that: The first level is a high level, and the second level is a low level.

11. An electronic device, characterized in that: The invention comprises the sleep / wake-up circuit according to any one of claims 1 to 10.

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