Semiconductor package and method of forming same

Abstract

The invention discloses a semiconductor package. The semiconductor package includes: a metal pad; a package substrate attached to a front side of the metal pad, where the package substrate includes an opening therethrough; one or more electronic components mounted on the package substrate; an encapsulant layer partially formed on the package substrate to expose a region of the package substrate and the opening of the package substrate, where the encapsulant layer encapsulates the one or more electronic components on the package substrate; a first connector mounted in the exposed region of the package substrate; a second connector mounted in the encapsulant layer and on the package substrate; and a magnet mounted in the opening of the package substrate and extending from the metal gasket through the package substrate and the encapsulant layer.

Description

Technical Field

[0001] The present application relates generally to semiconductor technology, and more particularly to a semiconductor device (especially a semiconductor package) and a method for forming a semiconductor package. Background Art

[0002] Nowadays, for purposes such as comfort, compactness, popularity, low power consumption and performance efficiency, smart watches require a wide range of packaging combinations, including but not limited to sensors, connectivity units, security units and embedded processing units, etc.

[0003] Therefore, it is necessary to further improve the semiconductor packaging used in smart watches. Summary of the invention

[0004] One object of the present application is to provide a semiconductor package with an embedded sensor processing module.

[0005] According to one aspect of the present application, a semiconductor package is provided. The semiconductor package includes: a metal gasket; a package substrate attached to the front side of the metal gasket, wherein the package substrate includes an opening therethrough; one or more electronic components mounted on the package substrate; a sealant layer partially formed on the package substrate to expose an area of ​​the package substrate and the opening of the package substrate, wherein the sealant layer seals the one or more electronic components on the package substrate; a first connector mounted in the exposed area of ​​the package substrate; a second connector mounted in the sealant layer and on the package substrate; and a magnet mounted in the opening of the package substrate and extending from the metal gasket through the package substrate and the sealant layer.

[0006] According to another aspect of the present application, a semiconductor package is provided. The semiconductor package includes: a metal gasket; a package substrate attached to the front side of the metal gasket, wherein the package substrate includes an opening therethrough; one or more electronic components mounted on the package substrate; a sealant layer formed on the package substrate to seal the one or more electronic components, wherein the opening of the package substrate is exposed from the sealant layer; a first connector and a second connector mounted in the sealant layer and on the package substrate; and a magnet mounted in the opening of the package substrate and extending from the metal gasket through the package substrate and the sealant layer.

[0007] It should be understood that the foregoing general description and the following detailed description are only exemplary and explanatory, and do not limit the present application. In addition, the accompanying drawings incorporated in this specification and constituting a part of this specification illustrate embodiments of the present application, and together with the description are used to explain the principles of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] The drawings cited herein form part of the specification. The features shown in the drawings only illustrate some embodiments of the present application, rather than all embodiments of the present application, unless the specific implementation mode clearly indicates otherwise, and the reader of this specification should not make an inference to the contrary.

[0009] Figure 1A to Figure 1C are a top view, a perspective view, and a cross-sectional view of a semiconductor package according to an embodiment of the present application.

[0010] FIG. 2A to FIG. 2I According to the embodiment of the present application, Figure 1A to Figure 1C The steps of the method of semiconductor packaging are shown in FIG.

[0011] Figures 3A to 3C are a top view, a perspective view, and a cross-sectional view of a semiconductor package according to another embodiment of the present application.

[0012] FIG. 4A to FIG. 4I According to the embodiment of the present application, Figures 3A to 3C The steps of the method of semiconductor packaging are shown in FIG.

[0013] FIG. 5A to FIG. 5C Shows Figure 1A to Figure 1C A variation of the semiconductor package shown in FIG.

[0014] FIG. 6A to FIG. 6C Shows Figures 3A to 3C A variation of the semiconductor package shown in FIG.

[0015] The same reference numbers will be used throughout the drawings to refer to the same or like parts. DETAILED DESCRIPTION

[0016] The following detailed description of exemplary embodiments of the present application refers to the accompanying drawings that form a part of the description. The drawings illustrate specific exemplary embodiments of the present application that can be practiced. The detailed description including the drawings describes these embodiments in sufficient detail to enable a person skilled in the art to practice the present application. A person skilled in the art may further utilize other embodiments of the present application and make logical, mechanical and other changes without departing from the spirit or scope of the present application. Therefore, the reader of the following detailed description should not interpret the description in a limiting sense, and only the appended claims define the scope of the embodiments of the present application.

[0017] In this application, unless otherwise specifically stated, the use of the singular includes the plural. In this application, unless otherwise specified, the use of "or" means "and / or". In addition, the use of the term "comprising" is not limiting. In addition, unless otherwise specifically stated, terms such as "element" or "component" cover both elements and components including one unit and elements and components including more than one subunit. In addition, the section headings used herein are for organizational purposes only and should not be interpreted as limiting the desired subject matter in any way.

[0018] As used herein, for ease of description, spatially relative terms such as "under," "below," "above," "above," "up," "upper," "lower," "left," "right," "vertical," "horizontal," "side," etc. may be used herein to describe the relationship of one element or feature to another element (or elements) or feature (or features), as illustrated in the drawings. In addition to the orientation depicted in the drawings, spatially relative terms are intended to cover different orientations of the device in use or operation. The device may be oriented in other ways (rotated 90 degrees or in other orientations), and the spatially relative descriptors used herein may be interpreted accordingly. It should be understood that when an element is referred to as being "connected to" another element or "coupled to" another element, the element may be directly connected to or coupled to another element, or there may be intermediate elements.

[0019] Figure 1A to Figure 1C are a top view, a perspective view, and a cross-sectional view of a semiconductor package 150 according to an embodiment of the present application. Figure 1C For along Figure 1B FIG. 1 is a cross-sectional view of the semiconductor package 150 taken along line AA′ in FIG. In this embodiment, the semiconductor package 150 is formed of a square shape or a rectangular shape with rounded corners, which may be suitable for a smart watch or other electronic devices of similar shapes.

[0020] like Figure 1A to Figure 1C, the semiconductor package 150 includes a metal pad 180 and a package substrate 152 attached to a front side 182 of the metal pad 180. The package substrate 152 may include one or more insulating layers 154 interlaced with one or more conductive layers 156. In one embodiment, the insulating layer 154 may include a core insulating board (e.g., a copper clad laminate substrate) in which the conductive layer 156 is patterned over its top surface and / or bottom surface. The conductive layer 156 may also include a conductive via that passes through the insulating layer 154 to electrically couple the conductive layer 156. In this embodiment, the package substrate 152 includes an opening 162 configured to accommodate the magnet 111. For example, the opening 162 may be formed at the center of the package substrate 152. The opening 162 may be a perforation through the package substrate 152 so that the metal pad 180 can be exposed from the package substrate 152 through the opening 162. In some embodiments, when viewed from the top, the opening 162 may have a circular shape, a square shape, a rectangular shape, a hexagonal shape, or any other suitable shape. In addition, the magnet 111 accommodated in the opening 162 may have the same or similar shape as the opening 162. It is understood that any magnet arrangement may be used in the semiconductor package 150, for example, a magnet array having two or more magnets may be used in some alternative embodiments.

[0021] The semiconductor package 150 may include any electronic components that need to be mounted to or placed on the package substrate 152 and electrically connected to the conductive layer 156. These electronic components may be further packaged within the semiconductor package 150 and electrically coupled to other external devices through corresponding connectors also mounted on the base substrate 152. In this way, multiple independent functional modules or circuits can be integrated on a single metal pad 180.

[0022] exist Figure 1C In the embodiment shown in , a semiconductor die 104 (such as a sensor chip, a memory chip, a signal processing chip, a microprocessing unit, etc.) and a discrete electronic component 164 are mounted on a package substrate 152. The discrete electronic component 164 can be a passive component such as a capacitor, a resistor, or an inductor, or an active component such as a diode or a transistor, or any other desired electronic component. In addition, a first connector 110, which can be a board-to-board (B2B) connector, and a second connector 112, which can be a metal strip connector (e.g., a pin-type connector), are also mounted on the base substrate 152. These connectors 110 and 112 can be electrically coupled to the electronic components through the base substrate 152, or specifically electrically coupled to the electronic components through the conductive layer and through-holes in the base substrate 152.

[0023] The sealant layer 130 is partially formed on the package substrate 152 to seal and protect the electronic components. The sealant layer 130 does not cover the entire front surface of the package substrate 152, but exposes an area of ​​the package substrate 152 from the sealant layer 130, which is represented as an exposed area 161. The first connector 110 is mounted on the substrate 152 and is located in the exposed area 161, that is, the first connector 110 is not sealed by the sealant layer 130. Differently, the second connector 112 is formed in the sealant layer 130. In this embodiment, the first connector 110 and the second connector 112 are mounted on the base substrate 152 and are located on two opposite sides of the magnet 111.

[0024] In addition, the sealant layer 130 is usually not filled in the opening 162, so that the sealant layer 130 can expose the opening 162 of the package substrate 152, thereby leaving a space for accommodating the magnet 111. The magnet 111 is installed in the opening 162 of the package substrate 152 and extends from the metal gasket 180 to a position above the sealant layer 130, that is, the magnet 111 passes through the package substrate 152 and the sealant layer 130. In one example, the sealant layer 130 has a step adjacent to the exposed area 161, so that the top surface of the step portion of the sealant layer 130 can be flush with the top surface of the first B2B connector 110. Therefore, it is easier to connect the connector of the external device to the first B2B connector 110.

[0025] The first connector 110 can be physically and electrically coupled to the conductive layer of the base substrate 152 via solder bumps or other similar conductive structures. In some embodiments, the first connector 110 is used to connect to an external microcontroller or to another adjacent electronic package or device, so that the semiconductor die 104 can communicate with another device through the first connector 110. In one example, the sealant layer 130 is at least partially covered by a shielding layer 120 (such as a metal layer). The shielding layer 120 can shield external electromagnetic interference (EMI) from the electronic components sealed by the sealant layer 130. In addition, the sealant layer 130 and the shielding layer 120 are both patterned near the second connector 112 to expose the top surface of the metal strip of the second connector 112. In this way, the second connector 112 can be electrically connected to another connector of an external device.

[0026] In addition to B2B connector 110, semiconductor package 150 may include one or more additional electronic components in exposed area 161 that may have different requirements for EMI shielding, such as due to their respective functions in the semiconductor package. In some embodiments, the uncovered electronic components may include antennas or other components that do not require EMI shielding.

[0027] The sensor module 170 may be disposed on the back side 183 of the metal pad 180 opposite to the package substrate 152. In some embodiments, the sensor module 170 may be an optical sensor module. For example, the optical sensor module may include one or more infrared sensors that may collect physiological information of a user of an electronic product, wherein the electronic product may be provided with the sensor package 150. For example, the optical sensor module may be used as a heart rate meter, or a blood oximeter, etc. Since the sensor module 170 is disposed on the back side 183 of the metal pad 180, it may be closer to the user's body and preferably contact the user's skin to collect physiological information.

[0028] FIG. 2A to FIG. 2I Shown is the method for forming Figure 1A to Figure 1C The method of semiconductor packaging 150 is shown in FIG.

[0029] like Figure 2A As shown in , a package substrate 152 is provided on which various components are mounted. For example, the semiconductor die 104 is mounted on the substrate 152 together with the discrete electronic components 164, such as using surface mounting technology. The package substrate 152 may include one or more polytetrafluoroethylene laminate layers (FR-4, FR-1, CEM-1 or CEM-3) pre-impregnated with a combination of phenol cotton paper, epoxy resin, resin, woven glass, frosted glass, polyester or other reinforcing fibers or fabrics. The substrate may also be a multi-layer flexible laminate, ceramic, copper clad laminate or glass. The package substrate 152 may further include one or more interconnect structures, such as contact pads, conductive traces, and conductive vias configured as needed to implement desired signal routing. The semiconductor die 104 may include a digital signal processor (DSP), a microcontroller, a microprocessor, a network processor, a power management processor, an audio processor, a video processor, an RF circuit, a wireless baseband system-on-chip (SoC) processor, a sensor, a memory controller, a memory device, an application-specific integrated circuit, etc.

[0030] In addition, a first connector 110, which may be a B2B connector, and a second connector 112, which may be a metal strip connector, are mounted on the base substrate 152. In this embodiment, the first connector 110 and the second connector 112 are mounted on the package substrate 152 at two opposite sides to allow more space for connection with corresponding external connectors.

[0031] like Figure 2B, a sealant layer 130 is then partially formed on the base substrate 152 by molding to cover the semiconductor die 104, the electronic components 164, and the metal strip connector 112, but not the B2B connector 110, thereby forming an exposed area 161 adjacent to the sealant layer 130. The sealant layer 130 can be deposited on the package substrate 152 using methods such as compression molding, transfer molding, or liquid sealant molding. In some embodiments, the sealant layer 130 can be made of, for example, a polymer composite material such as an epoxy resin with a filler, an epoxy acrylate with a filler, or a polymer with a suitable filler. The sealant layer 130 provides structural support and / or protects the electronic components from external elements or contaminants. In some embodiments, a grinding operation can be performed on the sealant layer 130 to reduce the thickness of the sealant layer 130, and optionally expose the electronic components as needed. In this embodiment, the sealant layer 130 is partially stepped adjacent to the exposed area 161 so that the top surface of the stepped portion of the sealant layer 130 can be flush with the top surface of the first B2B connector 110. In some embodiments, the sealant layer 130 can be formed using an injection molding process, wherein a mold cover or groove (not shown) is used to form the sealant layer 130. During the injection molding process, the mold cover can cover the electronic component and contain it within the mold cavity.

[0032] Next, if Figure 2C As shown in FIG. 1 , the laser ablates the sealant layer 130 and the packaging substrate 152 to form an opening 162 through the sealant layer 130 and the packaging substrate 152. Figure 2C 152, but the opening 162 only occupies a portion of the package substrate 152, so that the package substrate 152 remains as a single piece rather than being separated into multiple parts. In addition, in some embodiments, during most steps of the manufacturing process, the package substrate 152 can be held by a carrier such as a carrier tape or a carrier platform to facilitate various operations thereon.

[0033] exist Figure 2D In the steps shown in FIG. 1 , the shielding layer 120 needs to be Figure 2E In the case of being applied to the packaging substrate 152 in the next step shown in , a deposition mask 122 (eg in the form of a cover and in particular made of metal) is attached to the packaging substrate 152. Figure 2E, if desired, shielding layer 120 may be deposited onto sealant layer 130 and onto package substrate 152 that is not covered by deposition mask 122. Specifically, shielding layer 120 may not be deposited in opening 162. Shielding layer 120 may shield EMI directed toward or generated by electronic components. Shielding layer 120 may be formed by depositing conductive material (such as Al, Cu, Sn, Ni, Au, Ag) or any other suitable material for electromagnetic interference (EMI) shielding, specifically by sputtering or spraying processes. In a variation, other similar chemical vapor deposition processes or physical vapor deposition processes may be used to form shielding layer 120.

[0034] In such Figure 2F In the next step shown in FIG. 1 , the deposition mask 123 is removed from the package substrate 102. Next, laser ablation is then performed to expose the metal strips of the second connector 112, such as Figure 2G As shown in .

[0035] exist Figure 2H and Fig.2I In the next step shown in FIG. 1 , the package substrate 152 is attached to the front side 182 of the metal pad 180 by surface mounting technology, and the magnet 111 is further disposed in the opening 162 on the same side 182 of the metal pad 180. In this way, a semiconductor package can be formed.

[0036] Can Figure 1A to Figure 1C Various modifications may be made to the semiconductor package shown in . For example, the type and position of any one of the connectors may be changed, or more electronic components may be mounted on the package substrate. Figures 3A to 3C , FIG. 5A to FIG. 5C and FIG. 6A to FIG. 6C Three exemplary semiconductor packages according to some other embodiments of the present application are shown.

[0037] Figures 3A to 3C The semiconductor package variants shown in Figure 1A to Figure 1C The embodiment of the present invention differs in that the B2B connector 110 is located within the sealant layer 130 rather than in the Figure 1C The one shown in FIG. 1 is located in the exposed area 161 . FIG. 4A to FIG. 4I Shown is the method for forming Figures 3A to 3C The semiconductor packaging method shown in Figure 4B and Figure 4C As shown in FIG. 1 , a mask strip 124 is placed on the B2B connector 110 before depositing the sealant layer 130. Next, as shown in FIG. Figure 4C to Figure 4EAs shown in FIG. 1 , when the sealant layer 130 is deposited on the entire surface of the substrate 152 and the shielding layer 120 is deposited on the sealant layer 130, the masking strip 124 is maintained on the B2B connector 110. In some embodiments, the masking strip 124 may also be used as in Figures 3A to 3C To expose the B2B connector 110, the mask strip 124 may be removed from the B2B connector 110, along with the shielding layer on the mask strip 124 or optionally the sealant layer, such as Figure 4F As shown in .

[0038] FIG. 5A to FIG. 5C The semiconductor package variant 550 shown in FIG. Figure 1A to Figure 1C The difference of the embodiment is that Figure 1C The metal strip connector 112 is used Figure 5C In other words, the two connectors 510 are mounted on the package substrate of the semiconductor package 550, and the two connectors include one connector sealed by the sealant layer and another connector exposed from the sealant layer. It is understood that one or more additional connectors can be mounted on the package substrate.

[0039] Similarly, FIG. 6A to FIG. 6C The semiconductor package variant 650 shown in FIG. Figure 1A to Figure 1C The difference of the embodiment is that Figure 1C The metal strip connector 112 is used Figure 6C That is, both connectors 610 are mounted on the package substrate of the semiconductor package 650, and both are sealed by the sealant layer.

[0040] The discussion herein includes many illustrative drawings showing various parts of a semiconductor device and methods for forming such a semiconductor device. For clarity of illustration, such drawings do not show all aspects of each example package. Any example package and / or method provided herein may share any or all characteristics with any or all other packages and / or methods provided herein.

[0041] Various embodiments have been described herein with reference to the accompanying drawings. However, it will be apparent that various modifications and changes may be made thereto, and additional embodiments may be implemented without departing from the broader scope of the present application as set forth in the appended claims. In addition, other embodiments will be apparent to those skilled in the art by considering the specification and practice of one or more embodiments of the present application disclosed herein. Therefore, it is intended that the present application and the examples herein be considered merely exemplary, with the true scope and spirit of the present application being indicated by the following enumeration of the exemplary claims.

Claims

1. A semiconductor package, It is characterized in that The semiconductor package comprises: Metal gasket, a packaging substrate attached to a front side of the metal pad, wherein the packaging substrate includes an opening therethrough; one or more electronic components mounted on the packaging substrate; a sealant layer partially formed on the packaging substrate to expose a region of the packaging substrate and the opening of the packaging substrate, wherein the sealant layer seals the one or more electronic components on the packaging substrate; a first connector mounted in the exposed area of ​​the package substrate; a second connector mounted in the sealant layer and on the package substrate; and A magnet is mounted in the opening of the package substrate and extends from the metal gasket through the package substrate and the encapsulant layer.

2. The semiconductor package according to claim 1, It is characterized in that The first connector is a board-to-board connector.

3. The semiconductor package according to claim 1, It is characterized in that The second connector is a board-to-board connector or a metal strip connector.

4. The semiconductor package according to claim 1, It is characterized in that The opening is located at the center of the package substrate.

5. The semiconductor package according to claim 1, It is characterized in that Further included is a shielding layer partially formed over the sealant layer to expose the second connector.

6. The semiconductor package according to claim 1, It is characterized in that Further included is a sensor module mounted on the back side of the metal gasket.

7. The semiconductor package according to claim 1, It is characterized in that The first connector and the second connector are disposed at two opposite sides of the magnet.

8. A semiconductor package, It is characterized in that The semiconductor package comprises: Metal gasket, a packaging substrate attached to the front side of the metal pad, wherein the packaging substrate includes an opening at least partially therethrough; one or more electronic components mounted on the packaging substrate; a sealant layer formed on the packaging substrate to seal the one or more electronic components, wherein the opening of the packaging substrate is exposed from the sealant layer; first and second connectors mounted in the sealant layer and on the package substrate; and A magnet is mounted in the opening of the package substrate and extends from the metal gasket through the package substrate and the encapsulant layer.

9. The semiconductor package according to claim 8, It is characterized in that The first connector is a board-to-board connector.

10. The semiconductor package according to claim 8, It is characterized in that The second connector is a board-to-board connector or a metal strip connector.

11. The semiconductor package according to claim 8, It is characterized in that The opening is located at the center of the package substrate.

12. The semiconductor package according to claim 8, It is characterized in that Further included is a shielding layer partially formed over the sealant layer to expose the first connector and the second connector.

13. The semiconductor package according to claim 8, It is characterized in that Further included is a sensor module mounted on the back side of the metal gasket.

14. The semiconductor package according to claim 8, It is characterized in that The first connector and the second connector are disposed at two opposite sides of the magnet.

15. A method for forming a semiconductor package, It is characterized in that The method comprises: providing a packaging substrate, the packaging substrate comprising electronic components mounted on the packaging substrate, the plurality of electronic components comprising a first connector and a second connector; forming a sealant layer on the packaging substrate, the sealant layer covering the second connector but not covering the first connector; forming an opening through the encapsulant layer and through the packaging substrate; laser ablating a portion of the sealant layer over the second connector to expose the second connector; attaching the package substrate to the front side of the metal pad; and A magnet is mounted on the metal spacer in the opening.

16. The method according to claim 15, It is characterized in that Further including: A sensor module is attached to the back side of the metal gasket.

17. The method according to claim 15, It is characterized in that After forming the opening, the method further comprises: A shielding layer is formed on the sealant layer.

18. The method according to claim 15, It is characterized in that The first connector is a board-to-board connector, and the second connector is a board-to-board connector or a metal strip connector.

19. A method for forming a semiconductor package, It is characterized in that The method comprises: providing a packaging substrate, the packaging substrate comprising electronic components mounted on the packaging substrate, the plurality of electronic components comprising a first connector and a second connector; placing a mask strip over the first connector; forming a sealant layer on the packaging substrate to cover the plurality of electronic components; forming an opening through the encapsulant layer and through the packaging substrate; removing the masking tape from the first connector to expose the first connector from the sealant layer; laser ablating a portion of the sealant layer over the second connector to expose the second connector; attaching the package substrate to the front side of the metal pad; and A magnet is mounted on the metal spacer in the opening.

20. The method according to claim 19, It is characterized in that Further including: A sensor module is attached to the back side of the metal gasket.

21. The method according to claim 19, It is characterized in that After forming the opening, the method further comprises: A shielding layer is formed on the sealant layer.

22. The method according to claim 19, It is characterized in that The first connector is a board-to-board connector, and the second connector is a board-to-board connector or a metal strip connector.

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