Semiconductor photodetector chip and preparation method thereof

Abstract

The present invention relates to a photodetector, and specifically provides a semiconductor photodetector chip and a preparation method, aiming to solve the problem of high difficulty in aligning a readout circuit chip and a detector chip. The preparation method of the semiconductor photodetector chip provided by the present invention comprises: providing a detector wafer, including a detector substrate, a first contact layer and a second contact layer; providing a readout circuit wafer, having a third electrode and a fourth electrode; forming a bonding layer to bond the detector wafer and the readout circuit wafer; forming a pixel table arranged in an array on the detector wafer, and having a first isolation groove between two adjacent pixel tables in the same array, and the first isolation groove passes through the detector wafer and the bonding layer; forming electrodes to electrically connect the first contact layer to the fourth electrode and / or the second contact layer to the third electrode. The detector wafer and the readout circuit wafer are bonded first, and then the pixel table array is formed, which can greatly reduce the difficulty of bonding the detector wafer and the readout circuit wafer.

Description

Technical Field

[0001] The present invention relates to a photodetector, and particularly provides a semiconductor photodetector chip and a preparation method thereof. Background Art

[0002] The chips of photon detectors and photovoltaic detectors include a detector chip and a readout circuit chip, and the detector chip and the readout circuit chip are fabricated independently. During the fabrication process of the detector chip and the readout circuit chip, a metal film (such as indium, copper, tin, gold, etc.) is deposited on one side of the detector chip and one side of the readout circuit chip, and then a metal electrode array with a required pattern is formed through a lift-off process or an electroplating process. After that, the metal electrodes of the detector chip and the metal electrodes of the readout circuit chip are aligned and bonded to achieve electrical connection between the detector chip and the readout circuit chip. Finally, a glue filling process is performed to fill a low-temperature resistant resin glue between the metal electrode arrays.

[0003] Before the detector chip is flip-chip bonded to the readout circuit chip, alignment is required to ensure that the metal electrodes of the detector chip are aligned with the metal electrodes on the readout circuit chip, and the alignment is difficult. Especially for a detector chip integrating a large scale of small pixels, the spacing between the metal electrodes is smaller, the density is higher, and the alignment difficulty is higher.

[0004] Therefore, there is an urgent need for a semiconductor photodetector chip and a preparation method thereof to solve the problem of high alignment difficulty between the readout circuit chip and the detector chip in the existing photodetector chips. Summary of the Invention

[0005] The present invention aims to solve the above technical problems, that is, to solve the problem of high alignment difficulty between the readout circuit chip and the detector chip in the existing photodetector chips.

[0006] In a first aspect, the present invention provides a preparation method of a semiconductor photodetector chip, including: providing a detector wafer, including a detector substrate and a detector functional layer formed on the detector substrate, wherein the layer of the detector functional layer closest to the detector substrate is a first contact layer, and the layer of the detector functional layer farthest from the detector substrate is a second contact layer; providing a readout circuit wafer, and one side of the readout circuit wafer has a third electrode and a fourth electrode; bonding the detector wafer and the readout circuit wafer, wherein a bonding layer is formed between the detector wafer and the readout circuit wafer, and the third electrode and the fourth electrode are located on the side of the readout circuit wafer close to the detector wafer; forming pixel mesa arrays on the detector wafer, and a first isolation groove is provided between two adjacent pixel mesa arrays in the same array to isolate the pixel mesa, and the first isolation groove penetrates through the detector wafer and the bonding layer; forming electrodes to electrically connect the first contact layer with the fourth electrode and / or the second contact layer with the third electrode.

[0007] In some exemplary embodiments, bonding a detector wafer and a readout circuit wafer includes: forming a first metal layer on one side of the detector wafer; forming a second metal layer on the side of the readout circuit wafer where a third electrode and a fourth electrode are disposed; aligning and bonding the detector wafer and the readout circuit wafer such that the first metal layer and the second metal layer are bonded together to form a bonding layer.

[0008] In some exemplary embodiments, the material of the bonding layer is metal. After bonding the detector wafer and the readout circuit wafer, the detector substrate is located on the side of the detector functional layer away from the readout circuit wafer.

[0009] In some exemplary embodiments, the preparation method further includes: thinning or removing the detector substrate before forming pixel pedestals arranged in an array on the detector wafer.

[0010] In some exemplary embodiments, during the process of forming pixel pedestals arranged in an array on the detector wafer, bonding electrodes are formed in the bonding layer. The orthographic projection of the bonding electrodes on the readout circuit wafer coincides with the orthographic projection of the pixel pedestals on the readout circuit wafer; the bonding electrodes are electrically connected to the third electrode, such that the second contact layer is electrically connected to the third electrode through the bonding electrodes.

[0011] In some exemplary embodiments, forming electrodes includes: forming a dielectric layer in a first isolation groove; forming a transparent electrode layer on the side of the detector wafer away from the readout circuit wafer. The transparent electrode layer is electrically connected to the fourth electrode, such that the first contact layer is electrically connected to the fourth electrode through the transparent electrode layer. The transparent electrode layer connects at least a part of the first contact layers corresponding to pixel pedestals in the same array.

[0012] In some exemplary embodiments, forming electrodes includes: forming a patterned dielectric layer on the side of the detector wafer away from the readout circuit wafer. The dielectric layer at least covers the first isolation groove and exposes the fourth electrode at the bottom of the first isolation groove; forming a patterned transparent electrode layer on the side of the detector wafer away from the readout circuit wafer. The transparent electrode layer includes a plurality of transparent electrodes. There is a second isolation groove between two adjacent transparent electrodes to isolate the transparent electrodes. The transparent electrodes correspond to the pixel pedestals one by one. The transparent electrodes cover the corresponding pixel pedestals and extend to the fourth electrode on one side of the pixel pedestals.

[0013] In some exemplary embodiments, after bonding the detector wafer and the readout circuit wafer, the detector substrate is located on the side of the detector functional layer close to the readout circuit wafer.

[0014] In some exemplary embodiments, the material of the bonding layer is metal. During the process of forming pixel mesa arrays on the detector wafer, the bonding layer forms bonding electrodes, and the bonding electrodes coincide with the positive projections of the pixel mesas on the readout circuit wafer; the bonding electrodes are electrically connected to the fourth electrodes.

[0015] In some exemplary embodiments, forming the electrodes includes: forming a patterned dielectric layer on the side of the detector wafer away from the readout circuit wafer, the dielectric layer covering at least the first isolation groove and exposing the third electrode at the bottom of the first isolation groove; forming a patterned transparent electrode layer on the second contact layer, the transparent electrode layer including a plurality of transparent electrodes, with a second isolation groove between two adjacent transparent electrodes to isolate the transparent electrodes, the transparent electrodes corresponding to the pixel mesas one by one, the transparent electrodes covering the corresponding pixel mesas and extending to the third electrode on one side of the pixel mesas.

[0016] In some exemplary embodiments, forming the electrodes includes: forming an opening on the pixel mesa, the opening extending from the second contact layer to the first contact layer; forming a patterned first dielectric layer on the side of the detector wafer away from the readout circuit wafer, the first dielectric layer exposing the first contact layer at the bottom of the opening and the fourth electrode at the bottom of the first isolation groove; forming a first electrode on the first dielectric layer, the first electrode extending from the bottom of the opening along the sidewall of the pixel mesa to the fourth electrode, enabling the first contact layer of the pixel mesa to be electrically connected to the fourth electrode through the first electrode; forming a second dielectric layer on the first electrode, the second dielectric layer exposing the second contact layer and the third electrode at the bottom of the first isolation groove; forming a second electrode on the second dielectric layer, the second electrode extending from the second contact layer exposed by the second dielectric layer along the sidewall of the pixel mesa to the third electrode, enabling the second contact layer in the pixel mesa to be electrically connected to the third electrode through the second electrode.

[0017] In a second aspect, the present disclosure provides a semiconductor photodetector chip, including: a detector wafer including a detector functional layer, the outermost two layers of the detector functional layer along the thickness direction of the detector wafer being a first contact layer and a second contact layer respectively, the detector wafer having pixel mesas arranged in an array, with a first isolation groove between two adjacent pixel mesas in the same array to isolate the pixel mesas, the first isolation groove penetrating the detector wafer along the thickness direction of the detector wafer; a readout circuit wafer aligned with the detector wafer, having a third electrode and a fourth electrode on one side; a bonding layer disposed between the detector wafer and the readout circuit wafer, the first isolation groove extending to the bonding layer, and the positive projection of the bonding layer on the readout circuit wafer coinciding with the positive projection of the pixel mesas on the readout circuit wafer; electrodes for electrically connecting the first contact layer to the fourth electrode and / or the second contact layer to the third electrode.

[0018] In some exemplary embodiments, the first contact layer is located on the side of the detector functional layer away from the readout circuit wafer; the bonding layer is made of metal and includes a plurality of bonding electrodes, the bonding electrodes correspond to the pixel mesa one by one, and the bonding electrodes are electrically connected to the third electrode; the electrode is a transparent electrode and is located on the side of the first contact layer away from the readout circuit wafer, and is electrically connected to the fourth electrode and the first contact layer.

[0019] In some exemplary embodiments, the transparent electrodes are continuously arranged to connect the pixel mesas within the same array; alternatively, the transparent electrodes correspond to the pixel mesas one by one, and there is a second isolation groove between two adjacent transparent electrodes to isolate the transparent electrodes; the fourth electrode is located at the bottom of the first isolation groove, a dielectric layer is provided on the inner wall of the first isolation groove, the dielectric layer exposes the fourth electrode located at the bottom of the first isolation groove, the transparent electrode is located on the side of the dielectric layer away from the readout circuit wafer, and the transparent electrode extends from the surface of the pixel mesa away from the readout circuit wafer along the side wall of the pixel mesa to the fourth electrode, so that the fourth electrode and the first contact layer are electrically connected through the transparent electrode.

[0020] In some exemplary embodiments, the first contact layer is located on the side of the detector functional layer close to the readout circuit wafer.

[0021] In some exemplary embodiments, the bonding layer is made of metal and includes a plurality of bonding electrodes, the bonding electrodes correspond to the pixel mesa one by one, and the bonding electrodes are electrically connected to the fourth electrode; the electrodes correspond to the pixel mesas one by one, and there is a second isolation groove between two adjacent electrodes to isolate the electrodes; the third electrode is located at the bottom of the first isolation groove, a dielectric layer is provided on the inner wall of the first isolation groove, the dielectric layer exposes the third electrode, the electrode is located on the side of the dielectric layer away from the readout circuit wafer, and the electrode extends from the surface of the pixel mesa away from the readout circuit wafer along the side wall of the pixel mesa to the third electrode located at the bottom of the first isolation groove, so that the third electrode and the second contact layer are electrically connected through the electrode.

[0022] In some exemplary embodiments, at least part of the pixel mesa is provided with an opening that extends from the second contact layer to the first contact layer; the third electrode and the fourth electrode are located at the bottom of the first isolation groove; on the side of the detector wafer away from the readout circuit wafer, a first dielectric layer, a first electrode, a second dielectric layer and a second electrode are sequentially arranged, the first electrode is electrically connected to the first contact layer and the fourth electrode located at the bottom of the opening through a via hole, and the second electrode is electrically connected to the second contact layer and the third electrode through a via hole.

[0023] In some exemplary embodiments, a detector substrate is provided on the side of the first contact layer away from the second contact layer.

[0024] In a third aspect, the present disclosure provides a photodetector chip, which is obtained by dicing a semiconductor photodetector chip prepared by using the above-mentioned method for preparing a semiconductor photodetector chip, or is obtained by dicing the above-mentioned semiconductor photodetector chip.

[0025] Compared with the prior art, the present invention has the following beneficial effects:

[0026] The present invention provides a method for preparing a semiconductor photodetector chip, which includes: providing a detector wafer including a detector substrate, a first contact layer and a second contact layer; providing a readout circuit wafer having a third electrode and a fourth electrode; bonding the detector wafer and the readout circuit wafer, wherein a bonding layer is formed between the detector wafer and the readout circuit wafer; forming pixel mesa arrays arranged in an array on the detector wafer, and a first isolation groove is provided between two adjacent pixel mesa arrays in the same array to isolate the pixel mesa, and the first isolation groove penetrates through the detector wafer and the bonding layer; forming electrodes to electrically connect the first contact layer and the fourth electrode and / or electrically connect the second contact layer and the third electrode. Bonding the detector wafer and the readout circuit wafer first and then forming the pixel mesa arrays can greatly reduce the difficulty of bonding the detector wafer and the readout circuit wafer, which helps to improve the process accuracy and reliability. In addition, in the formed photodetector chip, there is no longer a detector substrate or the detector substrate is discontinuous, and the situation of chip breakage caused by the mismatch of the thermal expansion coefficient of the detector substrate will no longer occur. Description of the Drawings

[0027] The following describes the preferred embodiments of the present invention with reference to the drawings, in which:

[0028] Figures 1 to 2 is a cross-sectional view of a semiconductor photodetector in the preparation process provided by at least one embodiment of the present disclosure;

[0029] Figure 3 is a first cross-sectional view of a semiconductor photodetector provided by at least one embodiment of the present disclosure;

[0030] Figure 4 is a second cross-sectional view of a semiconductor photodetector provided by at least one embodiment of the present disclosure;

[0031] Figure 5 is a third cross-sectional view of a semiconductor photodetector provided by at least one embodiment of the present disclosure;

[0032] Figure 6 is a fourth cross-sectional view of a semiconductor photodetector provided by at least one embodiment of the present disclosure;

[0033] Figure 7 is a cross-sectional view of a semiconductor photodetector in the preparation process provided by at least one embodiment of the present disclosure;

[0034] Figure 8 This is the fifth cross-sectional view of the semiconductor photodetector provided by at least one embodiment of the present disclosure.

[0035] Description of reference numerals:

[0036] 10. Detector wafer; 1. Detector substrate; 2. Detector functional layer; 21. First contact layer; 22. Second contact layer; 23. Barrier layer; 24. Absorption layer; 3. Pixel mesa; 31. Opening; 4. First isolation groove; 51. Dielectric layer; 52. Transparent electrode layer; 521. Second isolation groove; 53. First dielectric layer; 54. First electrode; 55. Second dielectric layer; 56. Second electrode; 20. Readout circuit wafer; 201. Third electrode; 202. Fourth electrode; 30. Bonding layer; 301. First metal layer; 302. Second metal layer; 300. Bonding electrode. Detailed implementation manners

[0037] The preferred implementation manners of the present invention will be described below with reference to the accompanying drawings. Those skilled in the art should understand that these implementation manners are only used to explain the technical principle of the present invention and are not intended to limit the protection scope of the present invention.

[0038] It should be noted that in the description of the present invention, the terms indicating the direction or positional relationship such as "upper", "lower", "left", "right", "inner", "outer", etc. are based on the direction or positional relationship shown in the drawings. This is only for convenience of description and does not indicate or imply that the device or element must have a specific orientation, be constructed and operated in a specific orientation. Therefore, it should not be construed as a limitation of the present invention. In addition, the terms "first" and "second" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance.

[0039] In addition, it should also be noted that in the description of the present invention, unless otherwise clearly specified and limited, the terms "mount", "set", "connect" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be directly connected, or indirectly connected through an intermediate medium, and can also be the communication inside two elements. For those skilled in the art, the specific meanings of the above terms in the present invention can be understood according to specific situations.

[0040] The chips of the photon type detector and the photovoltaic type detector include a detector chip and a readout circuit chip. The detector chip and the readout circuit chip are separately fabricated, and then the detector chip is bonded to the readout circuit chip by flip chip bonding for electrical connection.

[0041] The detector chip includes a detector substrate and a detector functional layer. An array of pixel mesa surfaces is provided on the detector functional layer. A first electrode is provided on the side of each pixel mesa surface away from the substrate, and the first electrode is electrically connected to the corresponding pixel mesa surface. The detector substrate forms a second electrode along the side wall of the outermost pixel mesa surface, so that the second electrode extends to the top of the outermost pixel mesa surface, and the second electrode is electrically connected to the detector substrate.

[0042] A third electrode and a fourth electrode are provided on one side of the readout circuit chip.

[0043] During the bonding process of the detector chip and the readout circuit chip, it is necessary to align the first electrode with the third electrode to form an electrical connection and align the second electrode with the fourth electrode to form an electrical connection. With the improvement of the manufacturing process accuracy, the size of the pixel mesa surface is smaller and the number is larger, and the number of the first electrodes is also increasing and becoming more and more dense. The alignment difficulty of bonding is relatively large, and it is difficult to fabricate a chip of an optoelectronic detector with a high-density and large-scale pixel mesa surface array.

[0044] In addition, since all the pixel mesa surfaces are all connected to the fourth electrode of the readout circuit chip through the detector substrate and the second electrode electrically connected to the detector substrate, there is crosstalk between different pixel mesa surfaces, that is, the photocurrent signal in a certain pixel mesa surface will affect the signal in the adjacent pixel mesa surface.

[0045] In addition to this, some detector chips operate in a low-temperature environment, and there may be a situation of mismatch in the thermal expansion coefficient between the detector substrate and the readout circuit substrate, which is likely to cause fragmentation.

[0046] In view of this, an embodiment of the present disclosure provides a method for fabricating a semiconductor optoelectronic detector chip, the method including: providing a detector wafer including a detector substrate and a detector functional layer formed on the detector substrate, wherein the layer of the detector functional layer closest to the detector substrate is a first contact layer, and the layer of the detector functional layer farthest from the detector substrate is a second contact layer; providing a readout circuit wafer, and a third electrode and a fourth electrode are provided on one side of the readout circuit wafer; bonding the detector wafer and the readout circuit wafer, wherein a bonding layer is formed between the detector wafer and the readout circuit wafer, and the third electrode and the fourth electrode are located on the side of the readout circuit wafer close to the detector wafer; forming an array of pixel mesa surfaces on the detector wafer, and a first isolation groove is provided between two adjacent pixel mesa surfaces in the same array to isolate the pixel mesa surfaces, and the first isolation groove penetrates the detector wafer and the bonding layer; forming electrodes to electrically connect the first contact layer to the fourth electrode and / or electrically connect the second contact layer to the third electrode.

[0047] The present disclosure will be specifically described with the following several embodiments. Embodiment 1

[0048] An embodiment of the present disclosure provides a method for manufacturing a semiconductor photodetector, including:

[0049] S1. Provide a detector wafer 10.

[0050] As Figure 1 shown, the detector wafer 10 includes a detector substrate 1 and a detector functional layer 2 formed on the detector substrate 1. Among them, the layer of the detector functional layer 2 closest to the detector substrate 1 is the first contact layer 21, and the layer of the detector functional layer 2 farthest from the detector substrate 1 is the second contact layer 22. For example, the detector substrate 1 is an N-type GaSb semiconductor, but is not limited thereto.

[0051] S2. Provide a readout circuit wafer 20.

[0052] One side of the readout circuit wafer 20 has a third electrode 201 and a fourth electrode 202. For example, the third electrode 201 is a positive electrode, and the fourth electrode 202 is a negative electrode or a ground electrode.

[0053] S3. Bond the detector wafer 10 and the readout circuit wafer 20. As Figure 1 shown, it specifically includes:

[0054] S31. Form a first metal layer 301 on the side of the detector functional layer 2 away from the detector substrate 1;

[0055] S32. Form a second metal layer 302 on the side of the readout short circuit wafer where the third electrode 201 and the fourth electrode 202 are provided;

[0056] S33. Align the detector wafer 10 and the readout circuit wafer 20 so that the first metal layer 301 and the second metal layer 302 are in contact;

[0057] S34. Heat up and apply pressure in a bonding device so that the first metal layer 301 and the second metal layer 302 soften and fuse under high temperature and high pressure to form a bonding layer 30.

[0058] It should be particularly noted that since the first metal layer 301 is formed on the side of the detector functional layer 2 away from the detector substrate 1, after the detector wafer 10 and the readout circuit wafer 20 are bonded, the detector substrate 1 is located on the side of the detector functional layer 2 away from the readout circuit wafer 20, and the detector wafer 10 is flip-chip bonded to the readout circuit wafer 20.

[0059] S4. Thin or remove the detector substrate 1. For example, use CMP (chemical mechanical polish) to thin or completely remove the detector substrate 1.

[0060] S5. Form pixel mesa 3s arranged in an array on the detector wafer 10. AsFigure 2 As shown, there is a first isolation groove 4 between two adjacent pixel platforms 3 in the same array to isolate the two adjacent pixel platforms 3, and the first isolation groove 4 penetrates through the detector wafer 10 and the bonding layer 30.

[0061] For example, multiple pixel platform arrays are formed on the same detector wafer 10 to improve the preparation efficiency.

[0062] For example, a patterning process is used to pattern the detector wafer 10, where the patterning process includes processes such as the formation of photoresist, lithography, development, lithography pattern detection, etching, and removal of photoresist.

[0063] For example, after the pixel platforms 3 arranged in an array are formed on the detector wafer 10, IBE (Ion Beam Etching) is used to etch the bonding layer 30, so that the first isolation groove 4 extends to the bonding layer 30, thereby forming the bonding electrode 300. For example, the orthographic projection of the bonding electrode 300 on the readout circuit wafer 20 coincides with the orthographic projection of the pixel platform 3 on the readout circuit wafer 20.

[0064] In addition, during the process of forming the pixel platforms 3 arranged in an array on the detector wafer 10, alignment is required so that the formed pixel platforms 3 can cover the upper part of the third electrode 201, and each pixel platform 3 corresponds to a third electrode 201, and the second contact layer 22 on each pixel platform 3 can be electrically connected to the third electrode 201 through the corresponding bonding electrode 300.

[0065] S6. A dielectric layer 51 is formed in the first isolation groove 4. For example, the material of the dielectric layer 51 is silicon oxide, silicon nitride, etc.

[0066] S7. A transparent electrode layer 52 is formed on the side of the detector wafer 10 away from the readout circuit wafer 20. The transparent electrode layer 52 is provided as a whole surface to connect at least a part of the first contact layers 21 corresponding to the pixel platforms 3 in the same array. In addition, the transparent electrode layer 52 is electrically connected to the fourth electrode 202, so that the first contact layer 21 and the fourth electrode 202 are electrically connected through the transparent electrode layer 52.

[0067] For example, as Figure 3As shown, the fourth electrode 202 is located outside the pixel mesa array. During the process of forming the pixel mesa 3 on the detector wafer 10 in step S5, the detector wafer 10 between adjacent pixel mesa arrays is removed, so that the edge of the pixel mesa array can expose the fourth electrode 202. During the process of forming the transparent electrode layer 52 in step S7, the transparent electrode layer 52 is extended along the side wall of the outermost pixel mesa 3 in the pixel mesa array to the fourth electrode 202 of the readout circuit wafer 20, so that the first contact layer 21 of the pixel mesa array is electrically connected to the fourth electrode 202 through the transparent electrode layer 52. In addition, during the process of forming the dielectric layer 51 in the first isolation groove 4 in step S6, a layer of dielectric layer 51 can also be formed outside the outermost pixel mesa 3 in the pixel mesa array to prevent the transparent electrode layer 52 from being electrically connected to the side wall of the outermost pixel mesa 3.

[0068] For example, as Figure 4 shown, the fourth electrode 202 is located at the bottom of at least one first isolation groove 4. Before step S7, the dielectric layer 51 in the first isolation groove 4 where the fourth electrode 202 is disposed is patterned to expose the fourth electrode 202. After that, during the process of forming the transparent electrode layer 52 in step S7, the transparent electrode layer 52 can enter the first isolation groove 4 to be electrically connected to the fourth electrode 202.

[0069] S8. A microlens array (not shown in the figure) is formed on the side of the detector wafer 10 away from the readout circuit wafer 20.

[0070] S9. The detector wafer 10 and the readout circuit wafer 20 are diced to obtain single photodetector chips.

[0071] The above method for manufacturing a semiconductor photodetector chip has at least the following advantages:

[0072] 1. The detector wafer 10 and the readout circuit wafer 20 are first bonded and then the pixel mesa array is formed, which can greatly reduce the bonding difficulty between the detector wafer 10 and the readout circuit wafer 20 and help improve the process accuracy and reliability.

[0073] 2. In the formed photodetector chip, there is no longer a detector substrate 1 or the detector substrate 1 is discontinuous, and the situation of chip breakage caused by the mismatch of the thermal expansion coefficient of the detector substrate 1 will no longer occur.

[0074] The embodiment of the present disclosure also provides a semiconductor photodetector chip, as Figure 3As shown, it includes a detector wafer 10 and a readout circuit wafer 20 that are aligned with each other. The detector wafer 10 is flip-chip connected to the readout circuit wafer 20. A bonding layer 30 made of a metallic material is provided between the detector wafer 10 and the readout circuit wafer 20 to bond the detector wafer 10 and the readout circuit wafer 20. After the detector wafer 10 and the readout circuit wafer 20 of the semiconductor photodetector chip are diced, the chips of the photodetector can be obtained.

[0075] The detector wafer 10 includes a detector functional layer 2. For example, the detector functional layer 2 includes a first contact layer 21, a functional layer, and a second contact layer 22 that are sequentially arranged along the direction away from the detector substrate 1. The first contact layer 21 is located on the side of the detector functional layer 2 away from the readout circuit wafer 20. The functional layer includes an absorption layer 24, a barrier layer 23, etc. designed according to the target detection wavelength band. The barrier layer 23 is located between the absorption layer 24 and the first contact layer 21.

[0076] The detector wafer 10 has a plurality of pixel mesa arrays. Each pixel mesa array includes pixel mesas 3 arranged in an array. A first isolation groove 4 is provided between two adjacent pixel mesas 3 in the same array to isolate the pixel mesas 3. The first isolation groove 4 penetrates the bonding layer 30, exposing the readout circuit wafer 20. The bonding layer 30 is divided into a plurality of bonding electrodes 300 by the first isolation groove 4, and the bonding electrodes 300 correspond to the pixel mesas 3 one by one.

[0077] The first isolation groove 4 is filled with a dielectric layer 51 to electrically isolate two adjacent pixel mesas 3 and two adjacent bonding electrodes 300.

[0078] On the side of the readout circuit wafer 20 close to the detector wafer 10, there are a third electrode 201 and a fourth electrode 202. The bonding electrode 300 covers the third electrode 201, such that the third electrode 201 is electrically connected to the second contact layer 22 through the bonding electrode 300.

[0079] In some examples, as Figure 3 shown, the fourth electrode 202 is located outside the pixel mesa array. A continuous transparent electrode layer 52 is provided on the side of the detector wafer 10 away from the readout circuit wafer 20, and the transparent electrode layer 52 extends along the sidewall of the outermost pixel mesa 3 in the pixel mesa array to the readout circuit wafer 20 and is electrically connected to the fourth electrode 202.

[0080] In other examples, as Figure 4As shown, the fourth electrode 202 is located at the bottom of at least a part of the first isolation groove 4. An opening 31 exposing the fourth electrode 202 is formed in the dielectric layer 51 within the first isolation groove 4. A continuous transparent electrode layer 52 is provided on the side of the detector wafer 10 away from the readout circuit wafer 20, and the transparent electrode layer 52 enters the first isolation groove 4 and extends to the fourth electrode 202.

[0081] For example, on the side of the first contact layer 21 away from the detector wafer 10, there is a detector substrate 1. At this time, the transparent electrode layer 52 is electrically connected to the first contact layer 21 through the detector substrate 1.

[0082] During the operation of the photodetector chip, after the pixel mesa 3 receives an infrared signal, an electrical signal is generated, creating a voltage difference between the first contact layer 21 and the second contact layer 22. Among them, the first contact layer 21 is connected to the fourth electrode 202 through the transparent electrode layer 52, and the second contact layer 22 is connected to the third electrode 201 through the bonding electrode 300, and thus is read by the readout circuit. Embodiment Two

[0083] The embodiment of the present disclosure provides a method for manufacturing a semiconductor photodetector chip, which is the same as steps S1 to S5 in the method for manufacturing the semiconductor photodetector chip provided in Embodiment One. The difference lies in that: a fourth electrode 202 is provided at the bottom of each first isolation groove 4.

[0084] After steps S1 to S5, it further includes:

[0085] S6. Form a patterned dielectric layer 51 on the side of the detector wafer 10 away from the readout circuit wafer 20. The dielectric layer 51 at least covers the first isolation groove 4 and exposes the fourth electrode 202 located at the bottom of the first isolation groove 4.

[0086] S7. Form a patterned transparent electrode layer 52 (as Figure 5 shown) on the side of the detector wafer 10 away from the readout circuit wafer 20. The transparent electrode layer 52 includes a plurality of transparent electrodes, and a second isolation groove 521 is provided between two adjacent transparent electrodes to isolate the two adjacent transparent electrodes. The transparent electrodes correspond to the pixel mesas 3 one by one. The transparent electrodes cover the pixel mesas 3 and extend along one side of the pixel mesas 3 to the fourth electrode 202 at the bottom of the first isolation groove 4.

[0087] S8. Form a dielectric layer on the transparent electrode layer 52 to fill the second isolation groove 521.

[0088] S9. Form a microlens array (not shown in the figure) on the side of the detector wafer 10 away from the readout circuit wafer 20.

[0089] S10. Dice the detector wafer 10 and the readout circuit wafer 20 to obtain individual photodetector chips.

[0090] The preparation method of the above semiconductor photodetector chip has at least the following advantages:

[0091] 1. The detector wafer 10 and the readout circuit wafer 20 are first bonded and then the pixel mesa array is formed, which can greatly reduce the bonding difficulty between the detector wafer 10 and the readout circuit wafer 20, and helps to improve the process accuracy and reliability;

[0092] 2. In the formed photodetector chip, there is no longer a detector substrate 1 or the detector substrate 1 is discontinuous, and the situation of chip breakage caused by the mismatch of the thermal expansion coefficient of the detector substrate 1 will no longer occur;

[0093] 3. Each pixel mesa 3 can be connected to the readout circuit through an independent transparent electrode, without a common electrode, and there is no crosstalk in the signal transmission between two adjacent pixel mesas 3; in addition, since there is no common electrode between different pixel mesas 3, the transmission distance of the pixel mesa 3 to the fourth electrode 202 through the transparent electrode is short and no delay (such as RC delay) will be generated.

[0094] The embodiment of the present disclosure also provides a semiconductor photodetector chip, which is substantially the same as the structure of the semiconductor photodetector chip provided in the first embodiment, and the difference lies in:

[0095] As Figure 5 shown, the fourth electrode 202 is located at the bottom of the first isolation groove 4, and the transparent electrode layer 52 includes a plurality of transparent electrodes, which correspond to the pixel mesas 3 one by one, and there is a second isolation groove 521 between two adjacent transparent electrodes to isolate the two adjacent transparent electrodes. The transparent electrode covers the pixel mesa 3 and extends along one side of the pixel mesa 3 to the fourth electrode 202 at the bottom of the first isolation groove 4.

[0096] For example, the detector substrate 1 is provided on the side of the first contact layer 21 away from the detector wafer 10. At this time, the transparent electrode layer 52 is electrically connected to the first contact layer 21 through the detector substrate 1. Embodiment Three

[0097] The embodiment of the present disclosure provides a preparation method of a semiconductor photodetector. As shown in Figure 6 the following, it includes:

[0098] S1. Provide a detector wafer 10.

[0099] The detector wafer 10 includes a detector substrate 1 and a detector functional layer 2 formed on the detector substrate 1. Among them, the layer of the detector functional layer 2 closest to the detector substrate 1 is the first contact layer 21, and the layer of the detector functional layer 2 farthest from the detector substrate 1 is the second contact layer 22. For example, the detector substrate 1 is an N-type GaSb semiconductor, but it is not limited thereto.

[0100] S2. Provide a readout circuit wafer 20.

[0101] One side of the readout circuit wafer 20 has a third electrode 201 and a fourth electrode 202. For example, the third electrode 201 is the positive electrode, and the fourth electrode 202 is the negative electrode or the ground electrode.

[0102] S3. Bond the detector wafer 10 and the readout circuit wafer 20. Specifically, it includes:

[0103] S31. Form a first metal layer 301 on the side of the detector substrate 1 away from the detector functional layer 2;

[0104] S32. Form a second metal layer 302 on the side of the readout short circuit wafer where the third electrode 201 and the fourth electrode 202 are provided;

[0105] S33. Align the detector wafer 10 and the readout circuit wafer 20 so that the first metal layer 301 and the second metal layer 302 are in contact;

[0106] S34. Heat up and apply pressure in the bonding device so that the first metal layer 301 and the second metal layer 302 soften and fuse under high temperature and high pressure to form a bonding layer 30.

[0107] It should be particularly noted that since the first metal layer 301 is formed on the side of the detector substrate 1 away from the detector functional layer 2, after the detector wafer 10 and the readout circuit wafer 20 are bonded, the detector substrate 1 is located on the side of the detector functional layer 2 close to the readout circuit wafer 20, and the detector wafer 10 is face-up mounted on the readout circuit wafer 20. The advantage of the face-up mounting of the detector wafer 10 compared to the flip-chip mounting is that when the pixel mesa 3 receives the optical signal, it does not need to pass through the detector substrate 1, so the quantum efficiency of the photodetector is higher; in addition, since the pixel mesa 3 does not need to pass through the detector substrate 1 when receiving the optical signal, there is no need to thin the detector substrate 1, which can simplify the manufacturing process.

[0108] S4. Form pixel mesas 3 arranged in an array on the detector wafer 10. There is a first isolation groove 4 between two adjacent pixel mesas 3 in the same array to isolate the two adjacent pixel mesas 3, and the first isolation groove 4 penetrates through the detector wafer 10 and the bonding layer 30.

[0109] For example, multiple pixel mesa arrays are formed on the same detector wafer 10 to improve the manufacturing efficiency.

[0110] For example, the detector wafer 10 is patterned using a lithography process, which includes processes such as photoresist formation, photolithography, development, photolithography pattern detection, etching, and photoresist removal.

[0111] For example, after the pixel mesa 3 is formed in an array on the detector wafer 10, the bonding layer 30 is etched using IBE (Ion Beam Etching) so that the first isolation groove 4 extends to the bonding layer 30, thereby forming the bonding electrode 300. For example, the orthographic projection of the bonding electrode 300 on the readout circuit wafer 20 coincides with the orthographic projection of the pixel mesa 3 on the readout circuit wafer 20.

[0112] In addition, during the process of forming the pixel mesa 3 in an array on the detector wafer 10, alignment is required so that the formed pixel mesa 3 can cover the fourth electrode 202, and the third electrode 201 is located at the bottom of the first isolation groove 4. Each pixel mesa 3 corresponds to a fourth electrode 202, and the first contact layer 21 on each pixel mesa 3 can be electrically connected to the fourth electrode 202 through the corresponding bonding electrode 300.

[0113] S5. A patterned dielectric layer 51 is formed on the side of the detector wafer 10 away from the readout circuit wafer 20. The dielectric layer 51 covers at least the first isolation groove 4 and exposes the third electrode 201 located at the bottom of the first isolation groove 4.

[0114] S6. A patterned transparent electrode layer 52 is formed on the side of the detector wafer 10 away from the readout circuit wafer 20. The transparent electrode layer 52 includes a plurality of transparent electrodes, and a second isolation groove 521 is provided between two adjacent transparent electrodes to isolate the two adjacent transparent electrodes. The transparent electrodes correspond to the pixel mesa 3 one by one. The transparent electrodes cover the pixel mesa 3 and extend along one side of the pixel mesa 3 to the third electrode 201 at the bottom of the first isolation groove 4.

[0115] S7. A dielectric layer is formed on the transparent electrode layer 52 to fill the second isolation groove 521.

[0116] S8. A microlens array (not shown in the figure) is formed on the side of the detector wafer 10 away from the readout circuit wafer 20.

[0117] S9. The detector wafer 10 and the readout circuit wafer 20 are diced to obtain single-chip optoelectronic detector chips.

[0118] The above method for preparing a semiconductor optoelectronic detector chip has at least the following advantages:

[0119] 1. First, the detector wafer 10 and the readout circuit wafer 20 are bonded, and then the pixel mesa array is formed, which can greatly reduce the difficulty of bonding the detector wafer 10 and the readout circuit wafer 20, and helps to improve the process precision and reliability.

[0120] 2. In the formed photodetector chip, there is no longer a detector substrate 1 or the detector substrate 1 is discontinuous, and the situation of chip breakage caused by the mismatch of the thermal expansion coefficient of the detector substrate 1 will no longer occur.

[0121] 3. Each pixel mesa 3 can be connected to the readout circuit through an independent transparent electrode without a common electrode, and there is no crosstalk in the signal transmission between two adjacent pixel mesas 3. In addition, since there is no common electrode between different pixel mesas 3, the transmission distance from the pixel mesa 3 to the fourth electrode 202 through the transparent electrode is short, and no delay (such as RC delay) will be generated.

[0122] 4. The detector wafer 10 is mounted face-up on the readout circuit wafer 20. When the pixel mesa 3 receives the optical signal, it does not need to pass through the detector substrate 1. Therefore, the quantum efficiency of the photodetector is higher. In addition, since the pixel mesa 3 does not need to pass through the detector substrate 1 when receiving the optical signal, it is not necessary to thin the detector substrate 1, which can simplify the manufacturing process.

[0123] The embodiment of the present disclosure also provides a semiconductor photodetector chip, as Figure 6 shown, including a detector wafer 10 and a readout circuit wafer 20 that are aligned with each other, and the detector wafer 10 is mounted face-up on the detector wafer 10. A bonding layer 30 is provided between the detector wafer 10 and the readout circuit wafer 20 to bond the detector wafer 10 and the readout circuit wafer 20. After the detector wafer 10 and the readout circuit wafer 20 of the semiconductor photodetector chip are diced, the chip of the photodetector can be obtained.

[0124] The detector wafer 10 includes a detector functional layer 2 and a detector substrate 1, and the detector substrate 1 is located on the side of the detector functional layer 2 close to the readout circuit wafer 20 (that is, the detector wafer 10 is mounted face-up on the detector wafer 10). For example, the detector functional layer 2 includes a first contact layer 21, a functional layer, and a second contact layer 22 that are sequentially arranged in a direction away from the detector substrate 1, and the first contact layer 21 is located on the side of the detector functional layer 2 close to the detector substrate 1.

[0125] The detector wafer 10 has multiple pixel mesa arrays, and each pixel mesa array includes pixel mesas 3 arranged in an array. A first isolation groove 4 is provided between two adjacent pixel mesas 3 in the same array to isolate the pixel mesas 3. The first isolation groove 4 penetrates through the bonding layer 30, exposing the readout circuit wafer 20. The material of the bonding layer 30 is metal, and the bonding layer 30 is divided into multiple bonding electrodes 300 by the first isolation groove 4, and the bonding electrodes 300 correspond to the pixel mesas 3 one by one.

[0126] On the side of the readout circuit wafer 20 close to the detector wafer 10, there are a third electrode 201 and a fourth electrode 202. The bonding electrode 300 covers the fourth electrode 202, so that the fourth electrode 202 is electrically connected to the first contact layer 21 through the bonding electrode 300 and the detector substrate 1. The third electrode 201 is located at the bottom of the first isolation groove 4.

[0127] The first isolation groove 4 is filled with a dielectric layer 51 to electrically isolate two adjacent pixel mesas 3 and two adjacent bonding electrodes 300, and the dielectric layer 51 exposes the third electrode 201.

[0128] On the side of the detector wafer 10 away from the readout circuit wafer 20, a transparent electrode layer 52 is provided. The transparent electrode layer 52 includes multiple transparent electrodes, and the transparent electrodes correspond to the pixel mesas 3 one by one. A second isolation groove 521 is provided between two adjacent transparent electrodes to isolate the two adjacent transparent electrodes. The transparent electrode covers the pixel mesa 3 and extends along one side of the pixel mesa 3 to the third electrode 201 at the bottom of the first isolation groove 4, so that the second contact layer 22 is electrically connected to the third electrode 201 through the transparent electrode. Embodiment 4

[0129] The embodiment of the present disclosure provides a preparation method of a semiconductor photodetector, as Figure 7 shown, including:

[0130] S1. Provide the detector wafer 10.

[0131] The detector wafer 10 includes a detector substrate 1 and a detector functional layer 2 formed on the detector substrate 1. Among them, the layer of the detector functional layer 2 closest to the detector substrate 1 is the first contact layer 21, and the layer of the detector functional layer 2 farthest from the detector substrate 1 is the second contact layer 22. For example, the detector substrate 1 is an N-type GaSb semiconductor, but it is not limited thereto.

[0132] S2. Provide the readout circuit wafer 20.

[0133] One side of the readout circuit wafer 20 has a third electrode 201 and a fourth electrode 202. For example, the third electrode 201 is a positive electrode, and the fourth electrode 202 is a negative electrode or a ground electrode.

[0134] S3. Bond the detector wafer 10 and the readout circuit wafer 20, with the detector substrate 1 on the side of the detector functional layer 2 closer to the readout short - circuit wafer, that is, the detector wafer 10 is flip - chip bonded on the readout circuit wafer 20. A bonding layer 30 is provided between the detector wafer 10 and the readout circuit wafer 20, and the material of the bonding layer 30 can be metal or non - metal.

[0135] S4. Form pixel mesa 3s arranged in an array on the detector wafer 10. There is a first isolation groove 4 between two adjacent pixel mesa 3s in the same array to isolate the two adjacent pixel mesa 3s. The first isolation groove 4 penetrates through the detector wafer 10 and the bonding layer 30.

[0136] For example, multiple pixel mesa arrays are formed on the same detector wafer 10 to improve the preparation efficiency.

[0137] For example, use a lithography process to pattern the detector wafer 10. Among them, the lithography process includes processes such as the formation of photoresist, lithography, development, lithography pattern detection, etching, and removal of photoresist.

[0138] For example, after forming the pixel mesa 3s arranged in an array on the detector wafer 10, use IBE (Ion Beam Etching) to etch the bonding layer 30 so that the first isolation groove 4 extends into the bonding layer 30, thereby forming the bonding electrode 300. For example, the orthographic projection of the bonding electrode 300 on the readout circuit wafer 20 coincides with the orthographic projection of the pixel mesa 3 on the readout circuit wafer 20.

[0139] In addition, during the process of forming the pixel mesa 3s arranged in an array on the detector wafer 10, alignment is required so that both the third electrode 201 and the fourth electrode 202 are located at the bottom of the first isolation groove 4.

[0140] S4. Use a lithography process to form an opening 31 on the pixel mesa 3. The opening 31 extends from the second contact layer 22 to the first contact layer 21 (as Figure 7 shown).

[0141] S5. Form a patterned first dielectric layer 53 on the side of the detector wafer 10 away from the readout circuit wafer 20. The first dielectric layer 53 exposes the first contact layer 21 located at the bottom of the opening 31 and the fourth electrode 202 located at the bottom of the first isolation groove 4.

[0142] S6. As Figure 8 shown, use a lithography process to form a first electrode 54 on the first dielectric layer 53. The first electrode 54 extends from the bottom of the opening 31 along the sidewall of the pixel mesa 3 to the fourth electrode 202, so that the first contact layer 21 of the pixel mesa 3 is electrically connected to the fourth electrode 202 through the first electrode 54.

[0143] S7. A second dielectric layer 55 is formed on the first electrode 54. The second dielectric layer 55 covers the first electrode 54 and the first isolation groove 4, and exposes the second contact layer 22 and the third electrode 201 located at the bottom of the first isolation groove 4.

[0144] S8. A second electrode 56 is formed on the second dielectric layer 55. The second electrode 56 extends from the second contact layer 22 exposed by the second dielectric layer 55 along the sidewall of the pixel mesa 3 to the third electrode 201, so that the second contact layer 22 in the pixel mesa 3 is electrically connected to the third electrode 201 through the second electrode 56.

[0145] S9. A microlens array (not shown in the figure) is formed on the side of the detector wafer 10 away from the readout circuit wafer 20.

[0146] S10. The detector wafer 10 and the readout circuit wafer 20 are diced to obtain single-chip photodetector chips.

[0147] The embodiment of the present disclosure also provides a semiconductor photodetector chip, as Figure 8 shown, including a detector wafer 10 and a readout circuit wafer 20 that are aligned with each other. The detector wafer 10 is flip-chip mounted on the detector wafer 10. A bonding layer 30 is provided between the detector wafer 10 and the readout circuit wafer 20 to bond the detector wafer 10 and the readout circuit wafer 20. After the detector wafer 10 and the readout circuit wafer 20 of the semiconductor photodetector chip are diced, photodetector chips can be obtained.

[0148] The detector wafer 10 includes a detector functional layer 2 and a detector substrate 1. The detector substrate 1 is located on the side of the detector functional layer 2 close to the readout circuit wafer 20 (i.e., the detector wafer 10 is flip-chip mounted on the detector wafer 10). For example, the detector functional layer 2 includes a first contact layer 21, a functional layer, and a second contact layer 22 that are sequentially arranged in a direction away from the detector substrate 1. The first contact layer 21 is located on the side of the detector functional layer 2 close to the detector substrate 1.

[0149] The detector wafer 10 has a plurality of pixel mesa arrays, and each pixel mesa array includes pixel mesas 3 arranged in an array. A first isolation groove 4 is provided between two adjacent pixel mesas 3 in the same array to isolate the pixel mesas 3. The first isolation groove 4 penetrates the bonding layer 30, so that the first isolation groove 4 exposes the readout circuit wafer 20. For example, the material of the bonding layer 30 is metal or non-metal.

[0150] The side of the readout circuit wafer 20 close to the detector wafer 10 has a third electrode 201 and a fourth electrode 202. Both the third electrode 201 and the fourth electrode 202 are located at the bottom of the first isolation groove 4.

[0151] An opening 31 is provided on at least a part of the pixel mesa 3, and the opening 31 extends from the second contact layer 22 to the first contact layer 21.

[0152] On the side of the detector wafer 10 away from the readout circuit wafer 20, a first dielectric layer 53, a first electrode 54, a second dielectric layer 55, and a second electrode 56 are sequentially provided. The first electrode 54 is electrically connected to the first contact layer 21 located at the bottom of the opening 31 and the fourth electrode 202 through a via hole, and the second electrode 56 is electrically connected to the second contact layer 22 and the third electrode 201 through a via hole.

[0153] So far, the technical solutions of the present invention have been described in conjunction with the preferred embodiments shown in the accompanying drawings. However, it is easy for those skilled in the art to understand that the protection scope of the present invention is obviously not limited to these specific embodiments. Without departing from the principle of the present invention, those skilled in the art can make equivalent changes or substitutions to the relevant technical features, and the technical solutions after these changes or substitutions will fall within the protection scope of the present invention.

Claims

1. A method for preparing a semiconductor photodetector chip, characterized in that: include: A detector wafer (10) is provided, comprising a detector substrate (1) and a detector functional layer (2) formed on the detector substrate (1), wherein a layer of the detector functional layer (2) closest to the detector substrate (1) is a first contact layer (21), and a layer of the detector functional layer (2) farthest from the detector substrate (1) is a second contact layer (22); Providing a readout circuit wafer (20), wherein one side of the readout circuit wafer (20) has a third electrode (201) and a fourth electrode (202); Bonding the detector wafer (10) and the readout circuit wafer (20), wherein a bonding layer (30) is formed between the detector wafer (10) and the readout circuit wafer (20), and the third electrode (201) and the fourth electrode (202) are located on a side of the readout circuit wafer (20) close to the detector wafer (10); Pixel mesas (3) arranged in an array are formed on the detector wafer (10), and a first isolation groove (4) is provided between two adjacent pixel mesas (3) in the same array to isolate the pixel mesas (3), and the first isolation groove (4) penetrates the detector wafer (10) and the bonding layer (30); forming electrodes so that the first contact layer (21) is electrically connected to the fourth electrode (202) and / or the second contact layer (22) is electrically connected to the third electrode (201); After the detector wafer (10) and the readout circuit wafer (20) are bonded, the detector substrate (1) is located on a side of the detector functional layer (2) close to the readout circuit wafer (20); and an electrode is formed, comprising: An opening (31) is formed on the pixel table (3), wherein the opening (31) extends from the second contact layer (22) to the first contact layer (21); A patterned first dielectric layer (53) is formed on a side of the detector wafer (10) away from the readout circuit wafer (20), wherein the first dielectric layer (53) exposes the first contact layer (21) located at the bottom of the opening (31) and the fourth electrode (202) located at the bottom of the first isolation groove (4); A first electrode (54) is formed on the first dielectric layer (53), wherein the first electrode (54) extends from the bottom of the opening (31) along the side wall of the pixel table (3) to the fourth electrode (202), so that the first contact layer (21) of the pixel table (3) is electrically connected to the fourth electrode (202) through the first electrode (54); A second dielectric layer (55) is formed on the first electrode (54), wherein the second dielectric layer (55) exposes the second contact layer (22) and the third electrode (201) located at the bottom of the first isolation groove (4); A second electrode (56) is formed on the second dielectric layer (55), and the second electrode (56) extends from the second contact layer (22) exposed from the second dielectric layer (55) along the side wall of the pixel table (3) to the third electrode (201), so that the second contact layer (22) in the pixel table (3) is electrically connected to the third electrode (201) through the second electrode (56).

2. A semiconductor photodetector chip, characterized in that: include: A detector wafer (10), comprising a detector functional layer, wherein the outermost two layers of the detector functional layer along the thickness direction of the detector wafer (10) are respectively a first contact layer (21) and a second contact layer (22); the detector wafer (10) has pixel table surfaces (3) arranged in an array, and a first isolation groove (4) is provided between two adjacent pixel table surfaces (3) in the same array to isolate the pixel table surfaces (3); the first isolation groove (4) penetrates the detector wafer (10) along the thickness direction of the detector wafer (10); A readout circuit wafer (20), aligned with the detector wafer (10), having a third electrode (201) and a fourth electrode (202) on one side; A bonding layer (30) is arranged between the detector wafer (10) and the readout circuit wafer (20), the first isolation groove (4) extends to the bonding layer (30), and the orthographic projection of the bonding layer (30) on the readout circuit wafer (20) coincides with the orthographic projection of the pixel table (3) on the readout circuit wafer (20); electrodes, so that the first contact layer (21) is electrically connected to the fourth electrode (202) and / or the second contact layer (22) is electrically connected to the third electrode (201); The first contact layer (21) is located on a side of the detector functional layer (2) close to the readout circuit wafer (20); At least part of the pixel table (3) is provided with an opening (31), and the opening (31) extends from the second contact layer (22) to the first contact layer (21); The third electrode (201) and the fourth electrode (202) are located at the bottom of the first isolation groove (4); A first dielectric layer (53), a first electrode (54), a second dielectric layer (55) and a second electrode (56) are sequentially arranged on a side of the detector wafer (10) away from the readout circuit wafer (20); the first electrode (54) is electrically connected to the first contact layer (21) and the fourth electrode (202) located at the bottom of the opening (31) through a via hole; and the second electrode (56) is electrically connected to the second contact layer (22) and the third electrode (201) through a via hole.

3. A photodetector chip, characterized in that: The method is obtained by slicing a semiconductor photodetector chip prepared by the method for preparing a semiconductor photodetector chip according to claim 1, or by slicing a semiconductor photodetector chip according to claim 2.

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