Light-emitting diode and light-emitting diode preparation method

Abstract

The invention provides a light emitting diode and a light emitting diode preparation method. The light emitting diode comprises a substrate, a bonding layer and an epitaxial structure, the substrate and the epitaxial structure are bonded through the bonding layer; the substrate comprises a substrate body and at least one protrusion located on the substrate body, the protrusion is located in the bonding layer, and the protrusion is gradually widened in the direction away from the substrate body. The substrate comprises a substrate body and at least one protrusion located on the substrate body, the protrusion is located in the bonding layer, namely inserted into the bonding layer, and the protrusion is gradually widened in the direction away from the substrate body, so that the protrusion and the bonding layer can be better fixed together, the substrate and the epitaxial structure are more tightly fixed, and the yield of the epitaxial structure is improved. The falling-off problem is reduced, and the chip yield is improved.

Description

Technical Field

[0001] The present disclosure relates to the field of light-emitting devices, and in particular to a light-emitting diode and a method for preparing the light-emitting diode. Background Art

[0002] Light Emitting Diode (LED) is a semiconductor device that can convert electrical energy into light energy. Its light-emitting principle is based on the energy band structure of semiconductor materials. LED has been widely used in many fields such as lighting and display due to its high efficiency, energy saving and long life.

[0003] The related art provides a light emitting diode, including: a substrate, a bonding layer and an epitaxial structure, wherein the substrate and the epitaxial structure are bonded via the bonding layer.

[0004] In the above-mentioned manufacturing process, the adhesion of the substrate to the bonding adhesive is relatively weak, which may cause the substrate and the epitaxial structure to fall off during the chip manufacturing process, resulting in yield loss. Summary of the invention

[0005] The embodiments of the present disclosure provide a light emitting diode and a method for manufacturing the light emitting diode, which are conducive to better fixing the substrate and the bonding layer and reducing the problem of falling off. The technical solution is as follows:

[0006] In one aspect, a light emitting diode is provided, the light emitting diode comprising: a substrate, a bonding layer and an epitaxial structure;

[0007] The substrate and the epitaxial structure are bonded via the bonding layer;

[0008] The substrate comprises a substrate body and at least one protrusion located on the substrate body, wherein the protrusion is located in the bonding layer and gradually widens in a direction away from the substrate body.

[0009] Optionally, the thickness of the substrate body is 400-800 micrometers, and the height of the protrusion is 150-500 nanometers.

[0010] Optionally, the bonding layer includes a first bonding sublayer and a second bonding sublayer stacked in sequence, the second bonding sublayer is located on the substrate body, and the protrusion passes through the first bonding sublayer and is inserted into the second bonding sublayer.

[0011] Optionally, the thickness of the first bonding sublayer is smaller than the thickness of the second bonding sublayer.

[0012] Optionally, the length of the protrusion extending into the second bonding sublayer accounts for 1 / 3 to 2 / 3 of the thickness of the second bonding sublayer.

[0013] In another aspect, a method for preparing a light emitting diode comprises:

[0014] fabricating an epitaxial structure on a temporary substrate;

[0015] The epitaxial structure is bonded to a substrate through a bonding layer, and the temporary substrate is removed. The substrate comprises a substrate body and at least one protrusion on the substrate body. The protrusion is located in the bonding layer and gradually widens in a direction away from the substrate body.

[0016] Optionally, the method further comprises: using metal Pt as a mask to etch a sapphire substrate to obtain the substrate.

[0017] Optionally, bonding the epitaxial structure to the substrate through a bonding layer comprises:

[0018] Applying a first layer of bonding glue on the substrate;

[0019] Baking the substrate coated with the first layer of bonding glue to form a first bonding sublayer;

[0020] Applying a second layer of bonding glue on the first bonding sublayer;

[0021] Baking the substrate coated with the second layer of bonding glue to form a second bonding sublayer;

[0022] The epitaxial structure is bonded to the substrate through the first bonding sublayer and the second bonding sublayer.

[0023] Optionally, baking the substrate coated with the first layer of bonding glue to form a first bonding sublayer includes:

[0024] The substrate is baked at a baking temperature of 200 to 250° C. for 5 to 15 minutes to form the first bonding sublayer.

[0025] Optionally, baking the substrate coated with the second layer of bonding glue to form a second bonding sublayer includes:

[0026] The substrate is baked at a baking temperature of 150 to 180° C. for 5 to 15 minutes to form the second bonding sublayer.

[0027] The technical solution provided by the embodiments of the present disclosure has the following beneficial effects:

[0028] In the embodiment of the present disclosure, the substrate includes a substrate body and at least one protrusion located on the substrate body. The protrusion is located in the bonding layer, that is, inserted into the bonding layer, and because the protrusion gradually widens in the direction away from the substrate body, the protrusion and the bonding layer can be better fixed together, thereby allowing the substrate and the epitaxial structure to be more tightly fixed, reducing the problem of falling off, and improving the chip yield. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0030] Figure 1 is a structural schematic diagram of a light emitting diode provided by an embodiment of the present disclosure;

[0031] Figure 2 is a schematic structural diagram of a substrate provided by an embodiment of the present disclosure;

[0032] Figure 3 is a schematic diagram of the structure of a bonding layer provided in an embodiment of the present disclosure;

[0033] Figure 4 is a top view of a light emitting diode provided by an embodiment of the present disclosure;

[0034] Figure 5 is a flow chart of a method for preparing a light emitting diode provided by an embodiment of the present disclosure;

[0035] Figure 6 This is a flow chart of another method for preparing a light emitting diode provided in an embodiment of the present disclosure.

[0036] The reference numerals are as follows:

[0037] 10: electrode structure; 100: substrate; 101: first semiconductor layer; 102: active layer; 103: second semiconductor layer; 104: bonding layer; 105: first electrode; 106: second electrode; 107: reflective layer; 108: first electrode pad; 109: second electrode pad; 110: passivation layer; 111: first through hole; 112: second through hole; 120: step surface of step structure; 1000: epitaxial structure; 1041: first bonding sublayer; 1042: second bonding sublayer; substrate body: 1001; protrusion: 1002. DETAILED DESCRIPTION

[0038] In order to make the objectives, technical solutions and advantages of the present disclosure more clear, the embodiments of the present disclosure will be further described in detail below with reference to the accompanying drawings.

[0039] Figure 1 is a schematic diagram of the structure of a light emitting diode provided by an embodiment of the present disclosure. Figure 1 The light emitting diode includes: a substrate 100 , a bonding layer 104 , and an epitaxial structure 1000 .

[0040] In the embodiment of the present disclosure, the substrate 100 and the epitaxial structure 1000 are bonded via a bonding layer 104 .

[0041] Figure 2 is a schematic diagram of the structure of the substrate provided by the embodiment of the present disclosure. Figure 1 and Figure 2 The substrate 100 includes a substrate body 1001 and at least one protrusion 1002 located on the substrate body 1001 . The protrusion 1002 is located in the bonding layer 104 , and the protrusion 1002 gradually widens in a direction away from the substrate body 1001 .

[0042] In the embodiment of the present disclosure, the substrate includes a substrate body and at least one protrusion located on the substrate body. The protrusion is located in the bonding layer, that is, inserted into the bonding layer, and because the protrusion gradually widens in the direction away from the substrate body, the protrusion and the bonding layer can be better fixed together, thereby allowing the substrate and the epitaxial structure to be more tightly fixed, reducing the problem of falling off, and improving the chip yield.

[0043] like Figure 1 As shown, the substrate 100 includes a plurality of protrusions 1002 arranged at intervals.

[0044] Exemplarily, the plurality of protrusions 1002 are arranged at equal intervals, for example, at intervals of 100 nm to 200 nm.

[0045] In this implementation, multiple protrusions are used to better achieve fixation between the substrate and the bonding layer.

[0046] like Figure 2 As shown, the substrate 100 includes a protrusion 1002 to facilitate the manufacture of the substrate 100 .

[0047] In a possible implementation of the present disclosure, the protrusion 1002 may be a regular shape, such as a prism, a frustum, or the like.

[0048] In other possible implementations of the present disclosure, the protrusion 1002 may also be of an irregular shape.

[0049] In the disclosed embodiment, the thickness of the substrate body 1001 is 400 to 800 microns, and the height of the protrusion 1002 is 150 to 500 nanometers. The thickness of the substrate body can ensure the strength of the light-emitting diode without causing the overall thickness of the light-emitting diode to be too large. The height of the protrusion can be closely combined with the bonding layer, but the required bonding layer thickness will not be too large due to the height being too large, which will cause the overall thickness of the entire light-emitting diode to be too large.

[0050] For example, the thickness of the substrate body 1001 is 500 micrometers, and the height of the protrusion 1002 is 350 nanometers (0.35 micrometers).

[0051] Figure 3 Schematic diagram of the structure of the bonding layer provided by the embodiment of the present disclosure. Figure 1 and Figure 3 The bonding layer 104 includes a first bonding sublayer 1041 and a second bonding sublayer 1042 stacked in sequence. The second bonding sublayer 1042 is located on the substrate body 1001 , and the protrusion 1002 passes through the first bonding sublayer 1041 and is inserted into the second bonding sublayer 1042 .

[0052] In this implementation, two bonding sublayers are used to form a bonding layer, wherein the first bonding sublayer is responsible for close contact with the side wall of the protrusion to ensure the bonding between the bonding layer and the substrate, and the second bonding sublayer covers the top of the protrusion so that the bonding layer can be bonded to the epitaxial structure with a flat surface.

[0053] In the embodiment of the present disclosure, the two bonding sublayers may be cured at different temperatures, and the curing temperature of the first bonding sublayer is greater than the curing temperature of the second bonding sublayer.

[0054] Exemplarily, the length of the protrusion 1002 extending into the second bonding sublayer 1042 accounts for 1 / 3 to 2 / 3 of the thickness of the second bonding sublayer 1042, for example, accounts for 1 / 2 of the thickness of the second bonding sublayer 1042. This design can maximize the bonding effect between the substrate and the bonding layer, and ensure the flatness of the bonding layer and the epitaxial structure bonding side, thereby ensuring the bonding effect between the bonding layer and the epitaxial structure.

[0055] In the embodiment of the present disclosure, the thickness of the first bonding sublayer 1041 is smaller than the thickness of the second bonding sublayer 1042 .

[0056] In this implementation, the first bonding sublayer is responsible for being in close contact with the side wall of the protrusion, so a smaller thickness is designed, and the second bonding sublayer needs to cover the top of the protrusion, so a thicker thickness is designed.

[0057] In the embodiment of the present disclosure, the thickness of the first bonding sublayer 1041 may be 50 to 150 nanometers.

[0058] Exemplarily, the first bonding sublayer 1041 has a thickness of 100 nanometers.

[0059] In this implementation, the first bonding sublayer 1041 having the above-mentioned thickness can be in close contact with the protrusion and allow the protrusion to pass through into the second bonding sublayer.

[0060] In the embodiment of the present disclosure, the thickness of the second bonding sublayer 1042 may be 450-550 nanometers.

[0061] Exemplarily, the second bonding sublayer 1042 has a thickness of 500 nanometers.

[0062] In this implementation, the second bonding sublayer 1042 with the above-mentioned thickness can cover the protrusion with sufficient margin to prevent the protrusion from protruding out of the bonding layer.

[0063] In other embodiments, the thickness of the first bonding sublayer 1041 may also be greater than or equal to the thickness of the second bonding sublayer 1042 .

[0064] In the embodiment of the present disclosure, the material of the first bonding sublayer 1041 and the second bonding sublayer 1042 may be any one of photoresist, benzocyclobutene, and silica gel.

[0065] Exemplarily, the material of the first bonding sublayer 1041 and the second bonding sublayer 1042 is silica gel. Silica gel has excellent adhesion and can be tightly combined with the substrate. In addition, silica gel is easy to process, thereby improving the manufacturing efficiency.

[0066] In the embodiment of the present disclosure, the epitaxial structure 1000 includes a first semiconductor layer 101 , an active layer 102 , and a second semiconductor layer 103 stacked in sequence, and the first semiconductor layer 101 , the active layer 102 , and the second semiconductor layer 103 form a step structure.

[0067] In the embodiment of the present disclosure, the substrate 100 may be a sapphire substrate.

[0068] In the embodiment of the present disclosure, the first semiconductor layer 101 may be an N-type semiconductor layer, and the second semiconductor layer 103 may be a P-type semiconductor layer.

[0069] For example, the first semiconductor layer 101 may include an N-type AlGaInP current spreading layer and an N-type AlInP carrier confinement layer stacked in sequence, and the second semiconductor layer 103 may include a P-type AlInP carrier confinement layer and a P-type GaP window layer.

[0070] The thickness of the P-type GaP window layer is 2.8-3.2 μm, for example, 3 μm.

[0071] In another example, the first semiconductor layer 101 may be a P-type semiconductor layer, and the second semiconductor layer 103 may be an N-type semiconductor layer.

[0072] In the embodiment of the present disclosure, the active layer 102 may be a multi-quantum well layer. For example, the multi-quantum well layer may include a plurality of periodically alternately stacked AlGaInP quantum well layers and AlGaInP quantum barrier layers.

[0073] Optionally, a corrosion stop layer may be provided between the bonding layer 104 and the first semiconductor layer 101 , and the corrosion stop layer may be a solidified phosphoric acid mixture.

[0074] Optionally, the light emitting diode may further include an electrode structure 10 and a reflective layer 107 , wherein the electrode structure 10 includes a first electrode 105 , a second electrode 106 , a first electrode pad 108 and a second electrode pad 109 .

[0075] The first electrode 105 is located on the step surface 120 of the step structure, the second electrode 106 is located on the surface of the second semiconductor layer 103, the reflective layer 107 covers the step structure, the first electrode 105 and the second electrode 106, the first electrode pad 108 penetrates the reflective layer 107 and is connected to the first electrode 105, and the second electrode pad 109 penetrates the reflective layer 107 and is connected to the second electrode 106.

[0076] In the embodiment of the present disclosure, both the first electrode 105 and the second electrode 106 may include AuGe or AuBe electrodes.

[0077] Exemplarily, the first electrode 105 is an AuGe electrode, and the second electrode 106 is an AuBe electrode.

[0078] In the embodiment of the present disclosure, the reflective layer 107 is a distributed Bragg reflector (DBR) layer, for example, a silicon oxide layer (eg, SiO 2 ) or a titanium oxide layer (eg, Ti 3 O 5 , Ti 2 O 3 ).

[0079] In the embodiment of the present disclosure, the first electrode pad 108 and the second electrode pad 109 may each include a Cr layer, an Al layer, a Ti layer, a Ni layer, and an Au alloy layer stacked in sequence.

[0080] In one example, the thickness of the Cr layer is 80-120 nm, the thickness of the Al layer is 2500-3500 nm, the thickness of the Ti layer is 450-550 nm, the thickness of the Ni layer is 1800-2200 nm, and the thickness of the Au alloy layer is 18000-22000 nm.

[0081] Exemplarily, the thickness of the Cr layer is 100 nm, the thickness of the Al layer is 3000 nm, the thickness of the Ti layer is 500 nm, the thickness of the Ni layer is 2000 nm, and the thickness of the Au alloy layer is 20000 nm.

[0082] In one example, the first electrode 105 is an N-electrode, and the first electrode pad 108 is an N-electrode pad; the second electrode 106 is a P-electrode, and the second electrode pad 109 is a P-electrode pad.

[0083] In another example, the first electrode 105 is a P-electrode, and the first electrode pad 108 is a P-electrode pad; the second electrode 106 is an N-electrode, and the second electrode pad 109 is an N-electrode pad.

[0084] In other examples, the electrode structure may include only electrode pads but no electrodes, which is not limited in the present disclosure.

[0085] Optionally, the light emitting diode may further include a passivation layer 110 , the passivation layer 110 covers the side surfaces of the electrode structure 10 , the surface and side surfaces of the reflective layer 107 , and the side surfaces of the epitaxial structure 1000 , and the electrode structure 10 passes through the passivation layer 110 .

[0086] In the embodiment of the present disclosure, the passivation layer 110 may be a film layer formed of materials such as a SiO 2 layer and an Al 2 O 3 layer.

[0087] For example, the passivation layer 110 is a SiO 2 layer.

[0088] It is worth noting that in the embodiments of the present disclosure, structures may be selectively increased or decreased based on the structure of the above-mentioned light emitting diode, and the present disclosure does not impose any limitation on this.

[0089] Figure 4 is a top view of a light emitting diode provided by an embodiment of the present disclosure. Figure 4 The top view shape of the first electrode pad 108 and the second electrode pad 109 is a rectangle.

[0090] In other embodiments, the top view shapes of the first electrode pad 108 and the second electrode pad 109 may be other arbitrary shapes, which is not limited in the present disclosure.

[0091] Figure 5 is a flow chart of a method for preparing a light emitting diode provided by an embodiment of the present disclosure. Figure 5 The method steps include:

[0092] S11. Fabricating an epitaxial structure on a temporary substrate.

[0093] S12. Bonding the epitaxial structure to the substrate through a bonding layer and removing the temporary substrate, wherein the substrate comprises a substrate body and at least one protrusion on the substrate body, wherein the protrusion is located in the bonding layer and gradually widens in a direction away from the substrate body.

[0094] In the embodiment of the present disclosure, the substrate includes a substrate body and at least one protrusion located on the substrate body. The protrusion is located in the bonding layer, that is, inserted into the bonding layer, and because the protrusion gradually widens in the direction away from the substrate body, the protrusion and the bonding layer can be better fixed together, thereby allowing the substrate and the epitaxial structure to be more tightly fixed, reducing the problem of falling off, and improving the chip yield.

[0095] Figure 6is a flow chart of another method for preparing a light emitting diode provided by an embodiment of the present disclosure. Figure 6 The method steps include:

[0096] S21. Forming a second semiconductor layer, an active layer, and a first semiconductor layer in sequence on a temporary substrate, wherein the second semiconductor layer, the active layer, and the first semiconductor layer constitute an epitaxial structure.

[0097] Wherein, the temporary substrate is a gallium arsenide substrate.

[0098] In one example, step S21 includes:

[0099] The first step is to fabricate a second semiconductor layer.

[0100] In the embodiment of the present disclosure, the second semiconductor layer includes a P-type AlInP carrier confinement layer and a P-type GaP window layer.

[0101] Exemplarily, a P-type GaP window layer and a P-type AlInP carrier confinement layer are sequentially fabricated on the surface of the active layer using a Metal Organic Chemical Vapor Deposition (MOCVD) device.

[0102] The second step is to make the active layer.

[0103] In the embodiment of the present disclosure, the active layer is a multi-quantum well layer, including a plurality of periodically alternately stacked AlGaInP quantum well layers and AlGaInP quantum barrier layers.

[0104] Exemplarily, a plurality of AlGaInP quantum well layers and AlGaInP quantum barrier layers are alternately grown on the surface of the first semiconductor layer using MOCVD equipment.

[0105] The third step is to make the first semiconductor layer.

[0106] In the embodiment of the present disclosure, the first semiconductor layer includes an N-type AlGaInP current spreading layer and an N-type AlInP carrier confinement layer stacked in sequence.

[0107] Exemplarily, an MOCVD device is used to sequentially form an N-type AlInP carrier confinement layer and an N-type AlGaInP current spreading layer on the surface of the active layer.

[0108] In the disclosed embodiment, the growth of the semiconductor layer can be achieved by using VeecoK465i or C4 or RB metal organic chemical vapor deposition (MOCVD) equipment or AIXTRON metal organic chemical vapor deposition equipment. High purity H2 (hydrogen) or high purity N2 (nitrogen) or a mixture of high purity H2 and high purity N2 is used as a carrier gas, high purity NH3 is used as an N source, trimethyl gallium (TMGa) and triethyl gallium (TEGa) are used as gallium sources, trimethyl indium (TMIn) is used as an indium source, silane (SiH4) is used as an N-type dopant, trimethyl aluminum (TMAl) is used as an aluminum source, and bis(cyclopentadienyl) magnesium (CP2Mg) is used as a P-type dopant.

[0109] In the disclosed embodiment, an etching stop layer may be formed on the surface of the N-type AlGaInP current spreading layer, and the etching medium layer is a solidified phosphoric acid mixture.

[0110] S22. Prepare a substrate.

[0111] In the embodiment of the present disclosure, the substrate may be any one of a sapphire substrate, a Si substrate, and the like.

[0112] Exemplarily, the substrate is a sapphire substrate.

[0113] In an embodiment of the present disclosure, the substrate includes a substrate body and at least one protrusion located on the substrate body, and the protrusion gradually widens in a direction away from the substrate body.

[0114] In the disclosed embodiment, step S22 may include: performing a patterning process on the sapphire substrate. For example, using metal Pt as a mask to etch the sapphire substrate. After a Pt mask with a pattern is formed on the sapphire, the sapphire in the area not covered by Pt will be corroded first, and because the etching rate of Pt is slower than that of sapphire, when the Pt covering the surface is not completely corroded, the corrosive liquid has begun to corrode laterally, and finally a pattern with a width of the upper end portion greater than that of the lower end portion is formed on the sapphire.

[0115] In a possible implementation of the present disclosure, the protrusion may be a regular shape, such as a prism, a frustum, or the like.

[0116] In other possible implementations of the present disclosure, the protrusion may also be of an irregular shape.

[0117] S23, sequentially manufacturing a first bonding sublayer and a second bonding sublayer on the substrate to form a bonding layer.

[0118] In one example, step S23 includes:

[0119] In the first step, a first layer of bonding glue is applied on the substrate.

[0120] In the disclosed embodiment, a bonding glue with a thickness of 50 to 150 nanometers is coated on the substrate.

[0121] Exemplarily, 100 nanometers of bonding glue is coated on the substrate.

[0122] In the disclosed embodiment, the material of the bonding glue is any one of photoresist, benzocyclobutene, and silica gel.

[0123] Exemplarily, the material of the bonding glue is silica gel.

[0124] The second step is to bake the substrate coated with bonding glue to form a first bonding sublayer.

[0125] In the embodiment of the present disclosure, baking is performed at a baking temperature of 200 to 250° C. for 5 to 15 minutes to form the first bonding sublayer.

[0126] Exemplarily, baking is performed at a baking temperature of 200° C. for 10 minutes to form the first bonding sublayer.

[0127] In this implementation, the hardness of the first bonding sublayer can be increased at a higher temperature to enhance the closeness of the bonding with the substrate.

[0128] The third step is to apply a second layer of bonding glue on the first bonding sublayer.

[0129] In the embodiment of the present disclosure, a bonding glue with a thickness of 450 to 550 nanometers is coated on the first bonding sublayer.

[0130] Exemplarily, 500 nanometers of bonding glue is coated on the first bonding sub-layer.

[0131] In the disclosed embodiment, the material of the bonding glue is any one of photoresist, benzocyclobutene, and silica gel.

[0132] Exemplarily, the material of the bonding glue is silica gel.

[0133] The fourth step is to bake the substrate coated with the second layer of bonding glue to form a second bonding sub-layer.

[0134] In the embodiment of the present disclosure, baking is performed at a baking temperature of 150 to 180° C. for 5 to 15 minutes to form the second bonding sublayer.

[0135] Exemplarily, baking is performed at a baking temperature of 160° C. for 10 minutes to form the second bonding sublayer.

[0136] In this implementation, the second bonding sublayer can have a certain elasticity at a relatively low temperature, so that the bonding glue will not be too hard to deteriorate the bonding effect.

[0137] See also Figure 1 and Figure 3 The bonding layer 104 includes a first bonding sublayer 1041 and a second bonding sublayer 1042 stacked in sequence. The second bonding sublayer 1042 is located on the substrate body 1001 , and the protrusion 1002 passes through the first bonding sublayer 1041 and is inserted into the second bonding sublayer 1042 .

[0138] In this implementation, two bonding sublayers are used to form a bonding layer, wherein the first bonding sublayer is responsible for close contact with the side wall of the protrusion to ensure the bonding between the bonding layer and the substrate, and the second bonding sublayer covers the top of the protrusion so that the bonding layer can be bonded to the epitaxial structure with a flat surface.

[0139] In the embodiment of the present disclosure, the two bonding sublayers may be cured at different temperatures, and the curing temperature of the first bonding sublayer is greater than the curing temperature of the second bonding sublayer.

[0140] Exemplarily, the length of the protrusion 1002 extending into the second bonding sublayer 1042 accounts for 1 / 3 to 2 / 3 of the thickness of the second bonding sublayer 1042, for example, accounts for 1 / 2 of the thickness of the second bonding sublayer 1042. This design can maximize the bonding effect between the substrate and the bonding layer, and ensure the flatness of the bonding layer and the epitaxial structure bonding side, thereby ensuring the bonding effect between the bonding layer and the epitaxial structure.

[0141] In the embodiment of the present disclosure, the thickness of the first bonding sublayer 1041 is smaller than the thickness of the second bonding sublayer 1042 .

[0142] In this implementation, the first bonding sublayer is responsible for being in close contact with the side wall of the protrusion, so a smaller thickness is designed, and the second bonding sublayer needs to cover the top of the protrusion, so a thicker thickness is designed.

[0143] In the embodiment of the present disclosure, the thickness of the first bonding sublayer 1041 may be 50 to 150 nanometers.

[0144] Exemplarily, the first bonding sublayer 1041 has a thickness of 100 nanometers.

[0145] In this implementation, the first bonding sublayer 1041 having the above-mentioned thickness can be in close contact with the protrusion and allow the protrusion to pass through into the second bonding sublayer.

[0146] In the embodiment of the present disclosure, the thickness of the second bonding sublayer 1042 may be 450-550 nanometers.

[0147] Exemplarily, the second bonding sublayer 1042 has a thickness of 500 nanometers.

[0148] In this implementation, the second bonding sublayer 1042 with the above-mentioned thickness can cover the protrusion with sufficient margin to prevent the protrusion from protruding out of the bonding layer.

[0149] In other embodiments, the thickness of the first bonding sublayer 1041 may also be greater than or equal to the thickness of the second bonding sublayer 1042 .

[0150] In the embodiment of the present disclosure, the material of the first bonding sublayer 1041 and the second bonding sublayer 1042 may be any one of photoresist, benzocyclobutene, and silica gel.

[0151] Exemplarily, the material of the first bonding sublayer 1041 and the second bonding sublayer 1042 is silica gel. Silica gel has excellent adhesion and can be tightly combined with the substrate. In addition, silica gel is easy to process, thereby improving the manufacturing efficiency.

[0152] S24. Bond the epitaxial structure to the substrate via the bonding layer and remove the temporary substrate.

[0153] In the disclosed embodiment, the bonding temperature is 280-320°C.

[0154] Exemplarily, the bonding temperature is 300°C.

[0155] In the embodiment of the present disclosure, if the bonding temperature is too high, the semiconductor layer will be damaged, and if the bonding temperature is too low, it will be detrimental to the bonding effect. Using the above temperature for bonding can ensure a good bonding effect without damaging the semiconductor layer.

[0156] S25, performing patterning on the first semiconductor layer, the active layer and the second semiconductor layer to form a step structure.

[0157] In one example, step S25 includes:

[0158] In the embodiment of the present disclosure, the first semiconductor layer, the active layer, and the second semiconductor layer stacked in sequence are patterned by using an etching technology to form a step structure, which may include:

[0159] In the first step, a layer of photoresist is coated on the surface of the second semiconductor layer.

[0160] The second step is to use a mask to block and expose the photoresist.

[0161] The third step is to develop the exposed photoresist to form a photoresist mask with a specific shape.

[0162] In the fourth step, the first semiconductor layer, the active layer and the second semiconductor layer are etched based on the photoresist mask to form a step structure.

[0163] Step 5: Use a stripping solution to remove the photoresist.

[0164] S26, manufacturing a first electrode and a second electrode, wherein the first electrode is located on a surface of the first semiconductor layer, and the second electrode is located on a surface of the second semiconductor layer.

[0165] In one example, step S26 includes:

[0166] By adopting electron beam evaporation technology or magnetron sputtering technology, a first electrode is formed on the step surface of the first semiconductor layer, and a second electrode is formed on the surface of the second semiconductor layer.

[0167] S27, manufacturing a reflective layer, wherein the reflective layer covers the step structure.

[0168] In one example, step S27 includes:

[0169] The DBR layer is manufactured on the second semiconductor layer and the surface of the step structure by using the plasma enhanced chemical vapor deposition (PECVD) technology or the atomic layer deposition (ALD) technology to form a reflective layer.

[0170] S28. Make a first electrode pad and a second electrode pad, wherein the first electrode pad penetrates the reflective layer and is connected to the first electrode, and the second electrode pad penetrates the reflective layer and is connected to the second electrode.

[0171] In one example, step S28 includes:

[0172] In the first step, the reflective layer is patterned to form a first through hole and a second through hole.

[0173] The first through hole penetrates the reflective layer and is connected to the first electrode, and the second through hole penetrates the reflective layer and is connected to the second electrode.

[0174] The second step is to make a first electrode pad and a second electrode pad.

[0175] The first electrode pad and the second electrode pad are manufactured by electron beam evaporation or magnetron sputtering technology.

[0176] In the embodiment of the present disclosure, the first electrode pad and the second electrode pad include a Cr layer, an Al layer, a Ti layer, a Ni layer, and an Au alloy layer stacked in sequence.

[0177] In one example, the thickness of the Cr layer is 80-120 nm, the thickness of the Al layer is 2500-3500 nm, the thickness of the Ti layer is 450-550 nm, the thickness of the Ni layer is 1800-2200 nm, and the thickness of the Au alloy layer is 18000-22000 nm.

[0178] Exemplarily, the thickness of the Cr layer is 100 nm, the thickness of the Al layer is 3000 nm, the thickness of the Ti layer is 500 nm, the thickness of the Ni layer is 2000 nm, and the thickness of the Au alloy layer is 20000 nm.

[0179] In the embodiment of the present disclosure, the first electrode and the first electrode pad form a first electrode structure, and the second electrode and the second electrode pad form a second electrode structure.

[0180] S29, making a passivation layer, wherein the passivation layer covers the side surfaces of the electrode structure, the surface and side surfaces of the reflective layer, and the side surfaces of the epitaxial structure.

[0181] In one example, step S29 includes:

[0182] A SiO2 layer is fabricated on the surface of the step structure by using a plasma enhanced chemical vapor deposition (PECVD) technique or an atomic layer deposition (ALD) technique to form a passivation layer.

[0183] In the embodiment of the present disclosure, the passivation layer may also be a transparent insulating material such as Al2O3, and the present disclosure does not limit the material of the passivation layer.

[0184] Optionally, the method may further include: thinning the substrate.

[0185] In the embodiment of the present disclosure, the substrate may be thinned by laser grinding.

[0186] like Figure 1 As shown, the substrate 100 includes a plurality of protrusions 1002 arranged at intervals.

[0187] Exemplarily, the plurality of protrusions 1002 are arranged at equal intervals, for example, at intervals of 100 nm to 200 nm.

[0188] In this implementation, multiple protrusions are used to better achieve fixation between the substrate and the bonding layer.

[0189] like Figure 2 As shown, the substrate 100 includes a protrusion 1002 to facilitate the manufacture of the substrate 100 .

[0190] In a possible implementation of the present disclosure, the protrusion 1002 may be a regular shape, such as a prism, a frustum, or the like.

[0191] In other possible implementations of the present disclosure, the protrusion 1002 may also be of an irregular shape.

[0192] In the disclosed embodiment, the thickness of the substrate body 1001 (after thinning) is 400 to 800 microns, and the height of the protrusion 1002 is 150 to 500 nanometers. The thickness of the substrate body can ensure the strength of the light-emitting diode without causing the overall thickness of the light-emitting diode to be too large. The height of the protrusion can be tightly combined with the bonding layer, but the required bonding layer thickness will not be too large due to the height being too large, which will cause the overall thickness of the entire light-emitting diode to be too large.

[0193] For example, the thickness of the substrate body 1001 is 500 micrometers, and the height of the protrusion 1002 is 350 nanometers (0.35 micrometers).

[0194] The disclosed embodiment improves the manufacturing method and structure of the bonding process. First, a raised pattern is made on the substrate. Such a pattern can better fix the bonding glue and reduce its falling off problem. In addition, the bonding glue is applied in two steps. The first coating is relatively thin and uses a high curing temperature, while the second coating is relatively thick and uses a slightly lower curing temperature. This can further optimize the adhesion of the bonding glue. After the improvement, the yield loss caused by the falling off of the bonding layer is reduced from 0.04% to 0.01%, further improving the promotion competitiveness of LED devices.

[0195] The above description is only an optional embodiment of the present disclosure and is not intended to limit the present disclosure. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present disclosure shall be included in the protection scope of the present disclosure.

Claims

1. A light emitting diode, characterized in that: The light emitting diode comprises: a substrate (100), a bonding layer (104) and an epitaxial structure (1000); The substrate (100) and the epitaxial structure (1000) are bonded via the bonding layer (104); The substrate (100) comprises a substrate body (1001) and at least one protrusion (1002) located on the substrate body (1001); the protrusion (1002) is located in the bonding layer (104), and the protrusion (1002) gradually widens in a direction away from the substrate body (1001).

2. The light emitting diode according to claim 1, characterized in that: The thickness of the substrate body (1001) is 400 to 800 micrometers, and the height of the protrusion (1002) is 150 to 500 nanometers.

3. The light emitting diode according to claim 1, characterized in that: The bonding layer (104) comprises a first bonding sublayer (1041) and a second bonding sublayer (1042) which are stacked in sequence, the second bonding sublayer (1042) is located on the substrate body (1001), and the protrusion (1002) passes through the first bonding sublayer (1041) and is inserted into the second bonding sublayer (1042).

4. The light emitting diode according to claim 3, characterized in that: The thickness of the first bonding sublayer (1041) is smaller than the thickness of the second bonding sublayer (1042).

5. The light emitting diode according to claim 3 or 4, characterized in that: The length of the protrusion (1002) extending into the second bonding sublayer (1042) accounts for 1 / 3 to 2 / 3 of the thickness of the second bonding sublayer (1042).

6. A method for preparing a light emitting diode, characterized in that: The method comprises: fabricating an epitaxial structure on a temporary substrate; The epitaxial structure is bonded to a substrate through a bonding layer, and the temporary substrate is removed. The substrate comprises a substrate body and at least one protrusion on the substrate body. The protrusion is located in the bonding layer and gradually widens in a direction away from the substrate body.

7. The method for preparing a light emitting diode according to claim 6, characterized in that: The method further comprises: The sapphire substrate is etched by using metal Pt as a mask to obtain the substrate.

8. The method for preparing a light emitting diode according to claim 6 or 7, characterized in that: Bonding the epitaxial structure to the substrate through a bonding layer comprises: Applying a first layer of bonding glue on the substrate; Baking the substrate coated with the first layer of bonding glue to form a first bonding sublayer; Applying a second layer of bonding glue on the first bonding sublayer; Baking the substrate coated with the second layer of bonding glue to form a second bonding sublayer; The epitaxial structure is bonded to the substrate through the first bonding sublayer and the second bonding sublayer.

9. The method for preparing a light emitting diode according to claim 8, characterized in that: The step of baking the substrate coated with the first layer of bonding glue to form a first bonding sublayer comprises: The substrate is baked at a baking temperature of 200 to 250° C. for 5 to 15 minutes to form the first bonding sublayer.

10. The method for preparing a light emitting diode according to claim 8, characterized in that: The step of baking the substrate coated with the second layer of bonding glue to form a second bonding sublayer comprises: The substrate is baked at a baking temperature of 150 to 180° C. for 5 to 15 minutes to form the second bonding sublayer.

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