Load exception processing method, electronic device, storage medium and program product

Abstract

The embodiment of the invention provides a load exception processing method, electronic equipment, a storage medium and a program product, and relates to the technical field of computers, the method comprises the steps that load information of to-be-tested equipment in a load detection period is acquired, and at least one process runs in the to-be-tested equipment; if the load information represents that the load of the to-be-detected device is in an abnormal state, a target process causing the abnormal state in at least one process is determined according to at least one piece of process information of the to-be-detected device, the at least one piece of process information is collected in the load detection period, and the process information comprises performance data of the at least one process. According to the technical scheme provided by the embodiment of the invention, the positioning duration of the load abnormality root is shortened, and the positioning efficiency of the load abnormality root is improved.

Description

Technical Field

[0001] The present application relates to the field of computer technology, and in particular to a load exception processing method, electronic equipment, computer-readable storage medium, and computer program product, which can be applied to the field of load management technology. Background Art

[0002] With the rapid development of the Internet, more and more service scenarios require high-performance system support. System load is one of the important indicators to measure system performance. When the system load is high, it is easy to have long service response time and unstable service. Therefore, in order to ensure the effective operation of the service, the system load is often tested. However, in related technologies, when the system load is detected to be high, it is often through post-production methods such as redeployment of the site, combined with manual analysis, to locate the root cause of the high load, which takes a long time and is inefficient. Summary of the invention

[0003] Embodiments of the present application provide a load exception processing method, an electronic device, a computer-readable storage medium, and a computer program product to alleviate or solve one or more technical problems existing in the prior art.

[0004] In a first aspect, an embodiment of the present application provides a load anomaly processing method, comprising: obtaining load information of a device under test within a load detection cycle, wherein at least one process is running in the device under test; if the load information indicates that the load of the device under test is in an abnormal state, then determining a target process in the at least one process that causes the abnormal state based on at least one process information of the device under test, wherein the at least one process information is collected within the load detection cycle, and the process information includes performance data of the at least one process.

[0005] In a second aspect, an embodiment of the present application provides a load exception handling method, comprising: obtaining load information of an operating system within a load detection cycle, wherein at least one process is running in the operating system; if the load information indicates that the load of the operating system is in an abnormal state, then determining a target process in the at least one process that causes the abnormal state based on at least one process information of the operating system, wherein the at least one process information is collected within the load detection cycle, and the process information includes performance data of the at least one process.

[0006] In a third aspect, an embodiment of the present application provides an electronic device, including a memory, a processor, and a computer program stored in the memory, and the processor implements any method of the embodiment of the present application when executing the computer program.

[0007] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, in which a computer program is stored. When the computer program is executed by a processor, the method of any one of the embodiments of the present application is implemented.

[0008] In a fifth aspect, an embodiment of the present application provides a computer program product, including a computer program, which implements any method of the embodiments of the present application when executed by a processor.

[0009] According to the technical solution of the embodiment of the present application, by collecting multiple process information of the device under test during the load detection cycle, and when the load of the device under test is in an abnormal state, the target process causing the load abnormality is determined according to the multiple process information collected during the load detection cycle. Not only is the automatic positioning of the root cause of the load abnormality achieved, but also because multiple process information of the device under test is collected during the load detection cycle without the need for subsequent reproduction, the positioning time of the root cause of the load abnormality is shortened, and the positioning efficiency of the root cause of the load abnormality is improved.

[0010] The above description is only an overview of the technical solution of the present application. In order to more clearly understand the technical means of the present application, it can be implemented in accordance with the contents of the specification. In order to make the above and other purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are listed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] In the accompanying drawings, unless otherwise specified, the same reference numerals throughout the multiple drawings represent the same or similar parts or elements. These drawings are not necessarily drawn to scale. It should be understood that these drawings only depict some embodiments according to the present application and should not be regarded as limiting the scope of the present application.

[0012] Figure 1 A first scenario flow chart of the load abnormality processing method provided in an embodiment of the present application is shown; Figure 2 A flow chart of a load abnormality processing method 200 provided in an embodiment of the present application is shown; Figure 3 A second scenario flow chart of the load abnormality processing method provided in an embodiment of the present application is shown; Figure 4A , Figure 4B and Figure 4C A schematic diagram showing a timing diagram of an embodiment of the present application; Figure 5 A schematic diagram showing a flame graph of an embodiment of the present application is shown; Figure 6 A flow chart of a load abnormality processing method 600 provided in an embodiment of the present application is shown; Figure 7A block diagram of an electronic device provided by an embodiment of the present application is shown. DETAILED DESCRIPTION

[0013] In the following, only some exemplary embodiments are briefly described. As those skilled in the art will appreciate, the described embodiments may be modified in various ways without departing from the concept or scope of the present application. Therefore, the drawings and descriptions are considered to be exemplary in nature and not restrictive.

[0014] To facilitate understanding of the technical solutions of the embodiments of the present application, the following describes the related technologies of the embodiments of the present application. The following related technologies can be combined with the technical solutions of the embodiments of the present application as optional solutions, and they all belong to the protection scope of the embodiments of the present application.

[0015] The following terms will be used in the following text: Operating System (OS): It is the core software responsible for managing computer hardware and software resources in a computer system. It provides an interface between the user and the computer hardware, and rationally organizes and schedules the computer's workflow, thereby controlling the execution of other programs. According to the operating environment, operating systems can be divided into desktop operating systems, mobile operating systems, server operating systems, embedded operating systems, etc.

[0016] Load: refers to the measurement of the number of tasks that the operating system is waiting to obtain processor resources within a certain time interval, reflecting the busyness of the operating system.

[0017] High load: refers to the operating system experiencing performance bottlenecks under high concurrent access, slow response time, and unstable services.

[0018] Performance bottleneck: refers to the poor performance of the operating system in a certain aspect, resulting in a decline in overall performance.

[0019] Response time: refers to the time it takes for the operating system to receive a request and return a response.

[0020] The embodiment of the present application aims to provide a method for handling load anomalies to shorten the time required to locate the root cause of the load anomaly and improve the location efficiency. Figure 1 A schematic diagram of an application scenario of a load abnormality processing method provided in an embodiment of the present application, such as Figure 1 As shown, the scenario includes: a device under test 110 and a load abnormality processing device 120 .

[0021] When the load anomaly detection device 120 determines that the end time of the collection cycle has been reached, the process information of the device under test 110 is collected and saved in the data warehouse. And the load information of the device under test 110 in the load detection cycle is obtained. And when the load information indicates that the load of the device under test is in an abnormal state, at least one process information collected in the corresponding load detection cycle is obtained from the data warehouse. And the target process that causes the load to be in an abnormal state in at least one process running in the device under test 110 is determined based on the at least one process information obtained. Among them, the load detection cycle is N times the collection cycle, and N is an integer greater than 1. In order to avoid storing too much process information collected in the historical load detection cycle in the data warehouse and occupying too much storage space, the load anomaly detection device 120 can also delete the process information collected within the preset historical time length from the data warehouse when it is determined that the data cleaning time has arrived. Exemplarily, the data cleaning time is 8 a.m. every day, and the preset historical period is the previous day. For example, at 8 a.m. on November 10, 2024, the process information collected on November 9, 2024 will be deleted from the data warehouse.

[0022] M processes are running in the device under test 110, where M is a positive integer, and any process includes at least one thread. Exemplarily, the device under test 110 can be a terminal device or a server. The terminal device can be a mobile phone, a desktop computer, a portable notebook, a tablet computer, etc., and the server can be a physical server, a cloud server, etc.

[0023] In one application example, the load anomaly detection device 120 is disposed in the device under test 110. In another application example, the load anomaly detection device 120 is a device independent of the device under test 110, or the load anomaly detection device 120 is disposed in other devices, and the other devices are devices different from the device under test 110; in this case, the load anomaly detection device 120 can exchange data with the device under test 110 through a network. The specific application architecture can be constructed according to the requirements in actual applications.

[0024] It should be noted that the above application scenarios or application examples provided in the embodiments of the present application are for ease of understanding, and the embodiments of the present application do not specifically limit the application of the technical solution. In addition, the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, stored data, displayed data, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of relevant data need to comply with the relevant laws, regulations and standards of relevant countries and regions, and provide corresponding operation entrances for users to choose to authorize or refuse.

[0025] The technical solution of the present application and how the technical solution of the present application solves the above-mentioned technical problems are described in detail below with specific embodiments. The several specific embodiments listed can be combined with each other, and the same or similar concepts or processes may not be repeated in some embodiments. The embodiments of the present application will be described in detail below with reference to the accompanying drawings.

[0026] Figure 2 A flow chart of a method 200 for handling load anomalies according to an embodiment of the present application is shown. Figure 2 As shown, the load abnormality processing method 200 may include step S201 and step S202.

[0027] Step S201: Obtaining load information of the device under test during a load detection period, wherein at least one process is running in the device under test.

[0028] Among them, the load information can be obtained at the middle time of the load detection cycle, or it can be obtained at the end time of the load detection cycle. The following text is explained as the load information is obtained at the end time of the load detection cycle. In one embodiment, the load exception handling device is arranged in the device under test. Correspondingly, the load exception handling device accesses the target file of the device under test in response to reaching the end time of the load detection cycle, and obtains the load information of the device under test from the target file. Alternatively, the load exception handling device runs a preset command to obtain the load information of the device under test in response to reaching the end time of the load detection cycle. Exemplarily, the target file is the / proc / loadavg file; the preset command is the uptime command, and the uptime command is used to display the operating system's running time, current time, number of logged-in users, and the average load of the operating system in the past 1 minute, 5 minutes, and 15 minutes.

[0029] In another embodiment, the load abnormality processing device is independent of the device under test. Accordingly, in response to reaching the end time of the load detection cycle, the load abnormality processing device sends a load information acquisition request to the device under test and receives the load information sent by the device under test.

[0030] The duration of the load detection cycle can be set as needed in actual applications. For example, the load detection cycle is 60 seconds. The load information can be a decimal between 0 and 1. The larger the value of the load information, the higher the load of the device under test.

[0031] Step S202: If the load information indicates that the load of the device under test is in an abnormal state, determine the target process that causes the abnormal state in at least one process based on at least one process information of the device under test, wherein the at least one process information is collected within a load detection cycle, and the process information includes performance data of the at least one process.

[0032] Specifically, the load anomaly processing device can determine whether the value of the load information is greater than a threshold value. If it is greater than the threshold value, it is determined that the load of the device under test is in an abnormal state; if it is not greater than the threshold value, it is determined that the load of the device under test is in a normal state. When it is determined that the load of the device under test is in an abnormal state, at least one process information of the device under test collected during the load detection cycle is obtained from the data warehouse according to the start time and end time of the load detection cycle. And based on the at least one process information obtained, determine the target process that causes the abnormal state in at least one process currently running in the device under test. Any process information includes performance data of at least one process running in the device under test. The performance data is used to indicate the running state of the process, and the running state of the process is closely related to the load of the device under test. Therefore, the target process that causes the load abnormality can be determined based on the performance data of the process.

[0033] According to the technical solution of the embodiment of the present application, by collecting multiple process information of the device under test during the load detection cycle, and when the load of the device under test is in an abnormal state, the target process causing the load abnormality is determined according to the multiple process information collected during the load detection cycle. Not only is the automatic positioning of the root cause of the load abnormality achieved, but also because multiple process information of the device under test is collected during the load detection cycle without the need for subsequent reproduction, the positioning time of the root cause of the load abnormality is shortened, and the positioning efficiency of the root cause of the load abnormality is improved.

[0034] In order to timely collect the process information of the device under test, thereby improving the efficiency of locating the root cause of the load anomaly. In some implementations, a collection cycle can also be preset, and accordingly, the method can also include the following steps A1 to A3: Step A1, in response to reaching the end time of the collection period, collecting sub-process information of each process currently running in the device under test.

[0035] The load detection period is N times the collection period, where N is an integer greater than 1. Both the load detection period and the collection period can be set according to requirements in actual applications. For example, the load detection period is 60 seconds and the collection period is 10 seconds.

[0036] In some embodiments, collecting the sub-process information of each process currently running in the device under test may include: for any process currently running in the device under test: calling the first function interface to obtain the sub-performance data of any process in multiple dimensions; calling the second function interface to obtain the sub-call relationship of any process; determining the sub-performance data and the sub-call relationship as the sub-process information of any process. Exemplarily, the first function interface is task_thread_info, and the second function interface is getppid(). Among them, the task_thread_info function is used to obtain the structure of the process, which includes the total number of threads contained in the process, the number of threads in the running state in the threads contained in the process, and the resource occupancy time of the process. The getppid() function is used to return the upper-level call relationship of the process, that is, to return the process ID of the parent process (caller) of the process (callee). It should be pointed out that the first function interface and the second function interface are not limited to the above examples, and they can be set as needed in actual applications.

[0037] Among them, the multiple dimensions are selected from the following dimensions: resource occupation duration dimension, first quantity dimension, and second quantity dimension. The resource occupation duration dimension is used to characterize the duration of computing resource occupation by at least one process in the corresponding collection cycle; the first quantity dimension is used to characterize the total number of threads included in at least one process in the corresponding collection cycle; the second quantity dimension is used to characterize the number of threads in the running state among the threads included in at least one process in the corresponding collection cycle. The threads in the running state include threads that are in the running state throughout the corresponding collection cycle, and also include threads that are in the running state in the middle of the corresponding collection cycle.

[0038] That is, the sub-performance data of any process includes any number of the duration of the computing resources occupied by the process, the total number of threads included in the process, and the number of threads in the running state among the threads included in the process. The computing resources may include processor resources, memory resources, etc.

[0039] It should be pointed out that when any process includes multiple threads, the sub-performance data obtained by calling the first function interface may include the length of time that each thread included in the process occupies the computing resources, and the load exception handling device may add the length of time that each thread occupies the computing resources to obtain the length of time that the process occupies the computing resources.

[0040] Exemplarily, the sub-process information includes the duration of the above-mentioned process occupying the computing resources, the total number of threads included in the process, and the number of threads in the running state in each thread included in the process. The computing resources are processor resources. Process 1 includes 3 threads at the end time of collection cycle 1, namely thread 1, thread 2 and thread 3. Thread 1 is in the running state during collection cycle 1, and the duration of its occupation of computing resources is 5 seconds. Thread 2 is in the running state during collection cycle 1, and the duration of its occupation of computing resources is 3 seconds. Process 3 is in the waiting state during collection cycle 1, that is, the duration of its occupation of computing resources is 0 seconds. It can be determined that the sub-performance data of process 1 during collection cycle 1 includes: 8 seconds in the dimension of resource occupation duration (that is, the duration of its occupation of computing resources is 5+3+0=8 seconds), 3 in the first quantity dimension (that is, the total number of threads included in process 1 is 3), and 2 in the second quantity dimension (that is, the number of threads in the running state is 2).

[0041] Furthermore, the sub-call relationship in the sub-process information of any process may include: the upper-layer call relationship of the any process. In the upper-layer call relationship, the any process is the callee, that is, the upper-layer call relationship is used to represent the parent process that calls the any process.

[0042] Step A2, aggregate the sub-process information of each process to obtain the initial process information.

[0043] Specifically, for any dimension among the multiple dimensions, the sub-performance data of the any dimension is obtained from each sub-process information, and the obtained sub-performance data of the any dimension are accumulated to obtain the performance data corresponding to the any dimension; the sub-call relationships contained in the sub-process information are integrated to obtain the call relationships between the processes; the performance data corresponding to each dimension, the call relationships between the processes and the collection time are determined as the process information of the device under test.

[0044] For example, at the end time of the acquisition cycle 5, three processes are running in the device under test, namely process 4, process 6 and process 7. The sub-process information 4 of process 4 includes 7 seconds in the resource occupation time dimension, 3 in the first quantity dimension, and 1 in the second quantity dimension, and the upper-layer call relationship is process 2. The sub-process information 6 of process 6 includes 8 seconds in the resource occupation time dimension, 4 in the first quantity dimension, and 2 in the second quantity dimension, and the upper-layer call relationship is process 4. The sub-process information 7 of process 7 includes 5 seconds in the resource occupation time dimension, 2 in the first quantity dimension, and 2 in the second quantity dimension, and the upper-layer call relationship is process 6. Then, for the resource occupation time dimension, the sub-performance data of the resource occupation time dimension obtained from sub-process information 4 is 7 seconds, the sub-performance data of the resource occupation time dimension obtained from sub-process information 6 is 8 seconds, and the sub-performance data of the resource occupation time dimension obtained from sub-process information 7 is 5 seconds, and the performance data of the resource occupation time dimension is determined to be 7+8+5=20 seconds. For the first quantity dimension, 3 sub-performance data of the first quantity dimension are obtained from sub-process information 4, 4 sub-performance data of the first quantity dimension are obtained from sub-process information 6, and 2 sub-performance data of the first quantity dimension are obtained from sub-process information 7, so the performance data of the first quantity dimension is determined to be 3+4+2=9. For the second quantity dimension, 1 sub-performance data of the second quantity dimension is obtained from sub-process information 4, 2 sub-performance data of the second quantity dimension are obtained from sub-process information 6, and 2 sub-performance data of the second quantity dimension are obtained from sub-process information 7, so the performance data of the second quantity dimension is determined to be 1+2+2=5. The sub-call relationships in sub-process information 4, sub-process information 6, and sub-process information 7 are integrated, and the resulting call relationship is "process 2-process 4-process 6-process 7". That is, the initial process information of the device under test in collection cycle 5 includes 20 seconds of resource occupation time dimension, 9 of the first quantity dimension, 5 of the second quantity dimension, and the call relationship "process 2-process 4-process 6-process 7". Among them, 20 seconds of resource occupation time dimension, 9 of the first quantity dimension, and 5 of the second quantity dimension are performance data.

[0045] Step A3: If it is determined that the performance data in the initial process information is different from the performance data in the target process information, the initial process information is determined as the process information of the device under test, wherein the target process information is the last collected process information determined according to the collection order.

[0046] In one embodiment, a data warehouse is used to save the process information of the device under test. Accordingly, the load anomaly handling device can obtain the target process information from the data warehouse. For any dimension, determine whether the performance data of any dimension in the initial process information is the same as the performance data of any dimension in the target process information. If the determination results of each dimension are the same, it is determined that the performance data in the initial process information is the same as the performance data in the target process information, and the initial process information is deleted. If the determination result of at least one dimension is different, it is determined that the performance data in the initial process information is different from the performance data in the target process information, the initial process information is determined as the process information of the device under test, and the process information is saved in the data warehouse.

[0047] Continuing with the above example, according to the collection order, it is determined that the last process information collected is process information 4 collected in collection cycle 4. For example, the performance data in process information 4 is 20 seconds in the resource occupation time dimension, 6 in the first quantity dimension, and 4 in the second quantity dimension, which is different from the 20 seconds in the source occupation time dimension, 9 in the first quantity dimension, and 5 in the second quantity dimension in the aforementioned initial process information, and the performance data in both the first quantity dimension and the second quantity dimension. Therefore, the aforementioned initial process information is determined as the process information of the device under test.

[0048] Therefore, during the load detection cycle, the process information of the device under test is collected according to the collection cycle. When it is detected that the load of the device under test is in an abnormal state, the root cause of the load abnormality can be determined according to the various process information collected during the load detection cycle, without the need to redeploy the site afterwards or perform manual analysis. Therefore, the time for locating the root cause of the load abnormality is greatly shortened, and the efficiency of locating the root cause of the load abnormality is improved. Furthermore, since data screening is performed before saving the performance data, that is, the performance data in the initial process information is compared with the performance data in the target process information, and when the two are different, the initial process information is determined as the process information of the device under test and saved, instead of saving each collected initial process information as process information, the demand for storage space is greatly reduced, the waste of storage resources caused by storing too much identical process information is avoided, and the amount of process information that needs to be maintained is reduced, thereby reducing the difficulty of maintaining the process information.

[0049] As mentioned above, any process information includes the calling relationship between processes and the performance data of the processes in multiple dimensions. In order to improve the determination rate and accuracy of the target process, Figure 3As shown, when the load anomaly processing device determines that the load of the device under test is in an abnormal state based on the acquired load information, it obtains multiple process information collected during the corresponding load detection cycle from the data warehouse, and generates a visual graph for characterizing the call relationship and performance data based on the acquired multiple process information, and determines the target process that causes the load anomaly among the multiple processes running in the device under test based on the visual graph.

[0050] In order to avoid generating too many visual graphs and taking up too much time, in one embodiment, the target dimension that causes the abnormal state can be first determined based on the timing diagram, and then the target process can be determined based on the target dimension and the call relationship. Specifically, in the aforementioned step S202, according to at least one process information of the device under test, determining the target process that causes the abnormal state in at least one process can include the following steps S2021 and S2022: Step S2021, determining the target dimension causing the abnormal state based on the performance data in the multiple process information.

[0051] In one embodiment, for any dimension, a timing diagram corresponding to the any dimension can be generated based on the collection time contained in multiple process information and the performance data of the any dimension, wherein the timing diagram represents the changing state of the performance data of the any dimension over time; the dimension corresponding to the target timing diagram is determined as the target dimension, wherein the target timing diagram includes a timing diagram whose changing state is an abnormal changing state.

[0052] In one embodiment, for any dimension, the generated timing diagram can be saved as a first image, and the pre-trained first analysis model is called to analyze and process the first image to obtain a first analysis result. And according to the first analysis result, it is determined whether the any dimension is a target dimension. Among them, the first analysis result is used to characterize whether the change state in the first image is an abnormal change state. The structure and training process of the first analysis model can be referred to the relevant technology, which will not be described in detail in this application.

[0053] Exemplarily, the multiple dimensions include the aforementioned resource occupation duration dimension, the first quantity dimension, and the second quantity dimension. The timing diagram corresponding to the resource occupation duration dimension is as follows: Figure 4A As shown, in Figure 4A The horizontal axis represents the acquisition time, and the vertical axis represents the unit of resource occupancy time, 1 unit = 25 milliseconds. The timing diagram corresponding to the first quantity dimension is as follows: Figure 4B As shown, in Figure 4B The horizontal axis represents the acquisition time, and the vertical axis represents the total number of threads included in the process. The timing diagram corresponding to the second quantity dimension is as follows Figure 4C As shown, in Figure 4C The horizontal axis represents the acquisition time, and the vertical axis represents the number of threads in the running state. Figure 4A and Figure 4B The overall fluctuation of the middle curve is relatively uniform, without any particularly prominent rise or fall, so it belongs to the normal change state. Figure 4C The middle curve has an obvious upward fluctuation, which belongs to an abnormal change state, so it is determined that the second quantitative dimension is the target dimension that causes the abnormal state.

[0054] Since the timing diagram can intuitively show the changing status of performance data, by generating a timing diagram corresponding to any dimension, the target dimension that causes the load anomaly can be quickly and accurately determined based on the timing diagram, thereby improving the speed of locating the root cause of the load anomaly.

[0055] Step S2022, determining the target process according to the performance data of the target dimension and the calling relationship in the multiple process information.

[0056] In some implementations, a flame graph may be generated based on the performance data of the target dimension and the call relationship in the information of multiple processes, and the target process may be determined from the multiple processes based on the flame graph. The flame graph includes multiple call stacks, and any call stack includes multiple grids, and the multiple grids correspond to multiple processes one by one. The arrangement order of the multiple grids represents the call relationship of the multiple processes, and the width of any grid is related to the performance data of the corresponding process in the target dimension, and is used to represent the probability that the corresponding process causes an abnormal state. The larger the width of the grid, the greater the probability that the corresponding process causes an abnormal state, or the greater the possibility that the corresponding process causes an abnormal state.

[0057] In some embodiments, determining a target process from multiple processes based on a flame graph may include: for any call stack in the flame graph, in order from top to bottom, if it is determined that the width of the last grid of the call stack is greater than a preset width, then the process corresponding to the last grid is determined as the target process. Specifically, the generated timing diagram can be saved as a second image, and a pre-trained second analysis model can be called. Through the second analysis model, for any call stack in the flame graph, in order from top to bottom, if it is determined that the width of the last grid of the call stack is greater than a preset width, then the process corresponding to the last grid is determined as the target process, and the process name and / or process identifier of the target process is output. Among them, the structure and training process of the second analysis model can refer to the relevant technology, which will not be described in detail in this application.

[0058] In the flame graph, in order from top to bottom, the grids shown in the first row can represent the total amount of performance data corresponding to the target dimension. Starting from the second row, the data in each grid is in the form of "process name: process ID (total number)", where the process name represents the process name of the process corresponding to the grid, the process ID represents the process ID of the process corresponding to the grid, and (total number) represents the total amount of performance data of each process (i.e., the callee) called by the process corresponding to the grid (i.e., the caller) in the target dimension. In particular, when the grid is the last grid, (total number) represents the performance data of the process corresponding to the grid in the target dimension. In addition, it should be pointed out that in the flame graph, when the width of the grid is small, the data in the grid can be displayed only partially, such as only displaying the process name, or only displaying the process name and process ID, etc.

[0059] Exemplarily, the target dimension is the second quantity dimension. According to the performance data of the target dimension and the call relationship in the multiple process information, the flame graph generated is as follows: Figure 5 As shown. Figure 5 In the figure, from top to bottom, the first row shows a grid, which is called grid 1. The total number (3196) in grid 1 indicates that the total number of threads in the running state is 3196. The second row shows a grid, which is called grid 2. Grid 2 corresponds to process 1. The (3196) shown in grid 2 indicates that the total number of threads in the running state contained in the processes (callees) called by process 1 (caller) is 3196. The meaning of the data shown in other grids can be referred to here, and will not be explained here one by one. The third row shows three grids. From left to right, the first grid is called grid 3, which corresponds to process 2; the second grid is called grid 4, which corresponds to process 3; the third grid is called grid 5, which corresponds to process 4. The fourth row shows three grids. From left to right, the first grid is recorded as grid 6, which corresponds to process 5; the second grid is recorded as grid 7, which corresponds to process 6; the third grid is recorded as grid 8, which corresponds to process 7. The fifth row shows two grids. From left to right, the first grid is recorded as grid 9, which corresponds to process 8; the second grid is recorded as grid 10, which corresponds to process 9. Figure 5 In the example, the widths of grids 3, 4, 6 to 10 are relatively small, and thus only the process name, or the process name and the process ID are displayed.

[0060] Among them, grid 2 and grid 3 constitute call stack 1. From top to bottom, the order of grids in call stack 1 is grid 2, grid 3, indicating that the corresponding process 1 called process 2. Grid 2, grid 4 and grid 6 constitute call stack 2. From top to bottom, the order of grids in call stack 2 is grid 2, grid 4, grid 6, indicating that the corresponding process 1 called process 3, and process 3 called process 5. Grid 2, grid 5, grid 7 and grid 9 constitute call stack 3. From top to bottom, the order of grids in call stack 3 is grid 2, grid 5, grid 7, grid 9, indicating that the corresponding process 1 called process 4, process 4 called process 6, and process 6 called process 8. Grid 2, grid 5, grid 8 and grid 10 constitute call stack 4. From top to bottom, the arrangement order of grids in call stack 4 is grid 2, grid 5, grid 8, grid 10, indicating that the corresponding process 1 called process 4, process 4 called process 7, and process 7 called process 9.

[0061] According to the above call stacks, it can be determined that the width of grid 3 (i.e. the last grid) of call stack 1 is greater than the preset width, and the width of grid 10 of call stack 4 is greater than the preset width (i.e. the last grid). Therefore, process 2 corresponding to grid 3 and process 9 corresponding to grid 10 are determined as target processes, that is, process 2 and process 9 are the direct causes of the abnormal load of the device under test.

[0062] In addition, the calling process (i.e., the caller) of the target process can also be determined based on the flame graph, and the calling process is determined as the indirect root cause of the abnormal load of the device under test. That is, in the above example, process 1 and process 7 are determined as the indirect root causes of the abnormal load of the device under test.

[0063] It should be pointed out that, in some implementations, a timing diagram and a flame diagram corresponding to each dimension can be generated simultaneously based on information of multiple processes of the device under test. After determining the target dimension that causes the load abnormality based on the timing diagram, the target process that causes the load abnormality among the multiple processes running on the device under test is determined based on the flame diagram corresponding to the target dimension.

[0064] Since the flame graph can intuitively show the calling relationship between processes and the possibility of each process causing load anomalies, the direct root cause of the load anomaly of the device under test, that is, the target process, can be quickly and accurately determined based on the flame graph, which improves the speed of locating the root cause of the load anomaly. Furthermore, the indirect root cause of the load anomaly of the device under test, that is, the calling process of the target process, can also be determined based on the flame graph, so the cause of the load anomaly can be analyzed more comprehensively.

[0065] Figure 6 A flow chart of a method 600 for handling load anomalies according to an embodiment of the present application is shown. Figure 6 As shown, the load abnormality processing method 600 may include step S601 and step S602: Step S601: Obtaining load information of an operating system in a load detection cycle, wherein at least one process is running in the operating system; Step S602: If the load information indicates that the load of the operating system is in an abnormal state, determine the target process that causes the abnormal state in at least one process based on at least one process information of the operating system, wherein the at least one process information is collected within a load detection cycle, and the process information includes performance data of the at least one process.

[0066] The operating system in step S601 and step S602 may be the operating system of the aforementioned device under test. The specific implementation process of step S601 and step S602 may refer to the relevant description above, and the repeated parts will not be repeated here.

[0067] That is to say, the load anomaly processing method 600 of the embodiment of the present application and the load anomaly processing method 400 are based on the same inventive concept and have the same beneficial effects as the methods adopted, run or implemented therein.

[0068] Corresponding to the load anomaly processing method 200 provided in the embodiment of the present application, the embodiment of the present application further provides a load anomaly processing device, including: a load information acquisition module, used to acquire load information of a device under test during a load detection cycle, wherein at least one process is running in the device under test. A target process determination module, used to determine a target process that causes the abnormal state in the at least one process according to at least one process information of the device under test if the load information indicates that the load of the device under test is in an abnormal state, wherein the at least one process information is collected during the load detection cycle, and the process information includes performance data of the at least one process.

[0069] In one embodiment, the process information includes the calling relationship between processes and the performance data of the processes in multiple dimensions. Accordingly, the load information acquisition module is specifically used to: determine the target dimension that causes the abnormal state based on the performance data in the multiple process information; determine the target process based on the performance data of the target dimension and the calling relationship in the multiple process information.

[0070] In one embodiment, the process information also includes the collection time of the process information. Accordingly, the load information acquisition module is further specifically used to: for any dimension, generate a timing diagram corresponding to the any dimension based on the collection time contained in the multiple process information and the performance data of the any dimension, wherein the timing diagram represents the change state of the performance data of the any dimension over time; determine the dimension corresponding to the target timing diagram as the target dimension, wherein the target timing diagram includes a timing diagram in which the change state is an abnormal change state.

[0071] In one embodiment, the load information acquisition module is further specifically used to: generate a flame graph based on the performance data of the target dimension and the calling relationship in the multiple process information, wherein the flame graph includes multiple call stacks, and any call stack includes multiple grids, the multiple grids correspond one-to-one to multiple processes, and the arrangement order of the multiple grids represents the calling relationship of the multiple processes. The width of any grid is related to the performance data of the corresponding process in the target dimension, and is used to represent the probability that the corresponding process causes the abnormal state; according to the flame graph, the target process is determined from the multiple processes.

[0072] In one embodiment, the device further includes: a process information collection module, an aggregation module, and a process information determination module. The process information collection module is used to collect sub-process information of each process currently running in the device under test in response to reaching the end time of the collection cycle, wherein the load detection cycle is N times the collection cycle, and N is an integer greater than 1; the aggregation module is used to aggregate the sub-process information of each process to obtain initial process information; the process information determination module is used to determine the initial process information as the process information if it is determined that the performance data in the initial process information is different from the performance data in the target process information, wherein the target process information is the process information currently last collected and determined according to the collection order.

[0073] In one embodiment, the process information collection module is specifically used to: for any process currently running in the device under test: call the first function interface to obtain sub-performance data of any process in multiple dimensions; call the second function interface to obtain the sub-call relationship of any process; determine the sub-performance data and the sub-call relationship as the sub-process information of any process.

[0074] In one embodiment, the plurality of dimensions are selected from the following dimensions: A resource occupancy duration dimension, which is used to characterize the duration of a process occupying computing resources; A first quantity dimension, where the first quantity dimension is used to characterize the total number of threads included in the process; A second quantity dimension, where the second quantity dimension is used to characterize the number of threads in a running state among the threads included in the process.

[0075] The functions of each module in each device in the embodiments of the present application can be found in the corresponding description in the above method, and have corresponding beneficial effects, which will not be repeated here.

[0076] Corresponding to the load exception processing method 600 provided in the embodiment of the present application, the embodiment of the present application further provides a load exception processing device, comprising: an acquisition module, used to acquire load information of an operating system within a load detection cycle, wherein at least one process is running in the operating system. A determination module, used to determine, if the load information indicates that the load of the operating system is in an abnormal state, a target process that causes the abnormal state in the at least one process according to at least one process information of the operating system, wherein the at least one process information is collected within the load detection cycle, and the process information includes performance data of the at least one process.

[0077] Figure 7 FIG. 1 is a block diagram of an electronic device used to implement an embodiment of the present application. Figure 7 As shown, the electronic device includes: a memory 701 and a processor 702, and the memory 701 stores a computer program that can be run on the processor 702. When the processor 702 executes the computer program, the method in the above embodiment is implemented. The number of the memory 701 and the processor 702 can be one or more. In a specific implementation, the electronic device may also include a communication interface 703 for communicating with external devices and performing data exchange transmission.

[0078] In specific implementation, if the memory 701, the processor 702 and the communication interface 703 are implemented independently, the memory 701, the processor 702 and the communication interface 703 can be connected to each other through a bus and communicate with each other. The bus can be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus. The bus can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 6 Only one thick line is used in the diagram, but this does not mean that there is only one bus or only one type of bus.

[0079] Optionally, in a specific implementation, if the memory 701, the processor 702 and the communication interface 703 are integrated on a chip, the memory 701, the processor 702 and the communication interface 703 can communicate with each other through an internal interface.

[0080] An embodiment of the present application provides a computer-readable storage medium storing a computer program, which implements the method provided in the embodiment of the present application when the program is executed by a processor.

[0081] An embodiment of the present application provides a computer program product, including a computer program, which implements the method provided in the embodiment of the present application when executed by a processor.

[0082] An embodiment of the present application also provides a chip, which includes a processor for calling and executing instructions stored in the memory from the memory, so that a communication device equipped with the chip executes the method provided by the embodiment of the present application.

[0083] An embodiment of the present application also provides a chip, including: an input interface, an output interface, a processor and a memory, wherein the input interface, the output interface, the processor and the memory are connected via an internal connection path, and the processor is used to execute the code in the memory. When the code is executed, the processor is used to execute the method provided in the embodiment of the application.

[0084] It should be understood that the above processor can be a processor (Central Processing Unit, CPU), and can also be other general-purpose processors, digital signal processors (Digital Signal Processor, DSP), application-specific integrated circuits (Application Specific Integrated Circuit, ASIC), field programmable gate arrays (Field Programmable Gate Array, FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor or any conventional processor, etc. It is worth noting that the processor can be a processor that supports the Advanced RISC Machines (ARM) architecture.

[0085] Further, optionally, the above-mentioned memory may include a read-only memory and a random access memory. The memory may be a volatile memory or a non-volatile memory, or may include both volatile and non-volatile memory. Among them, the non-volatile memory may include a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory may include a random access memory (RAM), which is used as an external cache. By way of exemplary but not limiting description, many forms of RAM are available. For example, static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous link dynamic random access memory (SLDRAM) and direct memory bus random access memory (DR RAM).

[0086] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware or any combination thereof. When implemented using software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the process or function according to the present application is generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium.

[0087] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine different embodiments or examples described in this specification and the features of different embodiments or examples, unless they are contradictory.

[0088] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include at least one of the features. In the description of this application, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0089] Any process or method described in the flow chart or otherwise described herein can be understood as a module, fragment or portion of a code representing one or more executable instructions for implementing the steps of a specific logical function or process. And the scope of the preferred embodiment of the present application includes other implementations, in which the functions may not be performed in the order shown or discussed, including in a substantially simultaneous manner or in a reverse order according to the functions involved.

[0090] The logic and / or steps described in the flowchart or otherwise described herein, for example, can be considered as an ordered list of executable instructions for implementing logical functions, which can be embodied in any computer-readable medium for use by an instruction execution system, apparatus or device (such as a computer-based system, a system including a processor or other system that can fetch instructions from an instruction execution system, apparatus or device and execute instructions), or used in combination with these instruction execution systems, apparatuses or devices.

[0091] It should be understood that the various parts of the present application can be implemented with hardware, software, firmware or a combination thereof. In the above embodiments, multiple steps or methods can be implemented with software or firmware stored in a memory and executed by a suitable instruction execution system. All or part of the steps of the above embodiment method can be completed by instructing the relevant hardware through a program, which can be stored in a computer-readable storage medium, and when the program is executed, it includes one of the steps of the method embodiment or a combination thereof.

[0092] In addition, each functional unit in each embodiment of the present application can be integrated into a processing module, or each unit can exist physically separately, or two or more units can be integrated into one module. The above-mentioned integrated module can be implemented in the form of hardware or in the form of a software functional module. If the above-mentioned integrated module is implemented in the form of a software functional module and sold or used as an independent product, it can also be stored in a computer-readable storage medium. The storage medium can be a read-only memory, a disk or an optical disk, etc.

[0093] The above is only an exemplary embodiment of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of various changes or substitutions within the technical scope recorded in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application shall be based on the protection scope of the claims.

Claims

1. A method for handling load anomalies, comprising: Obtaining load information of a device under test during a load detection period, wherein at least one process is running in the device under test; If the load information indicates that the load of the device under test is in an abnormal state, then based on at least one process information of the device under test, determine the target process in the at least one process that causes the abnormal state, wherein the at least one process information is collected within the load detection cycle, and the process information includes performance data of the at least one process.

2. The method according to claim 1, wherein the process information includes a calling relationship between processes and performance data of the at least one process in multiple dimensions, and the determining, based on the at least one process information of the device under test, a target process in the at least one process that causes the abnormal state comprises: Determining the target dimension causing the abnormal state according to the performance data in the plurality of process information; The target process is determined according to the performance data of the target dimension and the calling relationship among the plurality of process information.

3. The method according to claim 2, wherein the process information further includes a collection time of the process information, and the determining the target dimension causing the abnormal state according to the performance data in the plurality of process information comprises: For any dimension, a timing diagram corresponding to the any dimension is generated according to the collection time included in the plurality of process information and the performance data of the any dimension, wherein the timing diagram represents the change state of the performance data of the any dimension over time; The dimension corresponding to the target timing diagram is determined as the target dimension, wherein the target timing diagram includes a timing diagram in which the change state is an abnormal change state.

4. The method according to claim 2 or 3, wherein determining the target process according to the performance data of the target dimension and the calling relationship in the plurality of process information comprises: Generate a flame graph according to the performance data of the target dimension and the call relationship in the plurality of process information, wherein the flame graph includes a plurality of call stacks, and any call stack includes a plurality of grids, the plurality of grids correspond to a plurality of processes one by one, and the arrangement order of the plurality of grids represents the call relationship of the plurality of processes, and the width of any grid is related to the performance data of the corresponding process in the target dimension, and is used to represent the probability that the corresponding process causes the abnormal state; According to the flame graph, the target process is determined from the multiple processes.

5. The method according to any one of claims 1 to 3, further comprising: In response to reaching the end time of the collection cycle, collecting sub-process information of each process currently running in the device under test, wherein the load detection cycle is N times the collection cycle, and N is an integer greater than 1; Aggregating the sub-process information of each process to obtain initial process information; If it is determined that the performance data in the initial process information is different from the performance data in the target process information, the initial process information is determined as the process information, wherein the target process information is the last collected process information determined according to the collection order.

6. The method according to claim 5, wherein collecting sub-process information of each process currently running in the device under test comprises: For any process currently running in the device under test: calling a first function interface to obtain sub-performance data of the process in multiple dimensions; Call the second function interface to obtain the sub-call relationship of any one of the processes; determine the sub-performance data and the sub-call relationship as the sub-process information of any one of the processes.

7. The method according to claim 2, wherein the plurality of dimensions are selected from the following dimensions: A resource occupation duration dimension, where the resource occupation duration dimension is used to characterize the duration of the occupation of computing resources by the at least one process; A first quantity dimension, where the first quantity dimension is used to characterize the total number of threads included in the at least one process; A second quantity dimension, where the second quantity dimension is used to characterize the number of threads in a running state among the threads included in the at least one process.

8. A method for handling load anomalies, comprising: Obtaining load information of an operating system within a load detection period, wherein at least one process is running in the operating system; If the load information indicates that the load of the operating system is in an abnormal state, the target process causing the abnormal state in the at least one process is determined based on at least one process information of the operating system, wherein the at least one process information is collected within the load detection cycle, and the process information includes performance data of the at least one process.

9. An electronic device comprising a memory, a processor and a computer program stored in the memory, wherein the processor implements the method according to any one of claims 1 to 8 when executing the computer program.

10. A computer-readable storage medium, wherein a computer program is stored in the computer-readable storage medium, and when the computer program is executed by a processor, the method according to any one of claims 1 to 8 is implemented.

11. A computer program product comprising a computer program, which, when executed by a processor, implements the method according to any one of claims 1 to 8.

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