Semiconductor chip package and method

Abstract

There is provided a method of manufacturing a manufacturing intermediate for a semiconductor package, the method comprising: providing a chip; at least partially encapsulating the chip within a molding compound; and the chip is thinned. Further provided is a manufacturing intermediate for a semiconductor package, comprising: a chip having a first surface and a second surface; and a molding member sealing the chip; wherein the first surface of the chip is exposed.

Description

Technical Field

[0001] The present invention provides a manufacturing intermediate for semiconductor chip packaging and a production method thereof. The present invention further provides a semiconductor chip packaging including the manufacturing intermediate and a production method thereof. Background Art

[0002] Semiconductors are devices used in electronic circuit systems. Individual semiconductor devices are called chips. In order to enable semiconductor chips to be integrated into electronic circuit systems, semiconductor chips are usually provided in a housing, called a chip package. Such chip packages usually seal the semiconductor chip in a block of insulating material such as plastic.

[0003] Semiconductor chips are made from semiconductor wafers. Wafers are typically circular disks about 200 mm in diameter (although larger and smaller wafers are possible). Semiconductor circuits are fabricated on the wafers using known processes. Once fabrication is complete, the wafers can be broken down into individual chips. The dimensions of each chip are typically on the order of about 6 mm by about 6 mm, although of course there can be larger and smaller chips.

[0004] In order to provide sufficient mechanical strength for the wafer during the etching process, the wafer usually has a thickness of about 600 μm to about 750 μm. However, during use, the semiconductor chip will exhibit an internal resistance proportional to its thickness. Generally, the resistance will increase by about 10% for every 25 μm of chip thickness. Therefore, it is preferred to make the chip as thin as possible.

[0005] It is known to perform chip thinning by grinding the back surface of the wafer before separating it into individual chips. Typically, the wafer is thinned to a thickness of less than about 100 μm, or perhaps as low as about 50 μm or about 25 μm. However, when the wafer is thinned to this extent, it loses mechanical strength. As a result, internal material stresses and external environmental factors may cause the wafer to warp (i.e., bend upward or downward). In some cases, this can lead to crack formation and material failure, rendering the wafer unusable.

[0006] In order to mitigate this, it is known to provide the wafer with a so-called "Taiko ring". To form the Taiko ring, the radial dimension of the wafer is altered so that it is larger than the etched area. Only the central portion of the wafer is thinned by grinding, leaving an annular ring of unthinned material surrounding the thinned portion of the wafer. However, the central portion of the wafer remains very fragile. Therefore, although Taiko rings can significantly reduce wafer warpage and breakage, they cannot completely eliminate these problems.

[0007] Furthermore, regardless of whether a Taiko ring is used, once the individual chips are cut from the wafer, each chip is fragile and difficult to handle. In particular, the mechanical behavior of the individual chips is somewhat similar to that of a thin piece of paper, which is prone to warping, wrinkling, folding, tearing, etc. Summary of the invention

[0008] An object of the present invention is to provide a manufacturing intermediate for semiconductor chip packaging and a production method thereof, which eliminates or alleviates the warping and breaking problems of semiconductor wafers and / or chips.

[0009] According to a first aspect of the present invention, there is provided a method of producing a manufacturing intermediate for a semiconductor package, the method comprising: providing a chip; encapsulating the chip at least partially in a molding compound; and thinning the chip.

[0010] Because the chip is encapsulated in the molding compound, this provides mechanical strength to the chip during thinning. Therefore, the chip can be thinned without causing warping or cracking because the chip is still supported by the molding compound during the thinning process. Once the thinning process is completed, the chip will remain exposed on at least one side, allowing it to be electrically connected to other components of the semiconductor chip package.

[0011] The step of "thinning" comprises essentially any suitable thinning process. In particular, this may comprise grinding the chip. Suitable grinding processes for this purpose include grinding and / or polishing.

[0012] The term "manufacturing intermediate for semiconductor packaging" includes the assembly of selected subcomponents of a semiconductor package (including at least a semiconductor chip) into a subassembly. The subassembly can then be assembled with other components to form a complete semiconductor package, which can be handled by an operator and installed into an electronic circuit. In particular, the "manufacturing intermediate" can be an integral structure by encapsulating the chip and any other components within a molding compound.

[0013] The chip may define a first surface and a second surface, and the method may further include: providing a base frame having a first surface and a second surface; attaching the first surface of the chip to the first surface of the base frame; wherein the step of at least partially sealing the chip in a molding compound includes at least partially sealing the base frame and the chip in a molding compound; and removing the base frame to expose the first surface of the chip.

[0014] The provision of the base frame enables the chip to be supported during the sealing process. Therefore, the chip is easier to handle. In addition, the base frame allows other components of the manufacturing intermediate to be installed in any desired position or direction before the sealing process.

[0015] As used throughout this disclosure, the step of "attaching" may include any suitable method of attaching. For example, it may include adhering, in particular adhering by welding.

[0016] By exposing the first surface of the chip, the chip can be thinned. In practice, the steps of removing the base frame and thinning the chip can be performed during the same process. For example, a single grinding process can be used to completely grind the base frame to expose the chip and then continue to thin the chip.

[0017] Removing the base frame may include any suitable removal process. For example, it may include grinding the base frame by grinding, polishing, etc. Alternatively, the base frame may be breakably separated from the chip, or may be chemically separated from the chip.

[0018] The step of sealing the basic frame and the chip at least partially in the molding compound may include exposing the second surface of the basic frame. Because the second surface of the basic frame is exposed, the basic frame can be removed more easily. For example, the basic frame can be directly ground using a grinding and / or polishing process.

[0019] The step of thinning the chip may include thinning the chip to at most about 100 μm, or preferably at most about 50 μm, or more preferably at most about 25 μm, or most preferably at most about 15 μm. The thickness of the chip is proportional to its internal resistance. It has been found that thinning the chip to at most about 100 μm, or preferably at most about 50 μm, or more preferably at most about 25 μm, or most preferably at most about 15 μm, will minimize the resistance.

[0020] Prior to the step of thinning the chip, the chip may comprise a thickness of at least about 200 to 150 μm, or preferably at least about 500 μm, or most preferably at least about 600 to 700 μm.

[0021] Thinning the chip may include grinding the chip. That is, using a grinding process to reduce the thickness of the chip. The grinding process may include any suitable grinding process, such as grinding and / or polishing.

[0022] The method may further include: providing a clip having a first connection portion and a second connection portion; before the step of at least partially sealing the base frame and the chip in a molding compound: attaching the first connection portion of the clip to the second surface of the chip; and attaching the second connection portion of the clip to the first surface of the base frame; and during the step of sealing the base frame and the chip in the molding compound: sealing the clip in the molding compound. By sealing the clip in the molding compound, the clip also adds mechanical strength to support the chip during thinning. In such an embodiment, the step of removing the base frame to expose the first surface of the chip may further include exposing the second connection portion of the clip.

[0023] The method may further include thinning the second connection portion of the clip.The second connection portion of the clip may be thinned by the same amount as the first connection portion.

[0024] The method may further include: providing a first plating layer to the first surface of the chip; and providing a second plating layer to the second connection portion of the clip.

[0025] According to a second aspect of the present invention, there is provided a method for producing a semiconductor package, comprising: providing a manufacturing intermediate according to the first aspect of the present invention; providing a second base frame having a first portion and a second portion; attaching the first portion of the second base frame to a first plating layer; and attaching the second portion of the second base frame to a second plating layer. It should be understood that the method for producing a semiconductor package according to the second aspect of the present invention may include any steps of the method for producing a manufacturing intermediate according to the first aspect of the present invention.

[0026] The method may further include at least partially encapsulating the manufacturing intermediate, the first plating layer, the second plating layer, and the second base frame within a second molding compound. The first molding compound and the second molding compound may be made of the same material.

[0027] According to a third aspect of the present invention, there is provided a manufacturing intermediate for semiconductor packaging, comprising: a chip having a first surface and a second surface; and a molding member sealing the chip; wherein the first surface of the chip is exposed.

[0028] Because the first surface of the chip is exposed, the chip can be electrically connected to other components of the semiconductor package, such as a base frame that defines one or more terminals of the semiconductor package. In addition, because the chip is sealed in the molding, this provides strength to the chip so that it can be handled by an operator. The first surface of the chip being exposed can also enable a thinning process to be used to adjust the size of the chip, and / or can result in such a thinning process being performed on the chip.

[0029] The chip may comprise a thickness of at most about 100 μm, or preferably at most about 50 μm, or more preferably at most about 25 μm, or most preferably at most about 15 μm.

[0030] The manufacturing intermediate may further include: a clip having a first connection portion and a second connection portion; wherein: the clip is sealed within a molding compound; the first connection portion is attached to the second surface of the chip; and the second connection portion is exposed.

[0031] According to a fourth aspect of the present invention, a semiconductor package is provided, comprising: a manufacturing intermediate according to the second aspect of the present invention; a first coating attached to a first surface of a chip; a second coating attached to a second connection portion of a clip; a base frame comprising a first portion attached to the first coating and a second portion attached to the second coating; and a second molding, sealing the manufacturing intermediate, the first coating, the second coating and the base frame. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] A detailed description of the present invention is provided below with reference to the accompanying drawings, in which:

[0033] Figure 1 is a schematic cross-sectional view of the first step of the method for producing an intermediate according to the present invention;

[0034] Figure 2 is a schematic cross-sectional view of the second step in the method for producing a manufacturing intermediate;

[0035] Figure 3 is a schematic cross-sectional view of the third step in the method for producing a manufacturing intermediate;

[0036] Figure 4 is a schematic cross-sectional view of the fourth step in the method for producing a manufacturing intermediate;

[0037] Figure 5 is a schematic cross-sectional view of the fifth step in the method for producing the manufacturing intermediate;

[0038] Figure 6 is a schematic cross-sectional view of the sixth step in the method for producing a manufacturing intermediate;

[0039] Figure 7 is a schematic cross-sectional view of the seventh step in the method for producing the intermediate;

[0040] Figure 8 is a schematic cross-sectional view of the eighth step in the method for producing the intermediate;

[0041] Fig. 9 is a schematic cross-sectional view of the ninth step in the method for producing an intermediate;

[0042] Fig.10 Is to use about Figures 1 to 9 A schematic cross-sectional view of a first step of a method for producing a semiconductor package by a manufacturing intermediate obtained by the described method;

[0043] Fig.11 is a schematic cross-sectional view of a second step in the method of manufacturing a semiconductor package,

[0044] Fig.12 About Figures 1 to 9 A schematic flow chart of a method for producing a manufacturing intermediate is described;

[0045] Fig.13 is a schematic flow chart of a method for producing a manufacturing intermediate;

[0046] Fig.14 is a schematic flow chart of a method for producing a manufacturing intermediate; and

[0047] Fig.15 About Fig.10 and Fig.11 A schematic flow chart of a method for producing a semiconductor package is described. DETAILED DESCRIPTION

[0048] Figure 1 The first step of the process of producing the manufacturing intermediate is shown. In the first step, a base frame 2 is provided. The base frame 2 has a first surface 4 and a second surface 6. The base frame is made of any suitable material, and is preferably made of metal such as copper.

[0049] Figure 2 The second step of the production method is shown.In the second step, a first adhesive patch 8 and a second adhesive patch 10 are applied to the first surface 4 of the base frame 2. The adhesive may be any suitable adhesive and is preferably an electrically conductive adhesive, such as solder.

[0050] Figure 3 The third step of the production method is shown. In the third step, a chip 12 is provided. The chip 12 comprises a first surface 14 and a second surface 16. The first surface 14 of the chip 12 is attached to the first surface 4 of the base layer 2 via a first adhesive patch 8.

[0051] Figure 4 A fourth step of the production method is shown. In the fourth step, a third adhesive patch 18 is applied to the second surface 16 of the chip 12. Again, the adhesive may be any suitable adhesive, and is preferably an electrically conductive adhesive, such as solder.

[0052] Figure 5The fifth step of the production method is shown. In the fifth step, a clip 20 is provided. The clip 20 comprises a first connection portion 22 and a second connection portion 24. The clip 20 is made of metal, preferably copper or the like. The first connection portion 22 of the clip 20 is attached to the second surface 16 of the chip 12 via the third adhesive patch 18. The second connection portion 24 of the clip 20 is attached to the first surface 4 of the base frame 2 via the second adhesive patch 10.

[0053] Although the clip 20 is shown as including only two connection portions, it should be understood that in alternative embodiments, the clip 20 may include any number of connection portions. In particular, it should be understood that each of the second and subsequent connection portions of the clip 20 can be configured for attachment to a separate connection terminal that enables the final semiconductor package to be integrated into an electronic circuit system. For example, the various connection portions of the clip 20 can form a portion of a conductive path that defines a drain terminal, a source terminal, and / or a gate terminal of the semiconductor package. Although only a single clip 20 is described above as being connected between the chip 12 and the base frame 2, it should be understood that in alternative embodiments, multiple clips 20 may be connected between a single (i.e., separate) chip 12 and the base frame 2.

[0054] The clip 20 can be a single clip or a matrix of clips. In this sense, a single clip is a set of mutually operable connection portions, forming a set of connection portions (such as the first connection portion 22 and the second connection portion 24), which are collectively configured to conduct current between one or more portions of the chip 12 and one or more connection terminals of the final semiconductor chip package. A matrix clip is a component that defines multiple groups of connection portions (such as the first connection portion 22 and the second connection portion 24), and is configured so that each group of connection portions can be separated from each other in a later production method to define a series of single clips. In other words, a matrix clip is a component that includes multiple clips 20, 20' that can be separated into individual clips 20.

[0055] like Figure 5 As shown on the right side of , when using a matrix clip, this may enable a large number of manufacturing intermediates to be produced at one time on a single base frame 2. In particular, a matrix of (i.e. a group of individual) manufacturing intermediates may be produced and then separated at a later stage, as described below. Figure 5 In the figures, the components of the additively manufactured intermediates are represented by prime symbols. The matrix clip comprises a plurality of clip bodies 20, 20' connected by bridges 26.

[0056] Figure 6The sixth step of the production method is shown. In the sixth step, the base frame 2, the chip 12 and the clip 20 are sealed in the molding compound 28. The molding compound 28 is set to a solid state. The molding compound 28 can be any suitable molding compound, such as, for example, silicone or epoxy resin, plastic, etc. Preferably, the second surface 6 of the base frame 2 should remain exposed after being sealed by the molding compound 28. However, it should be understood that in alternative embodiments, the base frame 2 can be completely sealed in the molding compound 28. The sealing of the base frame 2, the chip 12 and the clip 20 forms an integral structure.

[0057] Figure 7 The seventh step of the production method is shown. In the seventh step, the assembly is turned over to place the base layer 2 on the top. The base frame 2 is then removed by grinding using a polisher / grinder 30 that moves on the path shown by the arrows. However, in alternative embodiments, any suitable method of removing the base layer 2 may be used. For example, the base layer may be breakably separated from the chip 12 and the molding compound 28.

[0058] After the base layer 2 is removed, the chip 12 and the second connection portion 24 of the clip 20 are thinned. In the present embodiment, the chip 12 and the second connection portion 24 of the clip 20 are thinned by grinding using a polisher / grinder 30. However, in alternative embodiments, any suitable thinning process may be used, such as, for example, chemical etching, laser ablation, etc.

[0059] Preferably, the chip is thinned so that the thickness of the chip (i.e., the dimension of the chip between the first surface 14 and the second surface 16) is at most about 100 μm, or preferably at most about 50 μm, or more preferably at most about 25 μm, or most preferably at most about 15 μm. As described above, the thinner the chip 12, the lower the internal resistance. Because the chip 12 is sealed in the molding compound 28, the chip 12 is supported by the molding compound 28 during the thinning process. This support maintains the rigidity of the chip 12 and prevents the chip 12 from deforming once it is thinned. Therefore, the problems of chip warping and fracture associated with the prior art are almost completely avoided.

[0060] It should be understood that the clip 20 also provides additional mechanical strength that provides further support to the chip 12 and resists deformation of the chip 12, thereby maintaining its rigidity during the thinning process. However, it should be understood that the chip 12 can be adequately supported during the thinning process without any clip 20 or base frame 2, using only the support of the molding compound 28.

[0061] It should be understood that before the thinning step, the chip 12 is of course thicker. In particular, the thickness of the chip 12 before the thinning step may be the thickness of the silicon wafer from which the chip is produced. Alternatively, the silicon wafer from which the chip is produced may have been thinned to some extent before the chip 12 is separated from the wafer. Regardless of which of the above options is selected, the thickness of the chip 12 before the thinning step is typically at least about 150 μm to 700 μm. The thicker the chip 12 is before the thinning step, the greater the mechanical strength of the chip 12.

[0062] In order to provide sufficient mechanical strength to support the chip 12 during the thinning process, it is preferred that the mold compound 28 defines a thickness that is at least 2 times the thickness of the chip 12 before the thinning step. Generally, increasing the thickness of the mold compound 28 and any encapsulated chip 20 will provide better support for the chip 12 during the thinning process, thereby alleviating the problem of warping and cracking. However, it should be understood that the thickness of the mold compound 28 will be at least limited by the thickness of the final semiconductor package.

[0063] Figure 8 The eighth step of the production method is shown. In the eighth step, the first plating layer 32 is provided to the first surface 14 of the chip 12, and the second plating layer 34 is provided to the second connection portion 24 of the clip 20. The first plating layer 32 and the second plating layer 34 can be formed by electroplating. The first plating layer 32 and the second plating layer 34 are used to protect the first surface 14 of the chip 12 and the second connection portion 24 of the clip 20, respectively, and provide additional mechanical strength for the chip 12. The first plating layer 32 and the second plating layer 34 provide an ohmic connection for the chip 12 and the clip 20.

[0064] Therefore, the first plating layer and the second plating layer may be made of a conductive material, such as a metal, in particular copper, titanium nickel silver alloy, etc. The thickness of the plating layers 32, 34 may be up to about 8 μm.

[0065] Fig. 9 The ninth step of the production method is shown. In the ninth step, adjacent bodies are separated to form individual manufacturing intermediates 36, 36'. The separation process may be any suitable separation process, such as cutting or the like.

[0066] Fig.10 The use of the above Figures 1 to 9The first step of the method for producing a semiconductor package by the manufacturing intermediate 36 obtained by the production method described. In the first step, the manufacturing intermediate 36 and the second base frame 38 are provided. The second base frame 38 is made of a metal such as copper. The second base frame 38 includes a first portion 40 and a second portion 42. The first portion 40 of the second base frame 38 is attached to the first plating layer 32 of the chip 12 via a fourth adhesive patch 44. The second portion 42 of the second base frame 38 is attached to the second plating layer 34 of the second connecting portion 24 of the clip 20 via a fifth adhesive patch 46. Similarly, the fourth and fifth adhesive patches 44, 46 can be any suitable form of adhesive, preferably a conductive adhesive, such as solder.

[0067] Although the above method has been described with the second base frame 38 including only two parts, it should be understood that in alternative embodiments, the second base frame 38 can include any number of parts. In particular, it should be understood that each part of the second base frame 38 can correspond to a connection terminal of the semiconductor package 50 to enable the semiconductor package to be integrated into the electronic circuit. For example, the respective parts of the second base frame 38 can define the drain terminal, signal terminal, and ground terminal of the semiconductor package 50. Therefore, each part of the second base frame 38 can be attached to a corresponding connection part of the clip 20.

[0068] Fig.11 A second step in the method of producing a semiconductor package using the manufacturing intermediate 36 is shown. In the second step, the manufacturing intermediate 36 and the second base frame 38 are sealed by a second molding compound 48 to form a semiconductor package 50. The second molding compound 48 can be made of any suitable molding compound, such as, for example, silicone or epoxy resin, plastic, etc. The second molding compound 48 can be made of the same material as the first molding compound 28 or a different material. The step of sealing the manufacturing intermediate 36 and the second base frame 38 in the second molding compound 48 should expose at least a portion of the first portion 40 and the second portion 42 of the second base frame 38.

[0069] The semiconductor package 50 may be any suitable semiconductor device, such as a MOSFET.

[0070] Fig.12 The above shows Figures 1 to 9 1 is a schematic process flow diagram of a method for producing a manufacturing intermediate. The method 100 includes a step 102 of providing at least a chip 12. This is followed by a step 104 of encapsulating the chip 12 in a molding compound 28. This is followed in turn by a step 106 of thinning the chip. As described above, the molding compound 28 provides strength to the chip 12 to prevent it from deforming during or after thinning, thereby alleviating the warping and cracking problems experienced in the prior art.

[0071] Fig.13 The method 100 is shown in more detail. In particular, the method 100 may optionally further comprise, before the step 104 of sealing, a further step 108 of providing the base frame 2. The chip 12 may be provided as described above with respect to Figure 2 and Figure 3 The method 100 may further optionally include, after the step 104 of sealing and before the step 106 of thinning the chip 12, the further step of removing the base frame 2. The base frame 2 may be attached to the base frame 2 in the manner described above. Figure 7 Remove as described.

[0072] Fig.14 The method 100 is shown in more detail. In particular, the method 100 may further include, after the step 108 of providing the base frame 2 and before the step 104 of sealing, an additional step 112 of providing the clip 20. The clip 20 may be as described above with respect to Figure 5 The depicted embodiment is attached to chip 12 .

[0073] Fig.15 The above shows Fig.10 and Fig.11 1 is a schematic flow chart of a method for producing a semiconductor package 50. In a first step 202, the method 200 comprises providing a manufacturing intermediate 36 obtained as a result of the method 100 for producing a manufacturing intermediate. In a second step 202, a second base frame 38 is provided. The second base frame 38 may be as described above with respect to Fig.10 The attachment described above is attached to the manufacturing intermediate 36. In the third step 204, the Fig.11 In the described manner, the second base frame 38 and the manufacturing intermediate body 38 are sealed in the second molding compound 48 .

Claims

1. A method for manufacturing a manufacturing intermediate for semiconductor packaging, the method comprising: Provide chips; encapsulating the chip at least partially within a molding compound; as well as The chip is thinned.

2. The method according to claim 1: wherein the chip defines a first surface and a second surface; The method further comprises: providing a base frame having a first surface and a second surface; attaching the first surface of the chip to the first surface of the base frame; wherein the step of at least partially encapsulating the chip within a molding compound comprises at least partially encapsulating the base frame and the chip within the molding compound; as well as The base frame is removed to expose the first surface of the chip.

3. The method according to claim 2: The step of at least partially encapsulating the base frame and the chip within the molding compound includes exposing the second surface of the base frame.

4. The method according to any one of claims 1 to 3, wherein the step of thinning the chip comprises thinning the chip to at most about 100 μm, or preferably at most about 50 μm, or more preferably at most about 25 μm, or most preferably at most about 15 μm.

5. The method according to any one of claims 1 to 4, wherein prior to the step of thinning the chip, the chip comprises a thickness of at least about 150 μm to 700 μm.

6. The method of any one of claims 1 to 5, wherein thinning the chip comprises grinding the chip.

7. The method according to any one of claims 2 to 6, comprising: providing a clip having a first connecting portion and a second connecting portion; Prior to the step of at least partially encapsulating the base frame and the chip in a molding compound: attaching the first connection portion of the clip to the second surface of the chip; as well as attaching the second connecting portion of the clip to the first surface of the base frame; as well as During the step of sealing the base frame and the chip in a molding compound: The clip is sealed within the molding compound.

8. The method according to claim 7, further comprising: The second connecting portion of the clip is thinned.

9. The method according to claim 8, further comprising: providing a first plating layer to the first surface of the chip; as well as A second plating layer is provided to the second connection portion of the clip.

10. A method for manufacturing a semiconductor package, comprising: Providing a manufacturing intermediate according to claim 9; providing a second base frame having a first portion and a second portion; attaching the first portion of the second base frame to the first plating; as well as The second portion of the second base frame is attached to the second plating.

11. The method according to claim 10, further comprising: The manufacturing intermediate, the first plating layer, the second plating layer, and the second base frame are at least partially encapsulated within a second molding compound.

12. A manufacturing intermediate for semiconductor packaging, comprising: a chip having a first surface and a second surface; and a molding sealing the chip; The first surface of the chip is exposed.

13. The manufacturing intermediate according to claim 12, wherein the chip comprises a thickness of at most about 100 μm, or preferably at most about 50 μm, or more preferably at most about 25 μm, or most preferably at most about 15 μm.

14. The manufacturing intermediate according to claim 12 or 13, further comprising: A clip having a first connecting portion and a second connecting portion; wherein: The clip is sealed within the molding compound; The first connection portion is attached to the second surface of the chip; and The second connecting portion is exposed.

15. A semiconductor package, comprising: The manufacturing intermediate according to claim 13 or 14; a first plating layer attached to the first surface of the chip; a second plating layer attached to the second connecting portion of the clip; a base frame comprising a first portion attached to the first coating and a second portion attached to the second coating; as well as A second molded part seals the manufacturing intermediate, the first plating layer, the second plating layer and the basic frame.

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