Semiconductor device

By connecting Si and SiC elements in parallel in the semiconductor device and controlling their on-time using the gate driving circuit, the problem of high heat in the SiC elements under high current conditions is solved, and thermal suppression and cost reduction without additional detection circuit are achieved.

CN119182280APending Publication Date: 2024-12-24MITSUBISHI ELECTRIC CORP
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Patent Information

Application Number
CN202410776329.0
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2023-06-22
Filing Date
2024-06-17
Publication Date
2024-12-24

AI Technical Summary

Technical Problem

In semiconductor devices, the SiC-MOSFET element generates high heat under high current conditions, resulting in failures, and setting up a temperature detection circuit and a current detection circuit will increase the size and cost of the device.

Method used

Using a parallel circuit structure, the Si element is connected in parallel with the SiC element with a large band gap, and the on-off time is controlled through the gate driving circuit to ensure that the SiC element is disconnected or The power-on capacity is reduced to suppress the generation of heat.

Benefits of technology

It effectively suppresses the heat generation of SiC components, avoids failures, and does not require additional temperature detection circuits and current detection circuits, reducing costs and size.

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Abstract

The purpose of the present invention is to provide a technique capable of suppressing heat generated by a second semiconductor switching element. The semiconductor device includes a parallel circuit configured so that a first semiconductor switching element and a second semiconductor switching element are connected in parallel, and a gate drive circuit. When the state duration time, which is the duration time of the state of the input signal, is greater than or equal to a threshold value, the gate drive circuit turns off the second semiconductor switching element while maintaining the first semiconductor switching element on, or turns off the second semiconductor switching element while maintaining the first semiconductor switching element on. The energization capability of the second semiconductor switching element is reduced.
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