MEMS acoustic array sampling system based on low-computing-power ADC chip

Abstract

The invention provides an MEMS acoustic array sampling system based on a low-computing-power ADC chip. The MEMS acoustic array sampling system comprises a sampling module and a main control module. The sampling module is provided with at least one group of MEMS sound arrays, each group comprises four ADC chips, and each chip is provided with four MEMS. The chips sequentially collect corresponding MEMS analog signals and are cascaded, and the fourth chip outputs a result. And the main control module sends a clock signal to the ADC chip and receives an output result of the MEMS acoustic array. The four ADC chips with low computing power are cascaded to carry out data transmission, and only four I2S channels are needed to carry out data transmission when 64-path sound acquisition is carried out, so that the requirement on the number of platform I2S interfaces is greatly reduced, the board arrangement difficulty is reduced, and the cost is saved.

Description

Technical Field

[0001] The present application relates to the field of communication technology, and in particular to a MEMS acoustic array sampling system based on a low-computing-power ADC chip. Background Art

[0002] In today's application fields of acoustic research, sound source localization technology plays a vital role. It is widely used in speech recognition, environmental monitoring, security monitoring, intelligent audio and many other aspects.

[0003] Sound source localization mainly relies on microphone arrays to collect sound source signals, and then processes the collected signals through specific algorithms to determine the location of the sound source. Among them, the design of the microphone array is one of the key factors to achieve high-precision sound source localization. The traditional microphone array design is usually composed of 64 MEMS microphones and 8 powerful 8-channel ADC chips in the application scenario of 64 channels. This design method meets the basic needs of sound source localization to a certain extent, but it also has certain limitations. For example, in terms of signal transmission, 8 high-computing-power ADC chips need to transmit the converted 8-channel I2S signals to the platform, which requires the platform to have 8-channel IS2 interfaces and also needs to deal with the layout of 8-channel I2S high-speed clock signals. These requirements not only increase the demand for platform hardware resources, but also greatly increase the difficulty of layout, which in turn leads to increased product production costs and extended design cycles.

[0004] In summary, there is an urgent need for a method that can use a low-cost, low-computing-power ADC chip to complete the acquisition of 64-channel sound source signals. Summary of the invention

[0005] The embodiment of the present application provides a MEMS sound array sampling system based on a low-computing power ADC chip. By cascading four low-computing power ADC chips for data transmission, only four I2S channels are needed for data transmission when collecting 64 channels of sound, which greatly reduces the requirement for the number of I2S interfaces on the platform, reduces the difficulty of layout, and saves costs.

[0006] In a first aspect, an embodiment of the present application provides a MEMS acoustic array sampling system based on a low-computing-power ADC chip, the system comprising: The sampling module includes at least one group of MEMS acoustic arrays, wherein the MEMS acoustic array includes 4 ADC chips, and each ADC chip is mounted with 4 MEMS, the first ADC chip collects analog signals corresponding to the 4 MEMS to obtain first collected data, the second ADC chip collects analog signals corresponding to the 4 MEMS and cascades with the first collected data to obtain second collected data, the third ADC chip collects analog signals corresponding to the 4 MEMS and cascades with the second collected data to obtain third collected data, and the fourth ADC chip collects analog signals corresponding to the 4 MEMS and cascades with the third collected data to obtain fourth collected data as the MEMS acoustic array output result; The main control module sends the clock signal to each ADC chip in the sampling module and receives the output result of each MEMS acoustic array in the sampling module.

[0007] In a second aspect, an embodiment of the present application provides an electronic device, comprising a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to run a MEMS acoustic array sampling system based on a low-computing-power ADC chip as described in any one of claims 1-8.

[0008] In a third aspect, an embodiment of the present application provides a readable storage medium, in which a computer program is stored. The computer program includes a program code for controlling a process to execute a process, and the process includes a MEMS acoustic array sampling system based on a low-computing power ADC chip according to any one of claims 1-8.

[0009] The main contributions and innovations of the present invention are as follows: The embodiment of the present application uses a MEMS acoustic array composed of four low-computing power ADC chips connected in series to acquire collected data, and one ADC chip only needs to collect four MEMS, which greatly reduces the required instantaneous computing power of the ADC chip, and designs a complete set of cascade logic to cascade the collected data of the four ADC chips and send them to the main control module through one I2S channel. Therefore, this solution only needs four I2S channels to transmit data when performing 64-channel sound collection, which reduces the requirement for the number of platform I2S interfaces, reduces the difficulty of layout, and saves costs.

[0010] Details of one or more embodiments of the present application are set forth in the following drawings and description to make other features, objects, and advantages of the present application more readily apparent. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings: Figure 1 is a schematic diagram of a 64-channel MEMS acoustic array sampling system according to an embodiment of the present application; Figure 2 is a schematic diagram of MEMS arranged in a planar random array according to an embodiment of the present application; Figure 3 is a circuit diagram of a microphone according to an embodiment of the present application; Figure 4 is a schematic diagram of the working principle of a path multiplexing according to an embodiment of the present application; Figure 5 It is a schematic diagram of ADC chip acquisition of a MEMS acoustic array according to an embodiment of the present application; Figure 6 A schematic diagram of a cascade mode of an ADC chip according to an embodiment of the present application; Figure 7 is a schematic diagram of a power module according to an embodiment of the present application; Figure 8 is a schematic diagram of a gigabit network design according to an embodiment of the present application; Fig. 9 is a timing diagram of an I2S interface of a main control module according to an embodiment of the present application; Fig.10 It is a schematic diagram of the hardware structure of an electronic device according to an embodiment of the present application. DETAILED DESCRIPTION

[0012] Exemplary embodiments will be described in detail herein, examples of which are shown in the accompanying drawings. When the following description refers to the drawings, the same numbers in different drawings represent the same or similar elements unless otherwise indicated. The implementations described in the following exemplary embodiments do not represent all implementations consistent with one or more embodiments of this specification. Instead, they are merely examples of devices and methods consistent with some aspects of one or more embodiments of this specification as detailed in the appended claims.

[0013] It should be noted that: in other embodiments, the steps of the corresponding method are not necessarily performed in the order shown and described in this specification. In some other embodiments, the steps included in the method may be more or less than those described in this specification. In addition, a single step described in this specification may be decomposed into multiple steps for description in other embodiments; and multiple steps described in this specification may be combined into a single step for description in other embodiments.

[0014] In order to facilitate the understanding of this plan, some terms in this plan are explained here: ADC chip: digital-to-analog conversion chip that can convert continuously changing analog signals into discrete digital signals.

[0015] MEMS: It is a microphone device that combines microelectronics publishing technology with micromechanical technology. When a sound signal enters the MEMS microphone, the diaphragm will vibrate due to the pressure change of the sound wave, thereby changing the distance between the diaphragm and the back plate, and then changing the capacitance value of the capacitor to generate an analog signal.

[0016] Embodiment 1:

[0017] The embodiment of the present application provides a MEMS sound array sampling system based on a low-computing power ADC chip. Specifically, by cascading four low-computing power ADC chips for data transmission, only four I2S channels are needed for data transmission when collecting 64 channels of sound, which greatly reduces the requirement for the number of I2S interfaces on the platform, reduces the difficulty of board layout, and saves costs. Figure 1 , the system comprising: The sampling module includes at least one group of MEMS acoustic arrays, wherein the MEMS acoustic array includes 4 ADC chips, and each ADC chip is mounted with 4 MEMS, the first ADC chip collects analog signals corresponding to the 4 MEMS to obtain first collected data, the second ADC chip collects analog signals corresponding to the 4 MEMS and cascades with the first collected data to obtain second collected data, the third ADC chip collects analog signals corresponding to the 4 MEMS and cascades with the second collected data to obtain third collected data, and the fourth ADC chip collects analog signals corresponding to the 4 MEMS and cascades with the third collected data to obtain fourth collected data as the MEMS acoustic array output result; The main control module sends the clock signal to each ADC chip in the sampling module and receives the output result of each MEMS acoustic array in the sampling module.

[0018] In this solution, the MEMS in the sampling module are arranged in a planar random array, and the arrangement method is as follows: Figure 2 As shown, specifically, the use of a planar random array arrangement can make the spatial position of each MEMS more diversified. Traditional MEMS arrays are regularly arranged and have poor spatial correlation. Especially in sound measurement, the fixed spacing between multiple MEMS will lead to inaccurate measurements in certain areas. Therefore, this solution uses a planar random array to better improve the accuracy of sound acquisition.

[0019] In some embodiments, the main control module is an MCU, and the clock signal sent by the main control module includes a main clock signal, a bit clock signal, and a synchronous clock signal to ensure that the phases of each ADC chip are the same.

[0020] Specifically, the master clock signal (MCLK) is used to ensure that each ADC chip works under a unified time reference, thereby avoiding data errors or asynchrony problems caused by clock inconsistency between different ADC chips.

[0021] Specifically, the bit clock signal (BCLK) is used to synchronize the data reading and writing operations of each ADC chip. The main control module receives the data sent by each ADC chip according to the pulse of the bit clock, and each ADC chip sends data according to the rhythm of the bit clock.

[0022] Specifically, the synchronization clock (SYNCLK) is used to ensure the synchronization of each ADC chip during audio data processing and transmission.

[0023] Exemplarily, the clock of the main clock signal and the bit clock signal is 12.288 MHz. When the main control module provides a 48 KHz synchronization clock to each ADC chip, the ADC chip will perform analog-to-digital conversion at a 48 KHz sampling rate in a 1xFStdm mode.

[0024] In some specific embodiments, each MEMS adopts a pulse density modulation method, and each ADC chip outputs a pulse density modulation clock signal to supply the corresponding four MEMS. The pulse density modulation clock signal determines the rhythm at which the pulse density modulation signal output by the MEMS is read and processed by the ADC chip, and specifies when the ADC collects the MEMS signal, thereby ensuring accurate acquisition and orderly processing of data.

[0025] Specifically, pulse density modulation (PDM) refers to a method of digitizing analog signals and transmitting data using pulse density modulation technology, and PDM data is transmitted through a PDM interface. The PDM interface does not require additional frequency reduction digital filtering in the microphone, saving the chip area, cost and current consumption of the microphone during board layout. The delay caused by the analog-to-digital conversion of the pulse density modulation method is very small. A PDM interface consists of two interface signals: clock and data. The L / R (left / right) selection pin can be used on the same data line by connecting the pin to the ground or Vsupply. Under the power supply voltage and ground conditions, the total number of pins of the microphone chip is 5. Figure 3 This is the circuit diagram of the total microphone.

[0026] In this solution, every two MEMS generate a set of PDM data, and the ADC chip receives the two sets of PDM data through the PDM interface to complete the analog signal acquisition of the four corresponding MEMS.

[0027] In some specific embodiments, two MEMS are controlled to generate a set of PDM data through left / right channel multiplexing. The working principle of multiplexing is to control the two MEMS respectively through the rising edge and falling edge of the pulse density modulation clock signal, one MEMS transmits PDM data to the ADC chip at the rising edge, and the other MEMS transmits PDM data to the ADC chip at the falling edge.

[0028] Specifically, the schematic diagram of the working principle of multiplexing is as follows Figure 4 As shown, when one of the MEMS is transmitting PDM data, the other MEMS is in a high impedance state.

[0029] Specifically, the pulse density modulated clock signal can be fully utilized through multiplexing, which is equivalent to obtaining PDM data from two MEMS within one clock cycle, doubling the data transmission speed and improving the efficiency of data transmission. On the other hand, there is no need to configure a data transmission channel for each MEMS separately. PDM data transmission of two MEMS can be realized on one channel through multiplexing, reducing the board space.

[0030] In some embodiments, the ADC chip acquisition schematic diagram of the MEMS acoustic array is as follows: Figure 5 As shown, each ADC chip is provided with a TDMOUT interface and a TDMIN interface, the TDMOUT interface is used to output the collected data to the next ADC chip, and the TDMIN interface is used to receive the collected data of the previous ADC chip, and the collected data includes the first collected data, the second collected data, the third collected data and the fourth collected data.

[0031] In this solution, data is collected by cascading four ADC chips. In the cascade mode, all ADC chips receive the same clock signal sent by the main control module. The schematic diagram of the cascade mode of the ADC chips is shown in the figure. Figure 6 shown.

[0032] Specifically, each ADC chip in this solution only needs to process the collected data of 4 MEMS, which greatly reduces the instantaneous computing power of the required ADC chip, and this solution collects the data obtained by each ADC chip in a cascaded manner, thereby achieving the same effect as a high-computing ADC chip. In addition, a high-computing ADC chip may consume a lot of power and occupy a large physical space during operation. The cascaded low-computing ADC chips can be flexibly configured according to actual needs to better optimize resource utilization, especially for some resource-constrained application scenarios, such as portable devices or small embedded systems. The use of low-computing ADC chips in cascade can reduce the system's power consumption, volume and cost while meeting performance requirements.

[0033] In some specific embodiments, the sampling module includes 4 groups of MEMS acoustic arrays, that is, the sampling module in this solution includes a total of 16 ADC chips and 64 MEMS, forming a 64-channel sound acquisition control system.

[0034] In some specific embodiments, each group of MEMS acoustic arrays performs bidirectional data transmission with the main control unit via an I2S channel, that is, the clock signal is sent to each ADC chip in the sampling module via the I2S channel, and the output result of each MEMS acoustic array is also transmitted to the main control module via the I2S channel.

[0035] This solution can complete 64-channel sound collection control through only 4 I2S channels, and the production cost and design difficulty are much lower than traditional sound collection control systems.

[0036] Specifically, in a conventional 64-channel sound acquisition and control system, 8 high-computing-power ADC chips are usually used, which requires 8 I2S channels for data transmission, greatly increasing the difficulty of layout. However, this solution uses low-computing-power ADC chips in cascade mode, and only 4 I2S channels are needed to complete the transmission of sound source data, reducing the workload of design and debugging, thereby reducing development costs.

[0037] In this solution, the MEMS acoustic array sampling system further includes a power module, and the power module supplies power to the sampling module and the main control module.

[0038] Specifically, the schematic diagram of the power module is as follows Figure 7 As shown in the figure, the power supply of this design uses a DC-DC chip to step down the 12V / 3A power supply into VCC3 / 33.3V / 3A power supply, which is used for MEMS and ADC chips and the platform. The power consumption of a single MEMS is about 0.7mW, the power consumption of a single ADC chip is about 63mW, and the power consumption of the platform and the entire system is about 4W.

[0039] In this solution, the MEMS acoustic array output results obtained by the main control unit are transmitted to the background through the gigabit network. The design of the gigabit network is as follows: Figure 8 As shown, the Gigabit network includes RGMII transmission from the main control module (MCU) to the PHY chip, and finally the background tracks the sound source based on the output results of the MEMS acoustic array.

[0040] Furthermore, sound source tracking is a sound source localization technology based on TDOA (Time Difference Of Arrival), which estimates the time difference between the arrival of the signal at each microphone, thereby obtaining a set of equations for the sound source position coordinates, and then solving the set of equations to obtain the precise azimuth coordinates of the sound source. The main principles of the TDOA algorithm are: Calculate the generalized cross-correlation function between microphones, taking microphone #1 as the reference: ; in, For the The time difference between microphone # and microphone 1#, is the weighted cross-correlation function, is the weighting function, Cross power spectral density, f is the frequency, M is the number of microphones.

[0041] Calculate the time difference between the sound source arriving at each microphone : The peak value is the time difference between the corresponding microphones , solve the system of equations The coordinates of the target sound source can be obtained, where c is the speed of sound and r is the distance between the sound source and each microphone.

[0042] In some specific embodiments, after the power module supplies 3.3V power to the main control module and the sampling module, the main control module obtains the device address through I2C, and provides a 12.288MHz bit clock signal and a 48KHz synchronization clock signal to each ADC chip. The chip starts working and generates a pulse density modulation clock signal to the corresponding 4 MEMS for sound collection, and the same group of MEMS sound arrays transmits the collected data through the cascaded TDM mode, and finally transmits it to the main control module through SAI_RX_DATA. When 64-channel sound collection is performed, a total of 4 groups of MEMS sound array output results are generated, and finally the background locates the sound source according to the 4 groups of MEMS sound array output results.

[0043] In some specific embodiments, the timing diagram of the I2S interface of the main control module is as follows: Fig. 9 As shown, LRCLK is 48KHz, BCLK is 12.288MHz, MCLK is 12.288MHz, one data channel transmits the original data of 16 independent microphones, and there are four data channels for 64 independent microphone array PCM original data. One I2C channel in the MCU can configure 4 Codec chip registers, and there are four I2C channels for 16 Codec chip registers.

[0044] Embodiment 2:

[0045] This embodiment also provides an electronic device, referring to Fig.10, comprises a memory 404 and a processor 402, wherein the memory 404 stores a computer program, and the processor 402 is configured to run the computer program to execute the steps in any of the above method embodiments.

[0046] Specifically, the processor 402 may include a central processing unit (CPU), or an application specific integrated circuit (ASIC), or may be configured to implement one or more integrated circuits of the embodiments of the present application.

[0047] Among them, the memory 404 may include a large capacity memory 404 for data or instructions. For example, but not limitation, the memory 404 may include a hard disk drive (HDD), a floppy disk drive, a solid state drive (SSD), a flash memory, an optical disk, a magneto-optical disk, a tape, or a universal serial bus (USB) drive, or a combination of two or more of these. In appropriate cases, the memory 404 may include a removable or non-removable (or fixed) medium. In appropriate cases, the memory 404 may be inside or outside the data processing device. In a specific embodiment, the memory 404 is a non-volatile memory. In a specific embodiment, the memory 404 includes a read-only memory (ROM) and a random access memory (RAM). Where appropriate, the ROM may be a mask-programmed ROM, a programmable ROM (Programmable Read-Only Memory, PROM for short), an erasable PROM (Erasable Programmable Read-Only Memory, EPROM for short), an electrically erasable PROM (Electrically Erasable Programmable Read-Only Memory, EEPROM for short), an electrically alterable ROM (Electrically Alterable Read-Only Memory, EAROM for short) or a flash memory (FLASH) or a combination of two or more of these. In appropriate circumstances, the RAM may be a static random access memory (SRAM) or a dynamic random access memory (DRAM), wherein the DRAM may be a fast page mode dynamic random access memory 404 (FPMDRAM), an extended data output dynamic random access memory (EDODRAM), a synchronous dynamic random access memory (SDRAM), etc.

[0048] The memory 404 may be used to store or cache various data files required for processing and / or communication, as well as possible computer program instructions executed by the processor 402 .

[0049] The processor 402 implements any one of the MEMS acoustic array sampling systems based on a low-computing-power ADC chip in the above-mentioned embodiments by reading and executing computer program instructions stored in the memory 404 .

[0050] Optionally, the electronic device may further include a transmission device 406 and an input / output device 408 , wherein the transmission device 406 is connected to the processor 402 , and the input / output device 408 is connected to the processor 402 .

[0051] The transmission device 406 can be used to receive or send data via a network. The specific examples of the above-mentioned network may include a wired or wireless network provided by a communication provider of the electronic device. In one example, the transmission device includes a network adapter (Network Interface Controller, referred to as NIC), which can be connected to other network devices through a base station so as to communicate with the Internet. In one example, the transmission device 406 can be a radio frequency (Radio Frequency, referred to as RF) module, which is used to communicate with the Internet wirelessly.

[0052] The input / output device 408 is used to input or output information. In this embodiment, the input information may be acquisition data, clock signals, etc., and the output information may be MEMS acoustic array output results, sound source position coordinates, etc.

[0053] Optionally, in this embodiment, the processor 402 may be configured to perform the following steps through a computer program: The sampling module includes at least one group of MEMS acoustic arrays, wherein the MEMS acoustic array includes 4 ADC chips, and each ADC chip is mounted with 4 MEMS, the first ADC chip collects analog signals corresponding to the 4 MEMS to obtain first collected data, the second ADC chip collects analog signals corresponding to the 4 MEMS and cascades with the first collected data to obtain second collected data, the third ADC chip collects analog signals corresponding to the 4 MEMS and cascades with the second collected data to obtain third collected data, and the fourth ADC chip collects analog signals corresponding to the 4 MEMS and cascades with the third collected data to obtain fourth collected data as the MEMS acoustic array output result; The main control module sends the clock signal to each ADC chip in the sampling module and receives the output result of each MEMS acoustic array in the sampling module.

[0054] It should be noted that the specific examples in this embodiment can refer to the examples described in the above embodiments and optional implementation modes, and this embodiment will not be described in detail here.

[0055] In general, various embodiments may be implemented in hardware or dedicated circuits, software, logic, or any combination thereof. Some aspects of the invention may be implemented in hardware, while other aspects may be implemented in firmware or software executed by a controller, microprocessor, or other computing device, but the invention is not limited thereto. Although various aspects of the invention may be shown and described as block diagrams, flow charts, or using some other graphical representation, it should be understood that, as non-limiting examples, the boxes, devices, systems, techniques, or methods described herein may be implemented in hardware, software, firmware, dedicated circuits or logic, general-purpose hardware or controllers or other computing devices, or some combination thereof.

[0056] Embodiments of the present invention may be implemented by computer software that is executable by a data processor of a mobile device, such as in a processor entity, or by hardware, or by a combination of software and hardware. Computer software or programs (also referred to as program products) including software routines, applets and / or macros may be stored in any device-readable data storage medium, and they include program instructions for performing specific tasks. A computer program product may include one or more computer executable components configured to perform an embodiment when the program is run. One or more computer executable components may be at least one software code or a portion thereof. In addition, at this point, it should be noted that, for example, Fig.10 Any block of the logic flow in the program may represent program steps, or interconnected logic circuits, blocks and functions, or a combination of program steps and logic circuits, blocks and functions. The software may be stored on physical media such as memory chips or storage blocks implemented within a processor, magnetic media such as hard disks or floppy disks, and optical media such as, for example, DVDs and their data variants, CDs, etc. Physical media are non-transitory media.

[0057] Those skilled in the art should understand that the technical features of the above embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0058] The above embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the present application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims.

Claims

1. A MEMS acoustic array sampling system based on a low-computing-power ADC chip, characterized in that: include: The sampling module includes at least one group of MEMS acoustic arrays, wherein the MEMS acoustic array includes 4 ADC chips, and each ADC chip is mounted with 4 MEMS, the first ADC chip collects analog signals corresponding to the 4 MEMS to obtain first collected data, the second ADC chip collects analog signals corresponding to the 4 MEMS and cascades with the first collected data to obtain second collected data, the third ADC chip collects analog signals corresponding to the 4 MEMS and cascades with the second collected data to obtain third collected data, and the fourth ADC chip collects analog signals corresponding to the 4 MEMS and cascades with the third collected data to obtain fourth collected data as the MEMS acoustic array output result; The main control module sends the clock signal to each ADC chip in the sampling module and receives the output result of each MEMS acoustic array in the sampling module.

2. A MEMS acoustic array sampling system based on a low computing power ADC chip according to claim 1, characterized in that: The sampling module includes four groups of MEMS acoustic arrays, and the MEMS in the sampling module are arranged in a planar random array.

3. A MEMS acoustic array sampling system based on a low computing power ADC chip according to claim 1, characterized in that: The main control module is an MCU, and the clock signal sent by the main control module includes a main clock signal, a bit clock signal and a synchronous clock signal.

4. A MEMS acoustic array sampling system based on a low computing power ADC chip according to claim 1, characterized in that: Each MEMS adopts pulse density modulation, and each ADC chip outputs a pulse density modulation clock signal to supply the corresponding 4 MEMS. Every two MEMS generate a set of PDM data. The ADC chip receives two sets of PDM data through the PDM interface to complete the analog signal acquisition of the 4 corresponding MEMS.

5. A MEMS acoustic array sampling system based on a low computing power ADC chip according to claim 4, characterized in that: A set of PDM data is generated by controlling two MEMS through left / right channel multiplexing. The multiplexing is to control the two MEMS separately through the rising edge and falling edge of the pulse density modulation clock signal. One MEMS transmits PDM data to the ADC chip at the rising edge, and the other MEMS transmits PDM data to the ADC chip at the falling edge.

6. A MEMS acoustic array sampling system based on a low computing power ADC chip according to claim 1, characterized in that: Each ADC chip is provided with a TDMOUT interface and a TDMIN interface. The TDMOUT interface is used to output the collected data to the next ADC chip, and the TDMIN interface is used to receive the collected data of the previous ADC chip. The collected data includes the first collected data, the second collected data, the third collected data and the fourth collected data.

7. A MEMS acoustic array sampling system based on a low computing power ADC chip according to claim 1, characterized in that: Each group of MEMS acoustic arrays carries out bidirectional data transmission with the main control unit via an IS2 bus.

8. The MEMS acoustic array sampling system based on a low computing power ADC chip according to claim 1, characterized in that: The MEMS acoustic array sampling system further includes a power supply module, which supplies power to the sampling module and the main control module.

9. An electronic device comprising a memory and a processor, characterized in that: The memory stores a computer program, and the processor is configured to run the computer program to run the MEMS acoustic array sampling system based on a low-computing-power ADC chip as described in any one of claims 1-8.

10. A readable storage medium, characterized in that: The readable storage medium stores a computer program, wherein the computer program includes a program code for controlling a process to execute a process, wherein the process includes a MEMS acoustic array sampling system based on a low-computing-power ADC chip according to any one of claims 1-8.

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