Signal processing method based on combination of MTD and CFAR

Abstract

The invention discloses a signal processing method based on combination of MTD and CFAR. The method comprises the following steps: step 1, calculating MTD and Doppler dimension CFAR decision thresholds; and step 2, calculating a distance dimension CFAR judgment threshold and performing CFAR judgment. By designing a data transmission path between the MTD module and the CFAR module and adding the cache module between the operation module and the DDR memory read-write module, the read-write efficiency of the DDR memory is greatly improved. Meanwhile, the method replaces the method of simultaneously calculating the CFAR judgment threshold in two dimensions in the traditional two-dimensional CFAR through two-time one-dimensional CFAR judgment threshold calculation, the implementation complexity and resource consumption of the one-dimensional CFAR are realized, and the detection performance is very close to that of the traditional two-dimensional CFAR.

Description

Technical Field

[0001] The present invention relates to the field of radar signal processing, and in particular to a signal processing method based on the combination of MTD and CFAR. Background Art

[0002] In the field of radar signal processing, Moving Target Detection (MTD) and Constant False Alarm Ratet (CFAR) are commonly used signal processing algorithms. The common pulse compression phased array radar signal processing flow is that the pulse compression (PC) module passes the processed signal to the MTD module, and after accumulation, the MTD module passes the processed data to the CFAR module, which is a pipeline cascade.

[0003] From the perspective of data transmission of signal processing modules at all levels, in the MTD and CFAR implementation schemes based on field programmable gate arrays (FPGAs), the amount of data accumulated in a coherence process interval (CPI) is large, while the storage resources inside the FPGA are limited. In order to save the internal storage resources of the FPGA, a common processing method is that the signal processing module stores the processing results in a large-capacity, low-cost DDR (Double Data Rate Synchronous Dynamic Random Access Memory) memory outside the FPGA chip, and the next-level signal processing module reads the output signal of the previous-level module from the DDR memory to perform the next step of processing. The radar data stored in the DDR memory is often a two-dimensional array, divided into the range dimension and the Doppler dimension. Considering that pulse compression is processed in the range dimension, MTD is processed in the Doppler dimension, and two-dimensional CFAR needs to be processed in both the range dimension and the Doppler dimension. When the modules at each level read and write the DDR memory, they need to read across pages due to different operation dimensions, thereby reducing the read and write efficiency.

[0004] In terms of CFAR implementation, two-dimensional CFAR has the advantages of strong weak target detection capability, strong anti-interference and anti-clutter capabilities compared to one-dimensional CFAR. However, two-dimensional CFAR is more complex to implement and consumes more resources.

[0005] MTD is a technology that uses Doppler filter banks to suppress various clutters to improve the radar's ability to detect moving targets in a cluttered background. The target echoes received by the radar include stationary target echoes and moving target echoes. The use of MTD technology can effectively suppress stationary targets and distinguish targets with different radial velocities. In addition to the target signal, the radar received signal inevitably contains various noises, clutter and interference signals, which makes the radar's target detection have a certain false alarm rate. CFAR refers to a technology that keeps a constant false alarm probability for target detection during the radar target detection process. The basic CFAR algorithm needs to estimate the noise and interference levels in the detected unit, calculate the decision threshold based on the estimation results, and determine whether the target exists by comparing the target unit signal with the decision threshold. The CFAR algorithm can be divided into one-dimensional CFAR and multi-dimensional CFAR based on the dimensions of the MTD results. One-dimensional CFAR often only operates in the distance dimension in the MTD results. Multi-dimensional CFAR uses information on multiple dimensions in MTD. Compared with one-dimensional CFAR, multi-dimensional CFAR can further enhance the radar's ability to detect weak targets and improve the radar's anti-interference and anti-clutter performance. However, multi-dimensional CFAR is more complex to implement, which often means more time and space resource consumption. FPGA is a programmable device that can change the structure of the internal circuit through programming to achieve various logical functions. Compared with ASIC, FPGA has a faster development cycle and higher flexibility, and has a better energy consumption ratio than general-purpose processing chips such as CPU and GPU. It is very suitable for implementing radar signal processing algorithms.

[0006] In addition, the existing technical solutions mainly include the following two types:

[0007] The first type: Data interaction mode of radar signal processing modules:

[0008] In the FPGA-based radar signal processing flow, MTD and CFAR are two relatively independent functions, which are often implemented independently, and then the two functional modules are cascaded together. Considering that the data volume of radar signal processing results at each level within a CPI is very huge. The usual practice is that each level of signal processing saves the processing results to a large-capacity DDR for the next level of signal processing module to read and further process. Specifically, pulse compression (PC) is a process performed in the distance dimension, so the PC module usually stores the radar signal within each pulse repetition time (PRT) in the DDR memory in sequence along the distance dimension. Modern phased array radars often have a large amount of data in a PRT, and the data of adjacent PRTs are stored in different pages of the DDR memory. MTD is an operation performed in the Doppler dimension, so the MTD module needs to read data from the DDR memory along the Doppler dimension and perform a Fast Fourier Transformation (FFT) operation, and then save the results to a large-capacity DDR memory. When performing two-dimensional CFAR processing, it is necessary to read the MTD results from the DDR memory along the distance dimension and the Doppler dimension for CFAR detection, and finally save the CFAR detection results to the DDR memory. Since the PC module continuously writes data to the DDR memory along the distance dimension, if the MTD module directly reads data from the DDR memory along the Doppler dimension. When reading data, the data address is not continuous, and to read two adjacent data, it is necessary to skip an entire PRT of data. Here, due to the frequent cross-page access of the DDR memory and only a small amount of data is read in each page, the reading efficiency is very low.

[0009] Based on the above problems, a solution is proposed in the prior art. This method preferentially splits a larger matrix into multiple smaller matrices along the row dimension, and stores the small matrices in blocks in the DDR memory. In the process of reading DDR data, by converting the original cross-row read data into the skip read data between the small matrices in the row, the data transmission volume of each row is increased, thereby significantly improving the average efficiency of DDR memory reading and writing.

[0010] However, the data interaction method among the radar signal processing modules mentioned above has two disadvantages.

[0011] First, compared with the conventional solution, this solution needs to change the storage order of radar data in the DDR memory. And it is necessary to design address jump logic when reading and writing data, which is cumbersome to implement. Specifically, for range-Doppler two-dimensional radar data, using two-dimensional matrix storage in DDR memory is a more intuitive and simple conventional method. For example, in the conventional solution, the PC module stores the signal in each PRT in the DDR memory sequentially along the distance dimension. After using this solution, the PC module needs to additionally design address jump logic during the data storage process. For example, in radar development, in order to perform performance analysis, it is necessary to upload data from each stage of signal processing via Ethernet. In the existing solution, the address jump logic also needs to be designed in the data upload module, which is cumbersome to implement;

[0012] Second, the DDR read and write efficiency of this scheme has an upper limit, and the upper limit is not high. Specifically, the literature [7] proposed a scenario in which a 128-row, 128-column matrix is ​​written in row-first order and then read in column-first order. In this scenario, although the scheme greatly improves the write efficiency, the read efficiency is reduced due to the increased row-changing frequency of the read process. Taking the average of the read process and the write process, the highest read and write efficiency of this scheme is 73.1%.

[0013] Second: Implementation of two-dimensional CFAR module:

[0014] The existing two-dimensional CFAR implementation method is to select reference cells from the distance dimension and the Doppler dimension at the same time, and calculate the CFAR decision threshold based on the reference cell data of the two dimensions, and then make a CFAR decision. However, this two-dimensional CFAR implementation method has two disadvantages.

[0015] First, when reading input data, two-dimensional CFAR needs to fill data into reference cells of two dimensions. When the reference cell is translated along the distance dimension or Doppler dimension, more reference cells need to update data. However, when reading input data, one-dimensional CFAR only needs reference cells of one dimension. When the reference cell is translated, only two data need to be updated. Therefore, when inputting data, two-dimensional CFAR also has a higher requirement for the reading rate of DDR memory.

[0016] Second, when calculating the CFAR decision threshold, two-dimensional CFAR needs to refer to reference units in two dimensions to calculate the CFAR decision threshold, while one-dimensional CFAR only needs to refer to reference units in one dimension to calculate the CFAR decision threshold. Since more units need to be referenced, two-dimensional CFAR consumes more computing resources. Summary of the invention

[0017] The problem to be solved by the present invention is to solve the problem of low read and write efficiency of DDR memory due to the different processing dimensions and data storage order when the MTD module and CFAR module read and write data from the DDR memory. By designing the data transmission path of the MTD module and the CFAR module, and adding a cache module between the operation module and the DDR memory read and write module, the read and write efficiency of the DDR memory is greatly improved. At the same time, the present invention replaces the practice of calculating the CFAR decision threshold in two dimensions in the traditional two-dimensional CFAR by calculating the CFAR decision threshold twice in succession, thereby realizing the implementation complexity and resource consumption of one-dimensional CFAR, and at the same time, the detection performance is very close to that of the traditional two-dimensional CFAR.

[0018] The present invention provides a signal processing method based on the combination of MTD and CFAR, and the technical scheme adopted is as follows: the method comprises the following steps:

[0019] Step 1: Calculate the MTD and Doppler CFAR decision threshold, including the following steps:

[0020] S11: The DDR read module reads the first PC result, and the MTD inputs the BRAM module to save the data;

[0021] S12: The MTD input BRAM module reads the data and transmits it to the FFT module for operation;

[0022] S13: The FFT module outputs the operation result and passes it to the MTD output BRAM module and the CFAR threshold input BRAM module;

[0023] S14: MTD results are written into DDR memory;

[0024] S15: The CFAR threshold calculation module calculates the CFAR decision threshold;

[0025] S16: writing the Doppler dimension CFAR decision threshold into the CFAR threshold calculation output BRAM module;

[0026] S17: Doppler CFAR decision threshold is written into DDR memory;

[0027] S18: Repeat the above steps S11 to S17 until the data processing of one CPI is completed.

[0028] Step 2: Calculate the distance dimension CFAR decision threshold and make a CFAR decision, specifically including the following steps:

[0029] S21: DDR read module reads MTD result;

[0030] S22: The DDR reading module reads the Doppler dimension CFAR threshold calculation result;

[0031] S23: Calculate the distance dimension CFAR decision threshold;

[0032] S24: the distance dimension CFAR decision threshold is written into the CFAR threshold calculation output BRAM module;

[0033] S25: The CFAR judgment result is saved to the CFAR result output BRAM module;

[0034] S26: Write the CFAR decision result into the DDR memory;

[0035] S27: Repeat the above operation until the data processing of one CPI is completed.

[0036] To be more specific, in the DDR memory, the structure in which the PC module and the MTD module store data is a two-dimensional structure; the data of a target unit in the radar signal is represented by a rectangle, which stores data of M Doppler units and N distance units, and the total number of target units is M*N; the numbers in the rectangle represent the address where the data is stored: Doppler dimension priority access means that the data of all Doppler units in a certain distance unit are accessed first; then switch to the new distance unit and read the data of all Doppler units in the new distance unit;

[0037] Each BRAM module mainly includes a memory built by the BlockMemory resources inside the FPGA, and the corresponding read-write control logic; in each BRAM module, the data is stored in two dimensions, and the data of a target unit in the radar signal is represented by a rectangle, and the number in the rectangle represents the address where the data is stored; a total of M rows and K columns of data are stored, and the total number of target units is M*K; row-priority access means giving priority to accessing the data of all columns in a row, and then switching to a new row to access all the data in the new row; the data storage depth of all BRAM modules is the larger number between N*K and M*K.

[0038] Further, S11 is specifically as follows: the DDR reading module sets the reading first address to the address corresponding to the target unit with a distance dimension count of 0 and a Doppler dimension count of 0 in the PC result storage area; the DDR reading module reads M*K PC operation results from the DDR memory and saves them to the MTD input BRAM memory; the reading direction is distance dimension priority reading; specifically, K distance unit data is read on each Doppler unit, and a total of M Doppler unit data is read;

[0039] The DDR read module transmits the read data to the MTD input BRAM module; when the MTD input BRAM module saves the PC data output by the DDR read module, it writes the data into the storage space in a row-first order;

[0040] S12 is specifically as follows: after the MTD input BRAM module stores M*K PC data, the stored data is read out and output to the FFT operation module; specifically: the reading order is to read along the column priority direction; after reading M data of a column, switch to the next column and continue to read M data along the column priority direction; and so on, until all M*K data are read; the FFT module performs FFT operation on K frames of data in total, and each frame has M data;

[0041] S13 is specifically as follows: after the FFT performs K complete operations, M*K MTD operation results are simultaneously sent to the MTD output BRAM module and the CFAR threshold input BRAM module; the order in which the MTD output BRAM module and the CFAR threshold input BRAM module write data is column-first writing;

[0042] S14 is specifically as follows: after receiving M*K data, the MTD output BRAM module reads the data and sends it to the DDR write module; the MTD output BRAM module reads the data in the order of row priority; after receiving the data sent by the MTD output BRAM module, the DDR write module writes the data into the MTD result storage area in the DDR memory; the order of writing data into the DDR memory is distance dimension priority; specifically, K distance unit data is written to each Doppler unit, and M Doppler unit data is written in total;

[0043] S15 is specifically as follows: after the CFAR threshold input BRAM module receives M*K data, it reads the data in a column-by-column priority manner; the read data is transmitted to the CFAR threshold calculation module to perform calculations; the CFAR threshold calculation module calculates the Doppler dimension CFAR decision threshold corresponding to the current M*K MTD results according to the rules of the CFAR algorithm, and the Doppler dimension CFAR decision threshold is calculated at this time;

[0044] S16 is specifically as follows: the CFAR threshold calculation module sends the Doppler dimension CFAR decision threshold to the CFAR threshold calculation output BRAM module; the order in which the CFAR threshold output BRAM module writes data is column-first writing;

[0045] S17 is specifically as follows: after the CFAR threshold calculation output BRAM module receives M*K data, it first waits for the MTD output BRAM module to write all the data into the DDR memory; then the M*K Doppler dimension CFAR thresholds are read in row priority; the read data is sent to the DDR write module; the DDR write module writes the received data into the Doppler dimension CFAR threshold storage area in the DDR memory; the writing order is distance dimension priority; specifically, K distance unit data are written on each Doppler unit, and M Doppler unit data are written in total;

[0046] S18: Repeat the above steps S11 to S17 until the data processing of one CPI is completed.

[0047] Further, S21 is specifically as follows: first, the DDR reading module sets the reading first address to the address corresponding to the MTD data with the Doppler unit count of 0 and the distance unit count of 0; then, the DDR reading module reads the MTD operation result obtained in step 1 from the DDR memory; the reading order is distance dimension first; specifically, N distance unit data is read on each Doppler unit, and K Doppler unit data is read in total; the total data reading amount is N*K;

[0048] The DDR read module sends the read data to the CFAR threshold calculation input BRAM module; the CFAR threshold calculation input BRAM module saves the received data; in order to share the BRAM read and write control logic, it is still written in the column direction first;

[0049] S22 is specifically as follows: after the DDR reading module completes the MTD reading operation in S21, it immediately switches the first address to the Doppler dimension CFAR threshold data with the Doppler unit count being 0 and the distance unit count being 0; then, the Doppler dimension CFAR threshold data is preferentially read along the distance dimension; specifically, N distance unit data is read on each Doppler unit, and K Doppler unit data is read in total, and the total data reading amount is N*K;

[0050] The DDR read module sends the read Doppler dimension CFAR threshold data to the Doppler dimension CFAR threshold input BAM module; the latter writes the received data in the column-first direction;

[0051] S23 is specifically as follows: after the CFAR threshold calculation input BRAM module receives the MTD data, the MTD data is preferentially read along the column direction; and the reading result is sent to the CFAR threshold calculation module;

[0052] S24 is specifically as follows: after the distance dimension CFAR decision threshold calculation is completed, the data is transmitted to the CFAR threshold calculation output BRAM module; the CFAR threshold calculation output BRAM module stores the received data in column priority;

[0053] After the CFAR threshold calculation output BRAM module and the Doppler dimension CFAR threshold input BRAM module receive data, the CFAR threshold calculation input BRAM module reads the MTD result by column priority, the Doppler dimension CFAR threshold input BRAM module reads the Doppler dimension CFAR decision threshold by column priority, and the CFAR threshold calculation output BRAM module reads the distance dimension CFAR decision threshold by column priority; the CFAR decision module receives the above three output signals at the same time, calculates the distance dimension CFAR decision threshold with the Doppler dimension CFAR decision threshold to obtain the CFAR decision threshold; compares the MTD result with the CFAR decision threshold to obtain the CFAR decision result;

[0054] S25 is specifically as follows: after the CFAR threshold calculation module obtains the CFAR judgment result, the CFAR judgment result, the range coordinates and Doppler coordinates of the corresponding target unit, and the MTD amplitude are sent to the CFAR result output BRAM module;

[0055] After the CFAR result output BRAM receives the CFAR judgment result, when the judgment is successful, the distance bit coordinates and Doppler dimension coordinates of the corresponding unit and the MTD amplitude are saved; here, the data can be written into the BRAM in sequence; when the number of data output by the CFAR judgment module reaches N*K; all the saved CFAR judgment result information is read and sent to the DDR write module;

[0056] S26 specifically includes: after receiving the CFAR judgment result, the DDR writing module writes it into the memory area storing the CFAR judgment result in the DDR memory;

[0057] S27 is specifically as follows: after completing the operations from S21 to S26, the first address is set to the first address corresponding to the target unit whose Doppler unit count increases by K and whose distance unit count is 0; restarting the operations from S21 to S26, the distance dimension CFAR threshold calculation and CFAR decision operation of N*K target units can be performed in the same way; and so on, until the distance dimension CFAR threshold calculation and CFAR decision operation of all N*M target units are completed.

[0058] The beneficial effects of the present invention are as follows: the present invention designs a signal processing method of MTD+two-dimensional CFAR combination by utilizing the characteristics of the operation dimensions of the MTD module and the CFAR module, and designs a data buffer module between the operation modules such as the MTD operation module, the CFAR threshold calculation module, the CFAR judgment module and the DDR data interface; by performing a data transposition operation in the data buffer module, the data dimension that the calculation module needs to access and the dimension in which the DDR memory efficiently accesses data are switched. This solves the problem of low reading efficiency of the DDR memory in the traditional solution. At the same time, the present invention only needs to store one operation result in the DDR memory, avoiding the consumption of additional DDR memory storage space resources and data transfer time resources.

[0059] In view of the high cost of calculating the two-dimensional CFAR decision threshold, a method is designed to realize the two-dimensional CFAR threshold calculation by using two one-dimensional CFAR threshold operations in succession. In the CFAR operation, for a certain target unit, a one-dimensional processing is first performed in the Doppler dimension to obtain an estimated value of the Doppler dimension background clutter power. Then a one-dimensional processing is performed in the distance dimension to obtain an estimated value of the distance dimension background clutter power. When executing the CFAR decision, the two power values ​​are combined to obtain the CFAR decision threshold, so as to make a CFAR decision and obtain the decision result. In this way, the two-dimensional CFAR operation is realized through the same one-dimensional CFAR power estimation module. At the same time, the advantages of one-dimensional CFAR being easy to implement and low in logic resource consumption are obtained, and the detection performance is also very close to the existing two-dimensional CFAR scheme. BRIEF DESCRIPTION OF THE DRAWINGS

[0060] In order to more clearly and completely describe the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings used in the technical description.

[0061] Figure 1 It is a system design block diagram on which the signal processing method of the present invention is based;

[0062] Figure 2 It is a schematic diagram of the radar signal data storage structure and access sequence in the DDR memory;

[0063] Figure 3 It is a schematic diagram of the data storage structure and access sequence of the BRAM memory module;

[0064] Figure 4 It is a flow chart of MTD and Doppler dimension CFAR processing;

[0065] Figure 5 It is a flow chart of distance dimension CFAR and CFAR decision processing;

[0066] Figure 6This is one of the schematic diagrams of the read and write sequence of the DDR memory (K=4);

[0067] Figure 7 This is the second schematic diagram of the read and write sequence of the DDR memory (K=4);

[0068] Figure 8 This is one of the schematic diagrams of the read and write sequence of the BRAM memory module (K=4);

[0069] Fig. 9 This is the second schematic diagram of the read and write sequence of the BRAM memory module (K=4);

[0070] Fig.10 This is the third schematic diagram of the read and write sequence of the BRAM memory module (K=4). DETAILED DESCRIPTION

[0071] The technical solutions in the embodiments of the present invention will be described clearly and completely below in conjunction with the accompanying drawings in the embodiments of the present invention.

[0072] The overall structure of the system on which the present invention is based is shown in FIG. Figure 1 The block diagram of the overall system design of the present invention is shown in FIG.

[0073] In DDR memory, the structure in which the PC module and the MTD module store data is a two-dimensional structure. Figure 2 As shown. Each rectangle in the figure represents the data of a target unit in the radar signal, and a total of M Doppler units and N range units are stored. The total number of target units is M*N. The numbers in the rectangles represent the address or serial number where the data is stored. Note that considering that the data of a target unit is often larger than 1 byte, the address here is only for reference. The actual address may be an integer multiple of the address in the figure. When accessing data, it is defined here: Doppler priority access means giving priority to accessing the data of all Doppler units within a certain range unit. Then switch to the new range unit and read the data of all Doppler units in the new range unit. And so on, until all the required data is accessed. Distance priority access can be obtained in the same way.

[0074] exist Figure 1 In the FPGA, each BRAM module (block random access memory) mainly includes the memory built by the BlockMemory resources inside the FPGA, as well as the corresponding read and write control logic. In each BRAM module, data access methods are as follows: Figure 3 shown. Figure 3 Each box in the figure represents the data of a target unit in the radar signal. The number in the rectangle represents the sequence number of the data storage. Figure 3Data is stored in two dimensions, rows and columns. For example, to access data in M ​​rows and K columns in the figure, the total number of access units is M*K. Row-priority access means accessing data in all columns of a row, then switching to the next row, and so on, until data in these rows is accessed. Column-priority access means accessing columns first and then rows. Of course, sometimes you actually need to access data in N rows and K columns.

[0075] Step 1: Calculate the MTD and Doppler CFAR decision thresholds, refer to Figure 4 The signal transmission path and the modules involved in the operation in step 1 specifically include the following steps:

[0076] S11: The DDR read module reads the first pulse compression (PC) result, and the MTD inputs the BRAM module to save the data.

[0077] Specifically, the DDR reading module sets the first reading address to the address corresponding to the target unit with a distance dimension count of 0 and a Doppler dimension count of 0 in the PC result storage area; the DDR reading module reads M*K PC operation results from the DDR memory and saves them to the MTD input BRAM memory; the reading direction is distance dimension priority reading; specifically, K distance unit data is read from each Doppler unit, and a total of M Doppler unit data is read. The data reading order is as follows: Figure 4 shown.

[0078] The DDR read module transfers the read data to the MTD input BRAM module. When the MTD input BRAM module saves the PC data output by the DDR read module, it writes the data into the storage space in row-first order. The data reading order is as follows: Figure 6 shown.

[0079] S12: The MTD input BRAM module reads the data and transmits it to the FFT module for operation.

[0080] Specifically: After the MTD input BRAM module stores M*K PC data, it reads out the stored data and outputs it to the FFT operation module. Specifically: the reading order is to read along the column priority direction; after reading M data of a column, switch to the next column and continue to read M data along the column priority direction; and so on, until all M*K data are read. The data reading order is as follows: Figure 8 As shown, the FFT module performs FFT operations on K frames of data in total, and each frame has M data.

[0081] S13: The FFT module outputs the operation result and transmits it to the MTD output BRAM module and the CFAR threshold input BRAM module.

[0082] Specifically, after FFT performs K complete operations, M*K MTD operation results are simultaneously sent to the MTD output BRAM module and the CFAR threshold input BRAM module; the order in which the MTD output BRAM module and the CFAR threshold input BRAM module write data is column-first. The data writing order is as follows: Figure 8 shown.

[0083] S14: The MTD result is written into the DDR memory.

[0084] Specifically, after the MTD output BRAM module receives M*K data, it reads the data and sends it to the DDR write module; the MTD output BRAM module reads data in the order of row priority. Fig. 9 As shown. After the DDR write module receives the data sent by the MTD output BRAM module, it writes the data into the MTD result storage area in the DDR memory. The order in which data is written into the DDR memory is distance dimension first. Specifically, K distance unit data is written to each Doppler unit, and a total of M Doppler unit data is written. The data writing order is as follows: Figure 6 shown.

[0085] S15: The CFAR threshold calculation module calculates the CFAR decision threshold.

[0086] Specifically, after the CFAR threshold input BRAM module receives M*K data, it reads the data column by column. The data reading order is as follows: Figure 8 As shown. The read data is transmitted to the CFAR threshold calculation module to perform calculations. The CFAR threshold calculation module calculates the Doppler dimension CFAR decision threshold corresponding to the current M*K MTD results according to the rules of the CFAR algorithm. The CFAR operation here is a one-dimensional CFAR operation. The type of the CFAR algorithm itself is not limited and can be flexibly selected according to actual needs. It can be seen from the calculation dimension of the CFAR decision threshold at this time that the Doppler dimension CFAR decision threshold is calculated at this time.

[0087] S16: The Doppler dimension CFAR decision threshold is written into the CFAR threshold calculation output BRAM module.

[0088] Specifically, the CFAR threshold calculation module sends the Doppler dimension CFAR decision threshold to the CFAR threshold calculation output BRAM module. The order in which the CFAR threshold output BRAM module writes data is column-first. The data writing order is as follows: Figure 8 shown.

[0089] S17: The Doppler CFAR decision threshold is written into the DDR memory.

[0090] Specifically, after the CFAR threshold calculation output BRAM module receives M*K data, it first waits for the MTD output BRAM module to write all data into the DDR memory. Then, the M*K Doppler dimension CFAR thresholds are read row-first. The data reading order is as follows: Fig. 9 As shown. The read data is sent to the DDR write module. The DDR write module writes the received data into the Doppler dimension CFAR threshold storage area in the DDR memory. The writing order is distance dimension first. Specifically, K distance unit data is written to each Doppler unit, and M Doppler unit data is written in total. The data writing order is as follows: Figure 6 shown.

[0091] S18: Repeat the above steps S11 to S17 until the data processing of one CPI is completed.

[0092] Specifically, after processing from S11 to S17, the MTD operation of M*K target units and the Doppler dimension CFAR threshold calculation are completed. The DDR read module switches the read first address to the address corresponding to the target unit whose distance unit count increases by K and whose Doppler unit count is 0. Similarly, the signal processing is completed using the same processing flow from S11 to S17. Repeat the operation multiple times until the data of all distance units in a CPI are processed.

[0093] Step 2: Calculate the distance dimension CFAR decision threshold and make CFAR decisions, refer to Figure 5 The signal transmission path involved in step 2 and the modules involved in the operation.

[0094] S21: DDR read module reads MTD result;

[0095] First, the DDR read module sets the read first address to the address corresponding to the MTD data with a Doppler unit count of 0 and a distance unit count of 0. Then, the DDR read module reads the MTD operation result obtained in step 1 from the DDR memory. The reading order is distance dimension first. Specifically, N distance unit data is read on each Doppler unit, and a total of K Doppler unit data is read. The total data read is N*K. The data reading order is as follows: Figure 7 shown.

[0096] The DDR read module sends the read data to the CFAR threshold calculation input BRAM module. The CFAR threshold calculation input BRAM module saves the received data. In order to share the BRAM read and write control logic, the data is still written in the column direction first. The data writing order is as follows: Fig.10 shown.

[0097] S22: The DDR reading module reads the Doppler dimension CFAR threshold calculation result;

[0098] After the DDR read module completes the MTD read operation in S21, it immediately switches the first address to the Doppler dimension CFAR threshold data with the Doppler unit count of 0 and the distance unit count of 0. Then, the Doppler dimension CFAR threshold data is read preferentially along the distance dimension. Specifically, N distance unit data is read on each Doppler unit, and K Doppler unit data is read in total. The total data read is N*K. The data reading order is as follows: Figure 7 shown.

[0099] The DDR read module sends the read Doppler dimension CFAR threshold data to the Doppler dimension CFAR threshold input BAM module. The latter writes the received data in the column-first direction. The data writing order is as follows: Fig.10 shown.

[0100] S23: Calculate the distance dimension CFAR decision threshold;

[0101] After the CFAR threshold calculation input BRAM module receives the MTD data, it reads the MTD data in the column direction first. The data reading order is as follows: Fig.10 As shown. The read result is sent to the CFAR threshold calculation module. Since the radar distance dimension MTD result is stored in the BRAM along the column direction at this time, the CFAR threshold calculation module here realizes the calculation of the distance dimension CFAR decision threshold.

[0102] S24: the distance dimension CFAR decision threshold is written into the CFAR threshold calculation output BRAM module;

[0103] After the distance dimension CFAR decision threshold calculation is completed, the data is transmitted to the CFAR threshold calculation output BRAM module. The CFAR threshold calculation output BRAM module stores the received data in column priority. The data writing order is as follows: Fig.10 shown.

[0104] After the CFAR threshold calculation output BRAM module and the Doppler dimension CFAR threshold input BRAM module receive data, the CFAR threshold calculation input BRAM module reads the MTD result by column priority, the Doppler dimension CFAR threshold input BRAM module reads the Doppler dimension CFAR decision threshold by column priority, and the CFAR threshold calculation output BRAM module reads the distance dimension CFAR decision threshold by column priority. The data reading order is as follows: Fig.10 As shown. The CFAR decision module receives the above three output signals at the same time, and performs a certain operation on the off-dimension CFAR decision threshold and the Doppler dimension CFAR decision threshold to obtain the CFAR decision threshold. The MTD result is compared with the CFAR decision threshold to obtain the CFAR decision result. The operation type here is not unique, and can be averaging, taking the larger number, taking the smaller number, etc. It can be flexibly selected according to actual needs.

[0105] S25: The CFAR judgment result is saved to the CFAR result output BRAM module;

[0106] After the CFAR threshold calculation module obtains the CFAR decision result, it sends the CFAR decision result, the range coordinates and Doppler coordinates of the corresponding target unit, and the MTD amplitude to the CFAR result output BRAM module.

[0107] After the CFAR result output BRAM receives the CFAR judgment result, when the judgment is successful, the distance bit coordinates and Doppler dimension coordinates of the corresponding unit and the MTD amplitude are saved. Here, the data can be written into the BRAM in sequence. When the number of data output by the CFAR judgment module reaches N*K, all the saved CFAR judgment result information is read and sent to the DDR write module.

[0108] S26: Write the CFAR decision result into the DDR memory;

[0109] After receiving the CFAR judgment result, the DDR writing module writes it into the memory area of ​​the DDR memory for storing the CFAR judgment result. Since the CFAR judgment result is one-dimensional data, the writing method can be sequential writing.

[0110] S27: Repeat the above operation until the data processing of one CPI is completed.

[0111] After completing the operations from S21 to S26, the first address is set to the first address corresponding to the target unit whose Doppler unit count increases by K and whose distance unit count is 0. Restarting the operations from S21 to S26, the distance dimension CFAR threshold calculation and CFAR decision operation of N*K target units can be performed in the same way. This process is repeated until the distance dimension CFAR threshold calculation and CFAR decision operation of all N*M target units are completed.

[0112] In the present invention, the "DDR read interface" and "DDR write interface" modules realize the data interaction function between FPGA and DDR memory. At present, some FPGA chips have integrated MPU. Such devices support data interaction between FPGA-side logic resources and DDR memory on the MPU side through DMA. Therefore, for such devices, replacing the DDR read and write interface with a DMA controller interface can also achieve the purpose of the invention.

[0113] 1. The present invention organically combines the implementation of MTD with the implementation of CFAR, and fully utilizes the dimensional characteristics of each operation. The present invention designs a BRAM cache module between the memory read-write module and each computing module, and changes the BRAM cache read-write order when each BRAM cache module reads and writes data. This ensures that the computing module can obtain data of the correct dimension, and at the same time makes the DDR memory read and write sequentially as much as possible, thereby reducing the performance problems caused by DDR cross-page reading and writing.

[0114] Second, the present invention uses the same one-dimensional CFAR threshold calculation module, and through the design of the scheduling system method, successively inputs the Doppler dimension MTD result and the distance dimension MTD result into it, thereby successively calculating the Doppler dimension CFAR threshold and the distance dimension CFAR threshold. Finally, the threshold results of the two calculations are combined to realize the two-dimensional CFAR judgment.

[0115] In terms of the data interaction mode of each radar signal processing module, compared with the solution in the background technology based on matrix block storage to improve the reading and writing efficiency of DDR memory, this solution has two advantages.

[0116] First, the storage method of radar signal data in DDR is exactly the same as the conventional solution. Therefore, the design is simpler and can maximize the use of existing programs. Specifically, when the PC module writes data to the DDR memory, it can write according to the conventional solution without designing complex address jump logic. When the data upload module reads the processing results of each stage of radar signal processing, there is no need for address jump, which simplifies the design;

[0117] Secondly, the present invention can theoretically achieve higher DDR read and write efficiency. For comparison, various conditions are set to maintain the same scenario as in the document "Wu Qinwen. High-efficiency matrix transposition method based on FPGA and DDR [J]. Modern Radar, 2017, 39(04): 34-40+44." Specifically, the scenario is set as a 128-row 128-column matrix that is written in priority order along the distance dimension (row) and then read in priority order along the Doppler dimension (column). Keep all performance indicators of the DDR3 memory exactly the same. Keep the read and write efficiency calculation method exactly the same. Assume that the amount of data in each target unit in the matrix is ​​the same as the amount of data read and written in a burst of the DDR memory. Based on the above conditions, the theoretical read and write efficiency E of the present invention is:

[0118]

[0119] Here N=128. The theoretical read-write efficiency of the present invention is related to the value of K. The specific relationship is shown in Table 1. It can be seen that even when K=8, the theoretical read-write efficiency of this solution has exceeded the solution based on matrix block storage to improve the read-write efficiency of DDR memory in the background technology. Although the present invention requires additional consumption of BRAM resources. However, when the K value is not large, the resource consumption is completely acceptable. In actual engineering applications, the K value can be controlled to make a trade-off between DDR read-write efficiency and BRAM resource consumption.

[0120] Table 1: Relationship between BRAM memory column number K and DDR theoretical read / write efficiency E

[0121] K 8 16 32 E 77.5％ 86.7％ 92.1％

[0122] In terms of the implementation of CFAR, compared with the current two-dimensional CFAR threshold calculation in radar signal processing, the reference unit data is read in two dimensions at the same time and the decision threshold is calculated. This solution uses the one-dimensional CFAR threshold calculation module twice to obtain a two-dimensional CFAR decision threshold. At the same time, it has the advantages of low computing resource consumption and simple implementation of one-dimensional CFAR and detection performance close to that of two-dimensional CFAR.

[0123] The present invention is currently mainly used in low-altitude surveillance radars, which can be deployed in key locations to perform anti-UAV tasks.

[0124] The present invention implements the MTD and CFAR parts in radar signal processing based on FPGA. Generally, FPGA is suitable for connecting with chips such as ADC and DAC to act as a digital front end. With the help of the present invention, FPGA can implement radar signal processing algorithms. The radar system can use only one FPGA as the main control chip, without adding other chips such as DSP to realize signal processing. It helps to reduce the cost of the radar system. In particular, the implementation method of the present invention has the characteristics of small usage of FPGA logic resources, high read and write efficiency of DDR memory, and high storage space utilization. The present invention can realize high-performance radar signal processing when the amount of FPGA resources is relatively small. It helps to reduce the cost of the radar system. At the same time, when the radar detects targets such as low-altitude flying drones, it often faces strong ground clutter interference. Since the present invention adopts a two-dimensional CFAR target detection scheme, it has the characteristics of strong anti-ground clutter performance, so the present invention is more suitable for detecting low-altitude flying drones.

[0125] The present invention can be applied not only to low-altitude surveillance radars against UAVs, but also to perimeter security radars in scenarios such as airports and border stations. The present invention has a strong anti-ground clutter performance, so that the present invention still has good performance when facing the application scenario of detecting ground targets.

[0126] The radar signal processing method involved in the present invention can enable the radar system to achieve higher detection performance at a lower cost. The present invention is suitable for application in low-altitude surveillance radars and has broad market prospects.

Claims

1. A signal processing method based on the combination of MTD and CFAR, characterized in that: The method comprises the following steps: Step 1: Calculate the MTD and Doppler CFAR decision threshold, including the following steps: S11: The DDR read module reads the first PC result, and the MTD inputs the BRAM module to save the data; S12: The MTD input BRAM module reads the data and transmits it to the FFT module for operation; S13: The FFT module outputs the operation result and passes it to the MTD output BRAM module and the CFAR threshold input BRAM module; S14: MTD results are written into DDR memory; S15: The CFAR threshold calculation module calculates the CFAR decision threshold; S16: writing the Doppler dimension CFAR decision threshold into the CFAR threshold calculation output BRAM module; S17: Doppler CFAR decision threshold is written into DDR memory; S18: Repeat the above steps S11 to S17 until the data processing of one CPI is completed. Step 2: Calculate the distance dimension CFAR decision threshold and make a CFAR decision, specifically including the following steps: S21: DDR read module reads MTD result; S22: The DDR reading module reads the Doppler dimension CFAR threshold calculation result; S23: Calculate the distance dimension CFAR decision threshold; S24: the distance dimension CFAR decision threshold is written into the CFAR threshold calculation output BRAM module; S25: The CFAR judgment result is saved to the CFAR result output BRAM module; S26: Write the CFAR decision result into the DDR memory; S27: Repeat the above operation until the data processing of one CPI is completed.

2. The signal processing method based on the combination of MTD and CFAR according to claim 1, characterized in that: In the DDR memory, the structure of data stored in the PC module and the MTD module is a two-dimensional structure; the data of a target unit in the radar signal is represented by a rectangle, which stores data of M Doppler units and N distance units, and the total number of target units is M*N; the numbers in the rectangle represent the address where the data is stored: Doppler dimension priority access means that the data of all Doppler units in a certain distance unit is accessed first; then switch to the new distance unit and read the data of all Doppler units in the new distance unit; Each BRAM module mainly includes a memory built by the BlockMemory resources inside the FPGA, and the corresponding read-write control logic; in each BRAM module, the data is stored in two dimensions, and the data of a target unit in the radar signal is represented by a rectangle, and the number in the rectangle represents the address where the data is stored; a total of M rows and K columns of data are stored, and the total number of target units is M*K; row-priority access means giving priority to accessing the data of all columns in a row, and then switching to a new row to access all the data in the new row; the data storage depth of all BRAM modules is the larger number between N*K and M*K.

3. The signal processing method based on the combination of MTD and CFAR according to claim 2, characterized in that: S11 is specifically as follows: the DDR reading module sets the first reading address to the address corresponding to the target unit with a distance dimension count of 0 and a Doppler dimension count of 0 in the PC result storage area; the DDR reading module reads M*K PC operation results from the DDR memory and saves them to the MTD input BRAM memory; the reading direction is distance dimension priority reading; specifically, K distance unit data is read from each Doppler unit, and M Doppler unit data is read in total; The DDR read module transmits the read data to the MTD input BRAM module; when the MTD input BRAM module saves the PC data output by the DDR read module, it writes the data into the storage space in a row-first order; S12 is specifically as follows: after the MTD input BRAM module stores M*K PC data, the stored data is read out and output to the FFT operation module; specifically: the reading order is to read along the column priority direction; after reading M data of a column, switch to the next column and continue to read M data along the column priority direction; and so on, until all M*K data are read; the FFT module performs FFT operation on K frames of data in total, and each frame has M data; S13 is specifically as follows: after the FFT performs K complete operations, M*K MTD operation results are simultaneously sent to the MTD output BRAM module and the CFAR threshold input BRAM module; the order in which the MTD output BRAM module and the CFAR threshold input BRAM module write data is column-first writing; S14 is specifically as follows: after receiving M*K data, the MTD output BRAM module reads the data and sends it to the DDR write module; the MTD output BRAM module reads the data in the order of row priority; after receiving the data sent by the MTD output BRAM module, the DDR write module writes the data into the MTD result storage area in the DDR memory; the order of writing data into the DDR memory is distance dimension priority; specifically, K distance unit data is written to each Doppler unit, and M Doppler unit data is written in total; S15 is specifically as follows: after the CFAR threshold input BRAM module receives M*K data, it reads the data in a column-by-column priority manner; the read data is transmitted to the CFAR threshold calculation module to perform calculations; the CFAR threshold calculation module calculates the Doppler dimension CFAR decision threshold corresponding to the current M*K MTD results according to the rules of the CFAR algorithm, and the Doppler dimension CFAR decision threshold is calculated at this time; S16 is specifically as follows: the CFAR threshold calculation module sends the Doppler dimension CFAR decision threshold to the CFAR threshold calculation output BRAM module; the order in which the CFAR threshold output BRAM module writes data is column-first writing; S17 is specifically as follows: after the CFAR threshold calculation output BRAM module receives M*K data, it first waits for the MTD output BRAM module to write all the data into the DDR memory; then the M*K Doppler dimension CFAR thresholds are read in row priority; the read data is sent to the DDR write module; the DDR write module writes the received data into the Doppler dimension CFAR threshold storage area in the DDR memory; the writing order is distance dimension priority; specifically, K distance unit data are written on each Doppler unit, and M Doppler unit data are written in total; S18: Repeat the above steps S11 to S17 until the data processing of one CPI is completed.

4. The signal processing method based on the combination of MTD and CFAR according to claim 2, characterized in that: S21 is specifically as follows: first, the DDR reading module sets the reading first address to the address corresponding to the MTD data with the Doppler unit count being 0 and the distance unit count being 0; then, the DDR reading module reads the MTD operation result obtained in step 1 from the DDR memory; the reading order is distance dimension priority; specifically, N distance unit data is read on each Doppler unit, and K Doppler unit data is read in total; the total data reading amount is N*K; The DDR read module sends the read data to the CFAR threshold calculation input BRAM module; the CFAR threshold calculation input BRAM module saves the received data; in order to share the BRAM read and write control logic, it is still written in the column direction first; S22 is specifically as follows: after the DDR reading module completes the MTD reading operation in S21, it immediately switches the first address to the Doppler dimension CFAR threshold data with the Doppler unit count being 0 and the distance unit count being 0; then, the Doppler dimension CFAR threshold data is preferentially read along the distance dimension; specifically, N distance unit data is read on each Doppler unit, and K Doppler unit data is read in total, and the total data reading amount is N*K; The DDR read module sends the read Doppler dimension CFAR threshold data to the Doppler dimension CFAR threshold input BAM module; the latter writes the received data in the column-first direction; S23 is specifically as follows: after the CFAR threshold calculation input BRAM module receives the MTD data, the MTD data is preferentially read along the column direction; and the reading result is sent to the CFAR threshold calculation module; S24 is specifically as follows: after the distance dimension CFAR decision threshold calculation is completed, the data is transmitted to the CFAR threshold calculation output BRAM module; the CFAR threshold calculation output BRAM module stores the received data in column priority; After the CFAR threshold calculation output BRAM module and the Doppler dimension CFAR threshold input BRAM module receive data, the CFAR threshold calculation input BRAM module reads the MTD result by column priority, the Doppler dimension CFAR threshold input BRAM module reads the Doppler dimension CFAR decision threshold by column priority, and the CFAR threshold calculation output BRAM module reads the distance dimension CFAR decision threshold by column priority; the CFAR decision module receives the above three output signals at the same time, calculates the distance dimension CFAR decision threshold with the Doppler dimension CFAR decision threshold to obtain the CFAR decision threshold; compares the MTD result with the CFAR decision threshold to obtain the CFAR decision result; S25 is specifically as follows: after the CFAR threshold calculation module obtains the CFAR judgment result, the CFAR judgment result, the range coordinates and Doppler coordinates of the corresponding target unit, and the MTD amplitude are sent to the CFAR result output BRAM module; After the CFAR result output BRAM receives the CFAR judgment result, when the judgment is successful, the distance bit coordinates and Doppler dimension coordinates of the corresponding unit and the MTD amplitude are saved; here, the data can be written into the BRAM in sequence; when the number of data output by the CFAR judgment module reaches N*K; all the saved CFAR judgment result information is read and sent to the DDR write module; S26 specifically includes: after receiving the CFAR judgment result, the DDR writing module writes it into the memory area storing the CFAR judgment result in the DDR memory; S27 is specifically as follows: after completing the operations from S21 to S26, the first address is set to the first address corresponding to the target unit whose Doppler unit count is increased by K and whose distance unit count is 0; restarting the operations from S21 to S26, the distance-dimensional CFAR threshold calculation and CFAR decision operation of the N*K target units can also be performed; and so on, until the distance-dimensional CFAR threshold calculation and CFAR decision operation of all N*M target units are completed.

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