Data reading method, storage device and computer readable storage medium

Abstract

The invention discloses a data reading method, a storage device and a computer readable storage medium. The method is applied to the storage device, and the storage device comprises a volatile memory and a non-volatile memory. The method comprises the following steps: acquiring a logic address of data to be read; corresponding first serial numbers are determined based on the logic addresses, each first serial number corresponds to a logic address interval, and all the first serial numbers correspond to all the logic addresses; determining a corresponding storage node based on the first serial number, wherein the storage node is located in a volatile memory; and in response to the mapping information corresponding to the logic address in the storage node, obtaining the to-be-read data stored in the physical address corresponding to the logic address based on the mapping information. By means of the mode, the L2P data obtaining duration of data reading can be shortened, and the reading performance of the storage device is improved.

Description

Technical Field

[0001] The present application relates to the field of storage, and in particular to a data reading method, a storage device, and a computer-readable storage medium. Background Art

[0002] With the development of science and technology, data storage has become an increasingly important application technology. The read and write performance of data is one of the key factors to measure storage devices. When reading data, due to the mapping relationship between LBA (Logical Block Address) and PPA (Physical Page Address) (L2P, Logical Address To Physical Address), and the L2P of the storage device will be stored in the non-volatile memory. When reading data, the controller will read the L2P from the non-volatile memory to the volatile memory, and then use the L2P to read the data. This method of obtaining L2P data takes a long time. Summary of the invention

[0003] The main purpose of this application is to provide a data reading method, a storage device and a computer-readable storage medium, which can solve the technical problem that it takes a long time to obtain L2P data.

[0004] In order to solve the above technical problems, the first technical solution adopted by the present application is: to provide a data reading method. The method is applied to a storage device, which includes a volatile memory and a non-volatile memory. The method includes obtaining a logical address of the data to be read; determining a corresponding first serial number based on the logical address, each first serial number corresponds to a logical address interval, and all first serial numbers correspond to all logical addresses; determining a corresponding storage node based on the first serial number, and the storage node is located in the volatile memory; in response to the presence of mapping information corresponding to the logical address in the storage node, obtaining the data to be read stored in the physical address corresponding to the logical address based on the mapping information.

[0005] To solve the above technical problems, the second technical solution adopted by the present application is to provide a storage device. The storage device includes a memory and a processor, the memory includes a non-volatile memory for storing a computer program and sequence data, and the processor includes a volatile memory for executing a computer program to implement the method described in the first technical solution.

[0006] To solve the above technical problems, the third technical solution adopted by the present application is to provide a computer-readable storage medium. The computer-readable storage medium stores program data and can be executed by a processor to implement the method described in the first technical solution.

[0007] The beneficial effects of the present application are: by obtaining the logical address of the data to be read, determining the first serial number corresponding to the logical address, further determining the corresponding storage node by the first serial number, and the storage node is located in the volatile memory, in response to the presence of mapping information corresponding to the logical address in the storage node, obtaining the data to be read stored in the physical address corresponding to the logical address based on the mapping information. In addition, all the first serial numbers correspond to all the logical addresses, and through the above method, for any logical address, it is possible to quickly determine the storage location of the mapping relationship of the logical address in the volatile memory, and directly obtain the L2P mapping relationship of the data to be read from the volatile memory, thereby reducing the time for obtaining the L2P data of the read data and improving the reading performance of the storage device. At the same time, by dividing all logical addresses into intervals and then using the first serial number to correspond to each address interval, the length of the first serial number table is reduced, and each node corresponds to an address interval instead of a single address, thereby reducing the volatile memory space occupied when the serial number table can correspond to all logical addresses. The reduced volatile memory space enables the volatile memory to store more mapping information, thereby improving the hit rate of the logical address during the reading process and further improving the reading performance of the storage device. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0009] Figure 1 It is a flowchart of the first embodiment of the data reading method of the present application;

[0010] Figure 2 It is a flow chart of the second embodiment of the data reading method of the present application;

[0011] Figure 3 It is a flowchart of the third embodiment of the data reading method of the present application;

[0012] Figure 4 is a flowchart of a fourth embodiment of the data reading method of the present application;

[0013] Figure 5 is a flowchart of a fifth embodiment of the data reading method of the present application;

[0014] Figure 6 It is a schematic diagram of a process in which mapping information is stored in a volatile memory when data is written;

[0015] Figure 7It is a schematic diagram of a process of obtaining mapping information from a volatile memory when reading data;

[0016] Figure 8 is a schematic structural diagram of a first embodiment of a storage device of the present application;

[0017] Fig. 9 It is a structural diagram of the first embodiment of the computer-readable storage medium of the present application. DETAILED DESCRIPTION

[0018] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0019] The terms "first", "second", etc. in this application are used to distinguish different objects, rather than to describe a specific order. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not limited to the listed steps or units, but optionally includes steps or units that are not listed, or optionally includes other steps or units inherent to these processes, methods, products or devices.

[0020] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0021] Reference Figure 1 , Figure 1 This is a flow chart of the first embodiment of the data reading method of the present application. The method is applied to a storage device, the storage device includes a volatile memory and a non-volatile memory, and the method includes the following steps:

[0022] S11: Obtain the logical address of the data to be read.

[0023] When data needs to be read, the controller will obtain the logical address corresponding to the data. When the data is stored in the storage device, the mapping relationship between the logical address and the physical address corresponding to the data will also be saved to facilitate finding the data. Therefore, when reading, it is necessary to find the corresponding mapping relationship based on the logical address.

[0024] S12: Determine a corresponding first serial number based on the logical address.

[0025] Each first serial number corresponds to a logical address interval, and all first serial numbers correspond to all logical addresses. Dividing all logical addresses by the first serial numbers facilitates rapid search for the logical address interval corresponding to the logical address of the data to be read.

[0026] Specifically, the first serial number can be obtained by dividing all logical addresses into multiple address intervals according to the logical address sequence and the preset number of intervals, and then sorting and numbering each address interval according to the address sequence. The number of each address interval is different, and the number of each address interval is equivalent to the first serial number of this application. The size of the preset number of intervals can be adjusted according to the size of the volatile memory space used. S13: Determine the corresponding storage node based on the first serial number.

[0027] The storage node is located in a volatile memory. The storage node storing the mapping information of the corresponding logical address interval is determined according to the first sequence number. The storage node can be a multi-depth structure node to store the mapping information of multiple groups of data.

[0028] S14: In response to the presence of mapping information corresponding to the logical address in the storage node, acquiring the to-be-read data stored in the physical address corresponding to the logical address based on the mapping information.

[0029] The mapping information in the storage node is traversed, and if there is mapping information corresponding to the logical address of the data to be read, the mapping information is obtained for reading the data at the logical address.

[0030] By obtaining the logical address of the data to be read, determining the first sequence number corresponding to the logical address, further determining the corresponding storage node by the first sequence number, and the storage node is located in the volatile memory, in response to the presence of mapping information corresponding to the logical address in the storage node, obtaining the data to be read stored in the physical address corresponding to the logical address based on the mapping information. In addition, all the first sequence numbers correspond to all the logical addresses. Through the above method, for any logical address, it is possible to quickly determine the storage location of the mapping relationship of the logical address in the volatile memory, and directly obtain the L2P mapping relationship of the data to be read from the volatile memory, thereby reducing the time for obtaining the L2P data when reading the data, and improving the reading performance of the storage device. At the same time, by dividing all the logical addresses into intervals, and then using the first sequence number to correspond to each address interval, the length of the first sequence number table is reduced, each node corresponds to an address interval, instead of corresponding to an address, reducing the volatile memory space occupied when the sequence number table can correspond to all logical addresses, and the reduced volatile memory space enables the volatile memory to store more mapping information, thereby improving the hit rate of the logical address during the reading process, and further improving the reading performance of the storage device. In one embodiment, when there is no mapping information corresponding to the logical address in the storage node corresponding to the logical address, the mapping information corresponding to the logical address is obtained from the non-volatile memory according to the conventional process, and the data to be read stored in the physical address corresponding to the logical address is obtained based on the mapping information.

[0031] Reference Figure 2 , Figure 2 This is a flow chart of the second embodiment of the data reading method of the present application. The method is a further extension of step S13, and includes the following steps:

[0032] S21: Using the first sequence number to perform a modulo operation on the table length of the first sequence number table to determine that the first sequence number corresponds to a node in the first sequence number table.

[0033] After all logical addresses are divided into a number of logical address intervals, and each logical address interval corresponds to a first sequence number, a first sequence number table of a preset length is set. The first sequence number table has nodes, and each node represents a length of 1. The node position corresponding to the first sequence number can be determined by taking a modulus of the table length of the first sequence number table using the first sequence number. Each node of the first sequence number table is used to store a second sequence number, and the second sequence number corresponds to a storage node one by one. A node stores only one second sequence number, and the second sequence number stored in each node is different.

[0034] S22: Obtain the second sequence number recorded in the node.

[0035] After the node is determined according to the first sequence number, the second sequence number in the node can be obtained.

[0036] S23: Determine a corresponding storage node based on the second sequence number.

[0037] Since the second serial number corresponds to the storage node one-to-one, the storage node storing the mapping information can be found according to the second serial number.

[0038] Through the above method, the first serial number table can traverse all logical address intervals, so that during the data reading process, it can quickly locate the location where the logical address mapping information should be stored in the volatile memory according to the logical address, thereby traversing and realizing the rapid acquisition of the mapping information of the logical address.

[0039] Reference Figure 3 , Figure 3 This is a flow chart of the third embodiment of the data reading method of the present application. This method is a further extension of the above embodiment, and includes the following steps:

[0040] S31: During the data writing process, in response to updating mapping information corresponding to the written data to the non-volatile memory, a corresponding first serial number is determined based on a logical address of the written data.

[0041] In the process of writing data, the mapping information corresponding to the data will also be saved as the basis for subsequent data reading. The usual saving process is that the mapping relationship of the written data will be stored in the volatile memory first, and when the number reaches a certain level, all the mapping relationships stored in the volatile memory will be written to the non-volatile memory for storage.

[0042] In response to writing the mapping information into the non-volatile memory, the method of this embodiment is executed, and a corresponding first serial number is determined according to a logical address corresponding to the mapping information.

[0043] S32: Using the first sequence number to perform a modulo operation on the table length of the first sequence number table to determine that the first sequence number corresponds to a node in the first sequence number table.

[0044] All logical addresses are divided into a number of logical address intervals, and each logical address interval corresponds to a first serial number. The first serial number table of a preset length has a plurality of nodes, and each node represents a length of 1. The node position corresponding to the first serial number can be determined by taking the table length of the first serial number table modulo the first serial number. Each node of the first serial number table is used to store a second serial number, and the second serial number corresponds to a storage node one by one. A node stores only one second serial number, and the second serial number stored in each node is different.

[0045] S33: In response to the second sequence number being stored in the node, obtaining the second sequence number recorded in the node.

[0046] S34: Determine a corresponding storage node based on the second serial number.

[0047] S35: Storing mapping information corresponding to the written data in the storage node.

[0048] Determine whether the node stores the second serial number, if the second serial number exists, obtain the second serial number, and determine the unique corresponding storage node based on the second serial number. Fill the mapping information of the logical address into the storage node, and complete the storage of the mapping information in the volatile memory.

[0049] The mapping information may be compressed and then stored in the volatile memory to save storage space of the volatile memory.

[0050] In one embodiment, the storage node stores the first serial number corresponding to the stored mapping relationship. After the storage node stores the mapping relationship, the first serial number corresponding to the mapping relationship is also stored in the storage node, so as to perform subsequent data comparison and distinguish the mapping relationships of different address intervals. The storage node can also store information such as the number of groups of the current mapping relationship, the starting physical address, the starting logical address, and the L2P continuous length.

[0051] In this embodiment, by using the first serial number to perform modulo operation on the table length of the first serial number table to determine the operation of the nodes in the first serial number table, the space occupied by the first serial number table in the volatile memory can be further reduced. The reduced volatile memory space enables the volatile memory to store more mapping information, thereby improving the hit rate of the logical address during the reading process and further improving the reading performance of the storage device.

[0052] Reference Figure 4 , Figure 4 This is a flow chart of the fourth embodiment of the data reading method of the present application. The method is a further extension of step S35, and includes the following steps:

[0053] S41: Obtain the first sequence number stored in the storage node.

[0054] S42: In response to the stored first sequence number being the same as the first sequence number corresponding to the mapping information to be stored, the mapping information is stored in the storage node; in response to the stored first sequence number being different from the first sequence number corresponding to the mapping information to be stored, after deleting the mapping information stored in the storage node, the mapping information to be stored is stored in the storage node.

[0055] The mapping information to be stored is the mapping information corresponding to the written data.

[0056] After the storage node is determined, when the mapping information of the written data is filled into the storage node, if no information has been stored in the storage node, the mapping information of the written data can be directly filled in. If the storage node already has the mapping information stored, obtain the first serial number corresponding to the mapping information stored in the storage node, and determine whether the first serial number of the mapping information of the data written this time is the same as it. If they are the same, it proves that they are the mapping data of the same logical address interval and can be directly stored. If they are not the same, it means that the mapping relationship that has been stored is not the mapping data of the same logical address interval as the mapping relationship of the data written this time. After deleting the data stored in the storage node, fill in the mapping information of the data written this time, and also fill in the first serial number corresponding to the mapping information of the data written this time.

[0057] When the first serial number of the mapping information of the data written this time is the same as the first serial number of the mapping information stored in the storage node, it means that the two are mapping information under the same logical address, and the mapping relationship between the two may include different mapping information for the same logical address.

[0058] In one embodiment, in response to the existence of a first logical address in the mapping information to be stored, the mapping information of the first logical address in the mapping information to be stored is used to replace the mapping information of the first logical address in the storage node; in response to the existence of a second logical address in the mapping information to be stored, the mapping information of the second logical address in the mapping information to be stored is stored in the free space in the storage node; wherein the first logical address is a logical address that exists in both the mapping information to be stored and the mapping information already stored in the storage node, and the second logical address is a logical address that exists in the mapping information to be stored but does not exist in the mapping information already stored in the storage node.

[0059] When there is mapping information with the same logical address as the mapping information to be stored in the storage node, the mapping information in the mapping information to be stored shall prevail, and the mapping information of the logical address in the mapping information to be stored shall be used to replace the mapping information in the storage node. The mapping information of the logical address that only exists in the mapping information to be stored is directly filled into the free storage position in the storage node. If there is still mapping information that only exists in the stored mapping information, it does not need to be changed.

[0060] Reference Figure 5 , Figure 5 This is a flow chart of the fifth embodiment of the data reading method of the present application. This method is a further extension of the above embodiment, and includes the following steps:

[0061] S51: During the data writing process, in response to updating mapping information corresponding to the written data to the non-volatile memory, a corresponding first serial number is determined based on a logical address of the written data.

[0062] In the process of writing data, the mapping information corresponding to the data will also be saved as the basis for subsequent data reading. The usual saving process is that the mapping relationship of the written data will be stored in the volatile memory first, and when the number reaches a certain level, all the mapping relationships stored in the volatile memory will be written to the non-volatile memory for storage.

[0063] In response to writing the mapping information into the non-volatile memory, the method of this embodiment is executed, and a corresponding first serial number is determined according to a logical address corresponding to the mapping information.

[0064] S52: Using the first sequence number to perform a modulo operation on the table length of the first sequence number table to determine that the first sequence number corresponds to a node in the first sequence number table.

[0065] All logical addresses are divided into a number of logical address intervals, and each logical address interval corresponds to a first serial number. The first serial number table of a preset length has a plurality of nodes, and each node represents a length of 1. The node position corresponding to the first serial number can be determined by taking the table length of the first serial number table modulo the first serial number. Each node of the first serial number table is used to store a second serial number, and the second serial number corresponds to a storage node one by one. A node stores only one second serial number, and the second serial number stored in each node is different.

[0066] S53: In response to the second sequence number not being stored in the node, storing the mapping information in an idle storage node.

[0067] S54: Store the second sequence number corresponding to the storage node in the node whose first sequence number corresponds to the first sequence number table.

[0068] Determine whether the second sequence number is stored in the node. If the second sequence number does not exist, find a storage node that has not been stored yet, store the mapping information of the logical address in it, and then store the second sequence number corresponding to the storage node in the node of the first sequence number table corresponding to the first sequence number, so as to facilitate the determination of the second sequence number based on the first sequence number when reading. After the storage of the second sequence number is completed, the storage of the mapping information in the volatile memory is completed.

[0069] The mapping information may be compressed and then stored in the volatile memory to save storage space of the volatile memory.

[0070] In one embodiment, the storage node stores the first serial number corresponding to the stored mapping relationship. After the storage node stores the mapping relationship, the first serial number corresponding to the mapping relationship is also stored in the storage node, so as to perform subsequent data comparison and distinguish the mapping relationships of different address intervals. The storage node can also store information such as the number of groups of the current mapping relationship, the starting physical address, the starting logical address, and the L2P continuous length.

[0071] Reference Figure 6 , Figure 6 The invention is a flow chart showing that mapping information is stored in a volatile memory when data is written.

[0072] In the case of host writing, when the mapping information of the write data is updated to the non-volatile memory, the first serial number corresponding to the logical address range is determined according to the logical address of the mapping information, and then the mapping information is stored in an idle storage node on the volatile memory, and the second serial number uniquely corresponding to the storage node is stored in the node of the first serial number table corresponding to the first serial number, thereby realizing the correspondence between the logical address and the mapping information.

[0073] Reference Figure 7 , Figure 7 A schematic diagram of a process of obtaining mapping information from a volatile memory when reading data.

[0074] In the case of host reading, the logical address of the data to be read is obtained, the first serial number corresponding to the logical address is determined, and the second serial number stored in the corresponding first serial number table node is further determined by the first serial number, so as to determine the storage node storing the mapping information according to the second serial number. The storage node is traversed to find the mapping information corresponding to the logical address to realize data reading.

[0075] like Figure 8 As shown, Figure 8 This is a schematic structural diagram of the first embodiment of the storage device of the present application.

[0076] The storage device includes a processor 110 and a memory 120 .

[0077] The processor 110 controls the operation of the storage device, and the processor 110 may also be referred to as a CPU (Central Processing Unit). The processor 110 may be an integrated circuit chip having the ability to process a signal sequence. The processor 110 may also be a general-purpose processor, a digital signal sequence processor (DSP), an application-specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, a discrete gate or transistor logic device, a discrete hardware component. The general-purpose processor may be a microprocessor or the processor may also be any conventional processor, etc.

[0078] The memory 120 includes a non-volatile memory for storing computer programs and sequence data required for the processor 110 to operate.

[0079] The processor 110 includes a volatile memory for executing a computer program to implement the method provided by any embodiment and possible combination of the aforementioned data reading method of the present application.

[0080] The storage device may only include a storage device, the storage device includes a processor 110 and a memory 120, the processor 110 includes a volatile memory, the memory 120 includes a non-volatile memory, and the processor 110 establishes a communication connection with the memory 120 to implement the method provided by any embodiment and possible combination of the aforementioned data reading method of the present application.

[0081] The storage device may also include a host side and a storage device, the host side includes a processor 110, the storage device includes a memory 120, the processor 110 includes a volatile memory, the memory 120 includes a non-volatile memory, and the processor 110 establishes a communication connection with the memory 120 to implement the method provided by any embodiment and possible combination of the aforementioned data reading method of the present application.

[0082] like Fig. 9 As shown, Fig. 9 This is a schematic diagram of the structure of the first embodiment of the computer-readable storage medium of the present application.

[0083] An embodiment of a readable storage medium of the present application includes a memory 210, and the memory 210 stores program data. When the program data is executed, the method provided by any embodiment and possible combination of the data reading method of the present application is implemented.

[0084] The memory 210 may include a medium that can store program instructions, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, or it may be a server that stores the program instructions. The server may send the stored program instructions to other devices for execution, or it may execute the stored program instructions itself.

[0085] In summary, the present application obtains the logical address of the data to be read, determines the first serial number corresponding to the logical address, further determines the corresponding storage node through the first serial number, and the storage node is located in the volatile memory, and in response to the mapping information corresponding to the logical address in the storage node, obtains the data to be read stored in the physical address corresponding to the logical address based on the mapping information. In addition, all the first serial numbers correspond to all the logical addresses. Through the above method, for any logical address, it is possible to quickly determine the storage location of the mapping relationship of the logical address in the volatile memory, and directly obtain the L2P mapping relationship of the data to be read from the volatile memory, thereby reducing the time for obtaining the L2P data and improving the reading performance of the storage device. At the same time, by dividing all logical addresses into intervals and then using the first serial number to correspond to each address interval, the length of the first serial number table is reduced, and each node corresponds to an address interval instead of a single address, thereby reducing the volatile memory space occupied when the serial number table can correspond to all logical addresses. The reduced volatile memory space enables the volatile memory to store more mapping information, thereby improving the hit rate of the logical address during the reading process and further improving the reading performance of the storage device.

[0086] In the several embodiments provided in this application, it should be understood that the disclosed methods and devices can be implemented in other ways. For example, the device implementation described above is only illustrative, for example, the division of modules or units is only a logical function division, and there may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed.

[0087] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the present embodiment.

[0088] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0089] If the integrated units in the above other embodiments are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions to enable a computer device (which can be a personal computer, server, or network device, etc.) or a processor (processor) to perform all or part of the steps of each implementation method of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk and other media that can store program codes.

[0090] The above are merely embodiments of the present application and are not intended to limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A data reading method, applied to a storage device, wherein the storage device includes a volatile memory and a non-volatile memory, characterized in that: The method comprises: Get the logical address of the data to be read; Determine a corresponding first serial number based on the logical address, each of the first serial numbers corresponds to a logical address interval, and all of the first serial numbers correspond to all of the logical addresses; Determining a corresponding storage node based on the first sequence number, where the storage node is located in the volatile memory; In response to the presence of mapping information corresponding to the logical address in the storage node, the to-be-read data stored in the physical address corresponding to the logical address is acquired based on the mapping information.

2. The method according to claim 1, characterized in that The method further comprises: In response to the absence of mapping information corresponding to the logical address in the storage node, the mapping information corresponding to the logical address is obtained from the non-volatile memory, and the to-be-read data stored in the physical address corresponding to the logical address is obtained based on the mapping information.

3. The method according to claim 1, characterized in that: The determining the corresponding storage node based on the first sequence number includes: Using the first sequence number to perform a modulo operation on the table length of the first sequence number table to determine that the first sequence number corresponds to a node in the first sequence number table, each of the nodes in the first sequence number table is used to store a second sequence number, and the second sequence number corresponds to the storage node one-to-one; Obtaining the second sequence number recorded in the node; The corresponding storage node is determined based on the second serial number.

4. The method according to claim 1, characterized in that The method further comprises: During data writing, in response to updating mapping information corresponding to the written data to the non-volatile memory, determining the corresponding first sequence number based on the logical address of the written data; Using the first sequence number to perform a modulo operation on the table length of the first sequence number table to determine that the first sequence number corresponds to a node in the first sequence number table, each of the nodes in the first sequence number table is used to store a second sequence number, and the second sequence number corresponds to the storage node one-to-one; In response to the second sequence number being stored in the node, acquiring the second sequence number recorded in the node; Determine the corresponding storage node based on the second sequence number; The mapping information corresponding to the write data is stored in the storage node.

5. The method according to claim 4, characterized in that The storage node stores the first sequence number corresponding to the stored mapping relationship.

6. The method according to claim 5, characterized in that The storing the mapping information in the storage node includes: Obtaining the first sequence number stored in the storage node; In response to the first sequence number that has been stored being the same as the first sequence number corresponding to the mapping information to be stored, storing the mapping information in the storage node; In response to the first sequence number that has been stored being different from the first sequence number corresponding to the mapping information to be stored, after deleting the mapping information stored in the storage node, storing the mapping information to be stored in the storage node; The mapping information to be stored is the mapping information corresponding to the written data.

7. The method according to claim 6, characterized in that In response to the first sequence number that has been stored being the same as the first sequence number corresponding to the mapping information to be stored, storing the mapping information in the storage node includes: In response to the mapping information to be stored having a first logical address, replacing the mapping information of the first logical address in the storage node with the mapping information of the first logical address in the mapping information to be stored; In response to the mapping information to be stored having a second logical address, storing the mapping information of the second logical address in the mapping information to be stored in an empty space in the storage node; Among them, the first logical address is a logical address that exists in both the mapping information to be stored and the mapping information stored in the storage node, and the second logical address is a logical address that exists in the mapping information to be stored but does not exist in the mapping information stored in the storage node.

8. The method according to claim 1, characterized in that: The method further comprises: During data writing, in response to updating mapping information corresponding to the written data to the non-volatile memory, determining the corresponding first sequence number based on the logical address of the written data; Using the first sequence number to perform a modulo operation on the table length of the first sequence number table to determine that the first sequence number corresponds to a node in the first sequence number table, each of the nodes in the first sequence number table is used to store a second sequence number, and the second sequence number corresponds to the storage node one-to-one; In response to the second sequence number not being stored in the node, storing the mapping information in an idle storage node; The second sequence number corresponding to the storage node is stored in the node whose first sequence number corresponds to the first sequence number table.

9. A storage device, characterized in that: The storage device comprises a memory and a processor, wherein the memory comprises a non-volatile memory for storing a computer program and sequence data, and the processor comprises a volatile memory for executing the computer program to implement the method according to any one of claims 1 to 8.

10. A computer-readable storage medium, characterized in that: Program data is stored and can be executed by a processor to implement the method according to any one of claims 1 to 8.

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