A storage address processing method and device
By using hash factor and offset factor to process address data in cache address mapping, the problem of frequent data conflicts in the prior art is solved, and the performance of cache and the balance of target indexes are improved.
Patent Information
- Application Number
- CN202411707498.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-26
- Publication Date
- 2025-04-22
- Estimated Expiration
- 2044-11-26
AI Technical Summary
When the prior art maps the physical address requested by the processor to the index of the cache address, it is easy to cause data conflicts and affect cache performance.
By obtaining the hash factor and offset factor of the first address data, the index part is processed using the preset hash matrix to obtain the preprocessed index, and then the preprocessed index is processed based on the offset factor to obtain the target index, thereby reducing the probability of data conflict.
This method can effectively reduce the probability of data conflict when data is stored in the cache, improve the performance of the cache, and improve the balance of the target index through hash factor and hash matrix.
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Figure CN119201779B_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of data processing technology, and in particular to a storage address processing method and device. Background Art
[0002] The processors of electronic devices (such as GPU, CPU, etc.) are generally configured with caches. The physical address carried in the request sent by the processor needs to be mapped to the index of the cache.
[0003] The cache address of data in the cache generally includes three parts: index, tag, and offset. When mapping the physical address requested by the processor to the index of the cache address, the related technology generally processes the physical address based on a hash algorithm (such as the XOR hash algorithm) to obtain the corresponding cache address index. This mapping method is prone to data conflicts. Summary of the invention
[0004] To this end, this application discloses the following technical solutions:
[0005] A first aspect of the present application provides a storage address processing method, comprising:
[0006] obtaining first address data;
[0007] performing a first processing on an index part of the first address data according to a preset hash matrix and a hash factor of the first address data to obtain a preprocessed index of the first address data, wherein the hash factor is obtained according to a label part of the first address data;
[0008] The pre-processed index is second-processed according to an offset factor of the first address data to obtain a target index of the first address data, wherein the offset factor is obtained according to a tag portion of the first address data.
[0009] Optionally, the method for obtaining the hash factor and the offset factor includes:
[0010] Selecting any N bits of data in the tag part of the first address data as the hash factor, where N is the number of bits of the index part;
[0011] Selecting any N bits of data in the tag part of the first address data as the offset factor;
[0012] The hash factor and the offset factor are different.
[0013] Optionally, the method for obtaining the hash factor and the offset factor includes:
[0014] Selecting N bits of data in a first target interval in the tag part of the first address data as the hash factor, where N is the number of bits of the index part;
[0015] Selecting N bits of data in a second target interval in the tag part of the first address data as the offset factor;
[0016] The hash factor and the offset factor are different.
[0017] Optionally, the method for obtaining the hash factor and the offset factor includes:
[0018] Selecting N consecutive bits of data in the tag part of the first address data as the hash factor, where N is the number of bits of the index part;
[0019] Selecting N consecutive bits of data in the tag part of the first address data as the offset factor;
[0020] The hash factor and the offset factor are different.
[0021] Optionally, the method for obtaining the hash factor and the offset factor includes:
[0022] Determine a first probability value corresponding to each bit in the tag part of the first address data, the first probability value representing a proportion of address data whose corresponding bit is 1 in the plurality of address data;
[0023] According to the first probability value of each bit in the tag part of the first address data, select N bits of data as the hash factor, and select N bits of data as the offset factor;
[0024] The hash factor and the offset factor are different.
[0025] Optionally, the plurality of address data include a plurality of address data obtained within a target time period;
[0026] Alternatively, the plurality of address data includes a plurality of address data obtained within a target scene.
[0027] Optionally, performing a first processing on an index part of the first address data according to a preset hash matrix and a hash factor of the first address data to obtain a preprocessed index of the first address data includes:
[0028] performing a first process on an index part of the first address data multiple times according to a preset hash matrix and a plurality of different hash factors of the first address data to obtain a preprocessed index of the first address data;
[0029] The result of each first processing is used as the index part of the next first processing.
[0030] Optionally, also include:
[0031] The number of the hash factors is determined according to the number of bits of the tag part of the first address data.
[0032] Optionally, performing a second process on the preprocessing index according to the offset factor of the first address data to obtain a target index of the first address data includes:
[0033] Determine offset parameters and circular shift operators;
[0034] The pre-processing index is subjected to a second process according to the offset factor of the first address data, the offset parameter and the circular shift operator to obtain a target index of the first address data.
[0035] A second aspect of the present application provides an electronic device, including a processor and a storage address processing module;
[0036] The storage address processing module is used for:
[0037] obtaining first address data;
[0038] performing a first processing on an index part of the first address data according to a preset hash matrix and a hash factor of the first address data to obtain a preprocessed index of the first address data, wherein the hash factor is obtained according to a label part of the first address data;
[0039] The pre-processed index is second-processed according to an offset factor of the first address data to obtain a target index of the first address data, wherein the offset factor is obtained according to a tag portion of the first address data. BRIEF DESCRIPTION OF THE DRAWINGS
[0040] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying any creative work.
[0041] Figure 1 is a flow chart of a storage address processing method provided by an embodiment of the present application;
[0042] Figure 2 is a schematic diagram of first address data provided in an embodiment of the present application;
[0043] Figure 3 is a flowchart of performing a first process on an index part of first address data provided by an embodiment of the present application;
[0044] Figure 4 It is a performance diagram of a storage address processing method provided by an embodiment of the present application;
[0045] Figure 5 It is a structural schematic diagram of an electronic device provided in an embodiment of the present application;
[0046] Figure 6 It is a hardware circuit diagram of a storage address processing module provided in an embodiment of the present application. DETAILED DESCRIPTION
[0047] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.
[0048] This application embodiment provides a storage address processing method, see Figure 1 , is a flow chart of the method, and the method may include the following steps.
[0049] S101, obtaining first address data.
[0050] The method provided in this embodiment can be applied to any cache module of an electronic device.
[0051] The first address data may be the address data carried in the access request to the cache received by the cache module from the requester (e.g., a processor such as a CPU or GPU). The cache may be the cache of the requester, such as a first-level cache or a second-level cache, or may be a shared cache of multiple requesters in the system, such as a system-level cache (SLC).
[0052] For example, the requester may send a data access request, which is used to write the data accessed by the requester into the cache. The access request may carry the storage address of the data to be written into the cache, and the storage address may be used as the first address data. Alternatively, the first-level cache or the second-level cache may send a request to read or write the first-level cache. The request may carry the storage address of the data to be written into the next-level cache, and the storage address may be used as the first address data.
[0053] The cache module receives the access request and obtains the first address data carried therein, that is, the memory address.
[0054] S102, performing a first processing on an index part of the first address data according to a preset hash matrix and a hash factor of the first address data to obtain a preprocessed index of the first address data, wherein the hash factor is obtained according to a label part of the first address data.
[0055] In step S102, the tag part and the index part may be determined in the first address data. Figure 2 For example, starting from the lowest bit in the first address data (i.e., the first bit on the right), a number of consecutive bits of data can be determined as the offset of the first address data, and then the N consecutive bits of data on the left side of the offset can be used as the index of the first address data, and the remaining part on the left side of the index can be used as the tag of the first address data. N is a preset positive integer.
[0056] After the tag part is determined, a first process may be performed on the index part of the first address data based on the hash factor and a preset hash matrix.
[0057] The process of performing a first processing on the index part of the first address data can be expressed by formula (1).
[0058]
[0059] Wherein, A1' represents the pre-processing index obtained after the processing in step S102, A3 represents the hash factor used in the first processing, H m*m represents the hash matrix, H m*m =(h in ) m*m ,h in represents the data in the i-th row and n-th column in the hash matrix, A1 represents the index part of the first address data used in the first processing, and ⊕ represents an exclusive-OR operation.
[0060] The hash matrix can be expressed as follows:
[0061]
[0062] That is, for the data h in the i-th row and n-th column of the hash matrix in If the data satisfies any of the conditions in the first three rows of formula (2), the data is 1; if the data does not satisfy any of the conditions in the first three rows, the data is 0, where ⋀ represents a logical AND operation.
[0063] S103, performing a second process on the preprocessing index according to an offset factor of the first address data to obtain a target index of the first address data, wherein the offset factor is obtained according to a tag portion of the first address data.
[0064] After the preprocessing index is obtained, the preprocessing index may be subjected to a second process based on an offset factor obtained from the tag portion of the first address data to obtain a target index of the first address data.
[0065] When performing the second processing, the offset factor and the pre-processing index may be processed using a skewed association algorithm to obtain a target index of the first address data.
[0066] The beneficial effects of this embodiment are:
[0067] After obtaining the preprocessing index of the first address data based on the hash factor and the hash matrix, the present embodiment further performs a second processing on the first address data based on the offset factor of the first address data to obtain the target index of the first address data. Compared with the related art that directly uses the result of hash processing as the index of the address data, the second processing based on the offset factor on the preprocessing index processed based on the hash factor can reduce the probability of data conflicts when data is stored in the cache, thereby improving the cache performance.
[0068] On the other hand, before using the skew associative algorithm to obtain the target index, this embodiment first processes the index part of the first address data based on the hash factor and the hash matrix, and uses the obtained pre-processed index for skew associative algorithm processing. Compared with the method of directly using the skew associative algorithm to process the first address data, this processing method has the advantage of improving the balance of the obtained target index through the hash factor and the hash matrix while taking into account the advantage of the skew associative algorithm in reducing data conflicts, so that the target indexes of multiple address data obtained can be evenly distributed, further improving the cache performance.
[0069] In this embodiment, the hash factor and the offset factor are two types of data obtained according to the tag part of the first address data. The hash factor and the offset factor can be obtained based on a variety of methods.
[0070] Generally, two completely different data obtained from the tag part of the first address data can be used as the hash factor and the offset factor, respectively, so that the target indexes of the multiple address data obtained according to this embodiment are distributed as evenly as possible. In some cases, when the tag part of the first address data contains less data, or when the hash factor and the offset factor contain more data, the hash factor and the offset factor can partially overlap, that is, a part of the hash factor can be the same as a part of the offset factor, or the hash factor and the offset factor can be exactly the same.
[0071] First, the method of obtaining the hash factor and the offset factor may include:
[0072] Select any N bits of data in the tag part of the first address data as a hash factor, where N is the number of bits in the index part;
[0073] Any N bits of data are selected in the tag portion of the first address data as the offset factor.
[0074] In the above-mentioned obtaining method, N bits of data can be randomly selected from the tag part of the first address data as a hash factor, and then N bits of data can be randomly selected from the tag part of the first address data as an offset factor. The N bits of data constituting the hash factor can be continuous or discontinuous, and the N bits of data constituting the offset factor can be continuous or discontinuous.
[0075] The advantage of obtaining the hash factor and the offset factor in the above manner is that the randomness of the hash factor and the offset factor can be enhanced, thereby enhancing the randomness of the obtained target index, reducing the possibility of data conflicts between multiple address data to a certain extent, and improving the balance of target index distribution after hash factor processing.
[0076] Second, the method of obtaining the hash factor and the offset factor may include:
[0077] Selecting N bits of data in the first target interval as a hash factor in the tag part of the first address data, where N is the number of bits of the index part;
[0078] In the tag part of the first address data, N bits of data in the second target interval are selected as the offset factor.
[0079] In the above acquisition method, the first target interval and the second target interval of the tag part of the first address data can be pre-specified to obtain Figure 2 For example, the low bit (i.e. Figure 2 The N-bit interval on the right side of the label part shown in the figure is used as the second target interval, and the N-bit interval on the left side of the second target interval is used as the first target interval, that is, the interval [N-1, 0] is used as the second target interval, and the interval [2N-1, N] is used as the first target interval. After obtaining the specific first address data, the N-bit data in the first target interval can be directly used as the hash factor, and the N-bit data in the second target interval can be used as the offset factor. Figure 2 A4 in represents the part of the tag part of the first address data excluding the hash factor and the offset factor.
[0080] In some embodiments, the number of bits in the first target interval and / or the second target interval may also be greater than N. In this case, N bits of data may be selected in the first target interval as a hash factor, and N bits of data may be selected in the second target interval as an offset factor.
[0081] The first target interval and the second target interval may be adjacent, such as [N-1, 0] and [2N-1, N] in the above example, or they may be independent of each other, such as [N-1, 0] and [3N-1, 2N], or they may partially overlap, such as [N-5, N-5] and [N-1, N].
[0082] There is no limitation on the positions of the first target interval and the second target interval in the label part, and their order. Any interval in the label part can be used as the first target interval or the second target interval as needed. The first target interval can be before or after the second target interval.
[0083] The advantage of obtaining the hash factor and the offset factor in the above manner is that after obtaining the first address data, no additional calculation is required to obtain the data within the specified interval as the hash factor and the offset factor, which is beneficial to improving the processing efficiency of the present solution.
[0084] Third, the method of obtaining the hash factor and the offset factor may include:
[0085] Selecting N consecutive bits of data from the tag part of the first address data as a hash factor, where N is the number of bits of the index part;
[0086] N consecutive bits of data are selected in the tag portion of the first address data as the offset factor.
[0087] In the above acquisition method, N consecutive bits of the tag part can be randomly selected and the data of the N consecutive bits can be used as the hash factor, and N consecutive bits of the tag part can be randomly selected and the data of the N consecutive bits can be used as the offset factor. The randomly selected hash factor and offset factor can be completely the same, completely different or partially the same, without limitation.
[0088] The advantage of obtaining the hash factor and the offset factor according to the above method is that, on the one hand, the randomness of the hash factor and the offset factor can be enhanced by random selection, thereby reducing the possibility of data conflicts between multiple address data to a certain extent; on the other hand, limiting them to N consecutive bits can reduce the number of random selections, which can improve processing efficiency to a certain extent compared to the method of randomly selecting N bits.
[0089] Fourthly, the method of obtaining the hash factor and the offset factor may include:
[0090] Determine a first probability value corresponding to each bit in the tag part of the first address data, the first probability value representing a proportion of address data whose corresponding bit is 1 in the plurality of address data;
[0091] According to the first probability value of each bit in the tag part of the first address data, N bits of data are selected as a hash factor, and N bits of data are selected as an offset factor.
[0092] In the above acquisition method, the first probability value corresponding to each bit in the tag part of the first address data can be determined according to the following formula (3).
[0093]
[0094] Among them, R x represents the first probability value of the xth bit in the tag part of the first address data, N x It represents the number of address data whose x-th bit of the tag part is 1 among the multiple address data, and M represents the total number of the multiple address data.
[0095] For example, assuming that there are 50 address data, of which 20 address data have the x-th bit as 1, then the first probability value R of the x-th bit is x Equal to 20 / 50, or 0.4.
[0096] After obtaining the first probability value of each bit, 2N bits whose first probability values are closest to 50% can be selected, and N bits of data therein are used as hash factors, and the other N bits of data are used as offset factors.
[0097] For example, the first probability value of each bit can be subtracted from 50%, and the obtained differences can be sorted from small to large according to their absolute values. The first 1 to N bits of data can be selected as hash factors, and the first N+1 to 2N bits of data can be selected as offset factors.
[0098] The advantage of obtaining the hash factor and the offset factor in the above manner is that the closer the first probability value is to 50%, the more equal the probability of the bit appearing 0 or 1 is, and the more equal the probability of the data of each bit contained in the hash factor appearing 0 or 1 is, the more balanced the distribution of the preprocessing index obtained based on the hash factor is. Therefore, obtaining the hash factor and the offset factor in the above manner is conducive to improving the balance of multiple target indexes obtained after processing multiple address outputs.
[0099] When the hash factor and the offset factor are obtained according to the fourth method, the multiple address data counted may include multiple address data obtained within the target time period.
[0100] The target time period may be a recent period up to the current moment, such as the last 10 seconds, the last 5 seconds, etc.
[0101] As an example, address data of all requests received within the last 5 seconds may be counted to determine the first probability value of each bit.
[0102] Alternatively, the multiple address data counted may also include multiple address data obtained in the target scene.
[0103] The target scenario can be an application scenario for running a specific application, or a specific test scenario.
[0104] As an example, assuming that the electronic device is currently running application A, the multiple address data carried by multiple requests corresponding to application A obtained by the processor after the start of application A until the current moment can be used as the multiple address data obtained in the target scenario, and these address data are counted to obtain the first probability value of each bit in the first address data.
[0105] In any embodiment of the present application, the order of obtaining the hash factor and the offset factor is not particular. In actual application, the hash factor can be obtained first and then the offset factor, or the offset factor can be obtained first and then the hash factor.
[0106] In some embodiments, step S102 may include:
[0107] Performing a first process on the index part of the first address data multiple times according to a preset hash matrix and multiple different hash factors of the first address data to obtain a preprocessed index of the first address data;
[0108] The result of each first processing is used as the index part of the next first processing.
[0109] In this embodiment, a plurality of different hash factors may be obtained from the tag portion of the first address data.
[0110] See also Figure 2 and Figure 3 In this embodiment, T hash factors can be obtained according to the tag part of the first address data, and then T first processings are performed according to the T hash factors, one of the hash factors is used in each first processing, and the result after each first processing is used as the input of the next first processing until T times are accumulated, and then the Tth processing result is used as the preprocessing index of the first address output obtained in S102.
[0111] For any integer t between 1 and T, the process of the t-th first processing can be expressed by the following formula (4).
[0112]
[0113] A1(t-1) represents the processing result obtained by the t-1th first processing, A1(t) represents the processing result obtained by the tth first processing, and A3(t) represents the hash factor used for the tth first processing. When t is equal to 1, A1(0) is equal to A1 in the above formula (1), that is, the index part of the first address data. When t is equal to T, A1(T) is the pre-processing index obtained in S102, which is equivalent to A1' in the above formula (1).
[0114] Optionally, the T hash factors used in the above process may not overlap with each other, or may partially overlap, that is, a certain hash factor is partially identical to another hash factor. Each of the T hash factors may be obtained by the above method for obtaining a hash factor.
[0115] In some optional embodiments, the total number of first processing times T can be a preconfigured fixed parameter or a parameter determined according to the number of bits of the tag part of the first address data. In the latter case, the number of hash factors can be determined according to the number of bits of the tag part of the first address data, and the number of hash factors can be used as the total number of first processing times T.
[0116] Among them, the maximum number of different hash factors that can be obtained from the tag part of the first address data can be determined based on the number of bits of the tag part of the first address data and the number of bits N of the hash factor and the offset factor, and the maximum number of hash factors that can be obtained is used as the number of the above-mentioned hash factors.
[0117] As an example, assuming that the hash factors do not overlap with each other, the tag part of the first address data contains S bits, and the number of bits of the hash factor and the offset factor are both N, then (SN) can be divided by N, and the integer part of the result is the maximum number of different hash factors that can be obtained from the tag part. Therefore, the integer part of the result can be used as the total number of times T for the first processing in step S102.
[0118] In some embodiments, the total number of times T can also be set according to the processing overhead of the electronic device and the need for the balance of the processing results. The larger T is, the greater the overhead of the processing method of this embodiment is, the more resources are consumed, but the corresponding balance of the processing results is better. Therefore, when the electronic device has fewer resources available or requires higher processing efficiency, a smaller T can be set. When it is necessary to improve the balance of the obtained target indexes so that multiple address data are mapped to different target indexes as evenly as possible, a larger T can be set.
[0119] Optionally, the process of performing a second process on the preprocessing index according to the offset factor of the first address data to obtain the target index of the first address data may include:
[0120] Determine offset parameters and circular shift operators;
[0121] The pre-processing index is subjected to second processing according to the offset factor, the offset parameter and the circular shift operator of the first address data to obtain the target index of the first address data.
[0122] According to the offset factor, offset parameter and circular shift operator of the first address data, the process of performing the second processing on the preprocessing index can be expressed by the following formula (5).
[0123]
[0124] Where index represents the target index of the first address data, A2 represents the offset factor of the first address data, w represents the circular shift operator (referred to as the shift operator), n set Indicates the preset offset parameters.
[0125] In this embodiment, the bit shift operator can be selected within a certain range. For example, any integer between 1 and N can be selected as the bit shift operator, where N is the number of bits of the index part of the first address data.
[0126] The offset parameter can be determined according to the number of bits of the index part of the first address. For example, the offset parameter can be set to the Nth power of 2, that is, n set =2^N.
[0127] To illustrate the effect of this embodiment, see Figure 4 , which is a schematic diagram for comparing the processing method of this embodiment and the processing method of related technologies in different test scenarios provided by this embodiment.
[0128] The horizontal axis represents different values of the aforementioned shift operator, and the vertical axis represents the standard deviation, which is a mathematical indicator used to describe the balance of target indexes of multiple address data. The smaller the standard deviation, the stronger the balance.
[0129] In the figure, curve 1-1 represents the result obtained by applying the processing method of related technology in test scenario 1, and curve 1-2 represents the result obtained by applying the method of this embodiment in test scenario 1; curve 2-1 represents the result obtained by applying the processing method of related technology in test scenario 2, and curve 2-2 represents the result obtained by applying the method of this embodiment in test scenario 2; curve 3-1 represents the result obtained by applying the processing method of related technology in test scenario 3, and curve 3-2 represents the result obtained by applying the method of this embodiment in test scenario 3. It can be seen that after processing by the method of this embodiment, the standard deviation of the target indexes of multiple addresses is smaller and the balance is stronger.
[0130] Test scenario 1 may be the Manhattan3.0 test scenario, test scenario 2 may be the Manhattan3.1 test scenario, and test scenario 3 may be the aztec_naomal test scenario.
[0131] The present application also provides an electronic device. Figure 5 , the electronic device may include a processor 501 and a storage address processing module 502;
[0132] The storage address processing module 502 is used for:
[0133] obtaining first address data;
[0134] Performing a first processing on an index portion of the first address data according to a preset hash matrix and a hash factor of the first address data to obtain a preprocessed index of the first address data, wherein the hash factor is obtained according to a label portion of the first address data;
[0135] The pre-processed index is second-processed according to an offset factor of the first address data to obtain a target index of the first address data, wherein the offset factor is obtained according to a tag portion of the first address data.
[0136] The storage address processing module of this embodiment may include: Figure 6 The hardware circuit shown in the figure can store the address processing module through Figure 6 The hardware circuit shown implements the storage address processing method of the aforementioned embodiment.
[0137] In the hardware circuit, XOR operator 1 is used to process the hash factor A3 and the hash matrix, and XOR operator 2 is used to process the output of XOR operator 1 and the index part A1 of the first address data to obtain a preprocessing index.
[0138] The shifter is used to perform shift processing on the offset factor A2, and the adder is used to perform the above-mentioned second processing according to A2, A2 after the shift processing and the pre-processing index to obtain the target index.
[0139] The working principle of the electronic device provided in this embodiment can refer to the relevant steps of the storage address processing method provided in the embodiment of the present application, and will not be repeated here.
[0140] It should be noted that the various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.
[0141] For the convenience of description, the above system or device is described by dividing it into various modules or units according to its functions. Of course, when implementing the present application, the functions of each unit can be implemented in the same or multiple software and / or hardware.
[0142] It can be known from the description of the above implementation methods that those skilled in the art can clearly understand that the present application can be implemented by means of software plus a necessary general hardware platform. Based on such an understanding, the technical solution of the present application can be essentially or partly embodied in the form of a software product that contributes to the prior art. The computer software product can be stored in a storage medium such as ROM / RAM, a magnetic disk, an optical disk, etc., and includes several instructions for enabling a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods described in the various embodiments of the present application or certain parts of the embodiments.
[0143] Finally, it should be noted that, in this article, relational terms such as first, second, third and fourth are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the statement "comprise a ..." do not exclude the presence of other identical elements in the process, method, article or device including the elements.
[0144] The above is only a preferred implementation of the present application. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present application. These improvements and modifications should also be regarded as the scope of protection of the present application.
Claims
1. A storage address processing method, comprising: obtaining first address data; performing a first processing on an index part of the first address data according to a preset hash matrix and a hash factor of the first address data to obtain a preprocessed index of the first address data, wherein the hash factor is obtained according to a label part of the first address data; performing a second processing on the preprocessed index according to an offset factor of the first address data to obtain a target index of the first address data, wherein the offset factor is obtained according to a tag portion of the first address data; Wherein, the hash factor and the offset factor are both data contained in the tag part of the first address data; Performing a first processing on the index part of the first address data includes: Performing an XOR operation on the product of the hash factor and the hash matrix and the index part of the first address data; The preprocessing index is subjected to a second processing, comprising: The offset factor is shifted, and the sum of the shifted offset factor, the offset factor and the preprocessing index is modulo a preset offset parameter.
2. According to the method of claim 1, the method of obtaining the hash factor and the offset factor comprises: Selecting any N bits of data in the tag part of the first address data as the hash factor, where N is the number of bits of the index part; Selecting any N bits of data in the tag part of the first address data as the offset factor; The hash factor and the offset factor are different.
3. According to the method of claim 1, the method of obtaining the hash factor and the offset factor comprises: Selecting N bits of data in a first target interval in the tag part of the first address data as the hash factor, where N is the number of bits of the index part; Selecting N bits of data in a second target interval in the tag part of the first address data as the offset factor; The hash factor and the offset factor are different.
4. According to the method of claim 1, the method of obtaining the hash factor and the offset factor comprises: Selecting N consecutive bits of data in the tag part of the first address data as the hash factor, where N is the number of bits of the index part; Selecting N consecutive bits of data in the tag part of the first address data as the offset factor; The hash factor and the offset factor are different.
5. According to the method of claim 1, the method of obtaining the hash factor and the offset factor comprises: Determine a first probability value corresponding to each bit in the tag part of the first address data, the first probability value representing a proportion of address data whose corresponding bit is 1 in the plurality of address data; According to the first probability value of each bit in the tag part of the first address data, select N bits of data as the hash factor, and select N bits of data as the offset factor; The hash factor and the offset factor are different.
6. The method according to claim 5, wherein the plurality of address data comprises a plurality of address data obtained within a target time period; Alternatively, the plurality of address data includes a plurality of address data obtained within a target scene.
7. The method according to claim 1, wherein the first processing is performed on the index part of the first address data according to a preset hash matrix and a hash factor of the first address data to obtain a preprocessed index of the first address data, comprising: performing a first process on an index part of the first address data multiple times according to a preset hash matrix and a plurality of different hash factors of the first address data to obtain a preprocessed index of the first address data; The result of each first processing is used as the index part of the next first processing.
8. The method according to claim 7, further comprising: The number of the hash factors is determined according to the number of bits of the tag part of the first address data.
9. The method according to claim 1, wherein the second processing is performed on the preprocessing index according to the offset factor of the first address data to obtain the target index of the first address data, comprising: Determine offset parameters and circular shift operators; The pre-processing index is subjected to a second process according to the offset factor of the first address data, the offset parameter and the circular shift operator to obtain a target index of the first address data.
10. An electronic device comprising a processor and a storage address processing module; The storage address processing module is used for: obtaining first address data; performing a first processing on an index part of the first address data according to a preset hash matrix and a hash factor of the first address data to obtain a preprocessed index of the first address data, wherein the hash factor is obtained according to a label part of the first address data; performing a second processing on the preprocessed index according to an offset factor of the first address data to obtain a target index of the first address data, wherein the offset factor is obtained according to a tag portion of the first address data; in, The hash factor and the offset factor are both data contained in the tag part of the first address data; Performing a first processing on the index part of the first address data includes: Performing an XOR operation on the product of the hash factor and the hash matrix and the index part of the first address data; The preprocessing index is subjected to a second processing, comprising: The offset factor is shifted, and the sum of the shifted offset factor, the offset factor and the preprocessing index is modulo a preset offset parameter.
Citation Information
Patent Citations
Composite index method and device
CN104536958A