Conductive back plate, method for manufacturing conductive back plate and photovoltaic module

Abstract

The present invention discloses a conductive backplane, a manufacturing method of a conductive backplane, and a photovoltaic module, which relate to the field of photovoltaic technology and are used to achieve the purpose of high conversion efficiency, low unit manufacturing cost, high unit production efficiency, and high module reliability of the coordinated photovoltaic cell. The conductive backplane includes a carrier and a patterned conductive layer; the conductive layer includes at least a first metal layer and a second metal layer stacked, the first metal layer is arranged on the carrier, and the second metal layer is arranged on the first metal layer; the roughness Ra1 of the functional surface of the first metal layer is 0.3μm~0.5μm; the roughness Ra2 of the functional surface of the second metal layer is 0.02μm~0.3μm.

Description

Technical Field

[0001] The present invention relates to the field of photovoltaic technology, and in particular to a conductive backplane, a method for manufacturing the conductive backplane, and a photovoltaic module. Background Art

[0002] At present, photovoltaic modules are usually made by welding ribbon connection technology or conductive backplane connection technology. Photovoltaic modules made by conductive backplane technology have the advantages of high appearance, high power and high conversion efficiency.

[0003] Photovoltaic modules using conductive backplane technology have a large power attenuation in a high heat and humidity environment after a long period of reliability testing. The power value of photovoltaic modules has attenuated by nearly 5%, seriously affecting the outdoor use of photovoltaic modules. It is very important in the field of photovoltaic product manufacturing to provide a photovoltaic product or product component that has high conversion efficiency, low unit manufacturing cost, high unit production efficiency, and high component reliability in synergistic photovoltaic cells. Summary of the invention

[0004] The object of the present invention is to provide a conductive backplane, a method for manufacturing a conductive backplane and a photovoltaic module, so as to achieve the goals of high conversion efficiency corresponding to synergistic photovoltaic cells, low unit manufacturing cost, high unit production efficiency and high module reliability.

[0005] In a first aspect, the present invention provides a conductive backplane, comprising a carrier and a patterned conductive layer;

[0006] The conductive layer at least comprises a first metal layer and a second metal layer which are stacked, wherein the first metal layer is disposed on the carrier, and the second metal layer is disposed on the first metal layer;

[0007] The roughness Ra1 of the functional surface of the first metal layer is 0.3 μm to 0.5 μm;

[0008] The roughness Ra2 of the functional surface of the second metal layer is 0.02 μm to 0.3 μm.

[0009] When adopting the above technical solution, the conductive backplane uses a first metal layer and a second metal layer that are stacked, wherein the functional surface of the first metal layer in contact with the carrier has a higher roughness Ra1, Ra1 is 0.3μm~0.5μm, and the functional surface of the first metal layer with high roughness can have a greater bonding strength with the carrier, thereby improving the reliability of the photovoltaic module; the roughness Ra2 of the functional surface of the second metal layer used for contacting the battery cell is different from the conventional requirements, and the roughness is reduced to 0.02μm~0.3μm to increase the reflectivity of the conductive backplane, so that the battery cell has a better light absorption effect under light, thereby improving the photoelectric conversion efficiency. And based on the process of using conductive glue to connect the conductive layer and the battery cell in the photovoltaic module manufacturing process, the design of the roughness of the functional surface of the second metal layer has a great relationship with the efficient introduction and efficient function of the conductive glue in the later process. The roughness of the functional surface of the second metal layer designed in this application can not only promote the flow of the conductive glue in the molten state of the conductive glue, but also increase the bonding area of ​​the two sides of the molten conductive glue (the second metal layer and the battery cell respectively), thereby improving the efficiency of the conductive glue process and the reliability of the conductive glue, and reducing the stress between the conductive glue and the battery cell and the second metal layer, thereby avoiding the occurrence of hidden cracks in the battery cell due to high stress. In addition, since the conductive layer uses at least the first metal layer and the second metal layer, the selection range of the conductive layer material is expanded, and the material can be reasonably selected based on the conductive performance and material cost, so that the conductive layer has good conductive performance while reducing the cost. As an overall design scheme, the conductive backplane of this application achieves the effects of coordinated photovoltaic cell conversion efficiency, low unit manufacturing cost, high unit production efficiency, and high component reliability. In some optional implementation schemes, based on the convenience of the subsequent process of stripping the ineffective area (waste area) of the conductive layer, the stripping efficiency and the effectiveness of the stripping, the present application also performs roughness treatment on the edge specific area of ​​each effective area (or effective unit, effective area unit, etc. with similar functions) of the functional surface of the conductive layer. And based on the electrical isolation requirements between adjacent effective area units of the conductive backplane conductive layer, the present application performs roughness treatment on the side surface (or called the side, that is, the third area, the same below in this application document) of each effective area of ​​the conductive layer to improve or ensure the electrical isolation performance of the two adjacent effective areas, further improving the reliability of the conductive backplane product and the reliability of the use of the conductive backplane component. In some implementation schemes of the present application, based on the high requirements for the safety of photovoltaic component products, the present application also discloses the processing of the edge area and the side surface area of ​​the effective area of ​​the conductive layer to improve the volume resistivity of these areas, and the concave wave body structure treatment of these area surfaces to further effectively improve the electrical isolation performance of the adjacent effective areas of the conductive layer, thereby improving the electrical safety requirements of the conductive backplane product and the safety of photovoltaic components using the conductive backplane.

[0010] In a second aspect, the present invention further provides a method for manufacturing a conductive backplane, comprising:

[0011] Providing a carrier board;

[0012] Providing a conductive layer composed of at least a first metal layer and a second metal layer stacked together; wherein the first metal layer is disposed on a carrier, the second metal layer is disposed on the first metal layer, the roughness Ra1 of the functional surface of the first metal layer is 0.3 μm to 0.5 μm, and the roughness Ra2 of the functional surface of the second metal layer is 0.02 μm to 0.3 μm;

[0013] Composite carrier board and conductive layer.

[0014] The method for manufacturing the conductive backplane can manufacture the conductive backplane in the first aspect, and thus has the same beneficial effects as the first aspect, which will not be described in detail.

[0015] In some possible implementations, providing a conductive layer composed of at least a first metal layer and a second metal layer stacked together further includes patterning the conductive layer according to a prefabricated circuit pattern so that the conductive layer can match the battery cell electrode or pad point in the subsequent process to achieve effective conduction connection. The patterning process can be completed in advance and then the patterned conductive layer is composited with the carrier. In some implementations, the stacked conductive layer can be composited with the carrier first and then the conductive layer carried on the carrier is patterned.

[0016] In some possible implementations, the roughness treatment process and scheme disclosed in the present application are used to treat the edge specific area (first area) of the first effective area of ​​the functional surface of the first metal layer or the edge specific area (second area) of the second effective area of ​​the functional surface of the second metal layer, so that the roughness Ra3 of the corresponding first area is 0.3μm~100μm, and the roughness Ra4 of the second area is 0.02μm~80μm. The use of such a technical scheme can facilitate the subsequent process of stripping the ineffective area (waste removal area) of the conductive layer, and provide stripping efficiency and effectiveness. In some implementation schemes of the present application, based on the high requirements for the safety of photovoltaic module products, the laser processing process, doping process, spraying of insulating materials, etc. disclosed in the present application can be used to process the edge area and side surface area of ​​the effective area of ​​the conductive layer to improve the volume resistivity of these areas, and the laser engraving process or chemical engraving process disclosed in the present application can be used to process these area surfaces with a concave wavy body structure to further effectively improve the electrical isolation performance of the adjacent effective areas of the conductive layer, thereby improving the product electrical safety requirements of the conductive backplane, and improving the safety of photovoltaic modules using the conductive backplane. In some conductive backplane production processes where production rhythm and process design are coordinated, the patterning process, roughness treatment process, volume resistivity treatment process and concave wave structure setting process disclosed in this application can be adjusted in a reasonable operating sequence according to the reasonable design of production rhythm and process, and the processes can be merged. In addition, the same or similar technical means can be used to complete the above-mentioned conductive layer treatment process or technology in the same process to reduce the production cost per unit time, improve production efficiency, and at the same time improve the reliability of the backplane and the products using the backplane.

[0017] In a third aspect, the present invention further provides a photovoltaic module, comprising the conductive backplane as described in any one of the above items. The photovoltaic module has the same beneficial effects as the conductive backplane described in the first aspect and any one of the above items, which will not be described in detail here.

[0018] The conductive backplane, manufacturing method and photovoltaic module using the conductive backplane disclosed in the present application are comprehensive technical solutions for synergistically improving product reliability, photoelectric conversion efficiency, reducing production costs and improving production efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The drawings described herein are used to provide a further understanding of the present invention and constitute a part of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:

[0020] Figure 1 A schematic diagram of a structure combining a conductive back plate and a battery cell provided by an embodiment of the present invention;

[0021] Figure 2 Schematic diagram showing the comparison of reflectivity between the low roughness copper foil in the embodiment of the present invention and the conventional roughness copper foil;

[0022] Figure 3 A schematic top view of a partial area of ​​a conductive back plate according to an embodiment of the present invention;

[0023] Figure 4-1 is a schematic diagram of a pre-patterned or patterned conductive layer of a conductive backplane according to an embodiment of the present invention (from the perspective of the second metal layer);

[0024] Figure 4-2 is a schematic diagram of a pre-patterned or patterned conductive layer of a conductive backplane in another embodiment of the present invention (from the perspective of the first metal layer);

[0025] Figure 5 for Figure 4-1 A schematic diagram of a partial three-dimensional cross-sectional view of the conductive layer of the conductive back plate in the AA direction;

[0026] Figure 6 A schematic diagram of a concave wave structure provided on an effective area of ​​a conductive layer according to an embodiment of the present application;

[0027] Figure 7 A schematic flow chart of a method for manufacturing a conductive backplane provided for the implementation of the present invention.

[0028] Figure numerals: 1 is a carrier, 2 is a conductive layer, 21 is a first metal layer, 211 is a first effective area, 2111 is a first area, 22 is a second metal layer, 221 is a second effective area, 2211 is a second area, 23 is a third area, 24 is an invalid area, 3 is an adhesive film, 31 is an opening, and 4 is a battery cell. DETAILED DESCRIPTION

[0029] In order to make the technical problems, technical solutions and beneficial effects to be solved by the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0030] It should be noted that when an element is referred to as being "fixed to" or "disposed on" another element, it can be directly on the other element or indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or indirectly connected to the other element.

[0031] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "multiple" is two or more, unless otherwise clearly and specifically defined. The meaning of "several" is one or more, unless otherwise clearly and specifically defined.

[0032] In the description of the present invention, it is necessary to understand that the directions or positional relationships indicated by the terms "up", "down", "front", "back", "left", "right", etc. are based on the directions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific direction, be constructed and operated in a specific direction, and therefore cannot be understood as a limitation on the present invention.

[0033] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0034] In the description of this application, layers, plates and films can be used interchangeably in a broad sense. The carrier in this application can be a polymer plate with or without an adhesive film, or a glass plate with flow properties under a specific process. The carrier can be transparent, translucent or opaque according to the requirements of the use scenario, and the carrier has at least the property of being insulating under certain conditions.

[0035] The conductive layer in the present application can be a metal conductive layer such as copper foil, aluminum foil, zinc foil, etc., and can also be a doped metal foil such as copper foil containing doped elements such as nickel, aluminum foil, etc.

[0036] In the description of this application, unless otherwise specified, the expressions "mapping area", "corresponding area" or "projection area" used in this application all have the same or similar meanings, that is, the positive projection of a certain component, material or position on the surface of other areas. The "pre-set", "reserved", "prefabricated" or "pre-designed" used in this application does not require obvious marking on the conductive backplane or the conductive layer during the manufacturing process of the conductive backplane or the processing of the conductive layer disclosed in this application.

[0037] In the description of this application, Figure 3The conductive layer shown can be patterned (or graphed) according to a pre-designed pattern style using a variety of processes or technical means, such as laser die cutting, mechanical die cutting, chemical etching, milling machine, etc. The conductive layer can be divided into effective areas and invalid areas according to a pre-designed pattern style (or a preset circuit pattern, a prefabricated circuit pattern, a pre-designed pattern, etc., which have the same or equivalent meaning) or patterning. Both the effective area and the invalid area can be composed of multiple small areas (i.e., small units) of the same or similar style. In the present application, the effective area can also be referred to as a conductive area, an effective unit, an effective area unit, a converging conductive layer, etc., which have the same, equivalent or similar functions as the effective area of ​​the present application; the invalid area can be referred to as a pre-waste removal area, a waste removal area, a removal area, a waste removal channel, an invalid area unit, etc., which have the same, equivalent or similar functions as the invalid area of ​​the present application.

[0038] In the description of this application, unless otherwise specified, the numerical ranges disclosed in this application include the present number, and when the roughness, volume resistivity, etc. are tested or calculated based on the surface or volume, such data are mean data.

[0039] like Figure 1 and Figure 3As shown, an embodiment of the present invention provides a conductive backplane, including a carrier 1 and a patterned conductive layer 2; wherein the conductive layer 2 at least includes a first metal layer 21 and a second metal layer 22 which are stacked, the first metal layer 21 is arranged on the carrier 1, and the second metal layer 22 is arranged on the first metal layer 21, the first metal layer 21 and the second metal layer 22 can be combined together by mechanical pressing, or the second metal layer 22 can be plated on the first metal layer 21 by electroplating, and when there are other metal layers, they can also be combined together in the same way. The roughness Ra1 of the functional surface of the first metal layer 21 is 0.3μm~0.5μm. It should be noted that the functional surface of the first metal layer 21 is the side in contact with the carrier 1, and the roughness of the other surfaces of the first metal layer 21 may be the same as or different from the functional surface; the roughness Ra2 of the functional surface of the second metal layer 22 is 0.02μm~0.3μm. The functional surface of the second metal layer 22 is the side away from the carrier 1, that is, the side used to achieve electrical contact with the battery cell 4, and the roughness of the other surfaces of the second metal layer 22 may be the same as or different from the functional surface. In the conductive backplane product, the functional surface of the second metal layer 22 with a roughness Ra2 of 0.02μm~0.3μm in this embodiment can be reflected as the substantial area of ​​the second effective area 221 of the second metal layer 22, wherein the substantial area can be reflected as the area in the conductive layer 2 that is not directly conductively connected to the battery cell 4, for example, other effective areas in contact with the adhesive film 3 except for the area connected to the specific conductive glue; the substantial area can also be reflected in the conductive backplane product as most of the area or a large area after removing the special treatment area (the special treatment area can be the area where the conductive glue is attached, or it can be the second area where the roughness, volume resistivity and concave structure treatment are performed in the following embodiments). Similarly, in the conductive backplane product, the functional surface of the first metal layer 21 with a roughness of 0.3μm~0.5μm in the embodiment of the present application can be reflected as the substantial area of ​​the first effective area 211 of the first metal layer 21, and the substantial area can also be most of the effective area or a large area of ​​the effective area except for the first area mentioned in the following embodiments. The surface (or region) roughness value range disclosed in this application is the average roughness value range of the surface or region. The exemplary test method is: take a point on the surface as the center point, take the center point as the center of a circle with a certain distance as the radius (for example, 0.5 cm) to perform external radiation to determine the high and low points of the radiation area, and then take the average value using a certain algorithm to determine the average roughness value of the radiation area. It should be noted that the roughness test method disclosed in this application is only one of the examples. There are currently a variety of roughness test instruments and test methods that can be applied to the roughness control and testing in the embodiments of this application.

[0040] When the above technical solution is adopted, the conductive backplane uses a first metal layer 21 and a second metal layer 22 which are stacked, wherein the functional surface of the first metal layer 21 in contact with the carrier 1 has a relatively high roughness Ra1, which is 0.3μm~0.5μm. The functional surface of the first metal layer 21 with high roughness can have a greater bonding strength with the carrier 1, thereby improving the reliability of the photovoltaic module. After the photovoltaic module completes the reliability test under high temperature and high humidity environment, it is not easy to cause local damage due to insufficient bonding. The roughness Ra2 of the functional surface of the second metal layer 22 for electrical contact with the battery cell 4 is different from the conventional high roughness requirement for pursuing high adhesion, but chooses to reduce the roughness to 0.02μm~0.3μm to improve the reflectivity of the conductive backplane, so that the battery cell has a better light absorption effect under light, and improves the photoelectric conversion efficiency. In addition, based on the process of using a conductive backplane to conduct the conductive layer and the cell, the design of the roughness of the functional surface of the second metal layer 22 is closely related to the effective introduction and efficient function of the conductive glue in the later process. The roughness of the functional surface designed for the second metal layer 22 in the present application can not only promote the flow of the conductive glue in the molten state, but also increase the bonding area of ​​the two sides of the adhesive (the functional surface of the second metal layer 22 and the cell 4) after the molten conductive glue is solidified, thereby improving the flow introduction efficiency of the molten conductive glue between the cell 4 and the second metal layer 22 and the reliability of the conductive glue in the conductive glue process, and can reduce the stress between the conductive glue and the cell 4 and the second metal layer 22, thereby avoiding the occurrence of hidden cracks in the cell 4 due to the large stress. In addition, since the conductive layer 2 uses at least the first metal layer 21 and the second metal layer 22, the selection range of the conductive layer 2 material is expanded, and the material can be reasonably selected based on the conductive performance and material cost of the material, so that the conductive layer 2 has better conductive performance while reducing the cost. The conductive backplane of the present application as an overall design scheme realizes the effects of high conversion efficiency of synergistic photovoltaic cells, low unit manufacturing cost, high unit production efficiency, and high component reliability.

[0041] Figure 3It is a top view schematic diagram of a conductive backplane of an embodiment disclosed in the present application (seen from the second metal layer 22). When viewed downward from the direction of the second metal layer 22, the second metal layer 22 may be covered with a glue film 3, and the conductive layer 2 is patterned according to the pre-designed circuit pattern. During or after patterning, the conductive layer 2 is divided into an effective area and a waste removal area (invalid area 24), and the waste removal area is used to isolate adjacent effective area units. The patterning process can be performed by die-cutting from the functional surface of the first metal layer 21, and the waste removal area is peeled off from the functional surface side of the first metal layer 21 to complete the patterning process; the patterning process can also be performed by die-cutting from the functional surface of the second metal layer 22, and the waste removal area is peeled off from the functional surface side of the second metal layer 22 to complete the patterning process. In some embodiments, a hole 31 area can be formed in advance on the glue film 3 of the conductive backplane according to the electrode pattern of the battery cell to be matched in the later stage, and a conductive glue can be introduced into the hole 31 area in the subsequent component manufacturing process to realize the electrical connection between the conductive layer 2 and the battery cell. On the basis of the above embodiments, in some embodiments, the specific area of ​​the functional surface of the conductive layer 2 (the first metal layer 21 or the second metal layer 22) (the functional surface of the conductive layer 2 includes the functional surface of the first metal layer 21 and the functional surface of the second metal layer 22) can be roughened. The specific area can be an area extending from the intersection line of the effective area and the adjacent ineffective area 24 as the starting line (the intersection line can also be referred to as the boundary of the effective area. Unless otherwise specified, the expressions appearing elsewhere in this application have the same meaning as the expressions here). Generally, it shall not extend to the reserved conductive glue action point position (corresponding to the opening 31 area of ​​the adhesive film 3) in the effective area of ​​the conductive layer 2. In this application, in order to facilitate the introduction of the technical solution, the action point or attachment area of ​​the conductive glue introduced in the subsequent component manufacturing process on the conductive layer 2 is referred to as the reserved point of the conductive backplane, but it should be noted that in the manufacturing process of the conductive backplane disclosed in this application, especially in the various process processing of the conductive layer, it is not required to mark the reserved point on the conductive layer 2. According to the different front and back directions of the conductive layer patterning or the different front and back directions of the stripping ineffective area 24, the specific area of ​​the conductive layer 2 can be processed differently, respectively:

[0042] (1) In some embodiments, when the conductive layer 2 is patterned from the functional surface of the first metal layer 21 according to a pre-designed circuit pattern or when the ineffective area 24 of the conductive layer 2 is peeled off from the functional surface of the first metal layer 21, as Figure 4-2 As shown, the roughness Ra3 of the first region 2111 (in this embodiment, the first region 2111 is the specific region of the conductive layer 2) of the functional surface of the first metal layer 21 is processed to 0.3 μm to 100 μm. Figure 4-2As shown in the accompanying drawings, the first area 2111 is a specific edge area of ​​each first effective area 211, and the first area 2111 can be multiple according to the designed number of first effective areas 211. In the embodiment, the first area 2111 is the area where the intersection line of each first effective area 211 of the conductive layer 2 and the adjacent ineffective area 24 is the starting point for spreading to the first effective area 211. Generally, the first area 2111 shall not spread to the reserved point of the conductive backplane in the mapping area of ​​the first metal layer 21. In some preferred embodiments, the spreading distance of the first area 2111 is 10μm-100μm.

[0043] (2) In some embodiments, when the conductive layer 2 is patterned from the functional surface of the second metal layer 22 according to a pre-designed pattern or when the ineffective area 24 of the conductive layer 2 is peeled off from the functional surface of the second metal layer 22, as Figure 3 and 4-1 As shown in the accompanying drawings, the roughness Ra4 of the second area 2211 of the functional surface of the second metal layer 22 is 0.02μm~80μm, wherein the second area 2211 of the functional surface of the second metal layer 22 in this embodiment is the edge specific area of ​​each of the second effective areas 221 mentioned above, and the second area 2211 can be multiple according to the design number of the second effective areas 221. In the embodiment, the second area 2211 of the functional surface of the second metal layer 22 is the area where the intersection line of each second effective area 221 of the conductive layer 2 and the adjacent invalid area 24 is the starting point to spread to the second effective area 221, and generally the spreading distance of the second area 2211 does not exceed the reserved point of the conductive backplane in the mapping area of ​​the functional surface of the second metal layer 22. In the preferred embodiment, the distance between the spreading area and the intersection line of the second effective area 221 and the adjacent invalid area 24 is 10μm-100μm.

[0044] In the above-mentioned embodiment, the roughness design and processing of the first area 2111 of the first metal layer 21 of the conductive layer 2 or the second area 2211 of the second metal layer 22 facilitates the effective contact between the stripping device and the conductive layer 2 during the conductive layer patterning process and can efficiently strip the invalid area 24 between two adjacent effective areas, so as to facilitate the completion of the waste removal process, wherein the stripping device can be an adsorption stripping device, a mechanical tearing stripping device, or other stripping devices that need to use roughness to enhance contact. It should be noted that in some conductive backplane manufacturing processes with reasonable production tact and process design, the roughness processing of the first area 2111 and the patterning process of the conductive layer 2, or the roughness processing of the second area 2211 and the patterning process of the conductive layer 2 can be completed in the same process and / or using the same or identical process.

[0045] In an independent embodiment within the scope of the present invention or on the basis of one or more of the above embodiments, Figure 5 As shown, the roughness of the third area 23 of the conductive layer 2 can be processed to be 0.1μm~80μm, wherein the third area 23 is the side area formed between each effective area of ​​the patterned or patterned conductive layer 2 and the adjacent ineffective area 24 (i.e., the side surface area of ​​the effective area of ​​the conductive layer 2), and the side area is located between the functional surface of the first metal layer 21 and the functional surface of the second metal layer 22. Since the conductive layer 2 is composed of at least the first metal layer 21 and the second metal layer 22 stacked, the third area 23 includes two stacked parts, i.e., the side area of ​​the first metal layer 21 and the side area of ​​the second metal layer 22, and the roughness of the side area of ​​the first metal layer 21 and the roughness of the side area of ​​the second metal layer 22 can be the same or different. In some embodiments, the roughness of the third area 23 can be between 0.1μm~80μm, preferably between 3μm-80μm; in some embodiments, the roughness of the third area 23 can be between 3μm-40μm. It should be noted that the roughness of the third area 23 can be designed according to the melting temperature, curing temperature, flowability, unit weight and other properties of the adhesive film 3 provided on the carrier 1 (or carrier 1) and / or the second metal layer 22 (especially for future new materials or new properties of adhesive films, etc.). The electrical isolation performance between adjacent effective area units of the conductive layer 2 of the conductive backplane determines the safety of the conductive backplane and the assembly using the conductive backplane. Other reasons such as incomplete waste removal and bubbles can easily cause adjacent effective area units to be connected and cause a short circuit of the photovoltaic assembly, thereby affecting the reliability of the photovoltaic assembly. The processing of the roughness of the third region 23 of the conductive layer 2 in this embodiment of the present application can make the adhesive film fluid flow to the ineffective region 24 (or ineffective channel) of the conductive layer 2 in the subsequent composite process of the conductive layer 2 and the carrier 1 (or the composite process of the carrier 1, the conductive layer 2 and the adhesive film 3), that is, when flowing between adjacent effective area units, the third region 23 can better carry the adhesive film fluid, or provide the adhesive force between the adhesive film and the third region 23 so that the adhesive film fluid can be effectively and completely filled in the waste removal area in the composite process of the conductive backplane, thereby effectively isolating the adjacent effective area units of the conductive layer 2, and improving the reliability of the conductive backplane and the photovoltaic module using the conductive backplane. It should be noted that in some preferred embodiments, the processing of the roughness of the third region 23 and the patterning process of the conductive layer 2 can be completed in the same process and / or using the same or identical process.

[0046] The designs of the roughness of the functional surface of the conductive layer, the roughness of the specific edge area of ​​the effective area of ​​the conductive layer, the roughness of the first area, the second area of ​​the metal layer of the conductive layer, and the third area of ​​the conductive layer disclosed in the aforementioned embodiments are not only based on the reliability of the conductive backplane and the photovoltaic module, but also on the photoelectric conversion efficiency of the photovoltaic module, the unit time cost, and the conductive backplane composite, the photovoltaic module production process rhythm and the overall production efficiency, providing an overall design scheme to achieve the effects of high synergistic photovoltaic cell conversion efficiency, low unit manufacturing cost, high unit production efficiency and high module reliability.

[0047] In an independent embodiment within the scope of the present invention or on the basis of one or more of the above embodiments, in order to improve the electrical safety of the conductive backsheet while taking into account improving the photoelectric conversion of photovoltaic modules, reducing the cost of the conductive backsheet, and improving production efficiency, as Figure 3 and Figure 5 As shown, the conductive layer 2 of the conductive backplane provided in some embodiments of the present application includes an effective area, an ineffective area 24 and a side surface (third area 23) of the effective area of ​​the conductive layer, and the second area 2211 and the third area 23 of the second effective area 221 of the second metal layer 22 are subjected to volume resistivity processing, so that the volume resistivity of the second area 2211 is greater than the remaining areas of the second effective area 221, and the volume resistivity of the third area 23 is greater than the volume resistivity of the remaining areas of the conductive layer 2. It should be noted that the first area 2111, the second area 2211 and the third area 23 mentioned in the present application document have a certain thickness and a measurable volume resistivity. In this embodiment, the second area 2211 is an area extending from the boundary of the second effective area 221 (i.e., the intersection line of the second effective area 221 and the adjacent ineffective area 24, and the expressions in other places in the present application are the same as explained here) to the same second effective area 221. Generally, the spreading distance of the second area 2211 does not exceed the mapping or projection area of ​​the reserved point of the conductive backplane on the second effective area 221. On the basis of this embodiment, the technical solution of this embodiment is now introduced as follows according to the layer structure of the conductive layer 2:

[0048] like Figure 1 As shown, the conductive layer 2 includes a first metal layer 21 and a second metal layer 22. Figure 4-1As shown, the effective area is the second effective area 221 of the second metal layer 22, and the second effective area 221 includes the second area 2211 of the functional surface of the second metal layer 22 and the remaining area of ​​the second metal layer 22, that is, the effective area on the second metal layer 22, in addition to the second area 2211 of the functional surface of the second metal layer 22, also includes the remaining area of ​​the second metal layer 22 (excluding the invalid area 24), and the second area 2211 is the area extending from the boundary of the second effective area 221 of the second metal layer 22 to the second effective area 221, and generally the extension distance of the second area 2211 does not exceed the reserved point of the conductive backplane in the mapping area of ​​the functional surface of the second metal layer 22. Figure 4-2As shown, the effective area is the first effective area 211 of the first metal layer 21, and the first effective area 211 includes the first area 2111 of the functional surface of the first metal layer 21 and the remaining area of ​​the first metal layer 21, that is, the effective area on the first metal layer 21, in addition to the first area of ​​the functional surface of the first metal layer 21, also includes the remaining area of ​​the first metal layer 21 (excluding the invalid area 24); the first area 2111 is the area extending from the boundary of the first effective area 211 of the first metal layer 21 to the first effective area 211, and generally the extension distance of the first area 2111 does not exceed the reserved point of the conductive backplane in the mapping area of ​​the functional surface of the first metal layer 21. In a preferred embodiment, the first area 2111 and the second area 2211 extend from the effective area boundary of each metal layer to the effective area by 0.1μm-20mm, and the preferred extension distance can be 10μm-100μm. In this embodiment, the volume resistivity of the third area 23 can also be processed so that the volume resistivity of the third area 23 is greater than the volume resistivity of the remaining areas of the conductive layer 2. On the basis of improving the volume resistivity of the third region 23 as mentioned above, at least one of the first region 2111 of the first metal layer 21 and the second region 2211 of the second metal layer 22 can be further processed to improve the volume resistivity of the region to be correspondingly greater than the volume resistivity of the remaining regions of the first metal layer 21 (i.e., the regions other than the first region 2111 and the third region 23) and the remaining regions of the second metal layer 22 (i.e., the regions other than the second region 2211 and the third region 23). The technical solution of this embodiment improves the volume resistivity of the effective regions of the conductive layer by processing the side surfaces and the edge specific regions of the upper and lower surfaces to thereby improve the electrical isolation performance of the adjacent effective regions of the conductive layer, thereby improving the safety and reliability of the photovoltaic conductive backsheet and the components using the conductive backsheet. It should be noted that there are many ways to process the volume resistivity of these areas, such as doping Group V or Group VI elements in specific edge areas of the effective area of ​​the conductive layer 2 by CVD (Chemical Vapor Deposition) or PECVD (Plasma Enhance Chemical Vapour Deposition), and spraying corrosion-resistant insulating materials in these areas. This application discloses several exemplary processing methods:

[0049] (1) Insulating materials such as alumina ceramics and ceramic polymers may be sprayed on these specific areas. In a preferred embodiment, a spraying device may be provided at the laser head position when the conductive layer is patterned by laser, so that the alumina ceramic material may be sprayed simultaneously during the laser patterning process. The spraying area is controlled to spread from the effective area boundary of the conductive layer to the effective area by 0.1 μm-20 mm, and the preferred spraying range is 5 mm. In an embodiment using an advanced spraying device, especially when the spray port can achieve micron-level control, the preferred spraying range is 10 μm-100 μm.

[0050] (2) A patterned conductive layer made of copper foil may also be placed in a prefabricated grid plate, and a specific edge region of the effective region of the conductive layer (for example, the first region 2111, the second region 2211, and the third region 23) is exposed to the grid, and other regions of the effective region are shielded by the plate structure of the grid plate. Then, the grid plate carrying the conductive layer is placed in a reaction container, and a sulfide and a phosphide (for example, hypochlorite POCl2) are deposited on the specific region by a CVD chemical vapor deposition method. 3 etc.) to form a compound film containing sulfur and copper, phosphorus and copper, or phosphorus, sulfur and copper on the specific area.

[0051] (3) In a preferred embodiment, the patterning of the conductive layer and the volume resistivity processing of a specific area at the edge of the effective area of ​​the conductive layer can be completed in the same process. The present application exemplarily discloses a technical solution for combining the patterning and bulk resistivity processing steps using a laser processing process: when the conductive layer 2 is composed of two metal layers, namely, the first metal layer 21 is aluminum foil and the second metal layer 22 is copper foil, and the thickness of the conductive layer 2 is in the range of 40μm-60μm, the laser parameters can be selected based on the prefabricated circuit pattern, the thickness and material of the conductive layer 2, and the range of the first area 2111 and the second area 2211 of the effective area of ​​the conductive layer 2. For the conductive backplane disclosed in the above embodiment of the present application, in which the range of the first area 2111 and / or the second area 2211 is 10μm-100μm, a laser with a frequency range of 50-500Hz, a circular spot diameter of 50μm, an operating speed range of 1000-20000mm / s, and a power range of 100% can be selected to perform laser engraving and sintering on the conductive layer 2 at a temperature of 5-55 degrees Celsius, 0.5-2 atmospheres, and an oxygen content of 10%-30% of the total gas.

[0052] On the basis of the above embodiments, in some embodiments, the conductive layer 2 of the conductive backplane disclosed in the present application adopts a resistivity of 1.65×10 -8 Ωm-5×10 -8 Ωm range of metal layer, the side surface area of ​​the effective area of ​​the conductive layer (corresponding to Figure 5The third area 23) and / or the edge specific area (corresponding to Figure 4-1 The second region 2211 and / or Figure 4-2 The volume resistivity of the first region 2111) is in the range of 3.15×10 -8 Ωm-5×10 -8 The volume resistivity of the side surface area and the edge specific area of ​​the conductive layer of the conductive backplane disclosed in the embodiment of the present application is at least greater than or equal to the remaining area of ​​the effective area (except the side surface area and the edge specific area), thereby improving the electrical isolation performance between adjacent effective areas and improving the safety and reliability of the conductive backplane.

[0053] In an independent embodiment within the scope of the present invention or on the basis of one or more of the above embodiments, at least one of the first region 2111, the second region 2211 and the third region 23 of the conductive layer 2 in the above embodiments can be processed so that at least one region has a concave wave structure, and the wave crest of the wave structure does not exceed the reserved point of the invalid region 24 closest to the conductive layer in the conductive backplane, which is located on the mapping area of ​​the conductive layer 2 (that is, the conductive glue action point on the effective region of the conductive backplane closest to the waste removal channel, which can be referred to Figure 3 In a preferred embodiment, the side surface of the effective area of ​​the conductive layer (corresponding to the opening 31 of the adhesive film 3 closest to the ineffective area 24) can be Figure 5 The third area 23) and the edge specific area surface (corresponding to Figure 4-1 The second region 2211 and / or Figure 4-2 The first area 2111 of the conductive backplane is subjected to structural processing, so that the side surface of the effective area and the edge specific area (which can be the first area 2111 and / or the second area 2211) have a concave wave structure, and the wave crest of the wave structure does not exceed the mapping area of ​​the reserved point closest to the ineffective area 24 of the conductive layer 2 in the conductive backplane on the conductive layer. In a further preferred embodiment, as shown in the attached Figure 6 As shown, a staggered concave wave structure can be set on two opposite side surfaces (i.e., the third area 23) of the adjacent second effective area 221. It should be noted that the "wave structure" here is only a summary of the shape of the concave structure. The concave structure can also be a pyramid or other similar shape. The concave wave structure can be continuous or scattered, and can be regular or irregular. The technical solution of this embodiment can increase the electrical isolation distance of the adjacent second effective area 221 by setting a concave structure on the side surface and / or edge specific area of ​​the second effective area 221 on the basis of the determined width of the invalid area 24 (i.e., the spacing distance between adjacent second effective areas 221, which can also be called the electrical isolation distance) or without changing the design width of the invalid area 24, thereby improving the safety of the conductive backplane.

[0054] On the basis of the above embodiments or in some independent embodiments within the scope of the present invention, the roughness Ra1 of the functional surface of the first metal layer 21 is not equal to the roughness Ra2 of the functional surface of the second metal layer 22. And / or, the material of the first metal layer 21 is different from the material of the second metal layer 22. Since the materials of the first metal layer 21 and the second metal layer 22 are different, the second metal layer 22 for electrical contact with the battery cell 4 can be separated to select a material with better conductive performance, and the first metal layer 21 in contact with the carrier 1 can select a material with lower cost, thereby satisfying that the conductive layer 2 has good conductive performance and reducing the unit material cost. Based on the synergistic effect of improving the bonding reliability between the conductive layer 2 and the carrier 1 and improving the reflectivity of the second metal layer 22, thereby improving the photoelectric conversion efficiency, and improving the efficiency of the conductive adhesive process and the reliability of the conductive adhesive, Ra1 and Ra2 are selected to be unequal. In some embodiments of the present application, the conductive layer can be a metal conductive layer such as copper foil, aluminum foil, zinc foil, etc., or it can be a copper foil containing doped elements such as nickel, aluminum foil, etc. doped metal foil. For example, the first metal layer 21 may be an aluminum foil (including doped aluminum foil), and the roughness Ra1 of the functional surface of the aluminum foil is 0.3 μm to 0.5 μm, specifically 0.3 μm, 0.35 μm, 0.4 μm, 0.45 μm, 0.5 μm, etc. The second metal layer 22 may be a copper foil (including doped copper foil), and the roughness Ra2 of the functional surface of the copper foil is 0.05 μm to 0.2 μm, specifically 0.05 μm, 0.1 μm, 0.15 μm, 0.2 μm, etc. The copper foil may be rolled on the aluminum foil, or copper may be electroplated on the aluminum foil. The first metal layer 21 in contact with the carrier 1 is made of aluminum foil, which can reduce the cost of the conductive layer 2. The second metal layer 22 for electrical contact with the cell 4 is made of copper foil, which can improve the conductivity of the cell 4. The roughness Ra1 of the functional surface of the aluminum foil is 0.3μm~0.5μm, which improves the adhesion between the aluminum foil and the carrier 1 and the reliability of the photovoltaic module. At the same time, the roughness Ra2 of the functional surface of the copper foil is 0.05μm~0.2μm. The copper foil with low roughness can improve the reflectivity, which is beneficial for the cell to absorb light and improve the photoelectric conversion efficiency. In addition, considering the subsequent conductive adhesive process, the roughness of the functional surface of the copper foil in contact with the cell 4 in this application can promote the fluidity of the adhesive film fluid and increase the bonding area of ​​the two sides of the subsequent molten conductive adhesive solidified adhesive, that is, improve the flow introduction efficiency of the molten conductive adhesive in the conductive adhesive process and the reliability of the conductive adhesive, and reduce the stress between the conductive adhesive and the cell 4 and the copper foil, avoiding the occurrence of hidden cracks in the cell 4 due to high stress.

[0055] The following is an example of the second metal layer 22 disclosed in the present application being a copper foil metal layer with a functional surface roughness of 0.15 μm, and a comparison of reflectivity and power with a copper foil with a functional surface roughness of 0.3 μm or more in a conventional conductive backplane, as shown in Tables 1 and Figure 2 As shown:

[0056] Table 1. Power data comparison of 72-panel photovoltaic modules with roughness copper foil disclosed in this application and conventional conductive backplane copper foil

[0057]

[0058] like Figure 2 As shown in Table 1, the surface average reflectivity of the second metal layer copper foil with a conductive layer roughness of 0.15μm in this application is 83.5, and the surface average reflectivity of the copper foil conductive layer with a conventional conductive backplane roughness equal to or greater than 0.3μm is 74.0. It is obvious that the reflectivity of the low-roughness copper foil in this application has been significantly improved. It can be seen from Table 1 that the conductive layer in this application increases the average power of the same 72-panel photovoltaic module by about 2.43W by processing the functional surface roughness of the second metal layer copper foil to 0.15μm.

[0059] In some embodiments, the thickness of the conductive layer 2 is 30 μm to 100 μm, specifically 30 μm, 40 μm, 50 μm, 55 μm, 60 μm, 70 μm, 80 μm, 90 μm, 100 μm, etc. For example, when the first metal layer 21 is aluminum foil and the second metal layer 22 is copper foil, the thickness of the aluminum foil can be 27 μm to 97 μm, accounting for 80% to 90% of the overall thickness of the conductive layer 2; the thickness of the copper foil can be 3 μm to 20 μm, accounting for 10% to 20% of the overall thickness of the conductive layer 2. In this way, the unit material cost of the conductive layer 2 can be reduced while the conductive layer 2 has better conductivity.

[0060] In some embodiments, the tensile strength of the conductive layer 2 is greater than or equal to 200 MPa, and / or the resistivity of the conductive layer 2 is less than or equal to 5×10 -8 The conductive layer 2 can simultaneously meet the requirements of sufficient mechanical strength and good conductive performance.

[0061] Of course, the material of the conductive layer 2 can also be copper-aluminum, aluminum foil, copper foil aluminum-plated, copper foil nickel-plated, copper foil tin-plated, aluminum foil copper-plated, aluminum foil tin-plated, aluminum foil nickel-plated, etc. The materials of the first metal layer 21 and the second metal layer 22 are the same or different, and appropriate materials are selected according to the conductive properties and material costs, thereby expanding the range of material selection.

[0062] In some independent embodiments within the scope of the present invention or on the basis of the above embodiments, such as Figure 1As shown, in some embodiments, the conductive backplane also includes an adhesive film 3 disposed on the second metal layer 22, and the second metal layer 22 is connected to the battery cell 4 through the adhesive film 3. The electrical connection between the conductive layer 2 and the battery cell 4 is achieved by introducing the conductive adhesive into the opening 31 disposed on the adhesive film 3, that is, the introduction of the adhesive film 3 can not only realize the conductive connection between the second effective area 221 on the second metal layer 22 and the corresponding conductive area on the battery cell 4 (which can be the PAD point on the battery cell), but also can cooperate with the ineffective area 24 (i.e. the waste area) of the conductive layer 2 to effectively achieve the insulation between different conductive areas of the battery cell 4. In addition, the efficiency of the conductive adhesive process and the reliability of the conductive adhesive are improved by the second metal layer 22 with low roughness, and the stress between the conductive adhesive and the battery cell 4 and the second metal layer 22 is reduced, so as to avoid the battery cell 4 from having hidden cracks due to high stress.

[0063] like Figure 7 As shown, based on the conductive backplane conceived in the present application or the conductive backplane described in any of the above embodiments, an embodiment of the present invention further provides a method for manufacturing a conductive backplane, comprising the following steps:

[0064] Step S100, as Figure 1 As shown, a carrier board 1 is provided; the carrier board 1 can be a thermoplastic material or a glass material with an adhesive layer, etc. The carrier board 1 can be a multi-layer composite material or a single-layer material, as long as it can be bonded to the conductive layer 2 and has the characteristics of load-bearing, sealing, corrosion resistance, high temperature resistance, etc., and no specific limitation is made here.

[0065] Step S200, providing a conductive layer 2 composed of at least a first metal layer 21 and a second metal layer 22 stacked together; wherein the first metal layer 21 is disposed on the carrier 1, and the second metal layer 22 is disposed on the first metal layer 21, and the roughness Ra1 of the functional surface of the first metal layer 21 is 0.3μm~0.5μm, and the roughness Ra2 of the functional surface of the second metal layer 22 is 0.02μm~0.3μm. The first metal layer 21 and the second metal layer 22 can be stacked as a whole by mechanical pressing, or the second metal layer 22 can be electroplated on the first metal layer 21 by electroplating. The description of the functional surface can refer to the description in the above-mentioned conductive backplane embodiment, which will not be repeated here. In a preferred embodiment, the roughness of the functional surface of the first metal layer 21 is 0.45 μm, and the roughness of the functional surface of the second metal layer 22 is 0.15 μm. Compared with the prior art in which the roughness of the functional surface of the conductive layer is generally greater than or equal to 0.3 μm, the present application adopts a comprehensive design scheme of increasing the roughness of the functional surface in contact with the carrier 1 and reducing the roughness of the functional surface close to the battery cell 4. The technical effect is the same as that described in the above-mentioned conductive backplane embodiment and will not be repeated here.

[0066] Step S300, composite the carrier 1 and the conductive layer 2; the carrier 1 and the conductive layer 2 can be composited into one by hot pressing or room temperature pressing, and the contact layer between the carrier 1 and the first metal layer 21 has fluidity for at least a period of time during the composite process.

[0067] The conductive backplane described in the above embodiment can be manufactured by the manufacturing method of the conductive backplane, and thus has the same beneficial effects as the above conductive backplane embodiment, which will not be described in detail.

[0068] In some embodiments, providing a conductive layer 2 composed of at least a first metal layer 21 and a second metal layer 22 stacked in step S200 also includes the step of: patterning the conductive layer 2; wherein the patterning of the conductive layer 2 includes: die-cutting the conductive layer 2 according to a prefabricated circuit pattern (i.e., a pre-designed pattern pattern), and the patterning of the conductive layer 2 can be performed by mechanical die-cutting, chemical etching, milling machine, etc. in addition to laser die-cutting. In some embodiments, the patterning die-cutting process can be performed by irradiating a laser with performance parameters such as a selected frequency, spot, and speed from one side of the first metal layer 21, or by irradiating a laser from one side of the second metal layer 22. In this way, the patterned conductive layer 2 is composited on the carrier 1, which can avoid damage to the carrier 1 by the laser, and the irradiation direction of the laser can be performed from any side of the conductive layer 2 without restriction. It should be noted that the conductive layer 2 can be patterned first, and after the invalid conductive layer is removed, the conductive layer 2 is composited with the carrier 1. Alternatively, the unpatterned conductive layer 2 can be first combined with the carrier 1 and then the conductive layer 2 can be patterned. At this time, in industrial production, it is recommended to pattern the conductive layer 2 from the second metal layer 22 surface, for example, by irradiating one side of the second metal layer 22 with a laser to complete the patterning of the stacked conductive layer 2, or by mechanical cutting according to a prefabricated pattern style in a direction perpendicular to the surface of the second metal layer 22 or at a certain inclination angle to the surface of the second metal layer 22 from the second metal layer 22 to the first metal layer 21.

[0069] In some independent embodiments within the scope of the present invention or on the basis of the above embodiments, the step S200 of providing a conductive layer 2 composed of at least a first metal layer 21 and a second metal layer 22 stacked together further includes the steps of: performing roughness treatment on the first region 2111 of the functional surface of the first metal layer 21, so that the roughness Ra3 of the first region 2111 is 0.3μm~100μm; or, performing roughness treatment on the second region 2211 of the functional surface of the second metal layer 22, so that the roughness Ra4 of the second region 2211 is 0.02μm~80μm. In the method provided in the embodiment of the present application, the conductive layer 2 composed of the first metal layer 21 and the second metal layer 22 stacked together forms an effective area, an invalid area 24 and a third area 23 during the patterning process; as Figure 4-1 and 4-2 As shown, the effective area further includes: the first effective area 211 of the first metal layer 21 and the second effective area 221 of the second metal layer 22; the first effective area 211 of the first metal layer 21 includes the first area 2111 of the functional surface of the first metal layer 21 and the remaining area of ​​the first metal layer 21 (i.e., the remaining effective area of ​​the first metal layer 21 except the first area 2111), and the second effective area 221 of the second metal layer 22 includes the second area 2211 of the functional surface of the second metal layer 22 and the remaining area of ​​the second metal layer 22 (i.e., the remaining effective area of ​​the second metal layer 22 except the first area 2211). Now, in combination with the introduction of the above areas, the roughness treatment of the first area 2111 and the second area 2211 is exemplarily introduced:

[0070] (1) If Figure 4-2 As shown in the accompanying drawings, when the conductive layer 2 is patterned from the first metal layer 21 surface according to the pre-designed pattern or the ineffective area 24 of the conductive layer 2 is peeled off from the first metal layer 21 surface, the first area 2111 of the functional surface of the first metal layer 21 can be roughened so that the roughness Ra3 of the first area 2111 is 0.3μm~100μm. The roughness treatment method can be adopted in a variety of ways, such as mechanical method, chemical method, etc. The present application discloses that when the first area 2111 ranges from 10μm to 100μm, the patterning of the conductive layer 2 with a thickness range of 40μm-60μm and the roughness treatment of a specific area by laser engraving can be combined: the frequency range is 50-500Hz, the widest range of the spot is 50μm, the operating speed range is 1000-20000mm / s, preferably 6700mm / s, and the laser is used to engrave and sinter the conductive layer 2 according to a preset circuit pattern or a preset graphic screen.

[0071] (2) If Figure 3 and 4-1As shown in the accompanying drawings, when the conductive layer 2 is patterned from the second metal layer 22 surface according to a pre-designed pattern or when the invalid area 24 of the conductive layer 2 is peeled off from the second metal layer 22 surface, the roughness Ra4 of the second area 2211 of the functional surface of the second metal layer 22 is 0.02μm~80μm, and the processing method can refer to the above-mentioned processing of the roughness of the first area 2111 of the first metal layer 21.

[0072] It should be noted that the effective area, the invalid area 24, the first area 2111, the second area 2211 and the third area 23 involved in the method disclosed in the embodiment of the present application are consistent with or correspond to the same expressions or indications as the various areas in the aforementioned embodiment of the conductive backplane disclosed above, and are corresponding in definition, scope and other limiting factors, so they are not repeated in this method introduction.

[0073] In the above-mentioned embodiments, the roughness treatment of the first area 2111 of the first metal layer 21 of the conductive layer 2 or the second area 2211 of the second metal layer 22 facilitates the effective contact between the stripping device and the conductive layer 2 during the patterning process and can efficiently strip the invalid area 24 located on the area, so as to facilitate the completion of the waste removal process, wherein the stripping device can be an adsorption stripping device, a mechanical tearing stripping device, or other stripping devices that need to use roughness to enhance contact. It should be noted that in some preferred embodiments, the roughness treatment of the first area 2111 and the patterning process of the conductive layer 2, or the roughness treatment of the second area 2211 and the patterning process of the conductive layer 2 can be completed in the same process and / or using the same or identical process.

[0074] In some independent embodiments within the scope of the present invention or on the basis of the above embodiments, the step S200 of providing the conductive layer 2 composed of at least the first metal layer 21 and the second metal layer 22 further comprises the steps of:

[0075] The third region 23 of the conductive layer 2 is subjected to roughness treatment so that the roughness of the third region 23 is 0.1 μm to 80 μm. Figure 5As shown, the third region 23 is a side region formed between each effective region of the patterned or patterned conductive layer 2 and the adjacent invalid region 24, and the side region is located between the functional surface of the first metal layer 21 and the functional surface of the second metal layer 22. Since the conductive layer 2 is composed of at least the first metal layer 21 and the second metal layer 22 stacked, the third region 23 includes two stacked parts, namely the side region of the first metal layer 21 and the side region of the second metal layer 22. The roughness of the side region of the first metal layer 21 and the roughness of the side region of the second metal layer 22 can be the same or different. In some embodiments, the roughness of the third region 23 can be between 0.1μm and 80μm, preferably between 3μm and 80μm; in some embodiments, the roughness of the third region 23 can be between 3μm and 40μm. It should be noted that in some preferred embodiments, the processing of the roughness of the third region 23 and the patterning process of the conductive layer 2 can be completed in the same process and / or using the same or identical process.

[0076] In the above-mentioned embodiment, the roughness of the first metal layer functional surface, the second metal layer functional surface, the specific area of ​​the effective area and the side surface of the effective area of ​​the conductive layer can be processed in a variety of ways, including at least one of laser processing, mechanical processing and chemical processing. For example, the mechanical processing method can increase the roughness of the surface of the first metal layer by friction, cutting and grinding. For example, the surface of the first metal layer is processed using sandpaper or a grinding wheel to increase the roughness of the functional surface of the first metal layer. The chemical method is also called an etching method. The functional surface of the first metal layer is processed using chemical substances such as acid and alkali to remove part of the metal surface, forming a rougher surface, thereby increasing its surface roughness. In particular, the nitrous oxide method is used to increase the roughness of the metal surface through a certain nitrogen and oxygen concentration and reaction time. Of course, the above roughness processing method can also reduce the roughness of the second metal layer, such as mechanical polishing, electrochemical polishing and chemical mechanical polishing. Mechanical polishing can use mechanical methods such as grinding and grinding polishing to process the surface of the second metal layer. Its surface roughness can be reduced by adjusting the polishing agent, polishing mechanical parameters, etc. Electrochemical polishing applies voltage and current to the surface of the second metal layer, and chemically reacts in the ion solution to cause the ions on the metal surface to fall off, thereby achieving the polishing effect. Compared with mechanical polishing, electrochemical polishing can more effectively reduce the surface roughness, and can treat the surface more evenly without causing damage, scratches, and other problems on the surface. Chemical mechanical polishing is a processing method that combines electrochemical polishing and mechanical polishing. It makes full use of the advantages of electrochemical reaction and mechanical action, and processes by controlling parameters such as polishing agent, polishing pressure, and polishing time to effectively reduce the roughness of the metal surface. It should be noted that in some preferred embodiments, the process of laser processing the roughness of the first region, the second region, and the third region of the conductive layer can be placed in the same processing step as the process of laser patterning of the conductive layer to simplify the process steps. Of course, the first, second, and third regions can also be treated with roughness separately, and the roughness treatment method can also be mechanical method, chemical method, etc.

[0077] The design of the roughness of the functional surface of the conductive layer metal layer, the design of the roughness of the specific area of ​​the conductive layer, the design of the roughness of the first area, the second area and the third area of ​​the conductive layer disclosed in the above-mentioned embodiments are not only based on the reliability of the conductive backplane and the photovoltaic module, but also based on the photoelectric conversion efficiency of the photovoltaic module, the unit time cost and the conductive backplane composite, the photovoltaic module production process rhythm and the overall production efficiency, providing an overall design scheme to achieve the effects of high synergistic photovoltaic cell conversion efficiency, low unit manufacturing cost, high unit production efficiency and high module reliability.

[0078] In some independent embodiments of the manufacturing method disclosed in the present application or on the basis of the aforementioned embodiments, before the composite conductive layer 2 and the carrier 1 are formed, the manufacturing method further includes the steps of: processing the volume resistivity of the side surface and edge specific areas of the effective area of ​​the conductive layer 2 (including the edge specific areas of the upper surface or / and the lower surface of the effective area of ​​the conductive layer) so that the volume resistivity of these areas is greater than the volume resistivity of the remaining areas of the effective area. There are many methods for processing the volume resistivity. These areas can be doped with group V or group VI elements, and these areas can be sprayed with insulating materials such as alumina ceramics, etc., as disclosed in the aforementioned conductive backplane embodiment. Other chemical or physical methods can also be used to process the volume resistivity of the area. The present application discloses a method for manufacturing a conductive backplane consisting of at least a first metal layer and a second metal layer disclosed in the aforementioned embodiment using the scheme of this embodiment as follows:

[0079] The volume resistivity of the first region 2111 and the third region 23 processed by laser ablation or chemical reaction is greater than the volume resistivity of the remaining regions of the first metal layer 21 (i.e., the regions of the first metal layer 21 remaining except the first region 2111 and the third region 23); or, the volume resistivity of the second region 2211 and the third region 23 processed by laser ablation or chemical reaction is greater than the volume resistivity of the remaining regions of the second metal layer 22 (i.e., the regions of the second metal layer 22 remaining except the second region 2211 and the third region 23); or, the volume resistivity of the first region 2111, the second region 2211 and the third region 23 processed by laser ablation or chemical reaction is greater than the volume resistivity of the remaining regions of the conductive layer 2 (i.e., the effective regions of the conductive layer 2 remaining except the first region 2111, the second region 2211 and the third region 23). The laser can be selected to be 50-500 Hz and have a circular spot diameter of 10-100 μm to sinter the first region 2111 and / or the second region 2211, and the ineffective region 24. The chemical process can be CVD, PECVD, etc. disclosed in the above conductive backplane embodiment to form a deposited film containing sulfur, phosphorus or sulfur-phosphorus compounds in these regions; insulating materials such as alumina ceramics can also be sprayed on these regions.

[0080] In some independent embodiments of the manufacturing method disclosed in the present application or on the basis of the above embodiments, before the composite carrier 1 and the conductive layer 2 are combined, the preparation method further includes the following steps:

[0081] At least one of the first area 2111, the second area 2211 and the third area 23 is processed by laser etching or chemical etching, so that at least one area has a concave wave structure, and the wave crest of the wave structure does not exceed the mapping area of ​​the reserved point of the invalid area 24 closest to the conductive layer 2 on the conductive backplane on the conductive layer 2. The laser parameters of the etching can be a frequency of 50-500Hz, and the light spot can be set according to the vertical distance from the conductive glue action point closest to the invalid area 24 on the effective area to the boundary line of the effective area (generally not exceeding the vertical distance). Chemical etching can be processed by chemical etchants such as hydrochloric acid or ferric chloride. During the processing, the concentration, temperature, corrosion time, etc. of the chemical etchant are controlled according to the size of the desired concave structure. For general technicians in this field, it only takes limited experiments according to the set goals and the selected etchants, reaction time and environment to know.

[0082] Under the concept of the present invention or on the basis of the above-mentioned embodiments, a method for manufacturing a conductive backplane with a first metal layer of aluminum foil and a second metal layer of copper foil constituting a conductive layer disclosed in the above-mentioned embodiments using the manufacturing method of the present application is disclosed as follows:

[0083] Step 1: Provide a conductive layer 2 composed of aluminum foil and copper foil; the conductive layer 2 can be preliminarily laminated by mechanical lamination or electroplating. The roughness of the functional surface of the aluminum foil is processed to 0.45 μm, and the roughness of the copper foil is processed to 0.15 μm. The overall thickness of the copper-aluminum foil conductive layer can be 40 μm-60 μm, preferably 55 μm. The average volume resistivity of the conductive layer 2 is 3.15×10 -8 Ωm.

[0084] Step 2-1, treating the conductive layer 2. The treatment process is: according to the performance of the conductive layer provided in step 1, a frequency of 177 Hz is selected (or other preferred values ​​in the range of 50 Hz-500 Hz are selected according to the performance of the conductive layer), a laser with a circular cursor diameter of 50 μm is used at a power of 100%, a speed of 1000-20000 nm / s (preferably 6700 nm / s), a temperature of 5-55 degrees Celsius (preferably 15-40 degrees Celsius), 0.5-2 atmospheres (preferably 1 atmosphere), and an oxygen content of 10%-30% of the total gas. The conductive layer 2 is engraved and sintered from the copper foil functional surface according to the prefabricated circuit pattern, and the roughness of the second region of the copper foil effective region is 0.02 μm-80 μm, and the roughness of the side surface of the conductive layer effective region is 0.1 μm-80 μm. The average volume resistivity of the second region 2211 and the third region 23 is 3.2×10 -8 Ωm.

[0085] Step 2-2, this step is used as a substitute for step 2-1 or as a preference based on step 2-1. The conductive layer 2 is processed, and the processing process is to select a laser with a frequency of 177Hz and a circular cursor diameter of 50μm, and the power is 100%, and the speed is 1000-20000nm / s (preferably 6700nm / s) to intervene from the copper foil functional surface to perform engraving and sintering processing on the conductive layer 2 according to the preset circuit pattern. During this processing, the spraying device set at the position of the laser head is started to spray the aluminum oxide ceramic material on the boundary area of ​​the effective area synchronously, and the spraying area is controlled to extend 0.1μm-20mm (preferably 5mm) from the boundary of the effective area to the effective area, so that the roughness of the effective area boundary of the copper foil functional surface of the conductive layer is 0.02μm-80μm, and the roughness of the side surface of the effective area of ​​the conductive layer is 0.1μm-80μm, and the volume resistivity of these areas is 5.1×10 -8 Ωm.

[0086] Step 3: laser engraving is performed on the side surface of the effective area of ​​the conductive layer and the specific edge area (which may be the first area 2111 of the aluminum foil of the first metal layer and / or the second area 2211 of the copper foil of the second metal layer), wherein the selected laser parameters are 50-500Hz, the spot pattern may be circular, rectangular, etc., and the spot diameter needs to be limited and designed according to the vertical distance from the effective area to the boundary line of the effective area of ​​the conductive glue introduced in the back-end process on the functional surface of the conductive layer copper foil, so that the formed concave structure shall not exceed the point of action of the conductive glue on the copper foil closest to the ineffective area of ​​the conductive layer, so that a concave wave structure is formed on the side surface and the specific edge area. In a further preferred embodiment, a staggered concave wave structure can be formed on two opposite side surfaces of adjacent effective areas.

[0087] Step 4: Provide an insulating carrier board, and press the carrier board 1 and the conductive layer 2 processed in the above steps to obtain a pressed product.

[0088] Step 5: Provide the adhesive film 3, and compound the adhesive film 3 with the pressed product obtained in step 4.

[0089] It should be noted that the above steps 1-5 are merely examples and do not constitute any limitation on the process, process and steps of the manufacturing method disclosed in the present application.

[0090] In some independent embodiments within the scope of the present invention or based on the above embodiments, the manufacturing method disclosed in this application further includes the following steps:

[0091] Providing an adhesive film 3 and disposing it on the second metal layer 22;

[0092] Composite carrier 1, conductive layer 2 and adhesive film 3.

[0093] In one example, the adhesive film 3 can be disposed on the second metal layer 22 before the composite carrier 1 and the conductive layer 2 in step S300. Accordingly, the one-time composite carrier 1, the conductive layer 2 and the adhesive film 3 in step S300 can obtain a conductive backplane. This operation can simplify the composite process and improve manufacturing efficiency.

[0094] In another example, the composite carrier 1 and the conductive layer 2 in step S300 may be completed first to form a semi-finished product, and then the adhesive film 3 may be disposed on the second metal layer 22, and the adhesive film 3 and the semi-finished product may be composited for a second time to obtain a conductive backplane.

[0095] When the above technical solution is adopted, the carrier 1, the conductive layer 2 and the adhesive film 3 are compounded together into a whole, the second metal layer 22 and the battery cell 4 are connected through the adhesive film 3, and the electrical connection between the conductive layer 2 and the battery cell 4 is achieved by introducing conductive adhesive into the opening 31 set on the adhesive film 3. That is, the introduction of the adhesive film 3 can not only achieve the conductive connection between the second effective area on the second metal layer 22 and the corresponding conductive area on the battery cell 4 (which can be the PAD point on the battery cell), but also can cooperate with the ineffective area 24 (i.e., the waste removal via) of the conductive layer 2 to effectively achieve the insulation between different conductive areas of the battery cell.

[0096] It should be noted that in some conductive backplane production processes where the production rhythm and process design are coordinated, those skilled in the art may adjust the operation sequence of some or all of the other production processes such as the patterning process, roughness treatment process, volume resistivity treatment process and the process of setting the concave wavy body structure disclosed in this application according to the reasonable design of the production rhythm and process, merge the processes, and use the same or similar technical means to complete the above-mentioned conductive layer treatment process or technology in the same process to reduce the production cost per unit time and improve production efficiency, but these all fall within the scope of inclusion and protection of this application and do not exceed the inventive concept of this application.

[0097] The conductive backplane and manufacturing method disclosed in the present application as an overall design scheme achieve the effects of coordinated photovoltaic cell conversion efficiency, low unit manufacturing cost, high unit production efficiency, and high component reliability. In some optional implementation schemes, based on the convenience of the subsequent process of stripping the invalid area (waste area) of the conductive layer, the stripping efficiency and the effectiveness of the stripping, the present application also performs roughness treatment on the edge specific area of ​​each effective area (or effective unit, effective area unit, etc. with similar functions) of the functional surface of the conductive metal layer. And based on the electrical isolation requirements between adjacent conductive effective area units of the conductive backplane conductive layer, the present application performs roughness treatment on the side surface (i.e., the third area) of each effective area of ​​the conductive layer to improve or ensure the electrical isolation performance of the two adjacent effective areas, further improving the reliability of the conductive backplane product and the reliability of the conductive backplane assembly. In some implementation schemes of the present application, based on the high requirements for the safety of photovoltaic module products, the present application also discloses processing the edge areas and side surface areas of the effective area of ​​the conductive layer to increase the volume resistivity of these areas, and performing concave wavy body structure processing on these area surfaces to further effectively improve the electrical isolation performance of adjacent effective areas of the conductive layer, thereby improving the product electrical safety requirements of the conductive backplane and improving the safety of photovoltaic modules using the conductive backplane.

[0098] Based on the conductive backplane described in any of the above embodiments, the embodiment of the present invention further provides a photovoltaic module, which mainly includes a module frame, a packaging cover, a battery cell, a packaging film, and the conductive backplane described in any of the above embodiments and a junction box. In some embodiments, the packaging cover is a transparent cover for light transmission. In this embodiment, the packaging cover, the packaging film, the battery cell and the conductive backplane are stacked in sequence and then a frame and a junction box are added. The photovoltaic module has the same beneficial effects as the conductive backplane in any of the above embodiments, which will not be repeated here.

[0099] The photovoltaic module with the conductive back plate can be suitable for heterojunction cell photovoltaic modules, back contact cell photovoltaic modules, main grid-free cell photovoltaic modules, etc.

[0100] In the description of the above embodiments, specific features, structures, materials or characteristics may be combined in a suitable manner in any one or more embodiments or examples.

[0101] The above is only a specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art can easily think of changes or substitutions within the technical scope disclosed by the present invention, which should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention should be based on the protection scope of the claims.

Claims

1. A conductive backplane, characterized in that: including a carrier and a patterned conductive layer; The conductive layer at least includes a first metal layer and a second metal layer stacked together, the first metal layer is disposed on the carrier, and the second metal layer is disposed on the first metal layer; The roughness Ra1 of the functional surface of the first metal layer is 0.3 μm to 0.5 μm; The roughness Ra2 of the functional surface of the second metal layer is 0.02 μm-0.3 μm.

2. The conductive backplane according to claim 1, characterized in that: The patterned conductive layer includes an effective area and an ineffective area; the effective area includes a first effective area of ​​a first metal layer and a second effective area of ​​a second metal layer; the first effective area includes a first area of ​​a functional surface of the first metal layer, and the second effective area includes a second area of ​​a functional surface of the second metal layer; The roughness Ra3 of the first area is 0.3 μm to 100 μm; The first area is an area extending from the boundary of the first effective area to the first effective area, and the extension distance of the first area does not exceed the mapping area of ​​the reserved point of the conductive backplane on the functional surface of the first metal layer, wherein the reserved point is a conductive glue pre-action area; Alternatively, the roughness Ra4 of the second area is 0.02μm~80μm; wherein the second area is an area spreading from the boundary of the second effective area into the second effective area, and the spreading distance of the second area does not exceed the mapping area of ​​the reserved point of the conductive backplane on the functional surface of the second metal layer, wherein the reserved point is a pre-action area of ​​the conductive glue.

3. The conductive backplane according to claim 2, characterized in that: The spreading distance of the first region is 10 μm to 100 μm; Alternatively, the spreading distance of the second region is 10 μm to 100 μm.

4. The conductive backplane according to claim 1 or 2, characterized in that: The conductive layer includes a third region, and the roughness of the third region is 0.1 μm to 80 μm.

5. The conductive backplane according to claim 1 or 2, characterized in that: The conductive layer includes an effective area, an ineffective area and a third area; The effective area includes a first effective area of ​​the first metal layer and a second effective area of ​​the second metal layer; the first effective area includes a first area of ​​the functional surface of the first metal layer and the remaining area of ​​the first metal layer, and the second effective area includes a second area of ​​the functional surface of the second metal layer and the remaining area of ​​the second metal layer; The first area is an area extending from the boundary of the first effective area to the first effective area, and the extension distance of the first area does not exceed the mapping area of ​​the reserved point of the conductive backplane on the functional surface of the first metal layer; the second area is an area extending from the boundary of the second effective area to the second effective area, and the extension distance of the second area does not exceed the mapping area of ​​the reserved point of the conductive backplane on the functional surface of the second metal layer; The third area is the side surface of the effective area of ​​the conductive layer; wherein the reserved point is the conductive glue pre-action area; The volume resistivity of the first region and the third region is greater than the volume resistivity of the remaining regions of the first metal layer; Alternatively, the volume resistivity of the second region and the third region is greater than the volume resistivity of the remaining regions of the second metal layer; Alternatively, the volume resistivity of the first region, the second region, and the third region is greater than the volume resistivity of the remaining regions of the conductive layer.

6. The conductive backplane according to claim 5, characterized in that: The spreading distance of the first region is 10 μm to 100 μm; or the spreading distance of the second region is 10 μm to 100 μm.

7. The conductive backplane according to claim 5, characterized in that: The volume resistivity of the first region and / or the second region, and the third region is 3.15×10 -8 Ωm~5×10 -8 Ωm.

8. The conductive backplane according to claim 1 or 2, characterized in that: The conductive layer includes an effective area, an ineffective area and a third area; The effective area includes a first effective area of ​​the first metal layer and a second effective area of ​​the second metal layer; the first effective area includes a first area of ​​the functional surface of the first metal layer and the remaining area of ​​the first metal layer, and the second effective area includes a second area of ​​the functional surface of the second metal layer and the remaining area of ​​the second metal layer; The first area is an area extending from the boundary of the first effective area to the first effective area, and the extension distance of the first area does not exceed the mapping area of ​​the reserved point of the conductive backplane on the functional surface of the first metal layer; the second area is an area extending from the boundary of the second effective area to the second effective area, and the extension distance of the second area does not exceed the mapping area of ​​the reserved point of the conductive backplane on the functional surface of the second metal layer; The third area is the side surface of the effective area of ​​the conductive layer; wherein the reserved point is the conductive glue pre-action area; At least one of the first area, the second area and the third area has a wave structure which is concave with the third area as a reference plane; the wave crest of the wave structure does not exceed the mapping area on the conductive layer of the reserved point of the invalid area of ​​the conductive backplane closest to the conductive layer.

9. The conductive backplane according to claim 8, characterized in that: The wave structure on the third area of ​​two adjacent effective areas is arranged with staggered peaks.

10. The conductive backplane according to claim 3, 6 or 9, characterized in that: The Ra1 is not equal to the Ra2; And / or, the material of the first metal layer is different from the material of the second metal layer.

11. The conductive backplane according to claim 10, characterized in that: The first metal layer is aluminum foil; the second metal layer is copper foil, and the Ra2 is 0.05 μm to 0.2 μm.

12. The conductive backplane according to claim 3, 6 or 9, characterized in that: The thickness of the conductive layer is 30 μm to 100 μm; And / or, the tensile strength of the conductive layer is greater than or equal to 200 MPa; And / or, the resistivity of the conductive layer is less than or equal to 5×10 -8 Ωm.

13. The conductive backplane according to claim 12, characterized in that: The conductive backplane also includes an adhesive film disposed on the second metal layer.

14. A method for manufacturing a conductive backplane, characterized in that: include: Providing a carrier board; Providing a conductive layer composed of at least a first metal layer and a second metal layer stacked together; wherein the first metal layer is disposed on the carrier, the second metal layer is disposed on the first metal layer, the roughness Ra1 of the functional surface of the first metal layer is 0.3 μm to 0.5 μm, and the roughness Ra2 of the functional surface of the second metal layer is 0.02 μm to 0.3 μm; The carrier board and the conductive layer are composited.

15. The manufacturing method according to claim 14, characterized in that: Providing a conductive layer composed of at least a first metal layer and a second metal layer stacked together further comprises patterning the conductive layer; The patterning of the conductive layer includes: die-cutting the conductive layer according to a prefabricated circuit pattern.

16. The manufacturing method according to claim 15, characterized in that: The conductive layer includes an effective area, an ineffective area and a third area; the effective area includes a first effective area of ​​the first metal layer and a second effective area of ​​the second metal layer; the first effective area includes a first area of ​​a functional surface of the first metal layer and the remaining area of ​​the first metal layer, the second effective area includes a second area of ​​a functional surface of the second metal layer and the remaining area of ​​the second metal layer, the first area is an area extending from a boundary of the first effective area to the first effective area, and the extending distance of the first area does not exceed a mapping area of ​​a reserved point of the conductive backplane on the functional surface of the first metal layer; the second area is an area extending from a boundary of the second effective area to the second effective area, and the extending distance of the second area does not exceed a mapping area of ​​a reserved point of the conductive backplane on the functional surface of the second metal layer; the third area is a side surface of the effective area of ​​the conductive layer; wherein the reserved point is a pre-action area of ​​the conductive glue; The providing of a conductive layer composed of at least a first metal layer and a second metal layer stacked together further comprises: Performing roughness treatment on the first region so that the roughness Ra3 of the first region is 0.3 μm to 100 μm; Alternatively, the second region is subjected to roughness treatment so that the roughness Ra4 of the second region is 0.02 μm to 80 μm.

17. The manufacturing method according to any one of claims 14 to 16, characterized in that: The conductive layer includes an effective area, an ineffective area and a third area; the effective area includes a first effective area of ​​the first metal layer and a second effective area of ​​the second metal layer; the first effective area includes a first area of ​​a functional surface of the first metal layer and the remaining area of ​​the first metal layer, the second effective area includes a second area of ​​a functional surface of the second metal layer and the remaining area of ​​the second metal layer, the first area is an area extending from a boundary of the first effective area to the first effective area, and the extending distance of the first area does not exceed a mapping area of ​​a reserved point of the conductive backplane on the functional surface of the first metal layer; the second area is an area extending from a boundary of the second effective area to the second effective area, and the extending distance of the second area does not exceed a mapping area of ​​a reserved point of the conductive backplane on the functional surface of the second metal layer; the third area is a side surface of the effective area of ​​the conductive layer; wherein the reserved point is a pre-action area of ​​the conductive glue; The providing of a conductive layer composed of at least a first metal layer and a second metal layer stacked together further comprises: The third region is subjected to roughness treatment so that the roughness of the third region is 0.1 μm to 80 μm.

18. The manufacturing method according to any one of claims 14 to 16, characterized in that: The conductive layer includes an effective area, an ineffective area and a third area; the effective area includes a first effective area of ​​the first metal layer and a second effective area of ​​the second metal layer; the first effective area includes a first area of ​​a functional surface of the first metal layer and the remaining area of ​​the first metal layer, the second effective area includes a second area of ​​a functional surface of the second metal layer and the remaining area of ​​the second metal layer, the first area is an area extending from a boundary of the first effective area to the first effective area, and the extending distance of the first area does not exceed a mapping area of ​​a reserved point of the conductive backplane on the functional surface of the first metal layer; the second area is an area extending from a boundary of the second effective area to the second effective area, and the extending distance of the second area does not exceed a mapping area of ​​a reserved point of the conductive backplane on the functional surface of the second metal layer; the third area is a side surface of the effective area of ​​the conductive layer; wherein the reserved point is a pre-action area of ​​the conductive glue; Before compounding the carrier board and the conductive layer, the manufacturing method further comprises: Processing the volume resistivity of the first region and the third region to be greater than the volume resistivity of the remaining regions of the first metal layer; Alternatively, the volume resistivity of the second region and the third region is processed to be greater than the volume resistivity of the remaining regions of the second metal layer; Alternatively, the volume resistivity of the first region, the second region and the third region is processed to be greater than the volume resistivity of the remaining regions of the conductive layer.

19. The manufacturing method according to claim 18, characterized in that: Methods for dealing with bulk resistivity include: Doping the first region and / or the second region, and the third region with a Group V or Group VI element; wherein the domain spreading distance of the first region is 10-100 μm; or, the domain spreading distance of the second region is 10-100 μm; Alternatively, a laser with a frequency of 50-500 Hz and a circular spot diameter of 10-100 μm is used to sinter the first region and / or the second region, and the ineffective region.

20. The manufacturing method according to any one of claims 14 to 16, characterized in that: The conductive layer includes an effective area, an ineffective area and a third area; the effective area includes a first effective area of ​​the first metal layer and a second effective area of ​​the second metal layer; the first effective area includes a first area of ​​a functional surface of the first metal layer and the remaining area of ​​the first metal layer, the second effective area includes a second area of ​​a functional surface of the second metal layer and the remaining area of ​​the second metal layer, the first area is an area extending from a boundary of the first effective area to the first effective area, and the extending distance of the first area does not exceed a mapping area of ​​a reserved point of the conductive backplane on the functional surface of the first metal layer; the second area is an area extending from a boundary of the second effective area to the second effective area, and the extending distance of the second area does not exceed a mapping area of ​​a reserved point of the conductive backplane on the functional surface of the second metal layer; the third area is a side surface of the effective area of ​​the conductive layer; wherein the reserved point is a pre-action area of ​​the conductive glue; Before compounding the carrier board and the conductive layer, the manufacturing method further comprises: At least one of the first area, the second area and the third area is processed so that the at least one area has a wave body structure which is concave with the third area as a reference plane, and the crest of the wave body structure does not exceed the mapping area on the conductive layer of the reserved point closest to the invalid area in the conductive backplane.

21. The manufacturing method according to any one of claims 14 to 16, characterized in that: Also includes: Providing an adhesive film and disposing it on the second metal layer; The carrier board, the conductive layer and the adhesive film are composited.

22. The manufacturing method according to claim 17, characterized in that: The roughness treatment method includes at least one of a laser treatment method, a mechanical treatment method, and a chemical treatment method.

23. A photovoltaic module, characterized in that: Comprising the conductive back plate as described in any one of claims 1-13.

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