A low clamping voltage EMI filter with integrated electrostatic protection function

Abstract

The present invention provides an EMI filter with low clamping voltage type integrated electrostatic protection function, comprising an N-type semiconductor substrate, an NPN transistor Q1, an NPN transistor Q2 and a resistor R, wherein the NPN transistor Q1 is provided with a first P-type well region, the NPN transistor Q2 is provided with a second P-type well region, a grounded P+ heavily doped active region and an N+ heavily doped active region connected to an I / O port 1 are provided in the first P-type well region, the bottom of the N-type semiconductor substrate is grounded, a vertical forward ESD path is formed between the N+ heavily doped active region in the first P-type well region and the bottom of the N-type semiconductor substrate, a horizontal reverse ESD path is formed between the P+ heavily doped active region in the first P-type well region and the N+ heavily doped active region, and the second P-type well region has the same structure as the first P-type well region. The beneficial effects of the present invention are: it can simultaneously realize the dual functions of electrostatic protection and electromagnetic interference filtering.

Description

Technical Field

[0001] The invention relates to the technical field of electrostatic protection, and in particular to a low clamping voltage type EMI filter with integrated electrostatic protection function. Background Art

[0002] Electromagnetic Interference (EMI) refers to the interference source (usually electronic equipment) coupling the signal on its own electrical network to another electrical network through conductive media (such as cables) or space radiation. Filters are a good EMI solution that can allow specific frequency components in the signal to pass through while greatly attenuating or suppressing other frequency components. For some applications, such as digital signals, communications, audio, images, video compression, sensor output and other signal processing circuits, low-pass filters can be used to effectively filter out high-frequency noise and retain low-frequency signal components, thereby improving signal quality.

[0003] Electrostatic discharge (ESD) refers to a phenomenon in which the charge accumulated by the human body or material is discharged to the surrounding objects through a conductive channel. The use of transient voltage suppressors (TVS) can provide efficient electrostatic protection for electronic circuits.

[0004] Currently, the design and application environment of electronic products are complex, and there are countless sources of electromagnetic interference and electrostatic discharge events. The independent or joint occurrence of EMI and ESD events will interfere with and reduce the signal integrity of electronic products, and even damage the circuit in severe cases.

[0005] Figure 1 (a) is a schematic diagram of the circuit structure of an existing typical p-type CRC low-pass filter. The low-pass filter circuit is composed of 1 resistor and 2 capacitors in series and parallel. Figure 1 (b) is a schematic diagram of the S21 curve of a typical p-type CRC low-pass filter. S21 is the insertion loss, which reflects the amplitude and phase changes of the signal when it passes through the device under test. The cut-off frequency refers to the frequency at which the filter begins to attenuate signals of a specific frequency. At this time, the low-pass filter cannot normally transmit signals higher than this frequency. The cut-off frequency is usually specified at the -3 dB point, indicating that f -3dB The corresponding output signal has dropped to 0.707 times of the maximum value. However, this circuit can only achieve filtering function.

[0006] Figure 2 (a) is a schematic diagram of the circuit structure of an existing EMI low-pass filter with integrated electrostatic protection function. This design scheme uses the parasitic capacitance of TVS to ground as the capacitor in the CRC low-pass filter circuit, which can play the role of electrostatic protection and low-pass filtering at the same time. Figure 2 (b) is a schematic diagram of the structure of using a Zener diode as a filter capacitor. Usually, the capacitor in the CRC low-pass filter circuit determines the -3 dB cutoff bandwidth. After the cutoff bandwidth is determined, the parasitic capacitance of the Zener diode to ground is also determined. In order to save layout area and manufacturing costs, it is usually inclined to increase the capacitance per unit area of ​​the Zener diode. However, in this way, the on-resistance and clamping voltage of the TVS are usually poor. Figure 2 (c) is a schematic diagram of the structure of using a PNP transistor as a filter capacitor. Like the Zener diode, due to the increase in the capacitance per unit area, the on-resistance and clamping voltage of the PNP transistor are usually poor. Summary of the invention

[0007] In order to solve the problems in the prior art, the present invention provides a low clamping voltage type EMI filter with integrated electrostatic protection function. By arranging mutually coordinated NPN transistors Q1, NPN transistors Q2 and a resistor R in the low clamping voltage type EMI filter with integrated electrostatic protection function, and utilizing the NPN transistors Q1 and NPN transistors Q2 as capacitors in a low-pass filter circuit, the dual functions of electrostatic protection and electromagnetic interference filtering can be simultaneously realized, and a very low clamping voltage can be achieved, and the layout area is small, thereby solving the problems in the prior art that a typical p-type CRC low-pass filter can only realize a filtering function, and that an EMI low-pass filter with integrated electrostatic protection function has poor TVS on-resistance and clamping voltage, and occupies a huge layout area.

[0008] The present invention provides a low clamping voltage type EMI filter with integrated electrostatic protection function, comprising an N-type semiconductor substrate and an NPN transistor Q1, an NPN transistor Q2 and a resistor R arranged on the N-type semiconductor substrate, wherein the NPN transistor Q1 is provided with a first P-type well region, the NPN transistor Q2 is provided with a second P-type well region, a grounded P+ heavily doped active region and an N+ heavily doped active region connected to the positive electrode of the EMI filter are provided in the first P-type well region, the positive electrode of the EMI filter is connected to an I / O port 1, the bottom of the N-type semiconductor substrate is grounded, and a vertical connection is formed between the N+ heavily doped active region in the first P-type well region and the bottom of the N-type semiconductor substrate. A forward ESD path in a vertical direction is formed between the P+ heavily doped active area and the N+ heavily doped active area in the first P-type well region, a reverse ESD path in a horizontal direction is formed between the P+ heavily doped active area and the N+ heavily doped active area in the second P-type well region, a grounded P+ heavily doped active area and an N+ heavily doped active area connected to the negative pole of the EMI filter are provided in the second P-type well region, the negative pole of the EMI filter is connected to the I / O port 2, the bottom of the N-type semiconductor substrate is grounded, a forward ESD path in a vertical direction is formed between the N+ heavily doped active area in the second P-type well region and the bottom of the N-type semiconductor substrate, and a reverse ESD path in a horizontal direction is formed between the P+ heavily doped active area and the N+ heavily doped active area in the second P-type well region.

[0009] The present invention is further improved, the collector of the NPN transistor Q1 is connected to the positive electrode of the EMI filter and one end of the resistor R, the collector of the NPN transistor Q2 is connected to the negative electrode of the EMI filter and the other end of the resistor R, the base of the NPN transistor Q1, the emitter of the NPN transistor Q1, the base of the NPN transistor Q2, and the emitter of the NPN transistor Q2 are grounded, the structures of the NPN transistor Q1 and the NPN transistor Q2 are both TVS structures, and the NPN transistor Q1, the NPN transistor Q2, and the resistor R can form a filtering circuit.

[0010] The present invention is further improved in that the resistor R is a P-type active region resistor.

[0011] The present invention is further improved in that the resistor R is an N-type active region resistor.

[0012] The present invention is further improved, wherein the resistor R is an N-well resistor or a P-well resistor or a polysilicon resistor.

[0013] The present invention is further improved in that the P+ heavily doped active region in the first P-type well region and the P+ heavily doped active region in the second P-type well region are connected to the bottom of the N-type semiconductor substrate.

[0014] The present invention is further improved, in that a metal conductive layer is provided on the top of the N-type semiconductor substrate, the P+ heavily doped active area in the first P-type well area is grounded through the metal conductive layer, the N+ heavily doped active area in the first P-type well area is connected to the positive electrode of the EMI filter through the metal conductive layer, the P+ heavily doped active area in the second P-type well area is grounded through the metal conductive layer, and the N+ heavily doped active area in the second P-type well area is connected to the positive electrode of the EMI filter through the metal conductive layer.

[0015] The present invention is further improved in that an insulating layer is also provided on the top of the N-type semiconductor substrate, and the P+ heavily doped active area in the first P-type well region is isolated from the N+ heavily doped active area in the first P-type well region by the insulating layer, and the P+ heavily doped active area in the second P-type well region is isolated from the N+ heavily doped active area in the second P-type well region by the insulating layer.

[0016] Compared with the prior art, the beneficial effects of the present invention are as follows: a low clamping voltage type EMI filter with integrated electrostatic protection function is provided, and by arranging mutually cooperating NPN transistors Q1, NPN transistors Q2 and resistor R in the low clamping voltage type EMI filter with integrated electrostatic protection function, and using the NPN transistors Q1 and NPN transistors Q2 as capacitors in the low-pass filter circuit, the filter can not only suppress high-frequency signals, but also provide excellent electrostatic protection capabilities, especially can achieve very low clamping voltage, can simultaneously achieve the dual functions of electrostatic protection and electromagnetic interference filtering, and has a small layout area, can save manufacturing cost and packaging cost, has a wide range of applications, can meet the requirements of various applications, and provides a good integrated solution for electrostatic protection and electromagnetic interference filtering of electronic circuits, and solves the problems in the prior art that the typical p-type CRC low-pass filter can only achieve filtering function, the TVS on-resistance and clamping voltage of the EMI low-pass filter with integrated electrostatic protection function are poor, and a huge layout area is occupied. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the solutions in the present invention or the prior art, a brief introduction is given below to the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0018] FIG. 1 (a) is a schematic diagram of a circuit structure of a typical existing p-type CRC low-pass filter;

[0019] FIG1( b ) is a schematic diagram of an insertion loss curve of a typical existing p-type CRC low-pass filter;

[0020] FIG. 2 (a) is a schematic diagram of the circuit structure of an existing EMI low-pass filter with integrated electrostatic protection function;

[0021] FIG2 (b) is a schematic diagram of the structure of an existing voltage regulator tube used as a filter capacitor;

[0022] FIG2 (c) is a schematic diagram of the structure of an existing PNP transistor used as a filter capacitor;

[0023] FIG3 (a) is a schematic structural diagram of a low clamping voltage type EMI filter with integrated electrostatic protection function according to the present invention;

[0024] FIG3 (b) is a schematic diagram of the circuit structure of a low clamping voltage type EMI filter with integrated electrostatic protection function according to the present invention;

[0025] FIG3 (c) is an IV characteristic curve of the low clamping voltage type EMI filter with integrated electrostatic protection function of the present invention;

[0026] Figure 4 It is a structural schematic diagram of a low clamping voltage type EMI filter with integrated electrostatic protection function of the present invention. DETAILED DESCRIPTION

[0027] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which the present invention belongs; the terms used in the specification of the application herein are only for the purpose of describing specific embodiments and are not intended to limit the present invention; the terms "including" and "having" and any variations thereof in the specification and claims of the present invention and the above-mentioned drawings are intended to cover non-exclusive inclusions. The terms "first", "second", etc. in the specification and claims of the present invention or the above-mentioned drawings are used to distinguish different objects, not to describe a specific order.

[0028] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present invention. The appearance of the phrase in various places in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0029] In order to enable those skilled in the art to better understand the solutions of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings.

[0030] As shown in Figure 3 (a) - Figure 4As shown, a low clamping voltage type EMI filter with integrated electrostatic protection function provided by the present invention comprises an N-type semiconductor substrate and an NPN transistor Q1, an NPN transistor Q2 and a resistor R arranged on the N-type semiconductor substrate, the NPN transistor Q1 is provided with a first P-type well region, the NPN transistor Q2 is provided with a second P-type well region, a grounded P+ heavily doped active region and an N+ heavily doped active region connected to the positive electrode of the EMI filter are provided in the first P-type well region, the positive electrode of the EMI filter is connected to the I / O port 1, the bottom of the N-type semiconductor substrate is grounded, and a N+ heavily doped active region in the first P-type well region and the bottom of the N-type semiconductor substrate are formed between There is a vertical forward ESD path, a horizontal reverse ESD path is formed between the P+ heavily doped active area and the N+ heavily doped active area in the first P-type well area, a grounded P+ heavily doped active area and an N+ heavily doped active area connected to the negative pole of the EMI filter are provided in the second P-type well area, the negative pole of the EMI filter is connected to the I / O port 2, the bottom of the N-type semiconductor substrate is grounded, a vertical forward ESD path is formed between the N+ heavily doped active area in the second P-type well area and the bottom of the N-type semiconductor substrate, and a horizontal reverse ESD path is formed between the P+ heavily doped active area and the N+ heavily doped active area in the second P-type well area. Among them, the collector of NPN transistor Q1 is connected to the positive electrode of the EMI filter and one end of the resistor R, the collector of NPN transistor Q2 is connected to the negative electrode of the EMI filter and the other end of the resistor R, the base of NPN transistor Q1, the emitter of NPN transistor Q1, the base of NPN transistor Q2, and the emitter of NPN transistor Q2 are grounded, the structures of NPN transistor Q1 and NPN transistor Q2 are both TVS structures, the resistor R is a P-type active area resistor, and NPN transistor Q1, NPN transistor Q2, and resistor R can form a filtering circuit.In this embodiment, firstly, a p-type CRC low-pass filter is constructed by using the TVS structure of the NPN transistor Q1 and the NPN transistor Q2. Due to the high gain of the NPN transistor, the on-resistance and the clamping voltage can be greatly improved, thereby increasing the effectiveness of ESD protection. Its IV characteristic curve is shown in FIG3 (c). Secondly, the NPN transistor Q1 and the NPN transistor Q2 adopt a planar / vertical hybrid TVS architecture, realizing a reverse ESD path in the planar structure, that is, a reverse diode-type electrostatic discharge path, and realizing a forward ESD path in the vertical structure, that is, a forward NPN-type electrostatic discharge path. In addition, the top GND and the bottom GND of the N-type semiconductor substrate can be connected by wire bonding or RDL (Re-distributed layer) during packaging, or can be connected by wires during PCB (Printed circuit board) board-level integration, or the upper and lower GNDs can be not short-circuited during application. At this time, the top GND is floating, and the TVS structure of the NPN transistor Q1 and the NPN transistor Q2 becomes bidirectional. Among them, 300 represents an N-type semiconductor substrate, 310 represents a first P-type well region, 316 represents a second P-type well region, 202, 204, 311, 315, 411, 415 represent P+ heavily doped active regions, 102, 313, 413 represent resistors R, 101, 103, 201, 203, 312, 314, 412, 414 represent N+ heavily doped active regions, 140, 150, 160 represent metal interconnects, 140 is a metal interconnect connecting I / O port 1 and the positive electrode of the EMI filter, 150 represents a metal interconnect connecting I / O port 2 and the negative electrode of the EMI filter, and 160 represents a metal interconnect between two GNDs through an off-chip short circuit (package level or board-level integration).

[0031] As shown in Figure 3 (a) - Figure 4 As shown, the resistor R is an N-type active area resistor or an N-well resistor or a P-well resistor or a polysilicon resistor; the P+ heavily doped active area in the first P-type well area and the P+ heavily doped active area in the second P-type well area are connected to the bottom of the N-type semiconductor substrate; a metal conductive layer is provided on the top of the N-type semiconductor substrate, the P+ heavily doped active area in the first P-type well area is grounded through the metal conductive layer, the N+ heavily doped active area in the first P-type well area is connected to the positive electrode of the EMI filter through the metal conductive layer, the P+ heavily doped active area in the second P-type well area is grounded through the metal conductive layer, and the N+ heavily doped active area in the second P-type well area is connected to the positive electrode of the EMI filter through the metal conductive layer; an insulating layer is also provided on the top of the N-type semiconductor substrate, the P+ heavily doped active area in the first P-type well area is isolated from the N+ heavily doped active area in the first P-type well area through the insulating layer, and the P+ heavily doped active area in the second P-type well area is isolated from the N+ heavily doped active area in the second P-type well area through the insulating layer. In this embodiment, Figure 4 The base region of the vertical NPN transistor is uniformly doped, and is essentially an inverted bipolar junction transistor with higher current gain, better on-resistance and clamping voltage. Deep trench isolation is used, and the isolation between multiple channels is better. The resistor R uses an N-type active area resistor, which can form a "reverse biased PN junction" with the P-type epitaxial layer during operation, which is more conducive to precise control of the resistance value. Among them, 100 represents the P-type semiconductor substrate, 120 represents the insulating layer, and 130 represents the metal conductive layer.

[0032] The manufacturing process of the low clamping voltage type EMI filter with integrated electrostatic protection function of the present invention is applicable to various common integrated circuit manufacturing processes, such as nano-scale complementary metal oxide semiconductor (CMOS) process, three-dimensional fin field effect transistor (FinField-EffectTransistor, FinFET) or gate-all-around FET (GAA) process, or silicon-on-insulator (SOI) process, etc.

[0033] As can be seen from the above, the present invention provides a low clamping voltage type EMI filter with integrated electrostatic protection function. By arranging mutually coordinated NPN transistors Q1, NPN transistors Q2 and resistor R in the low clamping voltage type EMI filter with integrated electrostatic protection function, and using NPN transistors Q1 and NPN transistors Q2 as capacitors in the low-pass filter circuit, the filter can not only suppress high-frequency signals, but also provide excellent electrostatic protection capabilities, especially can achieve very low clamping voltage, can simultaneously achieve the dual functions of electrostatic protection and electromagnetic interference filtering, and has a small layout area, can save manufacturing cost and packaging cost, has a wide range of applications, can meet the requirements of various applications, and provides a good integrated solution for electrostatic protection and electromagnetic interference filtering of electronic circuits, solving the problems in the prior art that the typical p-type CRC low-pass filter can only achieve filtering function, the TVS on-resistance and clamping voltage of the EMI low-pass filter with integrated electrostatic protection function are poor, and will occupy a huge layout area.

[0034] The specific implementation modes described above are preferred implementation modes of the present invention, and are not intended to limit the specific implementation scope of the present invention. The scope of the present invention includes but is not limited to the specific implementation modes, and all equivalent changes made according to the present invention are within the protection scope of the present invention.

Claims

1. A low clamping voltage type EMI filter with integrated electrostatic protection function, characterized in that: The invention comprises an N-type semiconductor substrate and an NPN transistor Q1, an NPN transistor Q2 and a resistor R arranged on the N-type semiconductor substrate, wherein the NPN transistor Q1 is provided with a first P-type well region, the NPN transistor Q2 is provided with a second P-type well region, a grounded P+ heavily doped active region and an N+ heavily doped active region connected to a positive electrode of an EMI filter are provided in the first P-type well region, the positive electrode of the EMI filter is connected to an I / O port 1, the bottom of the N-type semiconductor substrate is grounded, a vertical forward ESD path is formed between the N+ heavily doped active region in the first P-type well region and the bottom of the N-type semiconductor substrate, a horizontal reverse ESD path is formed between the P+ heavily doped active region in the first P-type well region and the N+ heavily doped active region, a grounded P+ heavily doped active region and an N+ heavily doped active region connected to a negative electrode of the EMI filter are provided in the second P-type well region, the negative electrode of the EMI filter is connected to an I / O port 1, and a reverse ESD path is formed between the P+ heavily doped active region and the N+ heavily doped active region in the first P-type well region. Port 2 is connected, the bottom of the N-type semiconductor substrate is grounded, a vertical forward ESD path is formed between the N+ heavily doped active area in the second P-type well region and the bottom of the N-type semiconductor substrate, a horizontal reverse ESD path is formed between the P+ heavily doped active area and the N+ heavily doped active area in the second P-type well region, the collector of the NPN transistor Q1 is connected to the positive electrode of the EMI filter and one end of the resistor R, the collector of the NPN transistor Q2 is connected to the negative electrode of the EMI filter and the other end of the resistor R, the base of the NPN transistor Q1, the emitter of the NPN transistor Q1, the base of the NPN transistor Q2, and the emitter of the NPN transistor Q2 are grounded, the structures of the NPN transistor Q1 and the NPN transistor Q2 are both TVS structures, and the NPN transistor Q1, the NPN transistor Q2, and the resistor R can form a filtering circuit.

2. The low clamping voltage type EMI filter with integrated electrostatic protection function according to claim 1, characterized in that: The resistor R is a P-type active region resistor.

3. The low clamping voltage type EMI filter with integrated electrostatic protection function according to claim 1, characterized in that: The resistor R is an N-type active region resistor.

4. The low clamping voltage type EMI filter with integrated electrostatic protection function according to claim 1, characterized in that: The resistor R is an N-well resistor, a P-well resistor, or a polysilicon resistor.

5. The low clamping voltage type EMI filter with integrated electrostatic protection function according to any one of claims 2 to 4, characterized in that: The P+ heavily doped active region in the first P-type well region and the P+ heavily doped active region in the second P-type well region are connected to the bottom of the N-type semiconductor substrate.

6. The low clamping voltage type EMI filter with integrated electrostatic protection function according to claim 5, characterized in that: A metal conductive layer is provided on the top of the N-type semiconductor substrate, the P+ heavily doped active area in the first P-type well area is grounded through the metal conductive layer, the N+ heavily doped active area in the first P-type well area is connected to the positive electrode of the EMI filter through the metal conductive layer, the P+ heavily doped active area in the second P-type well area is grounded through the metal conductive layer, and the N+ heavily doped active area in the second P-type well area is connected to the positive electrode of the EMI filter through the metal conductive layer.

7. The low clamping voltage type EMI filter with integrated electrostatic protection function according to claim 6, characterized in that: An insulating layer is also provided on the top of the N-type semiconductor substrate, and the P+ heavily doped active area in the first P-type well region is isolated from the N+ heavily doped active area in the first P-type well region by the insulating layer, and the P+ heavily doped active area in the second P-type well region is isolated from the N+ heavily doped active area in the second P-type well region by the insulating layer.

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