Method for accessing nodes in multi-node system by multi-path I2C (Inter-Integrated Circuit) main equipment
The method for a multi-channel I2C master device in a multi-node system resolves command confusion and errors by recording and converting device and node information into target addresses, managing clock lines, and ensuring independent access, achieving interference-free I2C transmission.
Patent Information
- Application Number
- CN202411341799.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-25
- Publication Date
- 2024-12-27
- Estimated Expiration
- 2044-09-25
AI Technical Summary
In multi-node systems with multiple I2C master devices, simultaneous access to the same slave device can cause command confusion and errors due to I2C command conflicts, and it is difficult to identify which node did not respond or responded with a negative acknowledgment during broadcasts.
A method for a multi-channel I2C master device to access each node by recording and converting I2C master device and node information into a target address, transmitting it in an instruction packet, and managing clock lines to prioritize and release access based on priority and cable connections, ensuring independent access and avoiding interference.
The method ensures correct and interference-free I2C transmission by labeling the access based on priority and cable connections, ensuring correct and interference-free I2C transmission by distinguishing multiple I2C master devices and nodes, thereby addressing the simultaneous access of multiple I2C master devices, and avoiding interference between devices, and ensuring correct and interference-free I2C transmission by distinguishing multiple I2C master devices and nodes, thereby addressing the simultaneous access of multiple I2C master devices and nodes.
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Figure CN119210658A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of communication technology, and in particular to a method for a multi-channel I2C master device to access each node in a multi-node system. Background Art
[0002] In a multi-node system, there are usually multiple I2C master devices. In actual applications, there will be multiple I2C master devices that jointly access the slave devices in the multi-node system.
[0003] These I2C master devices are independent of each other, and there is a situation where they access the same slave device under the same node at the same time, so there may be a problem of I2C command confusion, resulting in abnormal errors in I2C transmission. Similarly, when performing I2C broadcasts, it is impossible to know which node did not respond or responded with NAK (negative acknowledgment). Summary of the invention
[0004] The object of the present invention is to provide a method for a multi-channel I2C master device to access each node in a multi-node system, so as to solve the problems in the background technology.
[0005] In order to solve the above technical problems, the present invention provides a method for a multi-channel I2C master device to access each node in a multi-node system, comprising: When accessing a remote node, the I2C master device and the node information to be accessed are recorded, converted into the corresponding target address according to the matching relationship, stored in the instruction packet, and transmitted to the remote end through the transmission system; after receiving the instruction packet, the remote node parses the I2C master device information and the target node information from the instruction packet, and decides whether to transmit to the next node or access itself according to the target node information; if the I2C instruction needs to be replied, the recorded I2C master device information group is included in the reply instruction packet; When accessing the proximal node, the corresponding I2C master device is replied according to the I2C master device information in the reply packet.
[0006] In one embodiment, the multi-node system includes I2C master device 0~I2C master device N, node 0~node N, wherein I2C master device 0 and I2C master device 1 are connected to node 0 via an I2C bus, and node 0 and node 1~node N are connected via a cable following a transmission protocol; wherein node 1~node N are connected to multiple similar systems via the I2C bus to form a cascade system.
[0007] In one embodiment, when the I2C master device 0 and the I2C master device N access node 0 at the same time, since it is a proximal access, node 0 completes the I2C transmission with the I2C master device 0 first according to the priority, and at the same time pulls down the clock line for interacting with the I2C master device N; when the transmission with the I2C master device 0 is completed, the clock line between node 0 and the I2C master device N is released, and the transmission with the I2C master device N is started.
[0008] In one implementation, multiple I2C master devices access proximal and remote nodes respectively. Since the proximal and remote nodes accessed are different, the two are independent of each other and do not interfere with each other, and no arbitration is required.
[0009] In one embodiment, multiple I2C master devices respectively access node 1 and node N under different remote cables. After receiving the access requests from I2C master device 0 and I2C master device N, node 0 respectively records the I2C master device information and access node information, and translates them into the target address according to the rules. In this way, when node 0 transmits I2C instruction packets to remote node 1 and node N respectively, it knows the source and target of the transmission.
[0010] In one embodiment, when multiple I2C master devices respectively access node 1 under the same remote cable, node 0, based on priority, first completes I2C transmission with I2C master device 0, pulls down the clock line interacting with I2C master device N, and records I2C master device information 0 and access node information 1 at the same time, and translates them into the target address in the transmission packet; the target address used by node 1 when replying to the I2C transmission should include the received I2C master device information and its own node information, so that node 0 can decide to reply to the correct I2C master device based on the received target address information; when the transmission with I2C master device 0 is completed, the clock line between node 0 and I2C master device N will be released, and the transmission with I2C master device N will be completed, thereby I2C master device 0 and I2C master device N can achieve access to node 1.
[0011] In one implementation, if a timeout occurs when the I2C master device 0 accesses the node 1, the I2C transmission is deemed to be completed, and the transmission with the I2C master device N will begin.
[0012] The present invention provides a method for multiple I2C master devices to access each node in a multi-node system. The method requires translating the master device information and the node address information into a target address in a transmission packet according to certain rules, thereby labeling the I2C transmission, distinguishing the access of multiple I2C master devices, and avoiding confusion caused by simultaneous access of multiple I2C master devices. BRIEF DESCRIPTION OF THE DRAWINGS
[0013] Figure 1 It is a schematic diagram of the structure of a multi-I2C master multi-node system.
[0014] Figure 2 It is a schematic diagram of the structure of a multi-I2C master device multi-node cascade system.
[0015] Figure 3 This is a schematic diagram of the structure in which multiple I2C master devices simultaneously access the same remote node. DETAILED DESCRIPTION
[0016] The following is a further detailed description of a method for a multi-channel I2C master device to access each node in a multi-node system proposed by the present invention in combination with the accompanying drawings and specific embodiments. The advantages and features of the present invention will become clearer according to the following description. It should be noted that the accompanying drawings are all in a very simplified form and are not in precise proportions, and are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention.
[0017] The present invention proposes a method for multiple I2C master devices to access each node in a multi-node system, which supports multiple I2C master devices to access each node simultaneously. No matter it is the same sub-device of the same node, or different sub-devices of the same node, or sub-devices of different nodes, the I2C instructions can be correctly transmitted to the corresponding slave devices.
[0018] The multi-node system mentioned in the present invention should include, in addition to a transmission system consisting of a deserializer and a plurality of serializers, a cascade system consisting of a plurality of corresponding transmission systems.
[0019] The method for multiple I2C master devices to access each node in a multi-node system proposed by the present invention, such as accessing a remote node, will record the I2C master device and the node information to be accessed, and according to a certain matching relationship, convert it into a corresponding target address, store it in an instruction packet, and transmit it to the remote end through a transmission system. After receiving the instruction packet, the remote I2C node parses the master device information and the target node information from the instruction packet, and decides whether to transmit it to the next node or access itself according to the target node information. If the I2C instruction needs to be replied, the recorded I2C master device information group will be included in the reply instruction packet. The proximal I2C node replies to the corresponding I2C master device according to the I2C master device information in the reply packet.
[0020] Figure 1 It is a typical multi-node system with multiple I2C master devices, including multiple I2C master devices (I2C master device 0~I2C master device N), multiple node modules such as node 0-N, where I2C master device 0 and I2C master device 1 are connected to node 0 through the I2C bus, and node 0 and node 1~node N follow a certain transmission protocol and are connected through cables. In terms of scalability, node 1~node N can be connected to multiple similar systems through the I2C bus to form a cascade system, such as Figure 2 shown.
[0021] The following Figure 1 Taking as an example, the present invention is described in detail. Multiple I2C master devices accessing a multi-node system can be divided into five types, namely: 1) I2C master device 0 and I2C master device N access node 0 at the same time. Since it is a near-end access, node 0 will complete the I2C transmission with I2C master device 0 first according to the priority, and at the same time pull down the clock line (SCL) interacting with I2C master device N. After the transmission with I2C master device 0 is completed, the clock line between node 0 and I2C master device N will be released, and the transmission with I2C master device N will be completed.
[0022] 2) Multiple I2C master devices access the proximal and remote nodes respectively. For example, I2C master device 0 accesses node 0 and master device 1 accesses node 1. Since the proximal and remote nodes accessed are different, they are independent and do not interfere with each other, so no arbitration is required.
[0023] 3) Multiple I2C master devices access nodes under different remote cables respectively, for example, access node 1 and node N respectively. After receiving the access requests from I2C master device 0 and I2C master device N, node 0 records the I2C master device information and access node information respectively, and translates them into the target address according to certain rules. Therefore, when node 0 transmits I2C instruction packets to remote nodes 1 and N respectively, it can know the source and target of the transmission. Taking the A-PHY transmission protocol as an example, the target address field in the transmission packet can be set with the following rules: the upper 4 bits record the I2C master device information, and the lower 4 bits record the node information.
[0024] 4) Multiple I2C master devices access the same node on the same remote cable, for example, they all access node 1. Figure 3 As shown in the corresponding schematic diagram, node 0 will complete the I2C transmission with I2C master device 0 first according to the priority, and pull down the clock line (SCL) interacting with I2C master device N. At the same time, the I2C master device information 0 and the access node information 1 are recorded and translated into the target address in the transmission packet. The target address used by node 1 when replying to the I2C transmission should include the received I2C master device information and its own node information, so that node 0 can decide to reply to the correct I2C master device based on the received target address information. When the transmission with I2C master device 0 is completed, the clock line between node 0 and I2C master device N will be released, and the transmission with I2C master device N will be completed. In this way, I2C master devices 0 and N have achieved access to node 1.
[0025] In particular, if a timeout occurs when I2C master device 0 accesses node 1, the I2C transmission is considered to be completed and the transmission with I2C master device N will begin.
[0026] 5) If the I2C master device 0 broadcasts access to nodes 1~N, the node information should be the corresponding broadcast information, and the target address field carried in the transmission packet replied by nodes 1~N should carry the I2C master device information of this transmission and its own node information. Therefore, node 0 will determine which node did not reply to the transmission packet and which node replied with a NAK transmission packet based on the number of transmission packets received and the corresponding target address.
[0027] In the method for multiple I2C master devices to access each node in a multi-node system proposed by the present invention, the proximal node records a label for the I2C master device according to the transmission request sent by the I2C master device and the target node to be accessed, translates it into a target address according to certain rules, and writes the target address in the transmission packet. In this way, the information carried in the transmission packet includes the I2C master device information and the target node information, and each I2C transmission can obtain a unique label.
[0028] When multiple I2C master devices access the same node, in order to avoid interference between multiple I2C transmissions and cause I2C transmission disorder, in addition to marking the I2C transmission as mentioned above, it is also necessary to pull down the low-priority I2C clock line according to the priority, and release the low-priority I2C clock line after the high-priority I2C transmission is completed.
[0029] The above description is only a description of the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention. Any changes or modifications made by a person skilled in the art in the field of the present invention based on the above disclosure shall fall within the scope of protection of the claims.
Claims
1. A method for multiple I2C master devices to access each node in a multi-node system, characterized in that: include: When accessing a remote node, the I2C master device and the node information to be accessed are recorded, converted into the corresponding target address according to the matching relationship, stored in the instruction packet, and transmitted to the remote end through the transmission system; after receiving the instruction packet, the remote node parses the I2C master device information and the target node information from the instruction packet, and decides whether to transmit to the next node or access itself according to the target node information; if the I2C instruction needs to be replied, the recorded I2C master device information group is included in the reply instruction packet; When accessing the proximal node, the corresponding I2C master device is replied according to the I2C master device information in the reply packet.
2. The method for multiple I2C master devices to access each node in a multi-node system as claimed in claim 1, characterized in that: The multi-node system includes I2C master device 0~I2C master device N, node 0~node N, wherein I2C master device 0 and I2C master device 1 are connected to node 0 through an I2C bus, and node 0 and node 1~node N are connected through cables following a transmission protocol; wherein node 1~node N are connected to multiple similar systems through the I2C bus to form a cascade system.
3. The method for multiple I2C master devices to access each node in a multi-node system as claimed in claim 2, characterized in that: When the I2C master device 0 and the I2C master device N access node 0 at the same time, due to proximal access, node 0 completes the I2C transmission with I2C master device 0 first according to the priority, and pulls down the clock line for interacting with I2C master device N at the same time; when the transmission with I2C master device 0 is completed, the clock line between node 0 and I2C master device N is released, and the transmission with I2C master device N is started.
4. The method for multiple I2C master devices to access each node in a multi-node system as claimed in claim 2, characterized in that: Multiple I2C master devices access the proximal and remote nodes respectively. Since the proximal and remote nodes accessed are different, the two are independent of each other and do not interfere with each other, and no arbitration is required.
5. The method for multiple I2C master devices to access each node in a multi-node system as claimed in claim 2, characterized in that: Multiple I2C master devices access node 1 and node N under different remote cables respectively. After receiving the access requests from I2C master device 0 and I2C master device N, node 0 records the I2C master device information and access node information respectively, and translates them into the target address according to the rules. Therefore, when node 0 transmits I2C instruction packets to remote node 1 and node N respectively, it knows the source and target of the transmission.
6. The method for multiple I2C master devices to access each node in a multi-node system as claimed in claim 2, characterized in that: When multiple I2C master devices access node 1 under the same remote cable respectively, node 0 will complete the I2C transmission with I2C master device 0 first according to the priority, pull down the clock line interacting with I2C master device N, and record I2C master device information 0 and access node information 1 at the same time, and translate them into the target address in the transmission packet; the target address used by node 1 when replying to the I2C transmission should include the received I2C master device information and its own node information, so that node 0 can decide to reply to the correct I2C master device according to the received target address information; when the transmission with I2C master device 0 is completed, the clock line between node 0 and I2C master device N will be released, and the transmission with I2C master device N will be completed, so that I2C master device 0 and I2C master device N can achieve access to node 1.
7. The method for multiple I2C master devices to access each node in a multi-node system as claimed in claim 6, characterized in that: If a timeout occurs when I2C master 0 accesses node 1, the I2C transmission is considered to be completed and the transmission with I2C master N will begin.
Citation Information
Patent Citations
Multi-target machine parallel communication method based on redundancy
CN106155637A
A method for realizing directional data access in a multi-node wireless transmission system
CN109922466A
I2C communication anti-collision method and system
CN114302256A
Information transmission device, system and method
CN116132383A
Bus system and chip
CN116225995A