Protocol parsing method for network equipment

By extracting the protocol field location information in the control packet of the packet in the network device, and using dual-port random memory and TCAM tables, free extraction of message header fields is achieved, which solves the problems of delay and resource consumption of traditional packet parsers, and improves analysis efficiency and flexibility.

CN119211394BActive Publication Date: 2025-03-04NAT UNIV OF DEFENSE TECH
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Patent Information

Application Number
CN202411690904.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-11-25
Publication Date
2025-03-04
Estimated Expiration
2044-11-25

AI Technical Summary

Technical Problem

Traditional packet parsers have problems of delay and resource consumption when processing longer packet information, and path conflicts in the inverse butterfly network limit the flexibility of extracting message header information.

Method used

A protocol analysis method for network equipment is proposed. By obtaining data packets and filtering, the protocol field location information in the control packet is extracted, the flow extraction is performed using dual-port random memory, the path protocol analysis key bits are obtained, and the TCAM table matching search is generated to generate data packet extraction and analysis instructions, realizing free and flexible extraction of message header fields.

Benefits of technology

Without adding logical resources, free and flexible extraction of wider message header fields is realized, and the deep parallel streaming analysis capability of data packets is improved. The programmable configuration of the parser function is realized through the upper computer sending messages.

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Abstract

The present invention provides a protocol parsing method for a network device, which comprises: separating data packets to obtain control messages and data messages; extracting key bits of the data message protocol field position according to the control message to obtain key bits of path protocol parsing; matching and searching from the path protocol parsing TCAM table to obtain the address of the data message extraction and parsing instruction table; extracting the data message extraction and parsing instruction table according to the address of the data message extraction and parsing instruction table to obtain the data message parsing instruction; extracting the data message according to the data message parsing instruction to obtain a message header vector. The beneficial effects of the present invention are: realizing free and flexible extraction of a wider message header field, realizing deep parallel pipeline parsing of the data message, and realizing programmable configuration of the parser function by sending messages from the upper computer.
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Description

Technical Field

[0001] The present invention relates to the technical field of computer networks, and in particular to a protocol parsing method for network equipment. Background Art

[0002] With the increase in the types of network devices, the evolution of network traffic patterns, and the introduction of new applicable protocols, programmable networks have been booming due to their flexibility in supporting multi-protocol messages and adapting to the complex living environment of modern network communications. As a crucial role in programmable network devices, packet parsers have received a lot of attention and research. Packet parsers are located in the first stage of programmable parsing devices, and their main functions are: (1) identifying packet protocol formats; (2) decoding data packet formats; and (3) effectively extracting key information from packets. Based on the above functional requirements, traditional packet parsers can be implemented using software, but there are problems with limited processing power and high latency.

[0003] Based on the delay and resource consumption problems caused by the longer message information identification process, HyperParser proposes a bit selection strategy based on the different protocol flags for different types of messages (such as IPv4, ARP, IPv6, MPLS). It enumerates all the message parsing paths in a scenario, and then compares the characteristic bit information between different messages. The inverse butterfly network is used to extract these characteristic bit information from the longer message header field. The obtained characteristic bit information can identify a message protocol type. The message is matched and searched to obtain the field extraction instruction corresponding to this type of message protocol. Then the inverse butterfly network of the Hyperparser solution only uses the reconfiguration method of the FPGA to formulate different paths in different environments. Once a working environment and inverse butterfly path are selected, the inverse butterfly path of the new environment can only be realized by re-burning the FPGA; at the same time, the characteristic bit information aggregated by the inverse butterfly network design still needs to be further extracted from the longer message header information, and the extracted information of this step still needs to be sent by the configuration message; in addition, the path conflict of the inverse butterfly network itself leads to constraints on the extraction of information from the input longer message header, and it is impossible to extract from any position of the longer message header. Summary of the invention

[0004] The main purpose of the embodiment of the present invention is to provide a protocol parsing method for a network device to achieve free and flexible extraction of message header fields.

[0005] One aspect of the present invention provides a protocol parsing method for a network device, comprising:

[0006] Obtain data packets flowing into the bus, separate the data packets using filters to obtain control messages and data messages, wherein the data messages include data message headers, and the control messages are sent down through the host computer;

[0007] Extract key bits of the data message protocol field position according to the control message to obtain the key bits of path protocol parsing;

[0008] According to the path protocol parsing key bits, a match is searched in the path protocol parsing TCAM table to obtain the address of the data message extraction and parsing instruction table, and the path protocol parsing TCAM table is configured by the control message sent by the host computer;

[0009] Extracting the data message extraction and parsing instruction table according to the address of the data message extraction and parsing instruction table to obtain the data message parsing instruction, wherein the data message extraction and parsing instruction table is configured by the control message sent by the host computer;

[0010] The data message is extracted according to the data message parsing instruction to obtain a message header vector, wherein the message header vector includes a container, a selection instruction and metadata.

[0011] According to the protocol parsing method of the network device, the key bit position of the data message protocol field position is extracted according to the control message, including:

[0012] Acquire extraction information of a data message protocol field position included in the control message, wherein the extraction information includes a high-order extraction instruction part and a low-order extraction instruction part;

[0013] The data message is stored in the dual-port random access memory through the device port, and the data message stored in the dual-port random access memory is subjected to a first pipeline extraction through the high-order extraction instruction part to obtain the byte information including the key bit pointed to by the high-order extraction instruction;

[0014] The byte information is subjected to a second pipeline extraction through the low-bit extraction instruction part to obtain the path protocol parsing key bits.

[0015] According to the protocol parsing method of the network device, the path protocol parsing key bits are matched and searched from the path protocol parsing TCAM table to obtain the address of the data packet extraction and parsing instruction table, including:

[0016] The first configuration information of the path protocol parsing TCAM table is obtained from the host computer, and the path protocol parsing TCAM table is edited and matched according to the first configuration information and the path protocol parsing key bits to obtain the data packet extraction and parsing instruction table address, wherein the first configuration information adopts a 16-bit TCAM.

[0017] According to the protocol parsing method of the network device, the method further includes:

[0018] The dual-port random access memory is set to double the data message depth. While executing pipeline extraction on the previous data message through the double data message depth setting, the pipeline of the next data message entering the dual-port random access memory is also cached;

[0019] The large bit width input port and the small bit width output port of the dual-port random access memory are set, and then the fields of the data message are filtered and extracted for a second time step by step.

[0020] According to the protocol parsing method of the network device, extracting the data packet extraction and parsing instruction table according to the address of the data packet extraction and parsing instruction table includes:

[0021] The second configuration information of the path protocol parsing TCAM table is obtained from the host computer, and the path protocol parsing TCAM table is edited and matched according to the second configuration information and the path protocol parsing key bits to obtain the data message extraction and parsing instruction table address, wherein the second configuration information adopts the parser message protocol.

[0022] According to the protocol parsing method of the network device, extracting the data message according to the data message parsing instruction to obtain the message header vector includes:

[0023] Obtaining a starting byte offset value, a container type value, a container index value, and a valid value of the data message parsing instruction;

[0024] Pointing the starting offset extraction bit of the data message with the starting byte offset value, extracting the container forming the header vector from the starting offset extraction bit, and identifying the extracted container with the container type value;

[0025] The index of the extracted data message stored in the container is determined according to the container index value; the effective data message parsing instruction is determined according to the valid value of the data message parsing instruction, and the corresponding container is extracted through the data message parsing instruction to obtain a message header vector.

[0026] According to the protocol parsing method of the network device, the method further includes:

[0027] Using one of the VLAN_ID or VNI fields of the data message as the index address, a single parsing instruction and a comparison instruction are obtained from the BRAM-based protocol parsing table according to the index address, wherein the single parsing instruction is the data message parsing instruction, and the comparison instruction is used to complete the comparison processing according to its own operand.

[0028] The beneficial effects of the present invention are as follows: according to the network traffic pattern, the setting can realize free and flexible extraction of wider message header fields and realize deep parallel pipeline parsing of data messages while only increasing storage resource consumption without increasing logical resources, and realize programmable configuration of the parser function by sending messages through the upper computer. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] The above and / or additional aspects and advantages of the present invention will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:

[0030] Figure 1 It is a schematic diagram of the protocol parsing process of the network device according to an embodiment of the present invention.

[0031] Figure 2 It is a schematic diagram of the process of obtaining key bits of path resolution according to an embodiment of the present invention.

[0032] Figure 3 It is a schematic diagram of a data path parsing instruction acquisition module according to an embodiment of the present invention.

[0033] Figure 4 It is a schematic diagram of the structural design of the protocol identification unit of an embodiment of the present invention.

[0034] Figure 5 It is a schematic diagram of the HPV extraction process of the control message according to an embodiment of the present invention.

[0035] Figure 6 It is a schematic diagram of the structural design of the protocol-independent parsing unit of an embodiment of the present invention.

[0036] Figure 7 It is a schematic diagram of a protocol-independent parsing module according to an embodiment of the present invention.

[0037] Figure 8 It is a schematic diagram of a parsing submodule according to an embodiment of the present invention.

[0038] Fig. 9 Schematic diagram of the parsing instruction format of an embodiment of the present invention.

[0039] Fig.10 Schematic diagram of the HPV data format according to an embodiment of the present invention.

[0040] Fig.11 It is a schematic diagram of a protocol parsing device of a network device according to an embodiment of the present invention. DETAILED DESCRIPTION

[0041] The embodiments of the present invention are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements with the same or similar functions. In the subsequent description, the use of suffixes such as "module", "component" or "unit" used to represent elements is only for the purpose of facilitating the description of the present invention, and has no specific meaning in itself. Therefore, "module", "component" or "unit" can be used in a mixed manner. "First", "second" and the like are only used for the purpose of distinguishing technical features, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features or implicitly indicating the order of the indicated technical features. In this subsequent description, the continuous numbering of the method steps is for the convenience of review and understanding. In combination with the overall technical solution of the present invention and the logical relationship between the various steps, adjusting the implementation order between the steps will not affect the technical effect achieved by the technical solution of the present invention. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and cannot be understood as limiting the present invention.

[0042] Terminology explanation: PHV, or Message Header Vector, is a data structure used to store the header information of a network data packet; the message header vector usually includes various metadata of the data packet, such as source IP address, destination IP address, protocol type, port number, timestamp, etc. It provides fast access and processing of data packets for routing, forwarding, policy control and other operations in network devices (such as routers, switches) or network applications.

[0043] refer to Figure 1 ,in Figure 1 1 is a schematic diagram of a protocol parsing process of a network device according to an embodiment of the present invention, which includes but is not limited to steps S100 to S400:

[0044] S100, obtaining data packets flowing into the bus, separating the data packets using filters to obtain control messages and data messages, wherein the data messages include data message headers, and the control messages are sent down through the host computer.

[0045] In some embodiments, the control message includes configuration information for protocol identification of the data message, and includes protocol parsing instructions for the data message.

[0046] In some embodiments, the control message is configured accordingly according to the network device and the network traffic data type.

[0047] S200, extract key bits from the protocol field position of the data message according to the control message to obtain key bits for path protocol parsing.

[0048] In some embodiments, reference Figure 2The schematic diagram of the path resolution key bit acquisition process shown includes but is not limited to steps S210 to S230:

[0049] S210, obtaining extraction information of the data message protocol field position included in the control message, the extraction information including a high-order extraction instruction part and a low-order extraction instruction part;

[0050] S220, storing the data message in the dual-port random access memory through the device port, and performing a first pipeline extraction on the data message stored in the dual-port random access memory through the high-order extraction instruction part to obtain the byte information including the key bit pointed to by the high-order extraction instruction;

[0051] S230, performing a second pipeline extraction on the byte information through the low-bit extraction instruction part to obtain the key bits for path protocol parsing.

[0052] In some embodiments, reference Figure 3 The schematic diagram of the data path parsing instruction acquisition module shown in the figure, where filter is a filter module, which divides the input message into data message and control message. The control message (ctrl_s_tdata) carries the configuration information sent by the host computer and enters the data path parsing key bit configuration module (data_path_bit_cfg) module, the data path tcam table lookup configuration module. (data_path_tcam_cfg), and the parser instruction configuration module (parser_bram_cfg). These modules are used to extract the data message feature bit configuration information, the key bit matching tcam table configuration, and the parser instruction table configuration information from the configuration message sent by the host computer. The valid configuration information extracted by these configuration modules interacts with the data path lookup module (data_path_lookup) to realize the extraction and processing of the 128b feature bit from the valid field extraction module (get_segs) to obtain the final message parsing instruction (parser_act).

[0053] Figure 3 Some of the signals in are shown in (1) to (8):

[0054] (1) ctrl_s_tdata: control message sent by the host computer, 256b axis_stream format data;

[0055] (2) w_cfg_bit_info: key bit extraction information, 128X10b, the address of the 128b to be extracted in the first 1024b of the data message;

[0056] (3) w_dp_bit: 128-bit path resolution key bit obtained through path search;

[0057] (4) w_dp_tcam_match_addr: searches the TCAM table for the matching parsing instruction table address through the 128b path parsing key bits;

[0058] (5) i / o_vlan: vlan_id extracted from the datagram entering / outputting the data path module;

[0059] (6) i / o_dp_seg_tdata: data parsed by the input / output path;

[0060] (7) i / o_dp_seg_addr: the address of the input / output data path parsing and storage in the dual-port RAM;

[0061] (8) parser_act: message field parsing instructions obtained through matching table lookup.

[0062] In some embodiments, based on Figure 3 The functions of the structure are as follows (1) to (5):

[0063] (1) The configuration messages sent by the host computer are identified and filtered. After the messages belonging to the configuration module are taken effect, they will not flow into the next module. Configuration messages that do not belong to the module will flow into the next configuration module.

[0064] (2) According to the configuration message instructions, the 128b feature field in the 1024b message header is freely extracted in real time.

[0065] (3) The extracted 128b field content searches the protocol-parse instruction address tcam table to obtain the parsing instruction table address.

[0066] (4) The address of the parsing instruction table is formed by combining the vlan_id and tcam table address, and the packet parsing and extraction instruction output is obtained based on the address.

[0067] (5) By setting the dual-port RAM to double the depth, the pipeline of input extracted message fields and the message fields being extracted is realized. When the next group of messages enters, it will not affect the feature bit extraction of the current message.

[0068] In some embodiments, the double depth setting (ie, double data packet depth setting) of the dual-port RAM is used to capture and store twice the maximum number of bytes of each data packet to improve the data packet capture capability and analysis depth.

[0069] S300, performing a match search in the path protocol parsing TCAM table according to the path protocol parsing key bit, obtaining the address of the data message extraction and parsing instruction table, and the path protocol parsing TCAM table is configured by a control message sent from the upper computer.

[0070] In some embodiments, first configuration information of a path protocol parsing TCAM table is obtained from a host computer, and the path protocol parsing TCAM table is edited and matched according to the first configuration information and path protocol parsing key bits to obtain a data packet extraction and parsing instruction table address.

[0071] In some embodiments, the first configuration information adopts 16-bit TCAM, and the meaning of the instruction format of 16-bit TCAM is referred to Table 1, wherein the actual control message may vary with the configuration information c_data_tcam.

[0072]

[0073] In some embodiments, second configuration information of the path protocol parsing TCAM table is obtained from the host computer, and the path protocol parsing TCAM table is edited and matched according to the second configuration information and the path protocol parsing key bits to obtain the data packet extraction and parsing instruction table address.

[0074] In some embodiments, the second configuration information adopts a parser message protocol, wherein the instruction format meaning refers to Table 2, wherein the actual control message changes with the second configuration information.

[0075] Table 2 Parser instruction format meaning

[0076]

[0077] In some embodiments, reference Figure 4 The schematic diagram of the protocol identification unit structure design shown is used for feature identification of the message protocol field position, including: the data message header 2048b data is input into 32 256b-input and 8b-output dual-port RAM modules according to the bus 256b, 128 10b extraction instruction addresses are divided into 32 groups, and each group of four performs pipeline extraction on 32 RAMs. The high 7 bits of the 10b extraction instruction indicate the byte address of the extracted feature bit. After the byte containing the feature bit is extracted, the remaining low 3 bits of the address and the extracted feature bit byte are passed to the secondary extraction module. According to the low 3 bits of the address, the key feature bit is extracted from the byte to form 128b of parsed message information.

[0078] S400, extracting the data message extraction and parsing instruction table according to the address of the data message extraction and parsing instruction table to obtain the data message parsing instruction, the data message extraction and parsing instruction table is configured by a control message sent by the upper computer.

[0079] In some embodiments, reference Figure 5 The schematic diagram of the HPV (header vector) extraction process of the control message shown in FIG. 1 includes but is not limited to steps S410 to S430:

[0080] S410, obtaining a starting byte offset value, a container type value, a container index value, and a valid value of the data message parsing instruction;

[0081] S420, using the starting byte offset value to point to the starting offset extraction bit of the data message, extracting the container forming the header vector from the starting offset extraction bit, and identifying the extracted container by the container type value;

[0082] S430, determining the index of the extracted data message stored in the container according to the container index value, and determining the effective data message parsing instruction according to the valid value of the data message parsing instruction, and obtaining a message header vector by extracting the corresponding container through the data message parsing instruction.

[0083] In some embodiments, reference Figure 6 The schematic diagram of the protocol-independent parsing unit structure design shown is a simple design, which is used to filter and extract the message header 2048b information to form the PHV field.

[0084] In some embodiments, a large bit width input port and a small bit width output port of a dual-port random access memory are set, and then the fields of the data message are filtered and extracted twice step by step.

[0085] Exemplary, reference Figure 7 The protocol-independent parsing module diagram shown is Figure 6 The detailed design is used to optimize the data extraction process by decomposing the parsed instructions and extracting the data fields in two steps. The process includes: for the first extraction, 24 extraction instructions are divided into 8 groups, each with 3 instructions, that is, each segment of the message being extracted will be extracted three times in succession before the second segment of the message is completely stored in the RAM; for the second extraction, 2048b of the message to be extracted is stored in the dual-port RAM (Dual_Ram), the side entering the RAM is set to 256b width, and the side exiting the RAM is set to the bit width to be extracted. At the same time, in order to solve the problem of the offset of the extraction field, twice the number of RAMs is set to extract two consecutive bit width data to be extracted. For example, the length of the field to be extracted is 64b, but the position of the 64b field may span two consecutive 64b output ports, then two consecutive 64b are extracted to form 128b data, and then accurate 64b data extraction is obtained from the 128b.

[0086] In some embodiments, reference Figure 8 The schematic diagram of the parsing submodule shown is used to Figure 7 The parsing submodule in is explained and explained, and its extraction process is shown as follows (1) to (6):

[0087] (1) Extract the parser instruction field from the control message matching PARSER_ID, store it in the RAM of the parser module, and generate the parser protocol parsing instruction table.

[0088] (2) For any data message that passes through the filter, the VLAN_ID or VNI field in the data message is used as the index address to query the BRAM-based protocol parsing table inside the parser module to obtain a parsing table entry.

[0089] (3) Decompose the parsing table entries into 24 16-bit single parsing instructions and 5 20-bit comparison instructions.

[0090] (4) Parse the 16-bit single parsing instruction. [12:8] of the 16-bit sub-instruction indicates the offset of the extracted field relative to the starting 64 bytes of the message header (maximum offset 32), [7:5] indicates the offset of the field within 64 bits, [4:2] indicates the index of the field placed in the PHV container, and [1:0] indicates the container type. 2'b01 represents a 2-byte field, 2'b10 represents a 4-byte field, and 2'b11 represents an 8-byte field. For example, 2'b01 and 4'b0001 can determine the current extracted 2-byte field and place it in the first 2-byte container of the PHV. The highest bit in the 16-bit sub-instruction is the valid bit, which is used to identify whether the current sub-instruction is valid.

[0091] (5) n×20b selection instruction, where n is the number of matching action pipeline stages in the pipeline. The conditional instruction at each stage is 20b, of which the upper 2 bits are the comparison instruction, 2b'00 is >, 2b'01 is >=, 2b'10 is ==, and the next 18 bits are the index of the two operands of the comparison instruction in the PHV container or the value of the immediate value.

[0092] (6) The 2048-bit message header is reasonably cached to ensure the balance of the entire timing and resources, making it convenient to parse the instructions and extract the container from it in parallel.

[0093] In some embodiments, reference Figure 8The parsing instruction comes from the control message sent by the upper computer. When the control message matching the protocol-independent parsing unit flows into the protocol-independent parsing unit, the corresponding parsing instruction and parsing action table address are obtained from the control message, and then the extracted parsing instruction is further stored in the parsing action table according to the parsing action table address. Each group of parsing instruction fields stored contains 24 16-bit single parsing instructions, where the 16-bit single instruction contains an 8-bit starting byte offset value, a 3-bit container type value, a 4-bit container index value, and a 1-b parsing instruction valid value. The parsing instruction format is as follows: Fig. 9 As shown in Figure 1, the packet header vector (PHV) formed by the data packet fields extracted from the parsing instructions consists of three parts: 24 containers, 5 20-bit selection instructions, and 256-bit metadata. For details, refer to Fig.10 Schematic diagram of the HPV data format shown.

[0094] In some embodiments, the dual-port random access memory is configured to input 256 bits and output 64 bits to complete the processing through the first configuration information and the second configuration information mentioned above.

[0095] The detailed description of the PHV field is as follows (1) to (3):

[0096] (1) There are three types of containers defined, including eight 8-byte containers, eight 4-byte containers, and eight 2-byte containers. They are indexed in descending order and placed in the PHV, occupying the upper 896 bits of the PHV.

[0097] (2) The comparison instructions defined are designed according to the 5-stage design and occupy the next 100 bits of the PHV.

[0098] (3) Also carries 256 bits of data path information.

[0099] In summary, in this design, a 1252-bit PHV field is extracted from the 2048-bit message data at a time.

[0100] Fig.11 1 is a diagram of a protocol parsing and analyzing device of a network device according to an embodiment of the present invention. The device includes a first module 1110 , a second module 1120 , a third module 1130 , a fourth module 1140 and a fifth module 1150 .

[0101] Among them, the first module 1110 is used to obtain the data packets flowing into the bus, separate the data packets by using filters, and obtain control messages and data messages, the data messages include data message headers, and the control messages are sent down through the host computer; the second module 1120 is used to extract the key bits of the data message protocol field position according to the control message, and obtain the key bits of the path protocol parsing; the third module 1130 is used to match and search from the path protocol parsing TCAM table according to the key bits of the path protocol parsing, and obtain the address of the data message extraction and parsing instruction table, and the path protocol parsing TCAM table is configured by the control message sent down by the host computer; the fourth module 1140 is used to extract the data message extraction and parsing instruction table according to the address of the data message extraction and parsing instruction table, and obtain the data message parsing instruction, and the data message extraction and parsing instruction table is configured by the control message sent down by the host computer; the fifth module 1150 is used to extract the data message according to the data message parsing instruction, and obtain the message header vector, and the message header vector includes a container, a selection instruction and metadata.

[0102] Exemplarily, under the cooperation of the first module 1110, the second module 1120, the third module 1130, the fourth module 1140 and the fifth module 1150 in the device, the embodiment device can implement any of the aforementioned protocol parsing methods of the network device, that is, obtaining the data packets flowing into the bus, separating the data packets by using filters, and obtaining control messages and data messages, the data messages include data message headers, and the control messages are sent down through the host computer; according to the control message, the key bits of the data message protocol field position are extracted to obtain the key bits of the path protocol parsing. ; According to the key bits of path protocol parsing, match and search in the path protocol parsing TCAM table to obtain the address of the data message extraction and parsing instruction table, and the path protocol parsing TCAM table is configured by the control message sent by the host computer; according to the address of the data message extraction and parsing instruction table, extract the data message extraction and parsing instruction table to obtain the data message parsing instruction, and the data message extraction and parsing instruction table is configured by the control message sent by the host computer; according to the data message parsing instruction, extract the data message to obtain the message header vector, and the message header vector includes a container, a selection instruction and metadata. The beneficial effects of the present invention are: according to the network traffic mode, the setting can realize the free and flexible extraction of wider message header fields while only increasing the storage resource consumption without increasing the logic resources, and realize the deep parallel pipeline parsing of the data message, and realize the programmable configuration of the parser function by sending messages from the host computer.

[0103] An embodiment of the present invention further provides an electronic device, the electronic device comprising a processor and a memory;

[0104] The memory stores a program;

[0105] The processor executes the program to execute the aforementioned protocol parsing method for the network device; the electronic device has the function of carrying and running the software system for protocol parsing of the network device provided in the embodiment of the present invention, for example, a personal computer, a minicomputer, a main frame, a workstation, a network or distributed computing environment, a separate or integrated computer platform, or communicating with a charged particle tool or other imaging device, etc.

[0106] An embodiment of the present invention further provides a computer-readable storage medium, wherein the storage medium stores a program, and the program is executed by a processor to implement the protocol parsing method of the network device as described above.

[0107] In some selectable embodiments, the function / operation mentioned in the block diagram may not occur in the order mentioned in the operation diagram. For example, depending on the function / operation involved, the two boxes shown in succession can actually be executed substantially simultaneously or the boxes can sometimes be executed in reverse order. In addition, the embodiment presented and described in the flow chart of the present invention is provided by way of example, for the purpose of providing a more comprehensive understanding of technology. The disclosed method is not limited to the operation and logic flow presented herein. Selectable embodiments are expected, wherein the order of various operations is changed and the sub-operation of a part for which is described as a larger operation is performed independently.

[0108] The embodiment of the present invention also discloses a computer program product or a computer program, which includes a computer instruction stored in a computer-readable storage medium. A processor of a computer device can read the computer instruction from the computer-readable storage medium, and the processor executes the computer instruction, so that the computer device executes the aforementioned protocol parsing method of the network device.

[0109] In addition, although the present invention is described in the context of functional modules, it should be understood that, unless otherwise specified, one or more of the functions and / or features described may be integrated into a single physical device and / or software module, or one or more functions and / or features may be implemented in separate physical devices or software modules. It is also understood that a detailed discussion of the actual implementation of each module is unnecessary for understanding the present invention. More specifically, in view of the properties, functions, and internal relationships of the various functional modules in the device disclosed herein, the actual implementation of the module will be understood within the conventional skills of the engineer. Therefore, those skilled in the art can implement the present invention set forth in the claims without excessive experimentation using ordinary techniques. It is also understood that the specific concepts disclosed are merely illustrative and are not intended to limit the scope of the present invention, which is determined by the full scope of the appended claims and their equivalents.

[0110] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium, including several instructions to enable a computer device (which can be a personal computer, server, or network device, etc.) to perform all or part of the steps of the methods described in various embodiments of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk, etc., which can store program codes.

[0111] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as an ordered list of executable instructions for implementing logical functions, and can be embodied in any computer-readable medium for use by an instruction execution system, device or apparatus (such as a computer-based system, a system including a processor, or other system that can fetch instructions from an instruction execution system, device or apparatus and execute instructions), or in conjunction with such instruction execution systems, devices or apparatuses. For the purposes of this specification, "computer-readable medium" can be any device that can contain, store, communicate, propagate or transmit a program for use by an instruction execution system, device or apparatus, or in conjunction with such instruction execution systems, devices or apparatuses.

[0112] More specific examples of computer-readable media (a non-exhaustive list) include the following: an electrical connection with one or more wires (electronic device), a portable computer disk case (magnetic device), a random access memory (RAM), a read-only memory (ROM), an erasable and programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disk read-only memory (CDROM). In addition, the computer-readable medium may even be a paper or other suitable medium on which the program is printed, since the program may be obtained electronically, for example, by optically scanning the paper or other medium, followed by editing, deciphering or, if necessary, processing in another suitable manner, and then stored in a computer memory.

[0113] It should be understood that the various parts of the present invention can be implemented by hardware, software, firmware or a combination thereof. In the above-mentioned embodiments, multiple steps or methods can be implemented by software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented by hardware, as in another embodiment, it can be implemented by any one of the following technologies known in the art or their combination: a discrete logic circuit having a logic gate circuit for implementing a logic function for a data signal, a dedicated integrated circuit having a suitable combination of logic gate circuits, a programmable gate array (PGA), a field programmable gate array (FPGA), etc.

[0114] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0115] Although the embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the claims and their equivalents.

[0116] The above is a specific description of the preferred implementation of the present invention, but the present invention is not limited to the described embodiments. Those skilled in the art may make various equivalent modifications or substitutions without violating the spirit of the present invention. These equivalent modifications or substitutions are all included in the scope defined by the claims of this application.

Claims

1. A protocol parsing method for a network device, characterized in that: include: Obtain data packets flowing into the bus, separate the data packets using filters to obtain control messages and data messages, wherein the data messages include data message headers, and the control messages are sent down through the host computer; Extract key bits of the data message protocol field position according to the control message to obtain key bits for path protocol parsing; According to the path protocol parsing key bits, a match is searched in the path protocol parsing TCAM table to obtain the address of the data message extraction and parsing instruction table, and the path protocol parsing TCAM table is configured by the control message sent by the host computer; Extracting the data message extraction and parsing instruction table according to the address of the data message extraction and parsing instruction table to obtain the data message parsing instruction, wherein the data message extraction and parsing instruction table is configured by the control message sent by the host computer; Extracting the data message according to the data message parsing instruction to obtain a message header vector, wherein the message header vector includes a container, a selection instruction and metadata; The key bit extraction of the data message protocol field position according to the control message includes: obtaining extraction information of the data message protocol field position included in the control message, the extraction information including a high-order extraction instruction part and a low-order extraction instruction part; storing the data message in a dual-port random access memory through a device port, and performing a first pipeline extraction on the data message stored in the dual-port random access memory through the high-order extraction instruction part to obtain byte information including the key bit pointed to by the high-order extraction instruction; and performing a second pipeline extraction on the byte information through the low-order extraction instruction part to obtain the path protocol parsing key bit.

2. The protocol parsing method for a network device according to claim 1, characterized in that: According to the path protocol parsing key bit, a matching search is performed in the path protocol parsing TCAM table to obtain the address of the data packet extraction and parsing instruction table, including: The first configuration information of the path protocol parsing TCAM table is obtained from the host computer, and the path protocol parsing TCAM table is edited and matched according to the first configuration information and the path protocol parsing key bits to obtain the data packet extraction and parsing instruction table address, wherein the first configuration information adopts a 16-bit TCAM.

3. The protocol parsing method for a network device according to claim 1, characterized in that: The method further comprises: The dual-port random access memory is set to double the data message depth. While executing pipeline extraction on the previous data message through the double data message depth setting, the pipeline of the next data message entering the dual-port random access memory is also cached; The large bit width input port and the small bit width output port of the dual-port random access memory are set, and then the fields of the data message are filtered and extracted twice step by step.

4. The protocol parsing method for a network device according to claim 3, characterized in that: The extracting the data message extraction and parsing instruction table according to the address of the data message extraction and parsing instruction table includes: The second configuration information of the path protocol parsing TCAM table is obtained from the host computer, and the path protocol parsing TCAM table is edited and matched according to the second configuration information and the path protocol parsing key bits to obtain the data message extraction and parsing instruction table address, wherein the second configuration information adopts the parser message protocol.

5. The protocol parsing method for a network device according to claim 4, characterized in that: The extracting the data message according to the data message parsing instruction to obtain a message header vector includes: Obtaining a starting byte offset value, a container type value, a container index value, and a valid value of the data message parsing instruction; Pointing the starting offset extraction bit of the data message with the starting byte offset value, extracting the container forming the header vector from the starting offset extraction bit, and identifying the extracted container with the container type value; The index of the extracted data message stored in the container is determined according to the container index value; the effective data message parsing instruction is determined according to the valid value of the data message parsing instruction, and the corresponding container is extracted through the data message parsing instruction to obtain a message header vector.

6. The protocol parsing method for a network device according to claim 5, characterized in that: The method further comprises: Using one of the VLAN_ID or VNI fields of the data message as the index address, a single parsing instruction and a comparison instruction are obtained from the BRAM-based protocol parsing table according to the index address, wherein the single parsing instruction is the data message parsing instruction, and the comparison instruction is used to complete the comparison processing according to its own operand.

Citation Information

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