Display device

Abstract

Provided is a display device, the display device according to an embodiment including: a display area including a first display area and a second display area disposed around the first display area; a first pixel disposed in the first display area and including a first emission area; and a second pixel disposed in the second display area and including a second emission area, where the second emission area has a size larger than a size of the first emission area.

Description

[0001] This application claims priority to and the benefit of Korean Patent Application No. 10-2023-0081750 filed in the Korean Intellectual Property Office on June 26, 2023, the entire contents of which are incorporated herein by reference. Technical Field

[0002] Embodiments relate to a display device. Background Art

[0003] As multimedia develops, display devices are becoming more and more important. Therefore, various display devices such as liquid crystal display devices and organic light emitting display devices are being developed.

[0004] As the cumulative amount of light emission increases, the pixels of the display device may degrade. For example, because the degradation of the organic light emitting diode accelerates as the amount of current and current density flowing through the organic light emitting diode increases, the pixels of the organic light emitting display device including the organic light emitting diode may not properly or accurately express the target brightness. For example, pixels located in an area where a specific image (such as a logo image or a banner image) is continuously and / or repeatedly displayed may degrade faster than other pixels. Therefore, the image quality of the display device may degrade, afterimages may occur, and the life of the display device may be shortened. Summary of the invention

[0005] The embodiment provides a display device capable of reducing or minimizing degradation of pixels provided in a region having a large cumulative light emission amount.

[0006] However, the embodiments of the disclosure are not limited to the embodiments set forth herein. The above and other embodiments of the disclosure will become more apparent to those skilled in the art to which the disclosure pertains by referring to the detailed description of the disclosure given below.

[0007] According to the disclosed aspects, a display device is provided, comprising: a display area, comprising a first display area and a second display area arranged around the first display area; a first pixel, arranged in the first display area and comprising a first emission area; and a second pixel, arranged in the second display area and comprising a second emission area, wherein the second emission area has a size larger than that of the first emission area.

[0008] In an embodiment, the first pixel and the second pixel may include the same number of sub-pixels, and the sum of sizes of sub-emission areas of the sub-pixels of the second pixel may be greater than the sum of sizes of sub-emission areas of the sub-pixels of the first pixel.

[0009] In an embodiment, each of the first pixel and the second pixel may include a first color sub-pixel that emits light of a first color, the first color sub-pixel of the first pixel includes a first color first sub-emission region having a first size, and the first color sub-pixel of the second pixel may include a first color second sub-emission region, the first color second sub-emission region having a second size larger than the first size.

[0010] In an embodiment, the first color sub-pixel of the first pixel may include an organic light emitting diode, which includes a light emitting layer having a size corresponding to the size of the first color first sub-emitting region, and the first color sub-pixel of the second pixel may include an organic light emitting diode, which includes a light emitting layer having a size corresponding to the size of the first color second sub-emitting region.

[0011] In an embodiment, each of the first pixel and the second pixel may include a second color sub-pixel that emits light of a second color, and the second color sub-pixel of the second pixel may include a second color second sub-emission region having a size larger than a size of the second color first sub-emission region of the second color sub-pixel of the first pixel.

[0012] In an embodiment, each of the first pixel and the second pixel may include a third color sub-pixel that emits light of a third color, and the third color sub-pixel of the second pixel may include a third color second sub-emission region having a size larger than a size of the third color first sub-emission region of the third color sub-pixel of the first pixel.

[0013] In an embodiment, the first pixel and the second pixel may include different numbers of sub-pixels, and the second pixel may include a greater number of sub-pixels than the first pixel.

[0014] In an embodiment, a first pixel may include: a first color sub-pixel that emits light of a first color; a second color sub-pixel that emits light of a second color; and a third color sub-pixel that emits light of a third color, and a second pixel may include: a first color sub-pixel that emits light of the first color; a second color sub-pixel that emits light of the second color; a third color sub-pixel that emits light of the third color; and a fourth color sub-pixel that emits light of a fourth color.

[0015] In an embodiment, the first color subpixel of the first pixel and the first color subpixel of the second pixel may include sub-emission areas having the same size, the second color subpixel of the first pixel and the second color subpixel of the second pixel may include sub-emission areas having the same size, and the third color subpixel of the first pixel and the third color subpixel of the second pixel may include sub-emission areas having the same size.

[0016] In an embodiment, the light of the first color, the light of the second color, the light of the third color, and the light of the fourth color may be red light, green light, blue light, and white light, respectively.

[0017] In an embodiment, the first display area may be disposed at a central portion of the display area in at least the first direction, and the second display area may be disposed at an edge portion of the display area in the first direction.

[0018] In an embodiment, the second display area may be disposed at edge portions of the display area in the first direction and in a second direction intersecting the first direction, and may surround the first display area.

[0019] In an embodiment, the first direction may correspond to a vertical direction of the display area, and the second display area may be disposed at at least one of an upper edge portion and a lower edge portion of the display area.

[0020] In an embodiment, the display area may display an image including a logo image or a banner image, and the second display area may include an area in which the logo image or the banner image is displayed.

[0021] In an embodiment, the display area may further include a third display area disposed between the first display area and the second display area, and the third display area may include a third pixel.

[0022] In an embodiment, the third pixel may include a third emission region having a size larger than that of the first emission region and having a size smaller than that of the second emission region.

[0023] According to the disclosed aspects, a display device is provided, which includes a first display area and a second display area, the first display area including a first pixel, the second display area being arranged on both sides of the first display area in at least a first direction and including a second pixel, wherein the first pixel includes a first color sub-pixel that emits light of a first color and includes a sub-emission area having a first size, and the second pixel includes a first color sub-pixel that emits light of the first color and includes a sub-emission area having a second size larger than the first size.

[0024] In an embodiment, the first pixel and the second pixel may include the same number of sub-pixels.

[0025] According to the disclosed aspects, a display device is provided, which includes a first display area and a second display area, the first display area including a first pixel, the second display area is arranged on both sides of the first display area in at least a first direction and includes a second pixel, wherein each of the first pixel and the second pixel includes at least two sub-pixels, and the second pixel includes a greater number of sub-pixels than the first pixel.

[0026] In an embodiment, each of the first pixel and the second pixel may include a first color sub-pixel that emits light of a first color, and the first color sub-pixel of the first pixel and the first color sub-pixel of the second pixel may include sub-emission areas having the same size.

[0027] The display device according to the embodiment includes a first display area and a second display area arranged outside the first display area. The second pixel arranged in the second display area may include an emission area having a size larger than the size of the emission area of ​​the first pixel arranged in the first display area. For example, in an embodiment, in a second display area in which a specific image (such as a logo image or a banner image) displayed continuously and / or repeatedly is frequently displayed, the area of ​​the emission area of ​​the second pixel arranged in the second display area can be expanded. Therefore, the density of the current flowing through the organic light emitting diode arranged in the second pixel can be reduced, thereby reducing or minimizing the degradation of the second pixel.

[0028] According to the embodiment, degradation of the organic light emitting diodes and pixels including the organic light emitting diodes disposed in the second display area can be reduced or minimized by reducing the density of current flowing through the organic light emitting diodes of the pixels disposed in the second display area, the second display area having a cumulative light emission amount greater than the cumulative light emission amount of the first display area. Therefore, the image quality of the display device can be improved, and the life of the display device can be extended.

[0029] However, the effects according to the embodiment are not limited to the effects exemplified above, and various other effects are incorporated herein. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] These and / or other aspects will become apparent and more easily understood through the following description of the embodiments in conjunction with the accompanying drawings, in which:

[0031] Figure 1 is a schematic perspective view of a display device according to an embodiment;

[0032] Figure 2 is a schematic plan view of a display device according to an embodiment;

[0033] Figure 3 is a schematic plan view of a pixel according to an embodiment;

[0034] Figure 4 is a schematic plan view of a pixel according to an embodiment;

[0035] Figure 5 is a schematic plan view of a pixel according to an embodiment;

[0036] Figure 6 is a schematic plan view of a pixel according to an embodiment;

[0037] Figure 7 is a schematic plan view of a pixel according to an embodiment;

[0038] Figure 8 is a schematic diagram of an equivalent circuit of a sub-pixel according to an embodiment;

[0039] Fig. 9 is a schematic plan view of a display device according to an embodiment;

[0040] Fig.10 is a schematic plan view of a display device according to an embodiment;

[0041] Fig.11 is a schematic plan view showing a first pixel and a second pixel according to an embodiment;

[0042] Fig.12 is a schematic cross-sectional view of a display device according to an embodiment;

[0043] Fig.13 is a schematic plan view showing a first pixel and a second pixel according to an embodiment;

[0044] Fig.14 is a schematic plan view of a display device according to an embodiment;

[0045] Fig.15 is a schematic plan view of a display device according to an embodiment;

[0046] Fig.16 is a schematic plan view showing a first pixel, a second pixel, and a third pixel according to an embodiment;

[0047] Fig.17 is a schematic cross-sectional view of a display device according to an embodiment;

[0048] Fig.18 is a schematic plan view showing a first pixel, a second pixel, and a third pixel according to an embodiment; and

[0049] Fig.19 is a graph showing the luminance maintenance rate of a light emitting element with respect to the light emission time and the light emission luminance. DETAILED DESCRIPTION

[0050] In the following description, for the purpose of explanation, many specific details are set forth to provide a thorough understanding of various embodiments or implementations of the invention. As used herein, "embodiment" and "implementation" are interchangeable words as non-limiting examples of the apparatus or method disclosed herein. However, it is apparent that various embodiments may be practiced without these specific details or with one or more equivalent arrangements. Here, various embodiments need not be exclusive, nor need they be limited to disclosure. For example, the specific shapes, configurations, and characteristics of an embodiment may be used or implemented in another embodiment.

[0051] Unless otherwise specified, the illustrated embodiments will be understood to provide features of the invention. Therefore, unless otherwise specified, the features, components, modules, layers, films, panels, regions and / or aspects, etc. (hereinafter individually or collectively referred to as "elements") of the various embodiments may be further combined, separated, interchanged and / or rearranged without departing from the invention.

[0052] The use of cross hatching and / or shadows is usually provided in the drawings to make the boundaries between adjacent elements clear. Thus, unless otherwise specified, the presence or absence of cross hatching or shadows does not convey or indicate any preference or demand for the specific material, material properties, size, ratio, commonality between the shown elements and / or any other characteristics, attributes, properties, etc. of the element. In addition, in the drawings, the size and relative size of the elements may be exaggerated for clarity and / or descriptive purposes. When the embodiments can be implemented differently, a specific process sequence may be performed differently from the described sequence. For example, two continuously described processes may be performed substantially simultaneously or in an order opposite to the described sequence. In addition, the same reference numerals represent the same elements.

[0053] When an element (or layer) is referred to as being "on" another element or layer, "connected to" or "bonded to" another element or layer, the element (or layer) may be directly on, directly connected to or directly bonded to the other element or layer, or there may be an intervening element or layer. However, when an element or layer is referred to as being "directly on" another element or layer, "directly connected to" or "directly bonded to" another element or layer, there is no intervening element or layer. For this purpose, the term "connection" may refer to a physical connection, an electrical connection and / or a fluid connection with or without an intervening element. In addition, the first direction DR1, the second direction DR2 and the third direction DR3 are not limited to directions corresponding to the three axes of a rectangular coordinate system (such as the X-axis, the Y-axis and the Z-axis), and may be interpreted in a broader sense. For example, the first direction DR1, the second direction DR2 and the third direction DR3 may be perpendicular to each other, or may represent different directions that are not perpendicular to each other. For the purpose of this disclosure, "at least one of A and B" may be interpreted as only A, only B or any combination of A and B. In addition, "at least one of X, Y and Z" and "at least one selected from the group consisting of X, Y and Z" may be interpreted as any combination of only X, only Y, only Z, or two or more of X, Y and Z. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0054] Although the terms "first," "second," etc. may be used herein to describe various types of elements, these elements should not be limited by these terms. These terms are used to distinguish one element from another. Therefore, the first element discussed below may be referred to as the second element without departing from the disclosed teachings.

[0055] For descriptive purposes, spatially relative terms such as "under," "below," "below," "down," "above," "up," "above," "higher," "side" (e.g., as in "sidewall"), etc., may be used herein to describe the relationship of one element to another (other) element as shown in the accompanying drawings. Spatially relative terms are intended to encompass different orientations of the device in use, operation, and / or manufacture in addition to the orientation depicted in the accompanying drawings. For example, if the device in the accompanying drawings is turned over, an element described as "under" or "beneath" other elements or features would subsequently be positioned as "above" the other elements or features. Thus, the term "under" can cover both above and below orientations. In addition, the device may be otherwise positioned (e.g., rotated 90 degrees or at other orientations), and as such, the spatially relative descriptors used herein are interpreted accordingly.

[0056] The terms used herein are for the purpose of describing specific embodiments, and are not intended to be limiting. As used herein, unless the context clearly indicates otherwise, the singular forms "one", "one (kind / person)" and "the (described)" are also intended to include plural forms. In addition, when the term "comprising" and its variations and / or "including" and its variations are used in this specification, it is explained that there are stated features, integral bodies, steps, operations, elements, components and / or their groups, but it is not excluded that there are or add one or more other features, integral bodies, steps, operations, elements, components and / or their groups. It is also noted that, as used herein, the terms "substantially", "approximately" and other similar terms are used as approximate terms and not as degree terms, and are used to explain the inherent deviations of measured values, calculated values ​​and / or setting values ​​that will be recognized by those of ordinary skill in the art.

[0057] Various embodiments are described herein with reference to cross-sectional views and / or exploded views as schematic diagrams of embodiments and / or intermediate structures. As such, variations in the shapes of the diagrams, such as those caused by manufacturing techniques and / or tolerances, are anticipated. Therefore, the embodiments disclosed herein should not necessarily be interpreted as being limited to the specific illustrated shapes of the regions, but rather will include deviations in shapes caused by, for example, manufacturing. In this manner, the regions shown in the accompanying drawings may be schematic in nature, and the shapes of these regions may not reflect the actual shapes of the regions of the device, and thus need not be intended to be limiting.

[0058] As is customary in the art, some embodiments are described and shown in the accompanying drawings according to functional blocks, units and / or modules. It will be appreciated by those skilled in the art that these blocks, units and / or modules are physically implemented by electronic (or optical) circuits such as logic circuits, discrete components, microprocessors, hard-wired circuits, memory elements, wiring connectors, etc., which can be formed using semiconductor-based manufacturing techniques or other manufacturing techniques. In the case of implementing blocks, units and / or modules by microprocessors or other similar hardware, they can be programmed and controlled using software (e.g., microcode) to perform the various functions discussed herein, and they can be optionally driven by firmware and / or software. It is also contemplated that each block, unit and / or module can be implemented by dedicated hardware, or by a combination of dedicated hardware that performs some functions and a processor that performs other functions (e.g., one or more programmed microprocessors and related circuits). In addition, without departing from the scope of the invention, each block, unit and / or module in some embodiments can be physically divided into two or more interactive and discrete blocks, units and / or modules. Furthermore, the blocks, units and / or modules of some embodiments may be physically combined into more complex blocks, units and / or modules without departing from the scope of the invention.

[0059] The features of each of the various disclosed embodiments may be partially or completely combined with each other and may variously interact with each other technically, and the various embodiments may be implemented independently of each other or may be implemented together in association with each other.

[0060] Figure 1 is a schematic perspective view of a display device 100 according to an embodiment. Figure 2 yes Figure 1 Schematic plan view of a display device 100.

[0061] Reference Figure 1 and Figure 2 , the display device 100 may include a display area DA and a non-display area NA (also referred to as a "border area") located around the display area DA. The pixels PX may be provided or arranged in the display area DA. The non-display area NA may be an area other than the display area DA. For example, wiring, pads (or referred to as "pads" or "pads"), and / or embedded circuit units connected to the pixels PX may be provided or arranged in the non-display area NA.

[0062] The display device 100 may have various shapes. For example, the display device 100 may be formed in the form of a panel having a rectangular shape in a plane defined by a first direction DR1 and a second direction DR2 intersecting each other (or in a plan view). However, the embodiment is not limited thereto. For example, the display device 100 may also be provided in a polygonal shape, a circular shape, or an elliptical shape in addition to a quadrilateral shape. For example, the display device 100 may include angled corners and / or curved corners, and may be formed in a substantially flat shape or a shape including a curved surface. For ease of description, in Figure 1 and Figure 2 , the display device 100 is shown to have a rectangular shape and to be flat when viewed in a plane defined by the first direction DR1 and the second direction DR2 (or in a plan view).

[0063] exist Figure 2 , a direction (e.g., a vertical direction) along which a short side of the display device 100 extends is shown as a first direction DR1, and a direction (e.g., a horizontal direction) along which a long side extends is shown as a second direction DR2. The display device 100 may have a thickness or height in a third direction DR3 intersecting the first direction DR1 and the second direction DR2. For example, the third direction DR3 may be a direction orthogonal to the first direction DR1 and the second direction DR2, and may be a thickness direction (or height direction) of the display device 100.

[0064] The display area DA may have various shapes. For example, the display area DA may have various shapes including a quadrilateral shape, a polygonal shape other than the quadrilateral shape, a circular shape, and an elliptical shape. In an embodiment, the display area DA may have a shape that conforms to (or corresponds to) the shape of the display device 100, but the embodiment is not limited thereto.

[0065] The screen of the display device 100 including the display area DA may be substantially flat or may have a curved surface. According to embodiments, the shape of the display area DA and the shape of the display device 100 including the display area DA may be variously changed (or modified).

[0066] The display area DA may include pixels PX, and an image IMG may be displayed in the display area DA through the pixels PX. In an embodiment, the image IMG may include a display image IMG1 (also referred to as a "first image") containing a general program content, and may also include a logo image IMG2 and / or a banner image IMG3 that are continuously and / or repeatedly displayed when a certain broadcast and / or program is played. The logo image IMG2 or the banner image IMG3 may be continuously and / or repeatedly displayed at a specific position in the display area DA, for example, in an edge area including an upper edge portion and a lower edge portion of the display area DA. Therefore, pixels PX located in an area where a specific image (such as the logo image IMG2 or the banner image IMG3) that is continuously and / or repeatedly displayed is frequently displayed may have a relatively larger accumulated light emission amount than other pixels PX, and may degrade or decay faster than other pixels PX.

[0067] Figure 3 is a schematic plan view of a pixel PX according to an embodiment. Figure 4 is a schematic plan view of a pixel PX according to an embodiment. Figure 5 is a schematic plan view of a pixel PX according to an embodiment. Figure 6 is a schematic plan view of a pixel PX according to an embodiment. Figure 7 is a schematic plan view of a pixel PX according to an embodiment. For example, Figure 3 , Figure 4 , Figure 5 , Figure 6 and Figure 7 Shown in Figure 1 and Figure 2 Different embodiments related to the construction, shape and / or arrangement structure of the pixels PX set or arranged in the display area DA.

[0068] Reference Figure 3 , Figure 4 , Figure 5 , Figure 6 and Figure 7, the pixel PX may include at least two sub-pixels SPX each including a sub-emission area SEA. The pixel PX may include an emission area EA including the sub-emission area SEA of the sub-pixel SPX. For example, the emission area EA of each pixel PX may include the sub-emission area SEA of the sub-pixel SPX disposed in the pixel PX.

[0069] Each sub-pixel SPX may include at least one light emitting element (e.g., an organic light emitting diode) disposed in the sub-emission area SEA. In an embodiment, each sub-pixel SPX may also include a pixel circuit connected to the light emitting element. In an embodiment, the term "connected" may mean physically connected and / or electrically connected.

[0070] In some embodiments, the pixel PX may include a first color sub-pixel SPX1 (also referred to as a "first sub-pixel") that emits light of a first color (e.g., red light), a second color sub-pixel SPX2 (also referred to as a "second sub-pixel") that emits light of a second color (e.g., green light), and a third color sub-pixel SPX3 (also referred to as a "third sub-pixel") that emits light of a third color (e.g., blue light).

[0071] The first color sub-pixel SPX1 may include a first color sub-emission area SEA1 (e.g., an emission area of ​​the first color sub-pixel SPX1) having a light-emitting element (e.g., an organic light-emitting diode) and emitting light of a first color. In an embodiment, the first color sub-pixel SPX1 may include a light-emitting element (e.g., a red organic light-emitting diode) that emits light of a first color or may include a light-emitting element that emits light of a specific color and a wavelength converter that converts the light of the specific color into light of the first color. Therefore, the light of the first color may be emitted from the first color sub-emission area SEA1.

[0072] The second color sub-pixel SPX2 may include a second color sub-emission area SEA2 (e.g., an emission area of ​​the second color sub-pixel SPX2) having a light-emitting element (e.g., an organic light-emitting diode) and emitting light of the second color. In an embodiment, the second color sub-pixel SPX2 may include a light-emitting element (e.g., a green organic light-emitting diode) that emits light of the second color, or may include a light-emitting element that emits light of a specific color and a wavelength converter that converts the light of the specific color into light of the second color. Therefore, the light of the second color may be emitted from the second color sub-emission area SEA2.

[0073] The third color sub-pixel SPX3 may include a third color sub-emission region SEA3 (e.g., an emission region of the third color sub-pixel SPX3) having a light-emitting element (e.g., an organic light-emitting diode) and emitting light of the third color. In an embodiment, the third color sub-pixel SPX3 may include a light-emitting element (e.g., a blue organic light-emitting diode) emitting light of the third color or may include a light-emitting element emitting light of a specific color and a wavelength converter converting the light of the specific color into light of the third color. Therefore, the light of the third color may be emitted from the third color sub-emission region SEA3.

[0074] Despite Figure 3 , Figure 4 , Figure 5 , Figure 6 and Figure 7 2 discloses an embodiment in which one first color sub-pixel SPX1, one second color sub-pixel SPX2, one third color sub-pixel SPX3, and / or one fourth color sub-pixel SPX4 are included in each pixel PX, but the embodiment is not limited thereto. For example, two or more sub-pixels SPX emitting light of the same color may also be provided in each pixel PX. According to the embodiment, the type and / or number of sub-pixels SPX included in each pixel PX may be variously changed (or modified).

[0075] Each sub-pixel SPX may include a sub-emission area SEA having a quadrilateral shape, a polygonal shape other than a quadrilateral shape, a circular shape, an elliptical shape, or other shapes. For example, the shape, size, ratio, and / or arrangement structure of the sub-emission area SEA formed in each pixel PX may be variously changed (or modified) so that target values ​​of various characteristics (such as aperture ratio, transmittance, luminous efficiency, white balance, and / or visibility) for each sub-pixel SPX and the pixel PX including the sub-pixel SPX may be achieved.

[0076] In some embodiments, Figure 3 and Figure 4 As shown in , the pixel PX may include sub-emission areas SEA having a quadrilateral shape (such as a square shape) and arranged in a triangular shape. In an embodiment, the sub-emission area SEA of each pixel PX may have a shape such as Figure 3 In an embodiment, at least two sub-emission areas SEA of each pixel PX may have different sizes. For example, Figure 4 As shown in , the sub-emission area SEA of each pixel PX may have different sizes.

[0077] In an embodiment, the pixel PX may include sub-emission areas SEA arranged in a stripe shape along a direction. Figure 5As shown in , the pixel PX may include a sub-emission area SEA having a rectangular shape extending in the first direction DR1 and sequentially arranged along the second direction DR2. In an embodiment, the first color sub-emission area SEA1, the second color sub-emission area SEA2, and the third color sub-emission area SEA3 may be sequentially arranged along the second direction DR2. However, the arrangement order of the sub-emission areas SEA may be changed or modified. The sub-emission areas SEA may have the same area (or size) or different areas (or sizes).

[0078] In an embodiment, the pixel PX may include a sub-emission area SEA having a non-quadrilateral shape. Figure 6 As shown in , the pixel PX may include sub-emission areas SEA having a polygonal shape other than a quadrilateral shape and arranged in a triangular shape. The sub-emission areas SEA may have the same area (or size) or different areas (or sizes). According to embodiments, the arrangement order of the sub-emission areas SEA may be variously changed (or modified).

[0079] In an embodiment, Figure 7 As shown in , the pixel PX may further include a fourth color sub-pixel SPX4 (also referred to as a "fourth sub-pixel") that emits light of a fourth color (e.g., white light). The fourth color sub-pixel SPX4 may include a fourth color sub-emission area SEA4 (e.g., an emission area of ​​the fourth color sub-pixel SPX4) having a light-emitting element (e.g., an organic light-emitting diode) and emitting light of the fourth color. In an embodiment, the fourth color sub-pixel SPX4 may include a light-emitting element (e.g., a white organic light-emitting diode) that emits light of the fourth color or may include a light-emitting element that emits light of a specific color and a wavelength converter that converts the light of the specific color into light of the fourth color. Therefore, the light of the fourth color may be emitted from the fourth color sub-emission area SEA4. In an embodiment, the pixel PX may include a sub-emission area SEA having a rectangular shape extending in the first direction DR1 and arranged sequentially along the second direction DR2. In an embodiment, the second color sub-emission area SEA2, the first color sub-emission area SEA1, the fourth color sub-emission area SEA4, and the third color sub-emission area SEA3 may be arranged sequentially along the second direction DR2. However, the arrangement order of the sub-emission areas SEA may be changed or modified. The sub-emission areas SEA may have the same area (or size) or different areas (or sizes).

[0080] The display device 100 may further include Figure 3 , Figure 4 , Figure 5 , Figure 6 and Figure 7 Pixels PX of various configurations, structures and / or shapes other than those of the embodiments.

[0081] Figure 8 is a schematic diagram of an equivalent circuit of a sub-pixel SPX according to the embodiment.

[0082] Reference Figure 8 , the sub-pixel SPX may include a light emitting element EL formed between a first power line PL1 and a second power line PL2, a first power supply voltage VDD is supplied to the first power line PL1, and a second power supply voltage VSS is supplied to the second power line PL2. The light emitting element EL may be an organic light emitting diode. In an embodiment, the sub-pixel SPX may further include a pixel circuit PXC. However, the embodiment is not limited thereto.

[0083] The pixel circuit PXC may be connected between the first power line PL1 and the light emitting element EL. For example, the pixel circuit PXC may be connected to the scan line SL (or the first scan line) and the data line DL of the sub-pixel SPX to control the light emission of the light emitting element EL in response to the scan signal and the data signal supplied through the scan line SL and the data line DL. In an embodiment, the pixel circuit PXC may also be connected to the sensing control line SSL (or the second scan line) and the sensing line SENL (or the initialization power line).

[0084] The pixel circuit PXC may include at least one transistor Tpx and a capacitor Cst. For example, the pixel circuit PXC may include a first transistor T1, a second transistor T2, a third transistor T3, and a capacitor Cst. The configuration of the pixel circuit PXC may be variously changed (or modified) according to the embodiment.

[0085] The first transistor T1 may be connected between the first power line PL1 and the first electrode ET1 (e.g., anode) of the light emitting element EL. The gate electrode of the first transistor T1 may be connected to the first node N1. The first transistor T1 may control the driving current supplied to the light emitting element EL in response to the voltage of the first node N1. For example, the first transistor T1 may be a driving transistor that controls the driving current of the sub-pixel SPX.

[0086] The second transistor T2 may be connected between the data line DL and the first node N1. The gate electrode of the second transistor T2 may be connected to the scan line SL. The second transistor T2 may be turned on when a scan signal of a gate-on voltage (e.g., a high-level voltage) is supplied from the scan line SL, and may electrically connect the data line DL and the first node N1.

[0087] The data signal supplied to the data line DL in each frame period can be transmitted to the first node N1 of the subpixel SPX including the second transistor T2 turned on in response to the scan signal of the gate-on voltage. For example, the second transistor T2 can be a switching transistor for transmitting each data signal to the subpixel SPX.

[0088] One electrode of the capacitor Cst may be connected to the first node N1, and the other electrode may be connected to the second electrode of the first transistor T1. The capacitor Cst may be charged with a voltage corresponding to the data signal supplied to the first node N1.

[0089] The third transistor T3 may be connected between the first electrode ET1 of the light emitting element EL (or the second electrode of the first transistor T1) and the sensing line SENL. The gate electrode of the third transistor T3 may be connected to the sensing control line SSL. The third transistor T3 may transmit the voltage value supplied to the first electrode ET1 of the light emitting element EL to the sensing line SENL according to the sensing signal of the gate-on voltage supplied to the sensing control line SSL during the sensing period. The voltage value received through the sensing line SENL may be provided to an external circuit (e.g., a timing controller), and the external circuit may extract characteristic information of each sub-pixel SPX (e.g., the threshold voltage of the first transistor T1) based on the received voltage value. The extracted characteristic information may be used to convert image data so that deviations in the characteristics of the sub-pixel SPX and the pixel PX including the sub-pixel SPX may be compensated.

[0090] exist Figure 8 In the embodiment, the transistors Tpx (e.g., the first transistor T1, the second transistor T2, and the third transistor T3) included in the pixel circuit PXC may all be N-type transistors. However, the embodiment is not limited thereto. For example, at least one of the first transistor T1, the second transistor T2, and the third transistor T3 may also be changed (or modified) to a P-type transistor.

[0091] Apart from Figure 8 In addition to the embodiments shown in , the pixel circuit PXC may also be formed in various types, structures and / or driving methods. For example, the pixel circuit PXC may not include the third transistor T3. For example, the pixel circuit PXC may also include other circuit elements (such as a compensation transistor for compensating the threshold voltage of the first transistor T1, an initialization transistor for initializing the voltage of the first node N1 and / or the first electrode ET1 of the light emitting element EL, an emission control transistor for controlling the period during which the drive current is supplied to the light emitting element EL, and / or a boost capacitor for boosting the voltage of the first node N1). In an embodiment, in the case where the sub-pixel SPX is a passive sub-pixel, the pixel circuit PXC may be omitted.

[0092] The light emitting element EL may include a first electrode ET1 connected to the first power line PL1 and a second electrode ET2 connected to the second power line PL2 via the pixel circuit PXC. The light emitting element EL may further include a light emitting layer (eg, an organic light emitting layer) disposed between the first electrode ET1 and the second electrode ET2.

[0093] The first power supply voltage VDD and the second power supply voltage VSS respectively supplied to the first power line PL1 and the second power line PL2 may have different potentials so that the light emitting element EL can emit light. For example, the first power supply voltage VDD may be a high potential pixel power supply voltage, and the second power supply voltage VSS may be a low potential pixel power supply voltage. For example, the first electrode ET1 of the light emitting element EL may be an anode, and the second electrode ET2 of the light emitting element EL may be a cathode.

[0094] When a driving current is supplied from the pixel circuit PXC, the light emitting element EL may generate light having brightness corresponding to the driving current. Therefore, each sub-pixel SPX may emit light having brightness corresponding to a data signal supplied to the first node N1 during each frame period.

[0095] Fig. 9 is a schematic plan view of a display device 100 according to an embodiment. Fig.10 is a schematic plan view of a display device 100 according to an embodiment. For example, Fig. 9 and Fig.10 Different embodiments are shown in relation to the display area DA.

[0096] Apart from Figures 1 to 8 In addition, refer to Fig. 9 and Fig.10 , the display area DA may include a first display area DA1 including a first pixel PX1 and at least one second display area DA2 including a second pixel PX2. The first display area DA1 may be located at a central portion of the display area DA in at least the first direction DR1. The second display area DA2 may be located at an edge portion of the display area DA in at least the first direction DR1. For example, the second display area DA2 may be located outside the first display area DA1. In an embodiment, the display area DA may display an image IMG including a logo image IMG2 and / or a banner image IMG3 corresponding to the image data, and the second display area DA2 may include an area (e.g., an upper edge portion and / or a lower edge portion of the display area DA) where the logo image IMG2 and / or the banner image IMG3 are displayed.

[0097] In an embodiment, Fig. 9 As shown in , the first display area DA1 may be located at a central portion of the display area DA in the first direction DR1 and the second direction DR2. The second display area DA2 may be located at an edge portion of the display area DA in the first direction DR1 and the second direction DR2. For example, the second display area DA2 may be located at both sides (e.g., opposite sides) of the first display area DA1 in the first direction DR1 and the second direction DR2, and may surround the first display area DA1.

[0098] In an embodiment, Fig.10 As shown in , the first display area DA1 may be located at a central portion of the display area DA in the first direction DR1, and the second display area DA2 may be located at least one side of the first display area DA1 in the first direction DR1. For example, the second display area DA2 may be located on both sides (e.g., opposite sides) of the first display area DA1 in the first direction DR1.

[0099] For example, the first direction DR1 may correspond to the vertical direction of the display area DA, and the display area DA may include a second display area DA2 located at at least one of an upper edge portion and a lower edge portion of the display area DA. For example, the display area DA may include two second display areas DA2 that are separated from each other and the first display area DA1 is between the two second display areas DA2 and located at the upper edge portion and the lower edge portion of the display area DA, respectively.

[0100] The display device 100 may include a first pixel PX1 located in a first display area DA1 and a second pixel PX2 located in a second display area DA2. The first pixel PX1 and the second pixel PX2 may include emission areas EA having different areas (or different sizes). For example, each of the second pixels PX2 located in the second display area DA2 may include an emission area EA having a relatively larger area (or larger size) than the area (or size) of the emission area EA of each of the first pixels PX1 located in the first display area DA1.

[0101] Fig.11 is a schematic plan view showing a first pixel PX1 and a second pixel PX2 according to an embodiment. Fig.11 , the first pixel PX1 and the second pixel PX2 are shown to be disposed side by side for contrast between the first pixel PX1 and the second pixel PX2.

[0102] Apart from Figures 1 to 10 In addition, refer to Fig.11 , the pixel PX including the first pixel PX1 and the second pixel PX2 may each include at least two sub-pixels SPX including the sub-emission area SEA. For example, each of the pixels PX including the first pixel PX1 and the second pixel PX2 may include an emission area EA including the sub-emission area SEA of the pixel PX. For example, the first pixel PX1 may include a first emission area EA1 (e.g., the emission area EA of the first pixel PX1) including the sub-emission area SEA of the first pixel PX1, and the second pixel PX2 may include a second emission area EA2 (e.g., the emission area EA of the second pixel PX2) including the sub-emission area SEA of the second pixel PX2.

[0103] In an embodiment, the first pixel PX1 may include a first color sub-pixel SPX11 that emits light of a first color, a second color sub-pixel SPX12 that emits light of a second color, and a third color sub-pixel SPX13 that emits light of a third color. The first color sub-pixel SPX11 of the first pixel PX1 may include a first color first sub-emission area SEA11 having a light-emitting element and emitting light of the first color (e.g., an emission area of ​​the first color sub-pixel SPX11 included in the first pixel PX1). The second color sub-pixel SPX12 of the first pixel PX1 may include a second color first sub-emission area SEA12 having a light-emitting element and emitting light of the second color (e.g., an emission area of ​​the second color sub-pixel SPX12 included in the first pixel PX1). The third color sub-pixel SPX13 of the first pixel PX1 may include a third color first sub-emission area SEA13 having a light-emitting element and emitting light of a third color (e.g., an emission area of ​​the third color sub-pixel SPX13 included in the first pixel PX1). The first emission region EA1 of the first pixel PX1 may include a first color first sub emission region SEA11, a second color first sub emission region SEA12, and a third color first sub emission region SEA13.

[0104] In an embodiment, the second pixel PX2 may include the same type, the same configuration, and / or the same number of subpixels SPX as the subpixels SPX of the first pixel PX1. For example, the first pixel PX1 and the second pixel PX2 may include the same type and the same number of subpixels SPX.

[0105] In an embodiment, the second pixel PX2 may include a first color sub-pixel SPX21 that emits light of a first color, a second color sub-pixel SPX22 that emits light of a second color, and a third color sub-pixel SPX23 that emits light of a third color. The first color sub-pixel SPX21 of the second pixel PX2 may include a first color second sub-emission area SEA21 having a light-emitting element and emitting light of the first color (e.g., an emission area of ​​the first color sub-pixel SPX21 included in the second pixel PX2). The second color sub-pixel SPX22 of the second pixel PX2 may include a second color second sub-emission area SEA22 having a light-emitting element and emitting light of the second color (e.g., an emission area of ​​the second color sub-pixel SPX22 included in the second pixel PX2). The third color sub-pixel SPX23 of the second pixel PX2 may include a third color second sub-emission area SEA23 having a light-emitting element and emitting light of a third color (e.g., an emission area of ​​the third color sub-pixel SPX23 included in the second pixel PX2). The second emission area EA2 of the second pixel PX2 may include a first color second sub emission area SEA21, a second color second sub emission area SEA22, and a third color second sub emission area SEA23.

[0106] The second emission area EA2 may have an area (or a larger size) than the area (or size) of the first emission area EA1. For example, the sum of the areas (or sizes) of the sub-emission areas SEA included in the sub-pixels SPX of the second pixel PX2 may be greater than the sum of the areas (or sizes) of the sub-emission areas SEA included in the sub-pixels SPX of the first pixel PX1. For example, the sum of the areas (or sizes) of the first color second sub-emission area SEA21, the second color second sub-emission area SEA22, and the third color second sub-emission area SEA23 respectively included in the first color sub-pixel SPX21, the second color sub-pixel SPX22, and the third color sub-pixel SPX23 of the second pixel PX2 may be greater than the sum of the areas (or sizes) of the first color first sub-emission area SEA11, the second color first sub-emission area SEA12, and the third color first sub-emission area SEA13 respectively included in the first color sub-pixel SPX11, the second color sub-pixel SPX12, and the third color sub-pixel SPX13 of the first pixel PX1.

[0107] In an embodiment, at least some of the sub-emission areas SEA included in the first pixel PX1 and the second pixel PX2 and corresponding to each other may have different areas (or different sizes). For example, at least one sub-emission area SEA included in the second pixel PX2 may have a width greater than that of the corresponding sub-emission area SEA of the first pixel PX1 in at least one of the first direction DR1 and the second direction DR2. For example, the first color first sub-emission area SEA11 of the first pixel PX1 may have a first width W11 in the first direction DR1 and a second width W12 in the second direction DR2, and the first color second sub-emission area SEA21 of the second pixel PX2 may have a third width W21 in the first direction DR1 and a fourth width W22 in the second direction DR2. For example, the third width W21 may be greater than the first width W11, and / or the fourth width W22 may be greater than the second width W12. Therefore, the area of ​​the first color second sub-emission region SEA21 (also referred to as "second area" or "second size") may be greater than the area of ​​the first color first sub-emission region SEA11 (also referred to as "first area" or "first size").

[0108] In an embodiment, the second color second sub emission region SEA22 may have a width greater than that of the second color first sub emission region SEA12 in at least one of the first direction DR1 and the second direction DR2. Therefore, the area (or size) of the second color second sub emission region SEA22 may be greater than the area (or size) of the second color first sub emission region SEA12.

[0109] In an embodiment, the third color second sub emission area SEA23 may have a width greater than that of the third color first sub emission area SEA13 in at least one of the first direction DR1 and the second direction DR2. Therefore, the area (or size) of the third color second sub emission area SEA23 may be greater than the area (or size) of the third color first sub emission area SEA13. For example, each sub emission area SEA included in the second pixel PX2 may have an area (or size) greater than that of the sub emission area SEA of the first pixel PX1 corresponding to the sub emission area SEA of the second pixel PX2.

[0110] Fig.12 is a schematic cross-sectional view of a display device 100 according to an embodiment. For example, Fig.12 A cross section of a portion of the display area DA corresponding to a region where two sub-pixels SPX respectively located in the first display area DA1 and the second display area DA2 are provided is schematically shown. Fig.12 A transistor Tpx (eg, Figure 8 The cross-section of the sub-pixel SPX may be variously changed (or modified) according to the type and / or structure of each sub-pixel SPX and the display device 100 including the sub-pixel SPX.

[0111] Apart from Figures 1 to 11 In addition, refer to Fig.12 , the display device 100 may include a substrate 110 and a circuit layer 120, a light emitting element layer 130, and an encapsulation layer 140 disposed on the substrate 110. In an embodiment, the circuit layer 120, the light emitting element layer 130, and the encapsulation layer 140 may be sequentially disposed or stacked on the substrate 110 along the third direction DR3.

[0112] The substrate 110 may be made of a bendable, foldable, or rollable flexible material. The substrate 110 may be made of an insulating material such as a polymer resin. For example, the substrate 110 may be made of polyimide (PI).

[0113] The circuit layer 120 may include a pixel circuit PXC of a sub-pixel SPX (e.g., a circuit element of the pixel circuit PXC of each sub-pixel SPX) and wiring (e.g., a scan line SL, a data line DL, a sensing control line SSL, a sensing line SENL, a first power line PL1, and / or a second power line PL2) connected to the sub-pixel SPX. For example, the circuit layer 120 may include a transistor Tpx and a capacitor Cst disposed in each sub-pixel SPX. The transistor Tpx may be electrically connected to the light emitting element EL of the corresponding sub-pixel SPX. Each transistor Tpx may include an active layer ACT, a gate electrode GE, a source electrode SE, and a drain electrode DE.

[0114] The circuit layer 120 may include a conductive layer for forming circuit elements and wirings, at least one semiconductor layer SCL, and an insulating layer disposed between the conductive layer and the semiconductor layer SCL. For example, the circuit layer 120 may include a buffer layer 121, a semiconductor layer SCL (or a first semiconductor layer), a first insulating layer 122 (e.g., a first gate insulating layer), a first conductive layer CDL1 (e.g., a first gate conductive layer), a second insulating layer 123 (e.g., a second gate insulating layer), a second conductive layer CDL2 (e.g., a second gate conductive layer), a third insulating layer 124 (e.g., an interlayer insulating layer or a first interlayer insulating layer), a third conductive layer CDL3 (e.g., a first source-drain conductive layer), a fourth insulating layer 125 (e.g., a first via layer or a first planarization layer), a fourth conductive layer CDL4 (e.g., a second source-drain conductive layer), a fifth insulating layer 126 (e.g., a second via layer or a second planarization layer), a fifth conductive layer CDL5 (e.g., a third source-drain conductive layer) and a sixth insulating layer 127 (e.g., a third via layer or a third planarization layer).

[0115] The buffer layer 121 may include at least one inorganic layer including an inorganic insulating material, such as silicon nitride, silicon oxide, silicon oxynitride, titanium oxide, aluminum oxide, or other inorganic insulating materials. However, the embodiment is not limited thereto, and the material of the buffer layer 121 may be changed or modified.

[0116] In an embodiment, an additional conductive layer may be disposed between the substrate 110 and the buffer layer 121. For example, a conductive layer including a light blocking layer or a back gate electrode overlapped with the active layer ACT of at least one transistor Tpx and / or including at least one wiring (or a portion of at least one wiring) may be disposed between the substrate 110 and the buffer layer 121.

[0117] The semiconductor layer SCL may be disposed on the surface of the substrate 110 provided with the buffer layer 121. The semiconductor layer SCL may include an active layer ACT of each transistor Tpx. Each active layer ACT may include polycrystalline silicon, single crystal silicon, low temperature polycrystalline silicon, amorphous silicon or oxide semiconductor material. Each active layer ACT may include a channel region, a source region and a drain region.

[0118] The first insulating layer 122 may cover the semiconductor layer SCL. In an embodiment, the first insulating layer 122 may include at least one inorganic layer including an inorganic insulating material.

[0119] The first conductive layer CDL1 may be disposed on the first insulating layer 122. The first conductive layer CDL1 may include a gate electrode GE of each transistor Tpx. Each gate electrode GE may include a conductive material (e.g., at least one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), and other metals, alloys thereof, and other conductive materials), and may be a single-layer electrode or a multi-layer electrode.

[0120] The first conductive layer CDL1 may further include at least one wiring (or a portion of at least one wiring), a bridge pattern layer and / or a capacitor electrode. For example, the first conductive layer CDL1 may further include a first capacitor electrode CE1 for each capacitor Cst. In an embodiment, the first capacitor electrode CE1 may be integrated with the gate electrode GE of the transistor (e.g., pixel transistor) Tpx connected to the first capacitor electrode CE1. For example, the first capacitor electrode CE1 may be integrated with the gate electrode GE of the transistor (e.g., pixel transistor) Tpx whose gate electrode is connected to the capacitor Cst. See, for example Figure 8 The first transistor T1.

[0121] The second insulating layer 123 may cover the first conductive layer CDL1. In an embodiment, the second insulating layer 123 may include at least one inorganic layer including an inorganic insulating material.

[0122] The second conductive layer CDL2 may be disposed on the second insulating layer 123. The second conductive layer CDL2 may include at least one wiring (or a portion of at least one wiring), a bridge pattern layer and / or a capacitor electrode. For example, the second conductive layer CDL2 may include a second capacitor electrode CE2 for each capacitor Cst.

[0123] In an embodiment, each pixel PX further includes Fig.12 In the case where the transistor Tpx shown in FIG. 1 is different from at least one transistor and / or in the case where the at least one transistor and Fig.12 In the case where the transistors Tpx shown in FIG. 1 are formed in different layers, the second conductive layer CDL2 may further include a bottom gate electrode or a bottom metal layer of at least one transistor.

[0124] The third insulating layer 124 may cover the second conductive layer CDL2. In an embodiment, the third insulating layer 124 may include at least one inorganic layer including an inorganic insulating material.

[0125] The third conductive layer CDL3 may be formed on the third insulating layer 124. The third conductive layer CDL3 may include a source electrode SE and a drain electrode DE of each transistor Tpx. Each of the source electrode SE and the drain electrode DE may include a conductive material and may be a single-layer electrode or a multi-layer electrode. In an embodiment, the source electrode SE and the drain electrode DE of each transistor Tpx may be formed as a source region and a drain region of the active layer ACT, and the third conductive layer CDL3 may include a bridge pattern layer connected to the source electrode SE or the drain electrode DE of at least one transistor Tpx. In an embodiment, the third conductive layer CDL3 may also include at least one wiring (or a portion of at least one wiring), a bridge pattern layer and / or a capacitor electrode. For example, the third conductive layer CDL3 may also include a first power line PL1 (or a portion of the first power line PL1) and / or a second power line PL2 (or a portion of the second power line PL2).

[0126] The fourth insulating layer 125 may cover the third conductive layer CDL3. In embodiments, the fourth insulating layer 125 may include at least one organic layer including an organic insulating material (eg, acrylic resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, or other organic insulating material) to planarize the circuit layer 120.

[0127] The fourth conductive layer CDL4 may be formed on the fourth insulating layer 125. The fourth conductive layer CDL4 may include a first bridging electrode BR1 (or a first connecting electrode) that connects the transistor Tpx to the light emitting element EL, respectively. The first bridging electrode BR1 may be respectively disposed on the transistor Tpx, and may electrically connect the transistor Tpx to the light emitting element EL of the corresponding pixel PX. Each of the first bridging electrodes BR1 may include a conductive material, and may be a single-layer electrode or a multi-layer electrode. In an embodiment, the fourth conductive layer CDL4 may further include at least one wiring (or a portion of at least one wiring), a bridging pattern and / or a capacitor electrode. For example, the fourth conductive layer CDL4 may further include a first power line PL1 (or a portion of the first power line PL1) and / or a second power line PL2 (or a portion of the second power line PL2).

[0128] The fifth insulating layer 126 may cover the fourth conductive layer CDL4. In embodiments, the fifth insulating layer 126 may include at least one organic layer including an organic insulating material (eg, acrylic resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, or other organic insulating material) to planarize the circuit layer 120.

[0129] The fifth conductive layer CDL5 may be formed on the fifth insulating layer 126. The fifth conductive layer CDL5 may include a second bridging electrode BR2 (or a second connecting electrode) that connects the transistor Tpx (or the first bridging electrode BR1) to the light emitting element EL, respectively. For example, the second bridging electrode BR2 may be respectively disposed on the first bridging electrode BR1, and the first bridging electrode BR1 may be electrically connected to the light emitting element EL of the corresponding pixel PX. Each of the second bridging electrodes BR2 may include a conductive material, and may be a single-layer electrode or a multi-layer electrode. In an embodiment, the fifth conductive layer CDL5 may further include at least one wiring (or a portion of at least one wiring) and / or a bridging pattern layer. For example, the fifth conductive layer CDL5 may include a portion of the first power line PL1 and / or the second power line PL2.

[0130] The sixth insulating layer 127 may cover the fifth conductive layer CDL5 . In embodiments, the sixth insulating layer 127 may include at least one organic layer including an organic insulating material (eg, the organic insulating material exemplified as the material of the fourth insulating layer 125 or other organic insulating materials) to planarize the circuit layer 120 .

[0131] The light emitting element layer 130 may include a pixel defining layer 131 separating the sub-emission areas SEA and light emitting elements EL respectively located in the sub-emission areas SEA. For example, the light emitting element layer 130 may include a first light emitting element EL1 disposed in a sub-emission area SEA of a sub-pixel SPX located in the first display area DA1 (e.g., any sub-emission area SEA of the first pixel PX1) and a second light emitting element EL2 disposed in a sub-emission area SEA of a sub-pixel SPX located in the second display area DA2 (e.g., any sub-emission area SEA of the second pixel PX2).

[0132] Each light emitting element EL may include a first electrode ET1 (e.g., an anode) connected to the transistor Tpx through a first bridge electrode BR1 and / or a second bridge electrode BR2, and a light emitting layer EML (e.g., an organic light emitting layer) and a second electrode ET2 (e.g., a cathode) sequentially disposed on the first electrode ET1. In an embodiment, each light emitting element EL may further include a first intermediate layer (e.g., a hole layer including a hole transport layer) disposed between the first electrode ET1 and the light emitting layer EML, and a second intermediate layer (e.g., an electron layer including an electron transport layer) disposed between the light emitting layer EML and the second electrode ET2.

[0133] The first electrode ET1 of each light emitting element EL may include a conductive material and may be disposed on the circuit layer 120. For example, the first electrode ET1 may be disposed on the sixth insulating layer 127 in each sub-emission area SEA. In an embodiment, the first electrode ET1 may include a metal material having a high reflectivity. For example, the first electrode ET1 may have a single-layer structure of molybdenum (Mo), titanium (Ti), copper (Cu), or aluminum (Al), or may have a structure including indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In 2 O 3 ), silver (Ag), magnesium (Mg), magnesium fluoride (MgF 2 ), aluminum (Al), platinum (Pt), lead (Pb), gold (Au), or nickel (Ni) multilayer structures (e.g., ITO / Mg, ITO / MgF 2 , ITO / Ag or ITO / Ag / ITO).

[0134] The light-emitting layer EML of each light-emitting element EL may include a polymer material or a low-molecular material. The light emitted from the light-emitting layer EML may be used to display an image. In an embodiment, a light-emitting layer EML may be provided for each sub-pixel SPX, and the light-emitting layer EML of each sub-pixel SPX may emit visible light of a color corresponding to the sub-pixel SPX. In an embodiment, the light-emitting layer EML may be a common layer (or an integral layer) shared by sub-pixels SPX of different colors, and a wavelength conversion layer and / or a color filter corresponding to the color (or wavelength band) of the light to be emitted from each sub-pixel SPX may be provided in a sub-emission area SEA of at least some of the sub-pixels SPX.

[0135] The second electrode ET2 of each light emitting element EL may include a conductive material and may be connected to the second power line PL2. In an embodiment, the second electrode ET2 may be a common layer (or an integral layer) formed throughout the entire display area DA to cover the light emitting layer EML and the pixel defining layer 131. In an embodiment, the second electrode ET2 may be made of a transparent conductive material (TCO) (such as ITO or IZO) capable of transmitting light or a semi-transmissive conductive material (such as magnesium (Mg), silver (Ag), or an alloy of Mg and Ag). In the case where the second electrode ET2 is made of a semi-transmissive conductive material, the light output efficiency may be improved and enhanced by a microcavity effect.

[0136] In an embodiment, the light emitting element EL may have an area (or size) corresponding to the area (or size) of each sub-emission area SEA. For example, the light emitting element EL may include a light emitting layer EML having an area (or size) corresponding to the area (or size) of each sub-emission area SEA. For example, the first light emitting element EL1 may include a light emitting layer EML having an area (or size) corresponding to the area (or size) of the sub-emission area SEA of the sub-pixel SPX (e.g., the sub-pixel SPX of the first pixel PX1) located in the first display area DA1, and the second light emitting element EL2 may include a light emitting layer EML having an area (or size) corresponding to the area (or size) of the sub-emission area SEA of the sub-pixel SPX (e.g., the sub-pixel SPX of the second pixel PX2) located in the second display area DA2.

[0137] In an embodiment, the area (or size) of the sub-emission region SEA in which the second light emitting element EL2 is formed may be greater than the area (or size) of the sub-emission region SEA in which the first light emitting element EL1 is formed, and the second light emitting element EL2 may include a light emitting layer EML having an area (or a larger size) than the area (or size) of the light emitting layer EML of the first light emitting element EL1. For example, the first color sub-pixel SPX11 of the first pixel PX1 may include a first light emitting element EL1 (e.g., a first organic light emitting diode) including a light emitting layer EML having an area (or size) corresponding to the area (or size) of the first color first sub-emission region SEA11, and the first color sub-pixel SPX21 of the second pixel PX2 may include a second light emitting element EL2 (e.g., a second organic light emitting diode) including a light emitting layer EML having an area (or size) corresponding to the area (or size) of the first color second sub-emission region SEA21.

[0138] The pixel defining layer 131 may have openings corresponding to the sub-emission areas SEA, respectively, and may surround the emission area EA. For example, the pixel defining layer 131 may be formed to cover an edge portion of the first electrode ET1 of each light emitting element EL, and may include an opening exposing another portion of the first electrode ET1. An area where the exposed first electrode ET1 and the light emitting layer EML overlap (or an area where the exposed first electrode ET1 and the light emitting layer EML overlap) may be defined as a sub-emission area SEA of each sub-pixel SPX.

[0139] In an embodiment, the pixel defining layer 131 may include at least one organic layer including an organic insulating material. For example, the pixel defining layer 131 may include polyacrylate resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, unsaturated polyester resin, polyphenylene ether resin, polyphenylene sulfide resin, or benzocyclobutene (BCB), or may include other organic insulating materials.

[0140] The encapsulation layer 140 may be disposed on the light emitting element layer 130 in the display area DA and in the non-display area NA around the display area DA. The encapsulation layer 140 may prevent oxygen or moisture from penetrating (or permeating) into the light emitting element layer 130, and may reduce electrical or physical impact on the circuit layer 120 and the light emitting element layer 130.

[0141] In an embodiment, encapsulation layer 140 may include first, second, and third encapsulation layers 141, 142, and 143 sequentially disposed on light emitting element layer 130. First and third encapsulation layers 141 and 143 may include inorganic insulating materials, and second encapsulation layer 142 may include organic insulating materials.

[0142] according to Figures 9 to 12 In an embodiment of the present invention, the second pixel PX2 may include at least one sub-emission area SEA having an area (or a large size) larger than that of the first pixel PX1. Therefore, the second emission area EA2 of the second pixel PX2 may have an area (or a large size) larger than that of the first emission area EA1 of the first pixel PX1.

[0143] In the case where the area (or size) of the sub-emission area SEA increases, the area (or size) of the light emitting element EL disposed in the sub-emission area SEA (for example, the area (or size) of the light emitting layer EML having an area (or size) corresponding to the area (or size) of each sub-emission area SEA) may increase. Therefore, although the pixel circuit PXC supplies a uniform driving current to the light emitting element EL in response to each data signal, the density of the current flowing through the light emitting element EL and the light emitting layer EML included in the light emitting element EL may decrease.

[0144] Although the light emitting elements EL emit light at the same time and with the same brightness, the amount of degradation of the light emitting elements EL may be different depending on the density of the current flowing through the light emitting layer EML of each of the light emitting elements EL. For example, when the density of the current flowing through the light emitting layer EML decreases, the amount of degradation of the corresponding light emitting element EL may decrease. Therefore, the degradation of the light emitting element EL and the second pixel PX2 including the light emitting element EL can be reduced or minimized by reducing the density of the current flowing through each light emitting element EL of the second pixel PX2.

[0145] According to the above-described embodiment, afterimages caused by degradation of the light emitting element EL and the pixel PX (e.g., the second pixel PX2) including the light emitting element EL can be prevented or minimized, and the image quality and life of the display device 100 can be improved or enhanced. For example, in the display device 100 according to the above-described embodiment, degradation of the light emitting element EL and the pixel PX can be reduced or minimized in advance. Therefore, the image quality of the display device 100 can be improved or enhanced without negative effects (e.g., conflicts between drivers or image quality problems caused by the operation of the degradation compensation program) occurring in the display device, in which the reduction in image quality caused by degradation of the light emitting element EL and the pixel PX is compensated by the driving circuit.

[0146] Fig.13 is a schematic plan view showing a first pixel PX1 and a second pixel PX2 according to an embodiment. Fig.13 The same diagram is shown for the first pixel PX1 and the second pixel PX2. Fig.11 Embodiments of different embodiments.

[0147] Apart from Figures 1 to 12 In addition, refer to Fig.13 , the first pixel PX1 and the second pixel PX2 may include different numbers of sub-pixels SPX. For example, by further including at least one auxiliary sub-pixel (e.g., a fourth color sub-pixel SPX24) that increases light emission brightness, the second pixel PX2 may include a greater number of sub-pixels SPX than the first pixel PX1.

[0148] In an embodiment, the first pixel PX1 may include a first color sub-pixel SPX11, a second color sub-pixel SPX12, and a third color sub-pixel SPX13, the first color sub-pixel SPX11 including a first color first sub-emission area SEA11 and emitting light of the first color, the second color sub-pixel SPX12 including a second color first sub-emission area SEA12 and emitting light of the second color, the third color sub-pixel SPX13 including a third color first sub-emission area SEA13 and emitting light of the third color. The second pixel PX2 may include a first color sub-pixel SPX21, a second color sub-pixel SPX22, and a third color sub-pixel SPX23, the first color sub-pixel SPX21 including a first color second sub-emission area SEA21 and emitting light of the first color, the second color sub-pixel SPX22 including a second color second sub-emission area SEA22 and emitting light of the second color, the third color sub-pixel SPX23 including a third color second sub-emission area SEA23 and emitting light of the third color, and the second pixel PX2 may also include at least one sub-pixel SPX. For example, the second pixel PX2 may further include a fourth color sub-pixel SPX24 including a fourth color second sub-emission area SEA24 and emitting light of the fourth color. In another example, the second pixel PX2 may further include one or more sub-pixels SPX emitting light of the first color, the second color, or the third color. For example, the second pixel PX2 may include at least two first color sub-pixels SPX21, at least two second color sub-pixels SPX22, and / or at least two third color sub-pixels SPX23.

[0149] In an embodiment, each sub-emission area SEA included in the first pixel PX1 may have the same area (or size) as the area (or size) of the corresponding sub-emission area SEA of the second pixel PX2. For example, the first color first sub-emission area SEA11 and the first color second sub-emission area SEA21 may have the same area (or size) as each other. For example, the second color first sub-emission area SEA12 and the second color second sub-emission area SEA22 may have the same area (or size) as each other, and the third color first sub-emission area SEA13 and the third color second sub-emission area SEA23 may have the same area (or size) as each other.

[0150] The second pixel PX2 further including at least one sub-pixel SPX (e.g., the fourth color sub-pixel SPX24) may include an emission region EA having a larger area (or larger size) than the area (or size) of the emission region EA of the first pixel PX1. For example, the area (or size) of the second emission region EA2 may be larger than the area (or size) of the first emission region EA1.

[0151] According to the above-described embodiment, the second pixel PX2 may include an additional sub-pixel SPX. Thus, the driving current flowing through each sub-pixel SPX of the second pixel PX2 may be reduced. For example, the brightness of the second pixel PX2 may be supplemented or increased by the light emission of the fourth color sub-pixel SPX24. Therefore, the light emission brightness of each of the sub-pixels SPX formed in the second pixel PX2 may be reduced. Therefore, according to the above-described embodiment, the degradation of the light-emitting element EL and the second pixel PX2 may be reduced or minimized by reducing the current (or the density of the current) flowing through the light-emitting element EL formed in each sub-pixel SPX of the second pixel PX2.

[0152] Fig.14 is a schematic plan view of a display device 100 according to an embodiment. Fig.15 is a schematic plan view of a display device 100 according to an embodiment. For example, Fig.14 and Fig.15 Shows Fig. 9 and Fig.10 Modifications of the embodiments.

[0153] Apart from Figures 1 to 13 In addition, refer to Fig.14 and Fig.15 , the display area DA may further include at least one third display area DA3 located between the first display area DA1 and the second display area DA2. For example, the third display area DA3 may be located between the first display area DA1 and the second display area DA2 in at least the first direction DR1.

[0154] In an embodiment, Fig.14 As shown in , the first display area DA1 may be located at the central portion of the display area DA, and the third display area DA3 may be located outside the first display area DA1 to surround the first display area DA1. The second display area DA2 may be located at the edge portion of the display area DA, and may surround the third display area DA3.

[0155] In an embodiment, Fig.15As shown in , the first display area DA1 may be located at a central portion of the display area DA in the first direction DR1, and the third display area DA3 may be located at least one side of the first display area DA1 in the first direction DR1. For example, the third display area DA3 may be located on both sides (e.g., opposite sides) of the first display area DA1 in the first direction DR1. For example, the display area DA may include two third display areas DA3 and two second display areas DA2, the two third display areas DA3 being separated from each other with the first display area DA1 interposed therebetween, the two second display areas DA2 being separated from each other with the first display area DA1 and the third display area DA3 interposed therebetween and being located at the upper edge portion and the lower edge portion of the display area DA.

[0156] The display device 100 may include a first pixel PX1 located in a first display area DA1, a second pixel PX2 located in a second display area DA2, and a third pixel PX3 located in a third display area DA3. The first pixel PX1, the second pixel PX2, and the third pixel PX3 may include emission areas EA having different areas (or different sizes). For example, each third pixel PX3 located in the third display area DA3 may include an emission area EA having an area (or a large size) larger than the area (or size) of the first emission area EA1 of each first pixel PX1 and having an area (or a small size) smaller than the area (or size) of the second emission area EA2 of each second pixel PX2.

[0157] In an embodiment, as described above, the display area DA may be divided into four or more regions in a direction from the center portion to the edge portion of the display area DA. For example, the area (or size) of the pixel PX located in each region may be gradually and / or stagedly changed (e.g., expanded) more finely from the region located at the center portion of the display area DA toward the region located at the edge portion of the display area DA.

[0158] Fig.16 is a schematic plan view showing a first pixel PX1, a second pixel PX2, and a third pixel PX3 according to an embodiment. Fig.16 , for contrast between the first pixel PX1 , the second pixel PX2 , and the third pixel PX3 , the first pixel PX1 , the second pixel PX2 , and the third pixel PX3 are shown to be disposed side by side.

[0159] Fig.17 is a schematic cross-sectional view of a display device 100 according to an embodiment. For example, Fig.17A cross section of a portion of the display area DA corresponding to an area where three sub-pixels SPX respectively located in the first display area DA1 , the second display area DA2 , and the third display area DA3 are disposed is schematically shown.

[0160] In the description Fig.16 and Fig.17 When the embodiment of Fig.11 and Fig.12 Similar or identical elements of the embodiments will be denoted by the same reference numerals, and a detailed description thereof will be omitted for convenience of description.

[0161] Apart from Figures 1 to 15 In addition, refer to Fig.16 , the third pixel PX3 may include a third emission area EA3 including the sub emission area SEA of the third pixel PX3 (eg, the emission area EA of the third pixel PX3 ).

[0162] In an embodiment, the third pixel PX3 may include a first color sub-pixel SPX31 that emits light of a first color, a second color sub-pixel SPX32 that emits light of a second color, and a third color sub-pixel SPX33 that emits light of a third color. The first color sub-pixel SPX31 of the third pixel PX3 may include a first color third sub-emission area SEA31 having a light emitting element EL and emitting light of the first color (e.g., an emission area of ​​the first color sub-pixel SPX31 included in the third pixel PX3). The second color sub-pixel SPX32 of the third pixel PX3 may include a second color third sub-emission area SEA32 having a light emitting element EL and emitting light of the second color (e.g., an emission area of ​​the second color sub-pixel SPX32 included in the third pixel PX3). The third color sub-pixel SPX33 of the third pixel PX3 may include a third color third sub-emission area SEA33 having a light emitting element EL and emitting light of the third color (e.g., an emission area of ​​the third color sub-pixel SPX33 included in the third pixel PX3). The third emission area EA3 of the third pixel PX3 may include a first color third sub emission area SEA31, a second color third sub emission area SEA32, and a third color third sub emission area SEA33.

[0163] The third emission area EA3 may have an area (or a large size) larger than the area (or size) of the first emission area EA1 and an area (or a small size) smaller than the area (or size) of the second emission area EA2. For example, the sum of the areas (or sizes) of the sub-emission areas SEA included in the sub-pixels SPX of the third pixel PX3 may be larger than the sum of the areas (or sizes) of the sub-emission areas SEA included in the sub-pixels SPX of the first pixel PX1, and may be smaller than the sum of the areas (or sizes) of the sub-emission areas SEA included in the sub-pixels SPX of the second pixel PX2. For example, the sum of the areas (or sizes) of the first color third sub-emission region SEA31, the second color third sub-emission region SEA32 and the third color third sub-emission region SEA33 may be greater than the sum of the areas (or sizes) of the first color first sub-emission region SEA11, the second color first sub-emission region SEA12 and the third color first sub-emission region SEA13 and less than the sum of the areas (or sizes) of the first color second sub-emission region SEA21, the second color second sub-emission region SEA22 and the third color second sub-emission region SEA23.

[0164] In an embodiment, the first pixel PX1, the second pixel PX2, and the third pixel PX3 may include the same number of sub-emission areas SEA. For example, at least some of the sub-emission areas SEA included in the first pixel PX1, the second pixel PX2, and the third pixel PX3 and corresponding to each other may have different areas (or different sizes). For example, at least one sub-emission area SEA included in the third pixel PX3 may have a width greater than that of the corresponding sub-emission area SEA of the first pixel PX1 in at least one direction of the first direction DR1 and the second direction DR2. For example, at least one sub-emission area SEA included in the third pixel PX3 may have a width less than that of the corresponding sub-emission area SEA of the second pixel PX2 in at least one direction of the first direction DR1 and the second direction DR2. For example, in the case where the first color third sub emission region SEA31 of the third pixel PX3 has the fifth width W31 in the first direction DR1 and the sixth width W32 in the second direction DR2, the fifth width W31 may be greater than the first width W11 and less than the third width W21, and / or the sixth width W32 may be greater than the second width W12 and less than the fourth width W22. Therefore, the area (or size) of the first color third sub emission region SEA31 may be greater than the area (or size) of the first color first sub emission region SEA11 and less than the area (or size) of the first color second sub emission region SEA21.

[0165] In an embodiment, the second color third sub emission region SEA32 may have a width greater than that of the second color first sub emission region SEA12 in at least one of the first direction DR1 and the second direction DR2, and may have a width less than that of the second color second sub emission region SEA22. Therefore, the area (or size) of the second color third sub emission region SEA32 may be greater than the area (or size) of the second color first sub emission region SEA12 and less than the area (or size) of the second color second sub emission region SEA22.

[0166] In an embodiment, the third color third sub emission region SEA33 may have a width greater than that of the third color first sub emission region SEA13 in at least one of the first direction DR1 and the second direction DR2, and may have a width less than that of the third color second sub emission region SEA23. Therefore, the area (or size) of the third color third sub emission region SEA33 may be greater than the area (or size) of the third color first sub emission region SEA13 and less than the area (or size) of the third color second sub emission region SEA23.

[0167] Apart from Figures 1 to 16 In addition, refer to Fig.17 , the light emitting element layer 130 may further include a third light emitting element EL3 disposed in a sub-emission area SEA of a sub-pixel SPX located in the third display area DA3 (e.g., any sub-emission area SEA of the third pixel PX3). In an embodiment, the third light emitting element EL3 may include a light emitting layer EML having an area (or size) corresponding to the area (or size) of the sub-emission area SEA of the sub-pixel SPX located in the third display area DA3 (e.g., the sub-pixel SPX of the third pixel PX3). For example, the third light emitting element EL3 may include a light emitting layer EML having an area (or a large size) larger than the area (or size) of the light emitting layer EML of the first light emitting element EL1 and an area (or a small size) smaller than the area (or size) of the light emitting layer EML of the second light emitting element EL2. For example, the first color subpixel SPX31 of the third pixel PX3 may include a third light emitting element EL3 (e.g., a third organic light emitting diode), which includes a light emitting layer EML having an area (or size) corresponding to the area (or size) of the first color third sub-emission area SEA31.

[0168] according to Figures 14 to 17In an embodiment, the area (or size) of the first emission area EA1 in the first display area DA1, the area (or size) of the third emission area EA3 in the third display area DA3, and the area (or size) of the second emission area EA2 in the second display area DA2, which are sequentially arranged in a direction from the central portion of the display area DA to the edge portion of the display area DA, can be gradually and / or stagedly changed (e.g., expanded). Therefore, the degradation of the second pixel PX2 and the third pixel PX3 located at the edge portion of the display area DA and / or around the display area DA can be reduced or minimized, and the boundary between the first display area DA1, the third display area DA3, and the second display area DA2 can be prevented from being viewed or recognized. In an embodiment, the display area DA can be divided into a greater number of areas in the same manner as described above, and the emission area of ​​the pixel PX located in each area can be more finely and gradually expanded from the area located at the central portion of the display area DA toward the area located at the edge portion of the display area DA.

[0169] Fig.18 is a schematic plan view showing a first pixel PX1, a second pixel PX2, and a third pixel PX3 according to an embodiment. Fig.18 It can be shown that the second pixel PX2 is related to Fig.16 Embodiments of different embodiments.

[0170] Apart from Figures 1 to 17 In addition, refer to Fig.18 , the second pixel PX2 may include a different number of sub-pixels SPX than the first pixel PX1 and the third pixel PX3. For example, the second pixel PX2 may include a greater number of sub-pixels SPX than the first pixel PX1 and the third pixel PX3. Therefore, the second emission area EA2 of the second pixel PX2 may have a larger area (or a larger size) than the first emission area EA1 of the first pixel PX1 and the third emission area EA3 of the third pixel PX3.

[0171] As in the above-mentioned embodiment, by changing the number of sub-pixels SPX formed in each pixel PX and / or the area (or size) of the sub-emission area SEA of the sub-pixel SPX, the area (or size) of the emission area EA of the pixel PX formed in the first display area DA1, the second display area DA2 and / or the third display area DA3 can be adjusted to be different. For example, in the second display area DA2 located at the edge portion of the display area DA and having a relatively large cumulative light emission amount of the pixel PX, the area (or size) of the sub-emission area SEA of each sub-pixel SPX can be enlarged, or the number of sub-pixels SPX can be increased. Therefore, the density of the driving current of the light emitting element EL flowing through each sub-pixel SPX located in at least the second display area DA2 can be reduced, and the degradation of the light emitting element EL and the pixel PX (or sub-pixel PX) including the light emitting element EL can be reduced or minimized.

[0172] Fig.19 is a graph showing the luminance maintenance rate of the light emitting element EL with respect to the light emission time and the light emission luminance.

[0173] Apart from Figures 1 to 18 In addition, refer to Fig.19 , as the cumulative light emission amount of the light emitting element EL increases, the light emitting element EL may degrade. For example, the light emitting element EL may degrade as the light emission time increases. Therefore, the brightness retention rate of the light emitting element EL may gradually decrease. The degree of degradation (e.g., amount) and / or the rate of degradation of the light emitting element EL may change according to the light emission brightness of the light emitting element EL (or the density of the current flowing through the light emitting element EL according to the light emission brightness). For example, as the light emission brightness of the light emitting element EL increases, the density of the current flowing through the light emitting layer EML may increase, causing the light emitting element EL to degrade at a faster rate. For example, compared to the case where a current corresponding to a brightness of 600 nits (nit), 300 nits or 120 nits flows through the light emitting element EL, the degradation of the light emitting element EL will be faster when a current corresponding to a brightness of about 1000 nits flows through the light emitting element EL. Therefore, the brightness retention rate of the light emitting element EL may decrease rapidly relative to the light emission time of the light emitting element EL. Therefore, as in the above-described embodiment, the area (or size) of each sub-emission area SEA located in the second display area DA2 may be enlarged, or an additional sub-pixel SPX (e.g., a fourth color sub-pixel SPX24) compensating for brightness may be formed in the second pixel PX2 of the second display area DA2 to reduce the density of the driving current flowing through the light emitting element EL formed in each sub-emission area SEA of the second pixel PX2. For example, the degradation of the light emitting element EL formed in each sub-pixel SPX may be reduced or minimized.

[0174] In summarizing the detailed description, it will be appreciated by those skilled in the art that many changes and modifications may be made to the embodiments without departing substantially from the principles of the disclosure. Therefore, the disclosed embodiments are used in a general and descriptive sense only and not for a limiting purpose.

Claims

1. A display device, comprising: The display area includes a first display area and a second display area arranged around the first display area; a first pixel disposed in the first display area and comprising a first emission area; as well as a second pixel disposed in the second display area and comprising a second emission area, Wherein, the second emission area has a size larger than that of the first emission area.

2. The display device according to claim 1, wherein: The first pixel and the second pixel include the same number of sub-pixels, and A sum of sizes of the sub-emission areas of the sub-pixels of the second pixel is greater than a sum of sizes of the sub-emission areas of the sub-pixels of the first pixel.

3. The display device according to claim 1, wherein: Each of the first pixel and the second pixel includes a first color sub-pixel that emits light of a first color, The first color sub-pixel of the first pixel includes a first color first sub-emission region having a first size, and The first color subpixel of the second pixel includes a first color second sub-emission region having a second size that is larger than the first size of the first color first sub-emission region.

4. The display device according to claim 3, wherein: The first color sub-pixel of the first pixel includes an organic light emitting diode including a light emitting layer having a size corresponding to the first size of the first color first sub-emitting region, and The first color sub-pixel of the second pixel includes an organic light emitting diode including a light emitting layer having a size corresponding to the second size of the first color second sub-emitting region.

5. The display device according to claim 3, wherein: Each of the first pixel and the second pixel includes a second color sub-pixel that emits light of a second color, and The second color sub-pixel of the second pixel includes a second color second sub-emission region having a size larger than a size of the second color first sub-emission region of the second color sub-pixel of the first pixel.

6. The display device according to claim 5, wherein: Each of the first pixel and the second pixel includes a third color sub-pixel emitting light of a third color, and The third color sub-pixel of the second pixel includes a third color second sub-emission region having a size larger than a size of a third color first sub-emission region of the third color sub-pixel of the first pixel.

7. The display device according to claim 1, wherein: The first pixel and the second pixel include different numbers of sub-pixels, and The second pixel includes a greater number of sub-pixels than the first pixel.

8. The display device according to claim 1, wherein: The first pixel includes: a first color sub-pixel emitting light of a first color; a second color sub-pixel emitting light of a second color; and a third color sub-pixel emitting light of a third color, and The second pixel includes: a first color sub-pixel emitting light of the first color; a second color sub-pixel emitting light of the second color; a third color sub-pixel emitting light of the third color; and a fourth color sub-pixel emitting light of a fourth color.

9. The display device according to claim 8, wherein: The first color sub-pixel of the first pixel and the first color sub-pixel of the second pixel include sub-emission areas having the same size, The second color sub-pixel of the first pixel and the second color sub-pixel of the second pixel include sub-emission areas having the same size, and The third color sub-pixel of the first pixel and the third color sub-pixel of the second pixel include sub-emission areas having the same size.

10. The display device according to claim 8, wherein: The light of the first color, the light of the second color, the light of the third color, and the light of the fourth color are red light, green light, blue light, and white light, respectively.

11. The display device according to claim 1, wherein: The first display area is disposed at a central portion of the display area in at least a first direction, and The second display area is disposed at an edge portion of the display area in the first direction.

12. The display device according to claim 11, wherein: The second display area is disposed at the edge portion of the display area in the first direction and a second direction intersecting the first direction, and surrounds the first display area.

13. The display device according to claim 11, wherein: The first direction corresponds to the vertical direction of the display area, and The second display area is disposed at at least one of an upper edge portion and a lower edge portion of the display area.

14. The display device according to claim 1, wherein: The display area displays an image including a logo image or a banner image, and The second display area includes an area where the logo image or the banner image is displayed.

15. The display device according to claim 1, wherein: The display area further includes a third display area disposed between the first display area and the second display area, and The third display area includes third pixels.

16. The display device according to claim 15, wherein: The third pixel includes a third emission region having a size larger than that of the first emission region and having a size smaller than that of the second emission region.

Images