Display module and display device
By setting multiple additional pads on the display driver chip, the uneven etching load and press-fit or shorting problems caused by uneven distribution of Output Pad and Input Pad are solved, and the uniformity of pad etching load is improved. and product yield rate.
Patent Information
- Application Number
- CN202411389093.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-30
- Publication Date
- 2024-12-27
AI Technical Summary
The display driver chips Output Pad and Input Pad of existing silicon-based OLED products are unevenly distributed, resulting in different pad etching loads, affecting the binding impedance, and may cause pressing and dummy connection or short connection, reducing product yield.
Set multiple additional pads on the display driver chip, distributed between the output pad area and the input pad area, reduce the size of the blank area, improve the uniformity of the etching load, reduce the binding impedance, and prevent false connection or short connection .
Through the setting of additional pads, the pads are subjected to uniformity, the binding impedance is reduced, the yield and competitiveness of the display panel are improved, and the display effect is improved.
Smart Images
Figure CN119212513A_ABST
Abstract
Description
Technical Field
[0001] The present invention generally relates to the field of display technology, and in particular to a display module and a display device. Background Art
[0002] The Output Pad and Input Pad of the DDIC (display driver chip) of existing silicon-based OLED (Organic Light Emitting Diode) products are distributed on both sides of the Dummy Pad. Due to the different number of Output Pads and Input Pads, there is a significant uneven distribution on both sides. This leads to the following problems: when performing the Pad Open (pad window opening) of the Bonding Pad, the etching loading of the Output Pad and the Input Pad is different, resulting in a difference in the thickness of the film layer on the pad and uneven force, which significantly affects the Bonding impedance; in addition, when the DDIC is pressed, the bonding adhesion of the Input Pad and the Output Pad will also be different, resulting in a short circuit or virtual connection in the Output Pad area, which causes poor linearity in the AA area (display area) of the display panel and reduces the product yield. Summary of the invention
[0003] In view of the above-mentioned defects or deficiencies in the prior art, it is desired to provide a display module and a display device. By setting a plurality of additional pads on the display driver chip, the plurality of additional pads are distributed in the area between the output pad area and the first input pad area, which is beneficial to reducing the size of the blank area between the output pad area and the first input pad area, making the etching load of the output pad and the input pad uniform, and reducing the binding impedance of the display driver chip, and avoiding the problem of virtual connection or short circuit in the binding, thereby ensuring that the display panel has a good display effect, so as to improve the yield rate of the product and improve the competitiveness of the product.
[0004] In a first aspect, the present invention provides a display module, comprising: A display driver chip, the display driver chip comprising an output pad area, a first dummy pad area and a first input pad area, the output pad area and the first input pad area are respectively distributed on both sides of the first dummy pad area, the display driver chip further comprising a plurality of additional pads, the plurality of additional pads being located in an area between the output pad area and the first input pad area; The additional pad and the first dummy pad area form a second dummy pad area, and the distance between the output pad area and the first input pad area and the second dummy pad area is 1-3 times the distance between two adjacent binding pads; Alternatively, the additional pads and the first input pad area form a second input pad area, and the distances between the output pad area and the second input pad area and the first dummy pad area are 1-3 times the distance between two adjacent binding pads; The panel is bound and connected to the display driving chip through the output pad area and the first input pad area.
[0005] As an optional solution, the display module also includes a test pad, and the area where the output pad area, the first dummy pad area, the additional pad and the first input pad area are located constitute the pad area of the display driver chip, and the test pad is located in the center of the entire pad area.
[0006] As an optional solution, the panel includes an anode layer and metal routing, the anode layer includes a non-binding anode area corresponding to each additional pad, the metal routing includes a non-binding metal routing corresponding to each additional pad, and vias are provided between the non-binding anode area and the non-binding metal routing. After each additional pad is crimped to the non-binding anode area, it is electrically connected to the non-binding metal routing through the via.
[0007] As an optional solution, the plurality of additional pads are evenly distributed at least along a first direction and a second direction, and the first direction is different from the second direction.
[0008] As an optional solution, in the first direction and the second direction, the arrangement of the plurality of additional pads is the same as the arrangement of the output pads in the output pad area and the arrangement of the input pads in the first input pad area.
[0009] As an optional solution, the additional pads include a plurality of additional dummy pads, which are distributed on both sides of the first dummy pad area and are arranged at intervals along the direction toward the output pad area and the first input pad area.
[0010] As an optional scheme, multiple additional dummy pads and the first dummy pad area form a second dummy pad area, and the test pad includes a first test pad, which is located in the center of the second dummy pad area and close to the opposite side edges of the display driver chip, and the first test pad is spaced apart from the dummy pads of the second dummy pad area.
[0011] As an optional scheme, the additional pads include multiple additional input pads, which are spaced apart in a direction close to the output pad area and form a second input pad area with the first input pad area, and the spacing between the second input pad area and the first dummy pad area is equal to the spacing between the output pad area and the first dummy pad area.
[0012] As an optional solution, the number of input pads in the second input pad region is equal to the number of output pads in the output pad region.
[0013] As an optional solution, the test pad includes a second test pad, which is located in the first dummy pad area and is spaced apart from the dummy pad in the first dummy pad area. The second test pad and the dummy pad in the first dummy pad area are located in the same row, and the second test pad is located in the area of the first dummy pad area close to the opposite side edges of the display driver chip.
[0014] As an optional solution, the height of the output pads in the output pad area, the height of the dummy pads in the first dummy pad area, the height of the input pads in the first input pad area and the height of the additional pads are each greater than or equal to 15 μm and less than or equal to 18 μm.
[0015] As an optional solution, the anode layer also includes a binding anode area, the binding anode area and the non-binding anode area are arranged at intervals, and the metal routing also includes a binding metal routing, and the binding anode area and the binding metal routing are respectively bound to the output pad area and the first input pad area.
[0016] As an optional solution, the additional pad is a plurality of additional input pads, and the binding metal trace contacts the non-binding metal trace corresponding to each additional input pad; The additional pads are multiple additional dummy pads, and the binding metal traces and the non-binding metal traces corresponding to each additional dummy pad are spaced apart.
[0017] In a second aspect, the present invention provides a display device, comprising the display module of the first aspect.
[0018] The display module of the present invention provides a plurality of additional pads between the output pad area and the first input pad area. The additional pads are distributed between the output pad area and the first input pad area. While providing good support for the display driver chip, the additional pads are helpful to reduce the spacing of the blank area between the output pad area and the first input pad area. On the one hand, it is helpful to overcome the problem of uneven force on the surface of the display driver chip due to the inconsistent number of output pads in the output pad area and input pads in the first input pad area, thereby improving the uniformity of the pad etching load and reducing the binding impedance; on the other hand, it is helpful to prevent the problem of virtual connection or short circuit during the binding process of the display driver chip and the panel, thereby improving the display effect of the display area and improving the product yield and product competitiveness of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS
[0019] Other features, objects and advantages of the present application will become more apparent by reading the detailed description of non-limiting embodiments made with reference to the following drawings: Figure 1 A top view of a display module in the prior art; Figure 2 for Figure 1 Middle AA surface section; Figure 3 A top view of a display module according to an embodiment of the present application; Figure 4 for Figure 3 Middle AA surface section; Figure 5 A top view of another display module according to an embodiment of the present application; Figure 6 for Figure 5 Middle AA surface section; In the figure, 100. Display module; 10. Display driver chip; 11. output pad area, 111. output pad, 12. first input pad area, 121. input pad, 122. additional input pad, 13. first dummy pad area, 131. additional dummy pad, 14. second input pad area, 15. second dummy pad area, 16. first test pad, 17. second test pad; 20. Panel, 21. Anode layer, 211. Non-bound anode area, 212. Bonded anode area, 22. Metal trace, 221. Non-bound metal trace, 222. Bonded metal trace, 23. Via.
[0020] 30. Flexible circuit board, 31. Flexible circuit board binding pad; 40. Anisotropic conductive adhesive. DETAILED DESCRIPTION
[0021] The present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It is to be understood that the specific embodiments described herein are only used to explain the relevant invention, rather than to limit the invention. It is also necessary to explain that, for ease of description, only the parts related to the invention are shown in the accompanying drawings.
[0022] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present application can be combined with each other. The present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.
[0023] In related technologies, such as Figure 1 and 2 As shown in the figure, the structure diagram of the display driver chip, flexible circuit board (FPC) and panel (Panel) of the silicon-based OLED product is as follows Figure 1 and 2 shown. Figure 1The schematic diagram of the top view of the structure is shown in the first direction from bottom to top, which are the flexible circuit board bonding pad 31 (FPC Bonding Pad), the input pad of the display driver chip (DDICInput Pad), the dummy pad of the display driver chip (DDIC Dummy Pad), the test pad (Test Pad), and the output pad of the display driver chip (DDIC Output Pad) and the Fanout area, the Demux area and the display area (not shown in the figure). Among them, as shown in FIG. Figure 2 As shown, the FPC Pad is bonded to the bump on the FPC through ACF (anisotropic conductive adhesive 40), and the DDIC Input and DDIC Output are bonded to the corresponding bump on the DDIC through ACF respectively. The middle Dummy Pad plays a supporting role, and the Test pad is finally tested during the process. It should be noted that the DDIC Input Pad is connected to the FPC through the lower metal trace, with a total of 2 rows, each row with about 250 pads, and a total of about 500 pads; and the DDIC Output Pad is related to the display area resolution and Demux type. The horizontal resolution of the existing product is 3552 and the Demux type is 1:6. In addition to the Dummy Pad setting, the number of Output Pads is 2500, 10 pads per column, and a total of 250 columns. Figure 2 for Figure 1 In the cross-sectional diagram of AA, the DDIC Outpad is connected to the Demux module through metal routing, and the Demux is distributed to the display area according to a 1:6 signal mode. The DDIC Input Pad is bound to the FPC through the lower metal routing, while the Dummy Pad between the two is suspended and not connected to any signal. Therefore, the pads on both sides of the DDIC along the first direction show obvious unevenness. On the one hand, it leads to different etching loads for the DDIC Input Pad and DDIC Outpad, affecting the binding impedance; on the other hand, when the DDIC is pressed, the DDIC Outpad area appears to be pressed with a virtual connection or short circuit, resulting in poor linearity in the display area.
[0024] Based on the above problems, Figure 3-6 As shown, an embodiment of the present application provides a display module 100, including: A display driver chip 10, the display driver chip 10 includes an output pad area 11, a first dummy pad area 13 and a first input pad area 12, the output pad area 11 and the first input pad area 12 are respectively distributed on both sides of the first dummy pad area 13, and the display driver chip 10 also includes a plurality of additional pads, and the plurality of additional pads are located in an area between the output pad area 11 and the first input pad area 12; The additional pads and the first dummy pad area 13 form a second dummy pad area 15, and the distances between the output pad area 11 and the first input pad area 12 and the second dummy pad area 15 are 1-3 times the distance between two adjacent binding pads; Alternatively, the additional pads and the first input pad area 12 form a second input pad area 14, and the distances between the output pad area 11 and the second input pad area 14 and the first dummy pad area 13 are 1-3 times the distance between two adjacent binding pads; The panel 20 is bound and connected to the display driving chip 10 through the output pad area 11 and the first input pad area 12 .
[0025] The display driver chip 10 (Display Driver IC, DDIC for short) is mainly used to receive an electrical signal carrying pixel data of a display image, and process the received electrical signal and send it to the display panel to drive the display panel to display an image. The first input pad area 12 includes a plurality of input pads 121 distributed at intervals, and the display driver chip 10 is coupled to the flexible circuit board 30 (FPC) through the input pads 121; the output pad area 11 includes a plurality of output pads distributed at intervals, and the display driver chip 10 outputs a driving display signal through the output pads; the first dummy pad area 13 includes a plurality of dummy pads distributed at intervals, and the dummy pads mainly play a supporting role to ensure the assembly stability of the display driver chip 10. The dummy pads are in a suspended state and are not connected to any signal. Therefore, the dummy pads are spaced apart from the output pads and the input pads 121 to ensure that the output pads and the input pads will not interfere with the normal operation of the input pads.
[0026] It can be understood that the output pad area 11 refers to the area where the output pad is set, the first dummy pad area 13 refers to the area where the display driver chip 10 is originally provided with a dummy pad, the first input pad area 12 refers to the area where the display driver chip 10 is originally provided with an input pad 121, and the additional pad refers to the pad newly added on the basis of the original pad of the display driver chip 10. Since the number of output pads in the output pad area 11 is much larger than the number of input pads 121 in the first input pad area 12, the additional pads may be additional dummy pads 131 and / or additional input pads 122, and a plurality of additional pads are arranged at intervals in the area between the output pad area 11 and the first input pad area 12, that is, the additional pads are distributed in the blank area between the output pad area 11 and the first input pad area 12; the number of additional pads may be 10, 20, 30, 100, etc., and the specific number of additional pads may be determined according to actual process requirements, as long as the spacing between the blank area between the output pad area 11 and the first input pad area 12 can be reduced.
[0027] Among them, a plurality of additional pads are distributed at intervals, and the additional pads can be arranged in any manner between the output pad area 11 and the first input pad area 12, such as but not limited to a matrix or a grid type, etc. Moreover, the preparation process, size and spacing of each additional pad can be consistent with the pad of the display driver chip 10, which is convenient for production and processing and helps to simplify the processing procedures.
[0028] It should be noted that the distances between the additional pads and the output pad area 11 and the first input pad area 12 are equal. When the additional pads and the first dummy pad area 13 form the second dummy pad area 15, the distance between the output pad area 11 and the second dummy pad area 15 refers to the distance between the edges of the output pad area 11 and the second dummy pad area 15 that are opposite to each other (e.g. Figure 4 In the gap 1, the distance between the first input pad area 12 and the second dummy pad area 15 refers to the distance between the edges of the first input pad area 12 and the second dummy pad area 15 opposite to each other (eg, Figure 4 In the figure, gap1, gap1=gap2), for example, the distance between the output pad area 11 and the second dummy pad area 15 may be 70 μm-80 μm, and the distance between the first input pad area 12 and the second dummy pad area 15 may be 70 μm-80 μm.
[0029] When the additional pads and the first input pad area 12 form the second input pad area 14, the distance between the output pad area 11 and the first dummy pad area 13 refers to the distance between the edges of the output pad area 11 and the first dummy pad area 13 opposite to each other (e.g. Figure 6 In the gap 1, the distance between the second input pad area 14 and the first dummy pad area 13 refers to the distance between the edges of the second input pad area 14 and the first dummy pad area 13 opposite to each other (eg, Figure 6 In the figure, the pitch between two adjacent bonding pads refers to the distance between the pad center lines of the two adjacent bonding pads. For example, the distance between the output pad area 11 and the first dummy pad area 13 may be 70 μm-80 μm, and the distance between the second input pad area 14 and the first dummy pad area 13 may be 70 μm-80 μm.
[0030] It can also be understood that the panel 20 includes a base substrate and a driving layer and a display layer stacked on the base substrate in a direction away from the base substrate; wherein the base substrate can support other structures in the panel 20, and the base substrate can be glass, PI (Polyimide), PET (Polyethylene glycol terephthalate), silicon (single crystal silicon or polycrystalline silicon), etc. In the embodiment of the present application, the base substrate can be a silicon base, such as single crystal silicon, and the corresponding display panel is a silicon-based display panel.
[0031] The driving layer includes a pixel driving circuit and a circuit layer. The pixel driving circuit includes multiple transistors and at least one capacitor. The circuit layer includes multiple metal layers and multiple interlayer insulating layers. Each metal layer is isolated from the transistor by the interlayer insulating layer and coupled to the transistor through a contact hole. In this way, the electrical signal (such as driving voltage or driving current) in the pixel driving circuit can pass through the transistor and each metal layer in sequence, and then be transmitted to the light-emitting layer to drive the light-emitting layer to emit light.
[0032] The light-emitting layer includes a first electrode, a light-emitting functional layer and a second electrode. The first electrode is a cathode, and the second electrode is an anode. The material of the first electrode may be, but is not limited to, indium tin oxide (ITO), indium zinc oxide (IZO), a metal or an alloy (such as magnesium, titanium, silver or an alloy formed by multiple metals); the material of the second electrode may be, but is not limited to, a metal such as titanium, silver or an alloy formed by multiple metals such as titanium, silver or the like; the light-emitting functional layer includes a light-emitting material layer, a hole injection layer, a hole transport layer, an electron blocking layer, an electron injection layer, an electron transport layer and a hole blocking layer.
[0033] It can also be understood that the panel 20 includes metal traces and vias 23, wherein a portion of the metal traces are used to bind the panel 20 to the flexible circuit board 30 and the display driver chip 10, so that the panel 20 can achieve normal display functions; the remaining portion of the metal traces are used to electrically connect to the dummy pads on the display driver chip 10, so that the dummy pads are grounded, reducing the floating potential, and at the same time, the line impedance between the display driver chip 10 and the flexible circuit board 30 can be reduced, thereby effectively reducing the heat generated by the display driver chip 10 and ensuring that the temperature of the display driver chip 10 is always at an appropriate temperature, thereby ensuring that the display driver chip 10 operates normally.
[0034] The display module of the embodiment of the present application solves the problem in the prior art that the output pads and the first input pads 121 on the display driver chip 10 are unevenly distributed, resulting in different etching loadings of the Output Pad and the Input Pad, affecting the binding impedance and causing virtual connection or short circuit when the display driver chip 10 is pressed together. In the embodiment of the present application, a plurality of additional pads are arranged between the output pad area 11 and the first input pad area 12. The additional pads are distributed between the output pad area 11 and the first input pad area 12. While providing good support for the display driver chip 10, the additional pads are helpful to reduce the spacing between the blank areas between the output pad area 11 and the first input pad area 12. On the one hand, it is helpful to overcome the problem of uneven force on the surface of the display driver chip 10 due to the inconsistent number of output pads in the output pad area 11 and input pads 121 in the first input pad area 12, thereby improving the uniformity of the pad etching load and reducing the binding impedance; on the other hand, it is helpful to prevent the problem of virtual connection or short circuit during the binding process of the display driver chip 10 and the panel 20, thereby improving the display effect of the display area and improving the product yield and product competitiveness of the display panel.
[0035] As an achievable method, the display driver chip further includes a test pad, and the area where the output pad area 11, the first dummy pad area 13, the additional pad and the first input pad area 12 are located constitutes the pad area of the display driver chip 10, and the test pad is located in the center of the entire pad area.
[0036] It should be noted that the test pad is located at the center of the entire pad area means that the test pad is located at the center of the area formed by the output pad, the dummy pad, the additional pad and the input pad; for example, Figure 3 As shown, the display driver chip can be provided with 2 rows of input pads, additional pads and four rows of dummy pads in the first dummy pad area along the Y direction, and 3 rows of output pads, and the test pad is located at the 5th row in the Y direction.
[0037] In this implementation, the location of the test pad is conducive to avoiding interference with the output pad and the input pad, while facilitating wiring testing.
[0038] In some embodiments, the panel 20 includes an anode layer 21 and metal traces, the anode layer 21 includes a non-binding anode area 211 corresponding to each additional pad, the metal traces include a non-binding metal trace 221 corresponding to each additional pad, a via 23 is provided between the non-binding anode area 211 and the non-binding metal trace 221, and each additional pad is crimped to the non-binding anode area 211 and is electrically connected to the non-binding metal trace 221 through the via 23.
[0039] It is understandable that the anode layer 21 can be, but is not limited to, a metal such as titanium, silver, or an alloy formed by multiple metals such as titanium, silver, etc. The metal routing can be, but is not limited to, one layer, two layers, or three layers according to actual needs. The anode layer 21 and the adjacent metal routing are connected through the via 23 to achieve electrical connection. Among them, the anode layer 21 and the metal routing corresponding to the additional pad are respectively recorded as the non-binding anode area 211 and the non-binding metal routing 221, and the non-binding anode area 211 corresponding to each additional pad can be connected, and of course, they can also be set at intervals. The non-binding metal routing 221 corresponding to each additional pad can be connected, and of course, they can also be set at intervals, as long as it is ensured that the normal binding connection of the panel 20 is not affected.
[0040] The non-bound anode area 211 and the non-bound metal trace 221 of the embodiment of the present application are conducive to grounding the additional pad, reducing the heat generation of the display driver chip 10, and ensuring that the display driver chip 10 is at a suitable operating temperature to ensure its normal operation.
[0041] As an achievable method, Figure 3 and 5 As shown, the plurality of additional pads are evenly distributed at intervals along at least a first direction and a second direction, and the first direction is different from the second direction.
[0042] In some embodiments, the first direction may be a direction parallel to the width direction of the panel 20 or a direction from the first input pad area 12 to the output pad area 11 (eg, Figure 3 The second direction may be a direction parallel to the length direction of the panel 20 (eg, Figure 3 In the Y direction, the first direction and the second direction are perpendicular to each other; in some other embodiments, the first direction and the second direction can be directions along two different diagonals of the panel 20, as long as the multiple additional pads are evenly distributed.
[0043] In the embodiment of the present application, the plurality of additional pads are evenly spaced along the first direction and the second direction, which is beneficial to ensuring that the spacing between the blank area between the output pad area 11 and the first input pad area 12 is reduced, and is beneficial to overcoming the problems of different etching loads and virtual connection or short circuit caused by the uneven distribution of the output pads and the input pads 121 on the display driver chip 10, and is beneficial to ensuring that the additional pads can reliably support the display driver chip 10, thereby ensuring the normal operation of the display driver chip 10.
[0044] In some embodiments, in the first direction and the second direction, the arrangement of the plurality of additional pads is the same as the arrangement of the output pads 111 of the output pad region 11 and the arrangement of the input pads 121 of the first input pad region 12 .
[0045] It is understandable that the arrangement of the additional pads should be determined according to the size of the display driver chip in the first direction and the second direction, wherein the arrangement includes the number, number of rows, number of columns and spacing.
[0046] In this embodiment, the arrangement of the additional pads is the same as the arrangement of the output pads and the arrangement of the input pads, which is conducive to convenient processing and can reliably solve the problem of uneven force on both sides of the display driver chip, ensure reliable binding of the display driver core, and improve the display effect of the display module.
[0047] As an achievable method, Figure 3 and 4 As shown, the additional pads include a plurality of additional dummy pads 131 , which are distributed on both sides of the first dummy pad area 13 and are arranged at intervals along the direction toward the output pad area 11 and the first input pad area 12 .
[0048] It can be understood that the first dummy pad area 13 refers to the original dummy pad on the display driver chip 10, and the additional pad includes multiple additional dummy pads 131, that is, additional dummy pads 131 are added on both sides of the original dummy pads. The additional dummy pads 131 reduce the spacing of the blank area between the output pad area 11 and the first input pad area 12, which is helpful to avoid the problem of uneven distribution of the output pads and the input pads 121 on the display driver chip 10.
[0049] In the embodiment of the present application, the additional pads include multiple additional dummy pads 131. On the one hand, the setting of the additional dummy pads 131 does not affect the normal binding of the panel 20 and the display driver chip 10, and has a good supporting effect, ensuring the reliable installation of the display driver chip 10. On the other hand, it is helpful to overcome the problem of uneven distribution of the output pads and the input pads 121 on the display driver chip 10, thereby improving the uniformity of the pad etching load, and avoiding the problem of virtual connection or short circuit during the binding process of the display driver chip and the panel 20, thereby improving the display effect and improving the product yield and product competitiveness of the display panel.
[0050] In some embodiments, although the electrical states of the dummy pads of the first dummy pad area 13 and the additional dummy pads 131 are in a floating state, in order to ensure the uniformity of the entire process, the dummy pads of the additional dummy pads 131 and the first dummy pads both need to be connected to the anode layer 21 of the panel 20 and the metal traces of the lower layer, that is, connected to the non-binding anode area 211 and the non-binding metal traces 221, to achieve grounding of the additional dummy pads 131 and the dummy pads of the first dummy pad area 13, reduce the floating potential, and reduce the heat generated by the display driver chip 10.
[0051] In some embodiments, multiple additional dummy pads 131 and the first dummy pad area 13 form a second dummy pad area 15, and the test pad includes a first test pad 16, which is located in the center of the second dummy pad area 15 and close to the opposite side edges of the display driver chip 10, and the first test pad 16 is spaced apart from the dummy pads of the second dummy pad area 15.
[0052] It can be understood that the additional dummy pads 131 are distributed on both sides of the first dummy pad area 13 to form a second dummy pad area 15 with the first dummy pad area 13. It can be seen that the spacing between the second dummy pad area 15 and the output pad area 11 and the first input pad area 12 is reduced and equal.
[0053] The test pad is used for online testing during the process of display panel to detect whether there is good electrical contact. The test pad is set in the center of the second dummy pad area 15 and close to the edge of the display driver chip 10, which is conducive to avoiding interference with the output pad and the input pad 121 and facilitating wiring testing. Figure 3 As shown, the test pad is arranged in the center of the second dummy pad area 15 , which can be understood as, when the second dummy pad area 15 includes five rows of dummy pads, the test pad can be located in the third row and close to the edges of both sides of the display driver chip 10 .
[0054] As an achievable method, Figure 5 and 6 As shown, the additional pads include a plurality of additional input pads 122, which are spaced apart in a direction close to the output pad and form a second input pad area 14 with the first input pad area 12, and the spacing between the second input pad area 14 and the first dummy pad area 13 is equal to the spacing between the output pad area 11 and the first dummy pad area 13.
[0055] In this embodiment, the additional pads include multiple additional input pads 122. By increasing the number of input pads 121, the spacing between the blank area between the output pad area 11 and the input pads 121 is reduced. There is no need to increase the number of dummy pads. The processing technology is simple and it is beneficial to reduce the impact on the metal routing layout (Layout) of the lower layer of the panel.
[0056] The number of additional input pads 122 can be determined according to the resolution of the display panel, Demux, and the number of dummy pads. The additional input pads 122 are oriented toward the direction close to the output pads (eg, Figure 4For example, the additional input pads 122 and the first input pads 121 are distributed in a matrix, and the additional input pads 122 and the first input pads 121 form a second input pad area 14. It is sufficient to ensure that the spacing between the second input pad area 14 and the first dummy pad area 13 is equal to the spacing between the output pad area 11 and the first dummy pad area 13.
[0057] In some embodiments, the spacing between the second input pad area 14 and the first dummy pad area 13 is ensured to be equal to the spacing between the output pad area 11 and the first dummy pad area 13, and the position of the first dummy pad area 13 can be moved toward the output pad area 11, such as Figure 5 As shown, the first dummy pad area 13 and the second test pad 17 are in the same row, and the second test pad 17 is located in the area close to the edges of both sides of the display driver chip 10 .
[0058] In a preferred embodiment, the number of input pads 121 of the second input pad region 14 is equal to the number of output pads of the output pad region 11 .
[0059] The input pads 121 of the second input pad area 14 include the additional input pads 122 and the input pads 121 of the first input pad area 12 .
[0060] In this embodiment, the number of input pads 121 in the second input pad area 14 is equal to the number of output pads in the output pad area 11, which is conducive to ensuring that the display driver chip 10 is subjected to uniform force, ensuring that the etching loads of the output pads and the input pads 121 are the same, and there will be no problems of virtual connection or short circuit during pressing, and the processing technology is simple.
[0061] In some embodiments, the test pad includes a second test pad 17, the second test pad 17 is located in the first dummy pad area 13 and is spaced apart from the dummy pad of the first dummy pad area 13, the second test pad 17 and the dummy pad of the first dummy pad area 13 are located in the same row, and the second test pad 17 is located in the area of the first dummy pad area 13 close to the opposite side edges of the display driver chip 10.
[0062] For example, Figure 5 and 6 As shown, the output pad area 11 and the second input pad area 14 are located in the display driver chip 10 along the first direction (eg Figure 5On both sides of the output pad area 11 (in the Y direction), a first dummy pad area 13 is arranged in the middle of the second input pad area 14, and the first dummy pad area 13 includes a row of dummy pads, wherein second test pads 17 are arranged in areas on both sides of the dummy pads near the edge of the display driver chip 10. In the figure, the spacing (gap1) between the first dummy pad area 13 and the output pad area 11 is equal to the spacing (gap2) between the first dummy pad area 13 and the second input pad area 14.
[0063] In some other embodiments, the additional pads may include additional dummy pads 131 and additional input pads 122 at the same time, that is, by simultaneously providing additional dummy pads 131 and additional input pads 122, the problem of uneven distribution of output pads and input pads 121 on both sides of the display driver chip 10 is improved.
[0064] Specifically, the additional pads include additional dummy pads 131 and additional input pads 122. The additional input pads 122 are arranged at intervals from the first input pad area 12 toward the output pad area 11. The additional input pads 122 and the first input pad area 12 form a second input pad area 14. The additional dummy pads 131 are distributed at intervals in the area between the second input pad area 14 and the output pad area 11.
[0065] As a feasible manner, the height of the output pads of the output pad area 11, the height of the dummy pads of the first dummy pad area 13, the height of the input pads 121 of the first input pad area 12, and the height of the additional pads are each greater than or equal to 15 μm and less than or equal to 18 μm.
[0066] Specifically, the height of the output pad of the output pad area 11 may be, but not limited to, 15μm, 16μm, 17μm, or 18μm, etc.; the height of the dummy pad of the first dummy pad area 13 may be, but not limited to, 15μm, 16μm, 17μm, or 18μm, etc.; the height of the input pad 121 of the first input pad area 12 may be, but not limited to, 15μm, 16μm, 17μm, or 18μm, etc.; the height of the additional pad may be, but not limited to, 15μm, 16μm, 17μm, or 18μm, etc. When the height of the pad is less than 15μm, it is easy to cause excessive overflow of the conductive glue between the display driver chip 10 and the panel 20; when the height of the pad is greater than 18μm, it is easy to cause bubbles to be generated when the display driver chip 10 and the panel 20 are pressed together, affecting the normal electrical connection between the display driver chip 10 and the panel 20.
[0067] In some embodiments, the anode layer 21 also includes a bound anode area 212, and the bound anode area 212 and the non-bound anode area 211 are arranged at intervals. The metal routing 22 also includes a bound metal routing 222, and the bound anode area 212 and the bound metal routing 222 are respectively bound to the output pad area 11 and the first input pad area 12.
[0068] The pad height of this embodiment is conducive to ensuring reliable binding of the display driver chip 10, ensuring that the display driver chip 10 can reliably drive the display panel to display, and is easy to process.
[0069] In some embodiments, when the additional pads are multiple additional input pads 122 , the binding metal trace 222 contacts the non-binding metal trace 221 corresponding to each additional input pad 122 ; When the additional pads are multiple additional dummy pads 131 , the binding metal traces 222 and the non-binding metal traces 221 corresponding to each additional dummy pad 131 are arranged at intervals.
[0070] Among them, when the additional pads are multiple additional input pads 122, the binding metal trace 222 is in contact with the non-binding metal trace 221 corresponding to each additional input pad 122, which is conducive to simplifying the design of the metal trace structure, simplifying the processing technology, and at the same time does not affect the binding connection between the display driver chip 10, the panel 20 and the flexible circuit board 30.
[0071] The additional pad is an additional dummy pad 131, and the binding metal trace 222 is spaced apart from the non-binding metal trace 221 corresponding to each additional dummy pad 131, that is, there is no electrical conduction between them, which is beneficial to realize the grounding of the dummy pad and reduce the floating potential without affecting the normal binding of the display driver chip 10 and the panel 20.
[0072] It should be noted that when the additional pad is an additional input pad 122, although the non-binding metal trace 221 corresponding to the additional input pad 122 is in contact with the binding metal trace 222, the additional input pad 122 does not participate in normal binding, that is, the additional input pad 122 is not electrically connected to the output pad 111 on the display driver chip 10 side.
[0073] In some embodiments, when the output pads and input pads of the display driver chip 10 are subjected to the etching process for engraving pad windows, the etching range is about 100 μm larger than the edge of the actual driver chip. This is beneficial for providing sufficient overflow space when the display driver chip 10 and the panel 20 are reliably pressed and bound, thereby ensuring that the display driver chip 10 and the panel 20 are reliably bound and electrically connected.
[0074] In some embodiments, the display module further includes a flexible circuit board 30 , and the flexible circuit board 30 is bonded to the panel 20 via a flexible circuit board pad.
[0075] In summary, the display module of the embodiment of the present application is provided with a plurality of additional pads between the output pad area 11 and the first input pad area 12. The additional pads are distributed between the output pad area 11 and the first input pad area 12, and provide a good support for the display driver chip 10. At the same time, the additional pads are conducive to reducing the spacing between the blank areas between the output pad area 11 and the first input pad area 12. On the one hand, it is conducive to overcoming the problem of uneven force on the surface of the display driver chip 10 due to the inconsistent number of output pads in the output pad area 11 and input pads 121 in the first input pad area 12, thereby improving the uniformity of the pad etching load and reducing the binding impedance; on the other hand, it is conducive to preventing the problem of virtual connection or short circuit during the binding process of the display driver chip 10 and the panel 20, thereby improving the display effect of the display area and improving the product yield and product competitiveness of the display panel; Furthermore, the additional pad may be an additional input pad 122 or an additional dummy pad 131 , which is flexible in design and convenient in operation, and will not affect the binding of the display driver chip 10 and the panel 20 .
[0076] In a second aspect, the present invention provides a display device, comprising the display module 100 of the first aspect. It is understandable that the display device has all the features and advantages of the above display module, which will not be repeated here. In short, the display device has high quality and yield rate, and high display resolution.
[0077] The display device is a product with an image display function. For example, the display device may be: a display, a television, a billboard, a digital photo frame, a laser printer with a display function, a telephone, a mobile phone, a personal digital assistant (PDA), a digital camera, a portable camcorder, a viewfinder, a navigator, a vehicle, a large-area wall, a home appliance, an information query device (such as business query equipment for e-government, banks, hospitals, power and other departments), a monitor, etc. The display device may also be a microdisplay or a product containing a microdisplay. The product containing a microdisplay may be a smart watch, a smart bracelet, a helmet display, a stereo display mirror, and any of AR devices (such as AR glasses), VR devices (such as VR glasses), etc. For example, a microdisplay may be a display with a display size ranging from about 0.2 inches to about 2.5 inches, but is not limited thereto. It can be understood that the microdisplay may also be a display with a smaller display size, such as a display size less than or equal to 0.2 inches.
[0078] It should be understood that the terms "center", "longitudinal", "lateral", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside" and the like used above to indicate orientations or positional relationships are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the panel or component referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first" and "second" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, unless otherwise specified, "multiple" means two or more.
[0079] The above description is only a preferred embodiment of the present application and an explanation of the technical principles used. Those skilled in the art should understand that the scope of the invention involved in the present application is not limited to the technical solution formed by a specific combination of the above technical features, but should also cover other technical solutions formed by any combination of the above technical features or their equivalent features without departing from the inventive concept. For example, the above features are replaced with (but not limited to) technical features with similar functions disclosed in the present application.
Claims
1. A display module, characterized in that: include: A display driver chip, the display driver chip comprising an output pad area, a first dummy pad area and a first input pad area, the output pad area and the first input pad area are respectively distributed on both sides of the first dummy pad area, the display driver chip further comprising a plurality of additional pads, the plurality of additional pads being located in an area between the output pad area and the first input pad area; The additional pad and the first dummy pad area form a second dummy pad area, and the distance between the output pad area and the first input pad area and the second dummy pad area is 1-3 times the distance between two adjacent binding pads; Alternatively, the additional pads and the first input pad area form a second input pad area, and the distances between the output pad area and the second input pad area and the first dummy pad area are 1-3 times of the distance between two adjacent binding pads; A panel is bound and connected to the display driving chip through the output pad area and the first input pad area.
2. The display module according to claim 1, characterized in that: The display driver chip further includes a test pad, the output pad area, the first dummy pad area, the additional pad and the first input pad area constitute a pad area of the display driver chip, and the test pad is located in the center of the entire pad area.
3. The display module according to claim 1, characterized in that: The panel includes an anode layer and metal traces, the anode layer includes a non-binding anode area corresponding to each of the additional pads, the metal traces include a non-binding metal trace corresponding to each of the additional pads, a via is provided between the non-binding anode area and the non-binding metal trace, and each of the additional pads is electrically connected to the non-binding metal trace through the via after being crimped to the non-binding anode area.
4. The display module according to claim 1, characterized in that: The plurality of additional pads are evenly spaced along at least a first direction and a second direction, wherein the first direction is different from the second direction.
5. The display module according to claim 4, characterized in that: In the first direction and the second direction, the arrangement of the plurality of additional pads is the same as the arrangement of the output pads of the output pad area and the arrangement of the input pads of the first input pad area.
6. The display module according to claim 2, characterized in that: The additional pads include a plurality of additional dummy pads, which are distributed on both sides of the first dummy pad area and are arranged at intervals along a direction toward the output pad area and the first input pad area, respectively.
7. The display module according to claim 6, characterized in that: The multiple additional dummy pads and the first dummy pad area form the second dummy pad area, the test pads include a first test pad, the first test pad is located in the center of the second dummy pad area and close to the opposite side edges of the display driver chip, and the first test pad is spaced apart from the dummy pads of the second dummy pad area.
8. The display module according to claim 2, characterized in that: The additional pads include a plurality of additional input pads, which are spaced apart in a direction close to the output pad area and form a second input pad area with the first input pad area, and the spacing between the second input pad area and the first dummy pad area is equal to the spacing between the output pad area and the first dummy pad area.
9. The display module according to claim 8, characterized in that: The number of input pads in the second input pad area is equal to the number of output pads in the output pad area.
10. The display module according to claim 8, characterized in that: The test pad includes a second test pad, the second test pad is located in the first dummy pad area and is spaced apart from the dummy pads in the first dummy pad area, the second test pad and the dummy pads in the first dummy pad area are located in the same row, and the second test pad is located in an area of the first dummy pad area close to opposite side edges of the display driver chip.
11. The display module according to any one of claims 1 to 10, characterized in that: The height of the output pads in the output pad area, the height of the dummy pads in the first dummy pad area, the height of the input pads in the first input pad area, and the height of the additional pads are each greater than or equal to 15 μm and less than or equal to 18 μm.
12. The display module according to any one of claims 3 to 10, characterized in that: The anode layer further includes a binding anode area, the binding anode area and the non-binding anode area are spaced apart, the metal trace further includes a binding metal trace, the binding anode area and the binding metal trace are respectively bound to the output pad area and the first input pad area.
13. The display module according to claim 12, characterized in that: When the additional pads are a plurality of additional input pads, the binding metal trace contacts a non-binding metal trace corresponding to each of the additional input pads; The additional pads are multiple additional dummy pads, and the binding metal traces and the non-binding metal traces corresponding to each of the additional dummy pads are arranged at intervals.
14. A display device, characterized in that A display module comprising any one of claims 1-13.