Display modules, touch display devices

By designing a resistor-balanced output terminal and signal line in the driver chip, combined with the power signal transmission line, the problem of uneven brightness caused by parasitic capacitance in touch display products is solved, achieving a more uniform display effect.

CN119213358BActive Publication Date: 2025-12-02BOE TECHNOLOGY GROUP CO LTD +2
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Patent Information

Application Number
CN202380008819.X
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-04-26
Publication Date
2025-12-02
Estimated Expiration
2043-04-26

AI Technical Summary

Technical Problem

In existing technologies, touch display products suffer from uneven brightness at high resolutions and high refresh rates due to parasitic capacitance caused by the overlap of the common electrode block and data signal lines. This is particularly noticeable at high resolutions and high refresh rates.

Method used

By designing the output of the driver chip to have the same resistance value as the power chip, and setting signal lines in the driver chip to balance the resistance difference, combined with the design of the power signal transmission line, the internal resistance of the common voltage signal is reduced, thereby improving the problem of uneven brightness in the display screen.

Benefits of technology

It significantly reduces the resistance difference between different output terminals and the power chip, improves the brightness uniformity of the display screen, and enhances the display effect and image quality.

✦ Generated by Eureka AI based on patent content.

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Abstract

This application provides a display module and a touch display device, relating to the field of display technology. At least one driver chip is disposed within a bonding area; the motherboard includes a power chip; wherein, for the same driver chip, the resistance value between the first output terminal of the driver chip and the power chip is approximately equal to the resistance value between the second output terminal of the driver chip and the power chip; the first output terminal is the output terminal with the smallest distance to the first side, and the second output terminal is the output terminal with the smallest distance to the second side. This display module is used to fabricate a touch display device.
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Description

Technical Field

[0001] This application relates to the field of display technology, and in particular to a display module and a touch display device. Background Technology

[0002] With the continuous development of the display industry and the upgrading of display technology, consumers are paying more and more attention to the picture quality of display products. Therefore, high-resolution, high-transmittance, high-contrast, and wide-color-gamut high-quality display products are becoming increasingly popular among consumers. Summary of the Invention

[0003] The embodiments of this application adopt the following technical solutions:

[0004] In a first aspect, embodiments of this application provide a display module, which includes a display area and a bonding area located on one side of the display area; the display area is provided with multiple touch signal lines and multiple common electrode units, the common electrode units and the touch signal lines being electrically connected; the bonding area is provided with at least one driver chip; the display module further includes a motherboard, the motherboard including a power chip;

[0005] The driver chip includes multiple output terminals and at least one input terminal; the output terminals are electrically connected to the touch signal line, and the input terminal is electrically connected to the power supply chip;

[0006] The driver chip includes a first side and a second side disposed opposite to each other, both the first side and the second side extending along the direction from the display area to the bonding area;

[0007] Specifically, for the same driver chip, the resistance between the first output terminal of the driver chip and the power chip is approximately equal to the resistance between the second output terminal of the driver chip and the power chip; the first output terminal is the output terminal with the smallest distance to the first side, and the second output terminal is the output terminal with the smallest distance to the second side.

[0008] In at least one embodiment of this application, the driver chip includes a first signal line, which is in contact with all the output terminals and electrically connected to the input terminals; the resistance between the first output terminal and the midpoint of the first signal line is approximately equal to the resistance between the second output terminal and the midpoint of the first signal line.

[0009] In at least one embodiment of this application, the first signal line and the input terminal are indirectly electrically connected.

[0010] In at least one embodiment of this application, the driver chip further includes a second signal line and a third signal line, wherein the extension trend of the second signal line is consistent with the extension trend of the first signal line, and the extension trend of the third signal line intersects with the extension trend of the second signal line; one end of the third signal line is in contact with the midpoint of the first signal line, and the other end of the third signal line is electrically connected to the second signal line.

[0011] The input terminal of the driver chip is disposed on one of the first side and the second side, and the input terminal is in contact with one end of the second signal line.

[0012] In at least one embodiment of this application, the first signal line and the input terminal are directly connected in contact.

[0013] In at least one embodiment of this application, the driver chip includes two input terminals, which are respectively disposed on the first side and the second side, and are respectively connected to both ends of the first signal line.

[0014] In at least one embodiment of this application, the display module further includes at least one flexible circuit board and at least one power signal transmission line group; the input terminals of the power chip, the flexible circuit board, and the driver chip are electrically connected in sequence; the number of the driver chip, the flexible circuit board, and the power signal transmission line group is the same;

[0015] The power signal transmission line group includes at least one power signal transmission line, which extends from the motherboard through the flexible circuit board to the bonding area, and is electrically connected to the input terminal of the driver chip.

[0016] The number of power signal transmission lines passing through the same flexible circuit board in the power signal transmission line group is the same as the number of input terminals on the same driver chip electrically connected to the flexible circuit board.

[0017] In at least one embodiment of this application, the bonding area is provided with a first bonding part and a plurality of first connecting lines. The first bonding part is located on the side of the driver chip away from the display area, and the first bonding part is electrically connected to the flexible circuit board and the first connecting lines respectively.

[0018] In the case where the driver chip includes two input terminals, the first connection line includes a first part and a second part. The first part of the first connection line is electrically connected to one of the input terminals and the first bonding part, respectively, and the second part of the first connection line is electrically connected to the other input terminal and the first bonding part, respectively.

[0019] In at least one embodiment of this application, the driver chip includes a first storage unit, a second storage unit, a conversion unit, and a touch unit, wherein the first storage unit, the second storage unit, and the touch unit are electrically connected to the conversion unit; the display area is further provided with multiple data signal lines and multiple pixel driving circuits arranged in an array, wherein one data signal line is electrically connected to the same row of pixel driving circuits; the conversion unit is electrically connected to both the data signal lines and the touch signal lines.

[0020] The first storage unit is configured to store display data signals, the second storage unit is configured to store common voltage signals, and the touch unit is configured to store touch signals;

[0021] During the display phase, the conversion unit is configured to control the conduction between the first storage unit and the data signal line, and is also configured to control the conduction between the second storage unit and the touch signal line;

[0022] During the touch phase, the conversion unit is configured to control the touch unit to conduct between the data signal line and the touch signal line, respectively.

[0023] In at least one embodiment of this application, the display module includes at least two driver chips and at least two power signal transmission line groups. Each power signal transmission line group includes at least one power signal transmission line, which extends from the motherboard through the flexible circuit board to the bonding area. The power signal transmission line is electrically connected to the input terminal of the driver chip.

[0024] Each of the power signal transmission lines includes a first segment, which is disposed on the motherboard and connects the flexible circuit board and the power chip; the motherboard also includes a resistance adjustment module, and at least a portion of the first segment is also provided with a resistance adjustment module.

[0025] In at least one embodiment of this application, each of the first line segments is provided with the resistance adjustment module, the resistance adjustment module including an adjustable resistor.

[0026] In at least one embodiment of this application, each of the driver chips includes an input terminal, and the display module includes a first driver chip and a second driver chip, wherein the input terminals of the first driver chip and the second driver chip are both located on the first side or both are located on the second side.

[0027] The first driving chip is configured to control a first area in the display area, and the second driving chip is configured to control a second area in the display area, wherein the initial brightness of the first area is greater than the initial brightness of the second area;

[0028] The resistance adjustment module is provided on the first line segment that is electrically connected to the first driver chip.

[0029] In at least one embodiment of this application, the resistance value of the resistance adjustment module is approximately equal to the internal resistance value of the second driving chip.

[0030] In at least one embodiment of this application, at least a portion of the data signal line's orthographic projection on the substrate of the display module overlaps with the orthographic projection of the common electrode unit on the substrate;

[0031] During the touch control phase, both the data signal line and the touch signal line are configured to transmit scanning square wave signals, and the polarity of the scanning square wave signals transmitted by the data signal line and the touch signal line is the same.

[0032] Secondly, embodiments of this application provide a touch display device, which includes the display module as described above.

[0033] The above description is only an overview of the technical solution of this application. In order to better understand the technical means of this application and to implement it in accordance with the contents of the specification, and to make the above and other objects, features and advantages of this application more obvious and understandable, the following are specific embodiments of this application. Attached Figure Description

[0034] To more clearly illustrate the technical solutions in the embodiments of this application or related technologies, the drawings used in the description of the embodiments or prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0035] Figure 1 A schematic diagram of the structure of a non-touch display module provided for an embodiment of this application;

[0036] Figure 2 A schematic diagram of the structure of a touch display module provided for an embodiment of this application;

[0037] Figure 3 and Figure 4 A schematic diagram illustrating the uneven brightness of the display screens of two touch display modules provided in the embodiments of this application;

[0038] Figure 5 A simplified schematic diagram of the structure of a driver chip in a related art provided for an embodiment of this application;

[0039] Figure 6 and Figure 7 Simplified schematic diagrams of the structures of two driver chips provided for embodiments of this application;

[0040] Figure 8 A schematic diagram of another touch display module provided for an embodiment of this application;

[0041] Figure 9 A schematic diagram of another touch display module provided in the embodiments of this application.

[0042] Figure 10 A schematic diagram showing how the impedance of each output terminal of the driver chip provided in the embodiments of this application varies with the distance between the output terminal and the input terminal;

[0043] Figure 11 A partial structural schematic diagram of an array substrate provided for an embodiment of this application;

[0044] Figure 12 A simplified structural diagram of a motherboard provided for an embodiment of this application;

[0045] Figure 13 and Figure 14 The diagram illustrates the working principle of the driver chip provided in the embodiments of this application during the display and touch phases. Specific Implementation

[0046] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0047] In the embodiments of this application, the terms "first", "second", "third", "fourth" are used to distinguish the same or similar items with essentially the same function and effect, only for the purpose of clearly describing the technical solution of the embodiments of this application, and should not be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated.

[0048] In the embodiments of this application, the terms "upper" and "lower" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.

[0049] In the description of this specification, the terms "one embodiment," "some embodiments," "exemplary embodiment," "example," "specific example," or "some examples," etc., are intended to indicate that a particular feature, structure, material, or characteristic associated with that embodiment or example is included in at least one embodiment or example of this application. The illustrative representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics mentioned may be included in any suitable manner in any one or more embodiments or examples.

[0050] In the embodiments of this application, "multiple" means two or more, and "at least one" means one or more, unless otherwise explicitly defined.

[0051] The features such as "parallel," "perpendicular," and "identical" used in the embodiments of this application include features in the strict sense of "parallel," "perpendicular," and "identical," as well as cases where "approximately parallel," "approximately perpendicular," and "approximately identical" include certain tolerances. Taking into account the measurement and the tolerances associated with the measurement of a specific quantity (e.g., limitations of the measurement system), they represent the acceptable deviation range for a specific value as determined by a person skilled in the art. For example, "approximately" can mean within one or more standard deviations, or within 10% or 5% of said value.

[0052] Unless the context otherwise requires, throughout the specification and claims, the term "comprising" is interpreted as open and encompassing, that is, "including, but not limited to".

[0053] In this application, "same layer" refers to the relationship between multiple film layers formed from the same material after undergoing the same step (e.g., a patterning process). "Same layer" here does not always mean that multiple film layers have the same thickness or the same height in a cross-sectional view. The polygons used in this specification are not strictly defined; they can be approximate triangles, parallelograms, trapezoids, pentagons, or hexagons, and may have minor deformations due to rounded corners or tolerances.

[0054] In embodiments of this application, the term "electrical connection" may refer to a direct electrical connection between two components, or an electrical connection between two components via one or more other components.

[0055] In this specification, "electrical connection" includes the situation where components are connected together by elements that have a certain electrical function. There are no particular limitations on what constitutes an "electrical function," as long as it allows for the transmission and reception of electrical signals between the connected components. Examples of "electrical functions" include not only electrodes and wiring, but also switching elements such as transistors, resistors, inductors, capacitors, and other elements with various functions.

[0056] like Figure 1 As shown, the non-touch display product includes a full-surface common electrode 4. The common electrode line (Com line) is led out from the flexible circuit board 2 without passing through the driver chip 3. The common electrode line (Com line) is wired around the common electrode 4 and electrically connected to the common electrode 4 at multiple locations in the surrounding area to avoid the problem of large voltage drop (IR Drop) in different areas of the common electrode 4 caused by a single point connection.

[0057] like Figure 2 As shown, for touch display products, compared to... Figure 1 The non-touch display product shown uses multiple common electrode blocks 4 to achieve touch functionality. During the display phase, a common voltage signal is transmitted in the common electrode blocks 4 (also known as sensor electrodes). During the touch phase, touch signals are transmitted in the common electrode blocks 4. This time-division multiplexing of the common electrode blocks 4 achieves both display and touch functions simultaneously. Since touch signals need to be provided to the common electrode blocks 4 during the touch phase, the common electrode line (Com line) is led out from the flexible circuit board 2, passes through the driver chip 3, and then provides a signal to the display area AA through the output terminal of the driver chip 3. This allows the driver chip 3 to transmit touch signals to the touch signal line TX through the common electrode line (Com line) during the touch phase. The common electrode blocks 4 are electrically connected to the common electrode line (Com line) through the touch signal line TX.

[0058] However, in practical applications, the common electrode block 4 will inevitably interact with the data signal line (Data line, also known as the Source line). Figure 2 There is overlap at the location not shown in the diagram. This creates parasitic capacitance between the data signal line and the common electrode block 4. When the polarity of the signal transmitted in the data signal line reverses, the signal in the common electrode block 4 is pulled in the same direction, causing instability in the transmitted signal. This results in reduced screen brightness and a darker display; this phenomenon is particularly pronounced in high-resolution, high-refresh-rate displays. Furthermore, when the resistance of the common electrode line (Com line) transmitting the common voltage signal is high, the recovery time of the signal in the common electrode block 4 after being pulled is longer, making the localized reduction in screen brightness more significant.

[0059] Based on this, embodiments of this application provide a display module, such as... Figure 2 As shown, the display module includes a display area AA and a bonding area BD located on one side of the display area; the display area AA is provided with multiple touch signal lines TX and multiple common electrode units 4, and the common electrode units 4 and touch signal lines TX are electrically connected; the bonding area BD is provided with at least one driver chip 3; the display module also includes a motherboard 1, and the motherboard 1 includes a power chip 11;

[0060] like Figure 6 or Figure 7 As shown, the driver chip 3 includes multiple output terminals 32 and at least one input terminal 31; the output terminals 32 are electrically connected to the touch signal line TX, and the input terminal 31 is electrically connected to the power chip 11; the driver chip 3 includes a first side B1 and a second side B2 arranged opposite to each other, both the first side B1 and the second side B2 extending along the direction from the display area AA to the bonding area BD; wherein, for the same driver chip 3, the resistance value between the first output terminal of the driver chip 3 and the power chip 11 is approximately equal to the resistance value between the second output terminal of the driver chip 3 and the power chip 11; the first output terminal is the output terminal 32 with the smallest distance to the first side B1, and the second output terminal is the output terminal 32 with the smallest distance to the second side B2.

[0061] It should be noted that in the embodiments of this application, the touch signal lines TX are all disposed in the display area AA; in some other embodiments, the touch signal lines TX can be disposed in the peripheral area; in order to reduce the size of the peripheral area and improve the aesthetics of the display product, the embodiments of this application are described with the example of the touch signal lines TX being disposed in the display area AA.

[0062] In an exemplary embodiment, the material of the common electrode unit 4 is a light-transmitting and conductive material, such as indium tin oxide (ITO) or indium zinc oxide (IZO).

[0063] The shape and size of the aforementioned common electrode unit 4 are not limited here.

[0064] For example, the planar shape of the common electrode unit 4 can be a polygon, an arc, or a combination of polygons and arcs. For example, a polygon can include a quadrilateral, a pentagon, a hexagon, etc.; an arc can include a sector, a circle, an ellipse, a semicircle, a semi-ellipse, etc. The combination of polygons and arcs includes a graphic formed by removing local areas from a polygon or arc, and an image formed by stitching local areas on a polygon or arc. The graphic of the removed or stitched local areas can include a polygon or an arc.

[0065] For example, the common electrode unit 4 can cover multiple pixel units. For instance, the common electrode unit 4 can cover four pixel units, or six pixel units, or nine pixel units. That is, the planar size of the common electrode unit 4 can be greater than or equal to the planar size of four pixel units; or, the planar size of the common electrode unit 4 can be greater than or equal to the planar size of six pixel units; or, the planar size of the common electrode unit 4 can be greater than or equal to the planar size of nine pixel units.

[0066] The aforementioned driver chip 3 can be used to provide display driving signals and touch driving signals. For example, the aforementioned driver chip 3 can be a TDDI (Touch and Display Driver Integration) type driver chip, or the aforementioned driver chip 3 can be an SR (Source / Read-out IC) type driver chip.

[0067] For example, TDDI technology display products can be divided into ADS (Advanced Super Dimension Switch) type liquid crystal touch screens or HADS type liquid crystal touch screens.

[0068] In an exemplary embodiment, the motherboard 1 may include a printed circuit board assembly (PCBA), wherein the motherboard 1 includes at least a power supply chip 11, a timing controller (TCON), and a microcontroller unit (MCU).

[0069] The aforementioned power chip 11 can be a power management integrated circuit (PMIC).

[0070] The aforementioned input terminal refers to the port in driver chip 3 used to transmit signals from motherboard 1 to driver chip 3, and the output terminal refers to the port in driver chip 3 used to transmit signals to the display area AA of the display module.

[0071] The display module includes an array substrate 100, and a driver chip 3 is bonded in the bonding area BD of the array substrate 100. The output terminal of the driver chip 3 is used to transmit signals to the array substrate 100.

[0072] It should be noted that the driver chip 3 includes at least one input terminal for transmitting a common voltage signal. In the embodiments of this application, the input terminal refers to the input terminal for transmitting a common voltage signal. In practical applications, the driver chip 3 may include multiple other similar input terminals for transmitting signals other than the common voltage signal.

[0073] The phrase "approximately equal to" in the context of the resistance value between the first output terminal and the power chip being approximately equal to the resistance value between the second output terminal and the power chip includes a certain tolerance. This tolerance, taking into account the measurement and the tolerances associated with the measurement of a specific quantity (e.g., limitations of the measurement system), indicates an acceptable deviation range for a specific value as determined by a person skilled in the art. For example, "approximately equal to" could mean within one or more standard deviations, or within 3% or 5% of said value.

[0074] The following situations all fall within the scope of "approximately equal to":

[0075] For example, the difference between the resistance value between the first output terminal and the power chip and the resistance value between the second output terminal and the power chip is less than or equal to 1%, 2%, or 3% of the resistance value between the first output terminal and the power chip; for example, the difference between the resistance value between the first output terminal and the power chip and the resistance value between the second output terminal and the power chip is less than or equal to 1%, 2%, or 3% of the resistance value between the second output terminal and the power chip.

[0076] In related technologies, such as Figure 3 As shown, since the common electrode line (Com line) is input from only one side of the driver chip 3, for the same driver chip 3, for example... Figure 3 The common voltage signal (Vcom signal) transmitted by the common electrode line (Com line) of the driver chip 3 on the left side is input from the right side of the driver chip 3. Due to the internal resistance of the driver chip 3, for each output terminal that outputs signals from the driver chip 3, the farther away from the right side of the driver chip 3, the greater the internal resistance. Correspondingly, the voltage drop of the touch signal line TX electrically connected to the output terminal is greater. Under heavy load on the display product, the common electrode block 4 recovers more slowly after being pulled by the data signal line. Thus, under the combined effect of multiple factors, the display area AA of the display product exhibits the following: the closer the output terminal is to the common voltage signal input terminal of the driver chip 3, the higher the brightness of the local area connected to the touch signal line TX; the farther the output terminal is from the common voltage signal input terminal of the driver chip 3, the lower the brightness of the local area connected to the touch signal line TX. This causes uneven brightness in different areas of the display area AA, such as screen splitting. It should be noted that, as Figure 10As shown, the farther the output terminal is from the common voltage signal input terminal of the driver chip 3, the larger the resistance R; the closer the output terminal is to the common voltage signal input terminal of the driver chip 3, the smaller the resistance R.

[0077] In the display module provided in the embodiments of this application, the resistance value between the first output terminal and the power chip 11 is set to be approximately equal to the resistance value between the second output terminal and the power chip 11; wherein, the first output terminal is the output terminal 32 with the smallest distance to the first side B1, and the second output terminal is the output terminal 32 with the smallest distance to the second side B2; in this way, the internal resistance of the traces or conductive structures transmitting the common voltage signal can be significantly reduced, thereby making the resistance values ​​between different output terminals 32 and the power chip 11 tend to be consistent, reducing the resistance value difference between different output terminals 32 and the power chip 11, thereby improving the problem of uneven brightness of the display screen of the display module.

[0078] In at least one embodiment of this application, such as Figure 6 and Figure 7 As shown, the driver chip 3 includes a first signal line 33, which is connected to all output terminals 32 and electrically connected to the input terminal 31; the resistance R1 between the first output terminal and the midpoint of the first signal line 33 is approximately equal to the resistance R2 between the second output terminal and the midpoint of the first signal line 33.

[0079] In an exemplary embodiment, the resistance between the first output terminal and the input terminal 31 is approximately equal to the resistance between the second output terminal and the input terminal 31.

[0080] In an exemplary embodiment, the extension direction of the first signal line 33 intersects with the extension direction of each output terminal 32;

[0081] In an exemplary embodiment, the electrical connection between the first signal line 33 and the input terminal 31 includes: Figure 7 As shown, the first signal line 33 and the input terminal 31 are electrically connected; or, as... Figure 6 As shown, the first signal line 33 and the input terminal 31 are electrically connected.

[0082] Wherein, the resistance R1 between the first output terminal and the midpoint of the first signal line 33 is approximately equal to the resistance R2 between the second output terminal and the midpoint of the first signal line 33. The phrase "approximately equal to" includes "about equal to" and "equal to". "About equal to" includes, but is not limited to, the following situations: the difference between the resistance R1 between the first output terminal and the midpoint of the first signal line 33 and the resistance R2 between the second output terminal and the midpoint of the first signal line 33 is less than or equal to a preset value. For example, the preset value can be 1%, 2%, 3%, 4%, or 5% of the resistance R1 (or resistance R2).

[0083] In at least one embodiment of this application, such as Figure 6 As shown, the first signal line 33 and the input terminal 31 are electrically connected.

[0084] In at least one embodiment of this application, such as Figure 6 As shown, the driver chip 3 also includes a second signal line 34 and a third signal line 35. The extension trend of the second signal line 34 is consistent with the extension trend of the first signal line 33, and the extension trend of the third signal line 35 intersects with the extension trend of the second signal line 34. One end of the third signal line 35 is in contact with the midpoint of the first signal line 33, and the other end of the third signal line 35 is electrically connected to the second signal line 34.

[0085] The input terminal 31 of the driver chip 3 is located on one of the first side B1 and the second side B2, and the input terminal 31 is in contact with one end of the second signal line 34.

[0086] It should be noted that the first signal line 33, the second signal line 34, and the third signal line 35 in the driver chip 3 provided in the embodiments of this application do not necessarily mean that the signal lines must be straight. They can also have certain bends or curves, as long as the signal lines as a whole have a tendency to extend in one direction.

[0087] Furthermore, the fact that the extension trend of the second signal line 34 is consistent with the extension trend of the first signal line 33 does not mean that the two signal lines are parallel.

[0088] In the embodiments of this application, such as Figure 6 As shown, by configuring the driver chip 3 to include a second signal line 34 and a third signal line 35, the extension trend of the second signal line 34 is consistent with the extension trend of the first signal line 33, and the extension trend of the third signal line 35 intersects with the extension trend of the second signal line 34; one end of the third signal line 35 is connected to the midpoint of the first signal line 33, and the other end of the third signal line 35 is electrically connected to the second signal line 34. In this way, even with only one input terminal 31 (i.e., without changing the original input terminal design of the driver chip 3), the first output terminal and the first signal line 33 can be connected. The resistance R1 between the midpoints is approximately equal to the resistance R2 between the midpoint of the second output terminal and the first signal line 33. This makes the resistance values ​​R1 and R2 between the output terminals 32 on both sides of the same driver chip 3 (the output terminal 32 near the first side B1 and the output terminal 32 near the second side B2) and the input terminal 31 of the driver chip 3 tend to be the same or identical. This makes the resistance values ​​between different output terminals 32 and the power chip 11 tend to be consistent, reducing the resistance value difference between different output terminals 32 and the power chip 11, thereby improving the problem of uneven brightness of the display module.

[0089] In at least one embodiment of this application, such as Figure 7 As shown, the first signal line 33 and the input terminal 31 are directly connected in contact.

[0090] In at least one embodiment of this application, such as Figure 7 As shown, the driver chip 3 includes two input terminals 31, which are respectively disposed on the first side B1 and the second side B2, and are respectively connected to the two ends of the first signal line 33.

[0091] In the embodiments of this application, by changing the number of input terminals 31 of the common voltage signal in the driver chip 3, an input terminal 31 is respectively set on the first side B1 and the second side B2 of the driver chip 3. This makes the resistance values ​​R1 and R2 between the output terminals 32 on both sides of the same driver chip 3 (the output terminal 32 near the first side B1 and the output terminal 32 near the second side B2) and the input terminal 31 of the driver chip 3 tend to be the same or the same, thereby reducing the resistance value difference between the first output terminal and the second output terminal in the same driver chip 3 and improving the problem of uneven brightness of the display screen of the display module.

[0092] In at least one embodiment of this application, such as Figure 8 As shown, the display module also includes at least one flexible circuit board 2 and at least one power signal transmission line group; the input terminals 31 of the power chip 11, the flexible circuit board 2 and the driver chip 3 are electrically connected in sequence; the number of driver chip 3, flexible circuit board 2 and power signal transmission line group is the same;

[0093] The power signal transmission line group includes at least one power signal transmission line CSL. The power signal transmission line CSL passes through the flexible circuit board 2 from the motherboard 1 and extends to the bonding area BD. The power signal transmission line CSL is electrically connected to the input terminal 31 of the driver chip 3.

[0094] Among them, such as Figure 8 As shown, the number of power signal transmission lines CSL passing through the same flexible circuit board 2 in the power signal transmission line group is the same as the number of input terminals 31 on the same driver chip 3 electrically connected to the flexible circuit board 2.

[0095] For example, such as Figure 8 As shown, there are two power signal transmission lines CSL passing through the same flexible circuit board 2 in the power signal transmission line group, and the number of input terminals 31 of the driver chip 3 electrically connected to the flexible circuit board 2 is two.

[0096] In the embodiments of this application, by designing the number of power signal transmission lines CSL passing through the same flexible circuit board 2 in the power signal transmission line group to be the same as the number of input terminals 31 on the same driver chip 3 electrically connected to the flexible circuit board 2, the portion of the power signal transmission line CSL located on the motherboard 1 and the portion of the power signal transmission line CSL located on the flexible circuit board 2 are changed in accordance with the design of the input terminals 31 of the driver chip 3, thereby reducing the resistance difference between the first output terminal and the second output terminal in the same driver chip 3, thereby improving the problem of uneven brightness of the display screen of the display module.

[0097] In at least one embodiment of this application, combined with Figure 8 and Figure 11 As shown, the bonding area BD is provided with a first bonding part 101 and multiple first connecting lines L1. The first bonding part 101 is located on the side of the driver chip 3 away from the display area AA. The first bonding part 101 is electrically connected to the flexible circuit board 2 and the first connecting lines L1 respectively.

[0098] When the driver chip 3 includes two input terminals 31, the first connection line L1 includes a first part and a second part. The first part of the first connection line L1 is electrically connected to one input terminal 31 and the first bonding part 101, respectively. The second part of the first connection line L1 is electrically connected to the other input terminal 31 and the first bonding part 101, respectively.

[0099] In an exemplary embodiment, the first portion of the first connecting line L1 and the second portion of the first connecting line L1 can be arranged symmetrically.

[0100] It should be noted that, Figure 11 The diagram illustrates the case where the driver chip 3 includes an input terminal 31.

[0101] For example, such as Figure 12 As shown, the motherboard 1 of the display module may also include at least one second bonding part 12, which is bonded to the flexible circuit board 2. Of course, the motherboard 1 may also include a timing controller and a microprocessor (both are collectively labeled 13).

[0102] In at least one embodiment of this application, such as Figure 13 and Figure 14 As shown, the driver chip 3 includes a first storage unit 3A, a second storage unit 3B, a conversion unit 3D, and a touch unit 3C. The first storage unit 3A, the second storage unit 3B, and the touch unit 3C are electrically connected to the conversion unit 3D. The display area AA is also provided with multiple data signal lines DL and multiple pixel driving circuits arranged in an array. One data signal line is electrically connected to the same row of pixel driving circuits. The conversion unit 3D is electrically connected to the data signal line DL and the touch signal line TX.

[0103] The first storage unit 3A is configured to store the display data signal Data signal, the second storage unit 3B is configured to store the common voltage signal, and the touch unit 3C is configured to store the touch signal;

[0104] like Figure 13 As shown, during the display period, the conversion unit 3D is configured to control the conduction between the first storage unit 3A and the data signal line DL, and is also configured to control the conduction between the second storage unit 3B and the touch signal line TX; the display data signal stored in the first storage unit 3A is transmitted to the data signal line DL, and the common voltage signal stored in the second storage unit 3B is transmitted to the common electrode unit 4 (Vcom Sensor) through the touch signal line TX; wherein, Figure 13 The Sout-channel (data line channel) shown outputs the display data signal, and the TX-channel (touch line channel) outputs the common voltage signal.

[0105] like Figure 14 As shown, during the touch phase, the conversion unit 3D is configured to control the touch unit 3C to conduct between the data signal line DL and the touch signal line TX, respectively. Figure 14 The Sout-channel (data line channel) and TX-channel (touch line channel) shown both output scanning square wave signals (Modulation signals).

[0106] For example, if the display module has M rows and N columns of common electrode units 4, the M*N common electrode units 4 can be scanned in one frame of touch time.

[0107] In the embodiments of this application, since the resistance R1 between the first output terminal and the midpoint of the first signal line 33 in the same driver chip 3 is approximately equal to the resistance R2 between the second output terminal and the midpoint of the first signal line 33, during the display stage, even when the polarity of the signal transmitted in the data signal line DL is reversed, and the common electrode unit 4 is pulled in the same direction due to the influence of the signal transmitted in the data signal line DL, the resistance difference between the common voltage signals output from the output terminal 32 of the driver chip 3 to the TX-channel (touch line channel) is very small, reducing the probability of uneven brightness of the display screen, thereby improving the uniformity of the display screen and improving the image quality and display effect.

[0108] In related technologies, when the common voltage signal input terminals of two adjacent driver chips 3 are both located on the same side of the driver chip 3, for example, as Figure 4As shown, the common voltage signal input terminals of the left-hand driver chip 3 and the middle driver chip 3 are both located on the right side. For the left-hand driver chip 3, the touch signal line TX, whose output terminal is closest to its common voltage signal input terminal, has the brightest local area of ​​the displayed image. For the middle driver chip 3, the touch signal line TX, whose output terminal is furthest from its common voltage signal input terminal, has the darkest local area of ​​the displayed image. Thus, the brightest area of ​​the displayed image controlled by the left-hand driver chip 3 is adjacent to the darkest area of ​​the displayed image controlled by the middle driver chip 3, creating a significant contrast and exhibiting uneven brightness between the areas controlled by adjacent driver chips 3 (also known as screen splitting between different driver chips). Figure 5 for Figure 4 A simplified structural diagram of the driver chip 3 on the left and the driver chip 3 in the middle.

[0109] In at least one embodiment of this application, such as Figure 9 As shown, the display module includes at least two driver chips 3 and at least two power signal transmission line groups. Each power signal transmission line group includes at least one power signal transmission line (also known as a Com line). The power signal transmission line passes through the flexible circuit board 2 from the motherboard 1 and extends to the bonding area BD. The power signal transmission line is electrically connected to the input terminal 31 of the driver chip 3.

[0110] Each power signal transmission line includes a first segment XD1, which is mounted on the motherboard 1 and connects the flexible circuit board 2 and the power chip 11. The motherboard 1 also includes a resistor adjustment module 8, and at least a portion of the first segment XD1 is also equipped with a resistor adjustment module 8.

[0111] In at least one embodiment of this application, each first line segment XD1 is provided with a resistance adjustment module 8, the resistance adjustment module 8 including an adjustable resistor.

[0112] In at least one embodiment of this application, each driver chip 3 includes an input terminal 31, such as... Figure 9 As shown, the display module includes a first driver chip (e.g., the driver chip on the left) and a second driver chip (e.g., the driver chip in the middle). The input terminals 31 of the first driver chip and the second driver chip are both located on the first side B1 or both located on the second side B2; that is, the display module includes two driver chips with the input terminals 31 located on the same side.

[0113] like Figure 9As shown, the first driving chip is configured to control the first area A1 in the display area AA, and the second driving chip is configured to control the second area A2 in the display area AA. The initial brightness of the first area A1 is greater than the initial brightness of the second area A2. A resistance adjustment module 8 is provided on the first line segment XD1 that is electrically connected to the first driving chip.

[0114] The initial brightness of the first region A1 and the initial brightness of the second region A2 refer to the brightness when the display module is not equipped with the resistance adjustment module 8; or, they refer to the brightness when the resistance adjustment module 8 has a zero ohm resistance.

[0115] In an exemplary embodiment, the resistance adjustment module 8 includes an adjustable resistor.

[0116] In at least one embodiment of this application, the resistance value of the resistance adjustment module 8 is approximately equal to the internal resistance value of the second driving chip.

[0117] In the embodiments of this application, before setting the resistance adjustment module 8, for the left-hand driving chip 3 (i.e., the first driving chip), the touch signal line TX, which is electrically connected to the output terminal 32 closest to the input terminal 31 of the first driving chip, has the brightest local area of ​​the display screen; for the middle driving chip 3 (i.e., the second driving chip), the touch signal line TX, which is electrically connected to the output terminal 32 farthest from the input terminal 31 of the second driving chip, has the darkest local area of ​​the display screen; the resistance difference between these two output terminals 32 is approximately equal to the internal resistance value of the second driving chip 3; in the embodiments of this application, by setting the resistance value of the resistance adjustment module 8 to be approximately equal to the internal resistance value of the second driving chip, the resistance values ​​between the output terminal 32 closest to the input terminal 31 of the first driving chip and the output terminal 32 farthest from the input terminal 31 of the second driving chip 3 are made to be consistent with the input terminal 31 of their respective driving chips 3, reducing the resistance difference between the output terminals 32 of the two adjacent driving chips 3, thereby improving the problem of uneven brightness of the display screen of the display module.

[0118] In at least one embodiment of this application, at least a portion of the data signal line DL is projected onto the substrate of the display module by an orthographic projection that overlaps with the orthographic projection of the common electrode unit 4 onto the substrate.

[0119] During the touch phase, both the data signal line DL and the touch signal line TX are configured to transmit scanning square wave signals, and the polarity of the scanning square wave signals transmitted by the data signal line DL and the touch signal line TX is the same.

[0120] The meaning of consistent polarity is that the scanning square wave signals transmitted by the data signal line DL and the touch signal line TX are both at a high level during the same time period, and both at a low level during another same time period.

[0121] For example, the amplitudes of the scanning square wave signals transmitted by the data signal line DL and the touch signal line TX can be different.

[0122] In the display module provided in the embodiments of this application, since at least a portion of the data signal line DL's orthographic projection on the substrate of the display module overlaps with the orthographic projection of the common electrode unit 4 on the substrate, a parasitic capacitance is formed between the data signal line DL and the common electrode unit 4. By setting the polarity of the scanning square wave signal transmitted by the data signal line DL and the touch signal line TX to be consistent, it is possible to avoid the negative impact of the signal in the data signal line DL on the touch signal in the common electrode unit 4 when the polarity is reversed, thus avoiding the reduction of signal stability and improving the signal transmission stability while improving the touch performance of the display module.

[0123] Embodiments of this application provide a touch display device, which includes a display module as described above.

[0124] For example, the specific structure of the display module included in the touch display device can be referred to the description above, and will not be repeated here.

[0125] For example, the touch display device can be an ADS (Advanced Super Dimension Switch) type liquid crystal touch display device or a HADS type liquid crystal touch display device.

[0126] The touch display device can be a touch display panel, or any product or component with display function, such as a television, digital camera, mobile phone, or tablet computer, which includes such a touch display panel.

[0127] In the touch display device provided in the embodiments of this application, the resistance value between the first output terminal and the power chip 11 is set to be approximately equal to the resistance value between the second output terminal and the power chip 11; wherein, the first output terminal is the output terminal 32 with the smallest distance to the first side B1, and the second output terminal is the output terminal 32 with the smallest distance to the second side B2; in this way, the internal resistance of the traces or conductive structures transmitting the common voltage signal can be significantly reduced, thereby making the resistance values ​​between different output terminals 32 and the power chip 11 tend to be consistent, reducing the resistance value difference between different output terminals 32 and the power chip 11, thereby improving the problem of uneven brightness of the display module.

[0128] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A display module, wherein, The display module includes a display area and a bonding area located on one side of the display area; the display area is provided with multiple touch signal lines and multiple common electrode units, and the common electrode units are electrically connected to the touch signal lines; the bonding area is provided with at least one driver chip; the display module also includes a motherboard, and the motherboard includes a power chip. The driver chip includes multiple output terminals and at least one input terminal; the output terminals are electrically connected to the touch signal line, and the input terminal is electrically connected to the power supply chip; The driver chip includes a first side and a second side disposed opposite to each other, both the first side and the second side extending along the direction from the display area to the bonding area; Specifically, for the same driver chip, the resistance between the first output terminal of the driver chip and the power chip is approximately equal to the resistance between the second output terminal of the driver chip and the power chip; the first output terminal is the output terminal with the smallest distance to the first side, and the second output terminal is the output terminal with the smallest distance to the second side.

2. The display module according to claim 1, wherein, The driver chip includes a first signal line, which is in contact with all the output terminals and electrically connected to the input terminals; the resistance between the first output terminal and the midpoint of the first signal line is approximately equal to the resistance between the second output terminal and the midpoint of the first signal line.

3. The display module according to claim 2, wherein, The first signal line and the input terminal are electrically connected.

4. The display module according to claim 3, wherein, The driver chip further includes a second signal line and a third signal line, wherein the extension trend of the second signal line is consistent with the extension trend of the first signal line, and the extension trend of the third signal line intersects with the extension trend of the second signal line. One end of the third signal line is connected to the midpoint of the first signal line, and the other end of the third signal line is electrically connected to the second signal line. The input terminal of the driver chip is disposed on one of the first side and the second side, and the input terminal is in contact with one end of the second signal line.

5. The display module according to claim 2, wherein, The first signal line and the input terminal are directly connected in contact.

6. The display module according to claim 5, wherein, The driver chip includes two input terminals, which are respectively disposed on the first side and the second side, and are respectively connected to the two ends of the first signal line.

7. The display module according to claim 4 or 6, wherein, The display module further includes at least one flexible circuit board and at least one power signal transmission line group; the input terminals of the power chip, the flexible circuit board, and the driver chip are electrically connected in sequence; the number of the driver chip, the flexible circuit board, and the power signal transmission line group is the same; The power signal transmission line group includes at least one power signal transmission line, which extends from the motherboard through the flexible circuit board to the bonding area, and is electrically connected to the input terminal of the driver chip. The number of power signal transmission lines passing through the same flexible circuit board in the power signal transmission line group is the same as the number of input terminals on the same driver chip electrically connected to the flexible circuit board.

8. The display module according to claim 7, wherein, The bonding area is provided with a first bonding part and multiple first connecting lines. The first bonding part is located on the side of the driver chip away from the display area. The first bonding part is electrically connected to the flexible circuit board and the first connecting lines respectively. In the case where the driver chip includes two input terminals, the first connection line includes a first part and a second part. The first part of the first connection line is electrically connected to one of the input terminals and the first bonding part, respectively, and the second part of the first connection line is electrically connected to the other input terminal and the first bonding part, respectively.

9. The display module according to claim 7, wherein, The driver chip includes a first storage unit, a second storage unit, a conversion unit, and a touch unit. The first storage unit, the second storage unit, and the touch unit are electrically connected to the conversion unit. The display area is also provided with multiple data signal lines and multiple pixel driving circuits arranged in an array. One data signal line is electrically connected to the same row of pixel driving circuits. The conversion unit is electrically connected to both the data signal lines and the touch signal lines. The first storage unit is configured to store display data signals, the second storage unit is configured to store common voltage signals, and the touch unit is configured to store touch signals; During the display phase, the conversion unit is configured to control the conduction between the first storage unit and the data signal line, and is also configured to control the conduction between the second storage unit and the touch signal line; During the touch phase, the conversion unit is configured to control the touch unit to conduct between the data signal line and the touch signal line, respectively.

10. The display module according to claim 1, wherein, The display module includes at least two driver chips and at least two power signal transmission line groups. Each power signal transmission line group includes at least one power signal transmission line. The power signal transmission line extends from the motherboard through the flexible circuit board to the bonding area. The power signal transmission line is electrically connected to the input terminal of the driver chip. Each of the power signal transmission lines includes a first segment, which is disposed on the motherboard and connects the flexible circuit board and the power chip; the motherboard also includes a resistance adjustment module, and at least a portion of the first segment is also provided with a resistance adjustment module.

11. The display module according to claim 10, wherein, Each of the first line segments is provided with the resistance adjustment module, and the resistance adjustment module includes an adjustable resistor.

12. The display module according to claim 10, wherein, Each of the driver chips includes an input terminal, and the display module includes a first driver chip and a second driver chip, wherein the input terminals of the first driver chip and the second driver chip are both located on the first side or both are located on the second side; The first driving chip is configured to control a first area in the display area, and the second driving chip is configured to control a second area in the display area, wherein the initial brightness of the first area is greater than the initial brightness of the second area; The resistance adjustment module is provided on the first line segment that is electrically connected to the first driver chip.

13. The display module according to claim 12, wherein, The resistance value of the resistance adjustment module is approximately equal to the internal resistance value of the second driver chip.

14. The display module according to claim 9, wherein, At least a portion of the data signal line's orthographic projection on the substrate of the display module overlaps with the orthographic projection of the common electrode unit on the substrate; During the touch control phase, both the data signal line and the touch signal line are configured to transmit scanning square wave signals, and the polarity of the scanning square wave signals transmitted by the data signal line and the touch signal line is the same.

15. A touch display device, wherein, Includes the display module as described in any one of claims 1-14.

Citation Information

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