Optical switches and optical communication network switching chips

Abstract

The present application relates to an optical switch and an optical communication network switching chip. The optical switch comprises: a substrate, a first insulating layer and a phase shift layer stacked in sequence; the phase shift layer comprises a first positive doping region, a first multimode interferometer and a first negative doping region, the first multimode interferometer is a ridge waveguide, and the ridge waveguide is at least partially an intrinsic semiconductor; the first positive doping region and the first negative doping region are located on both sides of the ridge waveguide, and the first positive doping region, the ridge waveguide and the first negative doping region form a first PIN phase shifter for switching the switch state of the optical switch; the ridge waveguide comprises a first input waveguide, a second input waveguide, a first output waveguide and a second output waveguide, the first input waveguide and the second input waveguide are located on the first side of the ridge waveguide, the first output waveguide and the second output waveguide are located on the second side of the ridge waveguide, the first input waveguide is opposite to the first output waveguide, and the second input waveguide is opposite to the second output waveguide. The present application can improve the switching speed of the optical switch and reduce the optical loss.

Description

Technical Field

[0001] The present invention relates to the technical field of optical communication, and in particular to an optical switch and an optical communication network switching chip. Background Art

[0002] In the related technology, silicon optical switches are mainly based on the thermo-optical effect, and often include micro-ring resonators. This modulation method has a very slow rate, resulting in the switching time of the optical switch being at least tens of microseconds. Moreover, the modulation bandwidth is low and the loss is large, which cannot meet the demand. Summary of the invention

[0003] The purpose of the present application is to provide an optical switch and an optical communication network switching chip, which can increase the switching speed of the optical switch, reduce optical loss, and increase the spectral bandwidth to hundreds of nanometers.

[0004] According to a first aspect of an embodiment of the present application, there is provided an optical switch, comprising: a substrate, a first insulating layer and a phase shifting layer;

[0005] The first insulating layer is located on the substrate, and the phase shift layer is located on a side of the first insulating layer away from the substrate;

[0006] The phase shift layer includes a first positive doping region, a first multimode interferometer and a first negative doping region, the first multimode interferometer is a ridge waveguide, and the ridge waveguide is at least partially an intrinsic semiconductor; the first positive doping region and the first negative doping region are located on both sides of the ridge waveguide, and the first positive doping region, the ridge waveguide and the first negative doping region form a first PIN phase shifter for switching the on state and the off state of the optical switch; the ridge waveguide includes a first input waveguide, a second input waveguide, a first output waveguide and a second output waveguide, the first input waveguide and the second input waveguide are located on a first side of the ridge waveguide, the first output waveguide and the second output waveguide are located on a second side of the ridge waveguide, the first side is opposite to the second side, the first input waveguide is opposite to the first output waveguide, and the second input waveguide is opposite to the second output waveguide;

[0007] When the optical switch is in a closed state, the ridge waveguide allows light incident from the first input waveguide to be emitted from the second output waveguide and light incident from the second input waveguide to be emitted from the first output waveguide; when the optical switch is in an open state, the ridge waveguide allows light incident from the first input waveguide to be emitted from the first output waveguide and light incident from the second input waveguide to be emitted from the second output waveguide.

[0008] In one embodiment, when the optical switch is in a closed state, the self-imaging point of the entry point of the first multi-mode interferometer is a second antisymmetric image point, wherein the entry point is the position of the first input waveguide or the second input waveguide, and the second antisymmetric image point is a second antisymmetric image point of the entry point in a direction from the first input waveguide to the first output waveguide;

[0009] When the optical switch is in an on state, the self-imaging point of the entry point of the first multimode interferometer is a first symmetrical image point, and the first symmetrical image point is the first symmetrical image point of the entry point in a direction from the first input waveguide to the first output waveguide.

[0010] In one embodiment, the ridge waveguide includes a ridge, a first wing and a second wing, the first wing is located between the ridge and the first positively doped region, the second wing is located between the ridge and the first negatively doped region, the height of the first wing is the same as the height of the second wing, and the height of the first wing is less than the height of the ridge.

[0011] In one embodiment, the ridge, the first wing, and the second wing are all intrinsic semiconductors.

[0012] In one embodiment, the first positively doped region is a heavily positively doped region, and the first negatively doped region is a heavily negatively doped region;

[0013] The first wing is a shallow positive doped region, and the second wing is a shallow negative doped region;

[0014] The doping concentration of the first positively doped region is greater than the doping concentration of the first wing, and the doping concentration of the first negatively doped region is greater than the doping concentration of the second wing.

[0015] In one embodiment, the doping concentration of the first positive doping region and the doping concentration of the first negative doping region are both greater than 10 18 cm -3 The doping concentration of the first wing portion and the doping concentration of the second wing portion are respectively less than 10 18 cm -3 .

[0016] In one embodiment, the optical switch further comprises a second insulating layer, a first electrode, a second electrode, a third electrode, a first conductive portion, and a second conductive portion;

[0017] The second insulating layer is located on a side of the phase-shifting layer away from the first insulating layer, and the first electrode, the second electrode and the third electrode are located on a side of the second insulating layer away from the first insulating layer;

[0018] The second insulating layer is provided with a first through hole and a second through hole; the first conductive portion is located in the first through hole, and the first conductive portion is used to connect the first electrode and the first positive doping region; the second conductive portion is located in the second through hole, and the second conductive portion is used to connect the second electrode and the first negative doping region;

[0019] The third electrode is located between the first electrode and the second electrode, and a projection of the third electrode on the second insulating layer is located within a projection of the ridge waveguide on the second insulating layer. The third electrode is used to heat the ridge waveguide.

[0020] In one embodiment, the material of the first electrode is metal, the material of the second electrode is metal, and the material of the third electrode is titanium nitride.

[0021] In one embodiment, the optical switch further includes a first air wall, wherein the first air wall surrounds the first PIN phase shifter and the ridge waveguide.

[0022] In one embodiment, the optical switch further comprises a second air wall, a cantilever arm and an air bottom groove;

[0023] The second air wall surrounds the first PIN phase shifter and the ridge waveguide, the cantilever arm is located between the first insulating layer and the phase shift layer, and is located in the second air wall, the air bottom groove is opened on the substrate, and is located between the first insulating layer and the substrate, and the second air wall is connected to the air bottom groove.

[0024] In one embodiment, the material of the substrate is silicon; the material of the first insulating layer and the material of the second insulating layer are silicon dioxide respectively; and the material of the intrinsic semiconductor is silicon.

[0025] In one embodiment, the ridge waveguide is a thermo-optical phase shifter.

[0026] According to a second aspect of an embodiment of the present application, an optical communication network switching chip is provided, comprising an optical switch having M rows and N columns, N optical input ports and M optical output ports, where M is a positive integer and N is a positive integer, and the optical switch is the optical switch described in the first aspect above;

[0027] For the N optical switches in the first row, the first input waveguides of the optical switches are respectively connected to the N light incident ports in a one-to-one correspondence;

[0028] For the optical switches in the j1th column, the second input waveguides of the optical switches are respectively connected to the first output waveguides of the optical switches in the j1+1th column; the value range of j1 is 1 to N-1;

[0029] For the optical switch in the j2th column, the second output waveguide of the optical switch in the ith row is connected to the first input waveguide of the optical switch in the i+1th row, where i ranges from 1 to M and j2 ranges from 1 to N;

[0030] For the optical switches in the first column, the first output waveguides of the optical switches are connected to the M optical output ports in a one-to-one correspondence.

[0031] In one embodiment, each of the optical switches further includes: a first optical power monitoring device and a second optical power monitoring device, wherein the first optical power monitoring device is used to monitor the power of the output light of the first output waveguide, and the second optical power monitoring device is used to detect the power of the output light of the second output waveguide.

[0032] In one implementation, the optical switch in the Nth column further includes a third optical power monitoring device, which is located at the incident port of the second input waveguide and is used to detect the power of incident light of the second input waveguide.

[0033] In one implementation, for the optical switches in the Mth row, the second optical power monitoring device is located at an exit of the second output waveguide.

[0034] In one embodiment, for the first optical power monitoring device of the optical switch in rows 1 to M, the first optical power monitoring device includes a first photodetector and a first optical splitter, one end of the first optical splitter is close to the first output waveguide with a gap, and the other end is connected to the first photodetector;

[0035] For the second optical power monitoring device of the optical switches in rows 1 to M-1, the second optical power monitoring device includes a second photodetector and a second optical splitter, one end of the second optical splitter is close to the second output waveguide with a gap, and the other end is connected to the second photodetector.

[0036] In one embodiment, the material of the first photodetector includes Si, Ge or InP;

[0037] The material of the second photodetector includes Si, Ge or InP.

[0038] Compared with the prior art, the beneficial effect of the present application is that: since the optical switch includes a substrate, a first insulating layer and a phase shift layer, the phase shift layer includes a first positive doping region, a first multimode interferometer and a first negative doping region, the first multimode interferometer is a ridge waveguide, and the ridge waveguide is at least partially an intrinsic semiconductor. When the optical switch is in a closed state, the intrinsic semiconductor is not doped, and no additional loss is caused by the carrier absorption effect. Moreover, the first positive doping region and the first negative doping region are located on both sides of the ridge waveguide, and the first positive doping region, the ridge waveguide and the first negative doping region form a first PIN phase shifter for switching the on state and the off state of the optical switch, and the on state and the off state of the optical switch can be quickly switched to improve the switching speed of the optical switch. The ridge waveguide includes a first input waveguide, a second input waveguide, a first output waveguide and a second output waveguide, wherein the first input waveguide and the second input waveguide are located on a first side of the ridge waveguide, the first output waveguide and the second output waveguide are located on a second side of the ridge waveguide, the first side is opposite to the second side, the first input waveguide is opposite to the first output waveguide, and the second input waveguide is opposite to the second output waveguide. When the optical switch is in a closed state, the ridge waveguide allows light incident from the first input waveguide to be emitted from the second output waveguide and light incident from the second input waveguide to be emitted from the first output waveguide. When the optical switch is in an open state, the ridge waveguide allows light incident from the first input waveguide to be emitted from the first output waveguide and light incident from the second input waveguide to be emitted from the second output waveguide. In this way, when a plurality of optical switches are used to form an optical switch array, it can be achieved that when the optical switch array is in an open state, only one optical switch in the optical switch array is in an open state. Since optical loss is introduced only when the optical switch is in an open state, the loss of the optical switch array can be greatly reduced, which is conducive to realizing large-scale switches using optical switches. Moreover, since the optical switch does not use a microring resonator, the spectral bandwidth can be increased to hundreds of nanometers. In summary, the technical solution of the present application can increase the switching speed of the optical switch, reduce the optical loss of the optical switch, and increase the spectral bandwidth to hundreds of nanometers. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] Figure 1 It is a structural schematic diagram of an optical link switching chip according to the relevant technology.

[0040] Figure 2 It is a structural schematic diagram of an optical switch according to the related art.

[0041] Figure 3 It is a structural schematic diagram of an optical switch according to the related art.

[0042] Figure 4 The diagram is a schematic diagram of the structure of an optical communication network switching chip according to an exemplary embodiment.

[0043] Figure 5The figure is a schematic diagram showing the structure of an optical switch according to an exemplary embodiment.

[0044] Figure 6 The figure is a schematic diagram of imaging when an optical switch is in a closed state according to an exemplary embodiment.

[0045] Figure 7 The figure is a schematic diagram of imaging when an optical switch is in an on state according to an exemplary embodiment.

[0046] Figure 8 is a schematic structural diagram of an optical switch according to another exemplary embodiment.

[0047] Fig. 9A and Fig. 9B is a schematic structural diagram of an optical switch according to another exemplary embodiment.

[0048] Fig.10 is a schematic structural diagram of an optical switch according to another exemplary embodiment.

[0049] Fig.11 is a schematic structural diagram of an optical switch according to another exemplary embodiment.

[0050] Fig. 12A and 12B is a schematic structural diagram of an optical switch according to another exemplary embodiment. DETAILED DESCRIPTION

[0051] Unless otherwise defined, the technical terms or scientific terms used in this specification and claims shall have the usual meanings understood by persons with ordinary skills in the technical field to which the invention belongs. The specific embodiments of the present invention will be described below in conjunction with the accompanying drawings. It should be noted that in the specific description of these embodiments, in order to provide a concise description, it is impossible for this specification to provide a detailed description of all the features of the actual embodiments. Without departing from the spirit and scope of the present invention, those skilled in the art may modify and replace the embodiments of the present invention, and the resulting embodiments are also within the scope of protection of the present invention.

[0052] In related technologies, such as Figure 1As shown, the 7*8 optical link switching chip based on the Cross-bar (cross switch matrix or vertical and horizontal switching matrix) architecture includes 7 rows and 8 columns of silicon optical switches 11. In the silicon optical switch 11 in the bottom row, each silicon optical switch 11 is connected to one of the input terminals I1, I2, I3, I4, I5, I6, I7 and I8, and the silicon optical switch 11 in the leftmost column is connected to one of the output terminals O1, O2, O3, O4, O5, O6 and O7. When the silicon optical switch 11 is closed, the silicon optical switch 11 allows light to be transmitted from bottom to top, or from right to left. When the silicon optical switch 11 is turned on, the silicon optical switch 11 allows light incident from below to be transmitted to the left.

[0053] like Figure 2 As shown, the silicon optical switch 11 includes a control electrode (CE), a common ground, a heating element H, a multi-mode interferometer crossing structure (MMI crossing), an input bus (Input Bus), an output bus (Output Bus), a waveguide WG, an optical input, and an optical output. When the silicon optical switch 11 is closed, no electricity is passed between the control electrode and the common ground to heat the waveguide, and light is transmitted from bottom to top, or from right to left. When the silicon optical switch 11 is turned on, electricity is passed between the control electrode and the common ground to heat the waveguide WG, so that the frequency of the microring resonator in the waveguide WG is the frequency of the transmitted light. At this time, when the light is transmitted from bottom to top, it is coupled into the microring resonator for transmission, and after being coupled out in the right coupling area, it is transmitted downward, and is transmitted to the left through the multi-mode interferometer crossing structure.

[0054] The above silicon optical switch 11 has the following two defects:

[0055] (1) Slow switching speed. The switching in the above case is based on the thermo-optical effect, and the switching time is only 17ms.

[0056] (2) Low spectral bandwidth. The above case uses a microring resonator, and the spectral bandwidth is only 100 GHz.

[0057] In related technologies, such as Figure 3As shown, another optical switch includes a first electrode E1, a second electrode E2, a first multimode interferometer MMI1, a second multimode interferometer MMI2 and a second PIN phase shifter PPS. Each multimode interferometer in the second multimode interferometer MMI2 and the first multimode interferometer MMI1 includes an L-type phase shifter LPS. The second PIN phase shifter PPS includes a first heavily positive doped region 31, a first intrinsic region 32 and a first heavily negative doped region 33. When a first voltage is applied to the second PIN phase shifter, the output light is 10; when a second voltage is applied, the output light is 01.

[0058] The solution based on the optical switch has the following two defects:

[0059] (1) Large loss. Whether the optical switch outputs 10 or 01, there will be large loss. In the case of a 32*32 optical switch matrix network structure based on the Benes architecture, the loss is 12.9dB, because all optical switches must remain in the open state when the network structure is working. Moreover, the more optical switches in the network structure, the greater the loss. The above defects of the Benes architecture cannot be solved. The large loss here refers to the absorption loss caused by the absorption of a large number of carriers.

[0060] (2) External temperature changes or process deviations can cause L-shifter failure. In order to compensate for the phase deviation caused by external temperature changes or process deviations, the optical switch can only use the second PIN phase shifter PPS for compensation. However, when using the second PIN phase shifter PPS for phase compensation, additional loss will be introduced, resulting in unstable optical power.

[0061] In order to solve the above technical problems, the present application proposes an optical switch and an optical communication network switching chip, which can improve the switching speed, reduce optical loss and increase the spectral bandwidth.

[0062] An embodiment of the present application provides an optical communication network switching chip. The optical communication network switching chip can be applied to an optical communication system. Figure 4 The optical communication network switching chip may include an optical switch 41 with M rows and N columns, N optical input ports IN1, IN2, IN3, and M optical output ports OUT1, OUT2, OUT3. M is a positive integer, and N is a positive integer.

[0063] In this embodiment, M is 3 and N is 3. The optical communication network switching chip may include 3 rows and 3 columns of optical switches 41, 3 optical input ports IN1, IN2, IN3 and 3 optical output ports OUT1, OUT2, OUT3.

[0064] Before introducing the optical communication network switching chip, the optical switch 41 is first introduced.

[0065] In this embodiment, if Figure 4 As shown, the optical switch 41 includes a first PIN phase shifter 411 and a first multi-mode interferometer 412 .

[0066] In this embodiment, the first PIN phase shifter 411 is used to quickly switch the on state and the off state of the optical switch 41. In this embodiment, the switching speed of the optical switch 41 can be increased to nanosecond level, which greatly improves the switching speed of the optical switch 41.

[0067] In this embodiment, the first multi-mode interferometer 412 is a ridge waveguide, which is a thermo-optical phase shifter.

[0068] In this embodiment, the ridge waveguide (Rib type waveguide) includes a first input waveguide in1, a second input waveguide in2, a first output waveguide out1 and a second output waveguide out2. The first input waveguide in1 and the second input waveguide in2 are located on a first side of the ridge waveguide, the first output waveguide out1 and the second output waveguide out2 are located on a second side of the ridge waveguide, the first side is opposite to the second side, the first input waveguide in1 is opposite to the first output waveguide out1, and the second input waveguide in2 is opposite to the second output waveguide out2.

[0069] When the optical switch 41 is in the closed state, the ridge waveguide allows light incident from the first input waveguide in1 to exit from the second output waveguide out2 and light incident from the second input waveguide in2 to exit from the first output waveguide out1.

[0070] When the optical switch 41 is in an on state, the ridge waveguide allows light incident from the first input waveguide in1 to exit from the first output waveguide out1 and light incident from the second input waveguide in2 to exit from the second output waveguide out2 .

[0071] In this embodiment, if Figure 5 As shown, the optical switch 41 includes: a substrate 51, a first insulating layer 52, a phase shift layer 53, a second insulating layer 54, a first electrode 55, a second electrode 56, a third electrode 57, a first conductive part 58 and a second conductive part 59. Figure 5 for Figure 4 Section view along section line AA.

[0072] In this embodiment, if Figure 5 As shown, the substrate 51 is used to support the components thereon. The material of the substrate 51 may be silicon, but is not limited thereto.

[0073] In this embodiment, if Figure 5 As shown, the first insulating layer 52 is located on the substrate 51 , and the material of the first insulating layer 52 may be silicon dioxide, but is not limited thereto.

[0074] In this embodiment, if Figure 5 As shown, the phase shift layer 53 is located on a side of the first insulating layer 52 away from the substrate 51. The phase shift layer 53 includes a first positive doping region 531, a ridge waveguide and a first negative doping region 532.

[0075] In this embodiment, if Figure 5 As shown, the first positive doping region 531 and the first negative doping region 532 are located at two sides of the ridge waveguide, and the first positive doping region 531 , the ridge waveguide and the first negative doping region 532 form a first PIN phase shifter 411 .

[0076] In this embodiment, the ridge waveguide is an intrinsic semiconductor, and the material is silicon (Si). When the optical switch 41 is in the off state, the intrinsic semiconductor is not doped, and no additional loss is caused by the carrier absorption effect.

[0077] like Figure 5 As shown, the ridge waveguide includes a ridge 4121, a first wing 4122 and a second wing 4123, the first wing 4122 is located between the ridge 4121 and the first positively doped region 531, the second wing 4123 is located between the ridge 4121 and the first negatively doped region 532, the height of the first wing 4122 is the same as the height of the second wing 4123, and the height of the first wing 4122 is less than the height of the ridge 4121.

[0078] In this embodiment, the ridge 4121 , the first wing 4122 , and the second wing 4123 are all intrinsic semiconductors.

[0079] In this embodiment, the first positive doping region 531 is a heavily positive doping region, and the first negative doping region 532 is a heavily negative doping region. The doping concentration of the first positive doping region 531 and the doping concentration of the first negative doping region 532 are both greater than 10 18 cm -3 .

[0080] In this embodiment, if Figure 5 As shown, the second insulating layer 54 is located on a side of the phase shift layer 53 away from the first insulating layer 52. The material of the second insulating layer 54 may be silicon dioxide, but is not limited thereto.

[0081] In this embodiment, if Figure 5 As shown, the first electrode 55 , the second electrode 56 and the third electrode 57 are located on a side of the second insulating layer 54 away from the first insulating layer 52 .

[0082] In this embodiment, if Figure 5As shown, a first through hole (not shown) and a second through hole (not shown) are provided on the second insulating layer 54. The first conductive portion 58 is located in the first through hole, and the first conductive portion 58 is used to connect the first electrode 55 and the first positive doping region 531. The second conductive portion 59 is located in the second through hole, and the second conductive portion 59 is used to connect the second electrode 56 and the first negative doping region 532.

[0083] The third electrode 57 is located between the first electrode 55 and the second electrode 56 , and a projection of the third electrode 57 on the second insulating layer 54 is located within a projection of the ridge waveguide on the second insulating layer 54 . The third electrode 57 is used to heat the ridge waveguide.

[0084] In this embodiment, the material of the first electrode 55 is metal, the material of the second electrode 56 is metal, and the material of the third electrode 57 is titanium nitride.

[0085] When the optical switch 41 is in the off state, Figure 6 As shown, the self-imaging point of the first multimode interferometer 412 is the second antisymmetric image point, allowing the light incident from the first input waveguide in1 to be emitted from the second output waveguide out2 and the light incident from the second input waveguide in2 to be emitted from the first output waveguide out1. The second antisymmetric image point is the second antisymmetric image point in the direction from the first input waveguide in1 to the first output waveguide out1. Figure 6 In the figure, the entry point is the light incident position, that is, the position of the first input waveguide in1 or the second input waveguide in2. There are two antisymmetric image points in the self-imaging point of the entry point: the first antisymmetric image point and the second antisymmetric image point. The first antisymmetric image point and the second antisymmetric image point are arranged in sequence in the direction from the first input waveguide in1 to the first output waveguide out1. Figure 6 It is a simulation image when the optical switch 41 is in the closed state. Since the grayscale image cannot present effective information, a color image is used.

[0086] Since silicon is a temperature-sensitive material, changes in the ambient temperature will change the refractive index of silicon. At this time, the ambient temperature can be controlled by heating the third electrode 57, thereby offsetting the effect of the ambient temperature change on the device. When the working environment temperature changes, the optical loss on the optical communication network switching chip does not change significantly.

[0087] When the optical switch 41 is in the on state, Figure 7 As shown, the self-imaging point of the entrance point of the first multimode interferometer 412 is the first symmetrical image point, allowing the light incident from the first input waveguide in1 to be emitted from the first output waveguide out1 and the light incident from the second input waveguide in2 to be emitted from the second output waveguide out2. The first symmetrical image point is the first symmetrical image point in the direction from the first input waveguide in1 to the first output waveguide out1. Figure 7 It is a simulation image when the optical switch 41 is in the on state. Since the grayscale image cannot present effective information, a color image is used.

[0088] In this way, when a plurality of optical switches 41 are used to form an optical switch array (such as the above-mentioned optical switch array of 3 rows and 3 columns), it can be realized that when the optical switch 41 array is in the on state, only one optical switch 41 in the optical switch 41 array is in the on state. Since light loss is introduced only when the optical switch 41 is in the on state, and when the optical switch 41 is in the off state, no carrier absorption loss is introduced. Therefore, the loss of the optical switch 41 array can be greatly reduced, which is conducive to realizing large switches using the optical switch 41. For example, it is possible to expand the size of the optical switch 41 array from 2*2 to large switches such as 200*200 and 500*500.

[0089] The fast switching of the switch state of the optical switch 41 between the on state and the off state requires the use of the first PIN phase shifter 411. The characteristic point is that in the off state, the middle area of ​​the ridge waveguide is not doped, and no additional loss is caused by the carrier absorption effect. The first positive doping region 531 connected to the first electrode 55 and the first negative doping region 532 connected to the second electrode 56 are heavily doped. After the first electrode 55 and the second electrode 56 are energized, a positive voltage is applied to the first positive doping region 531, and a negative voltage is applied to the first negative doping region 532, the carriers move to the middle, so that the refractive index of the ridge waveguide decreases. After the conditions for the on state of the optical switch 41 are met, the optical switch 41 reaches the on state.

[0090] Since the optical switch 41 does not use a microring resonator, the spectral bandwidth can be increased to a hundred nanometer level.

[0091] The optical switch 41 is introduced above, and the optical communication network switching chip is introduced below.

[0092] like Figure 4 As shown, the optical communication network switching chip includes 3 rows and 3 columns of optical switches 41, the first row ROW1, the second row ROW2 and the third row ROW3 are arranged from bottom to top, and the first column COL1, the second column COL2 and the third column COL3 are arranged from left to right.

[0093] like Figure 4As shown, for the three optical switches 41 in the first row ROW1, the first input waveguides in1 of the three optical switches 41 are connected to the three optical incident ports IN1, IN2, and IN3 in a one-to-one correspondence. For example, the first input waveguide in1 of the optical switch 41 in the first row ROW1 and the first column COL1 is connected to the optical incident port IN1, the first input waveguide in1 of the optical switch 41 in the first row ROW1 and the second column COL2 is connected to the optical incident port IN2, and the first input waveguide in1 of the optical switch 41 in the first row ROW1 and the third column COL3 is connected to the optical incident port IN3.

[0094] For the optical switches 41 in the j1th column, the second input waveguides in2 of the three optical switches 41 are respectively connected to the first output waveguides out1 of the three optical switches 41 in the j1+1th column; the value range of j1 is 1 to 2. For example, the second input waveguide in2 of the optical switch 41 in the 1st row ROW1 and the 1st column COL1 is connected to the first output waveguide out1 of the optical switch 41 in the 1st row ROW1 and the 2nd column COL1, and the second input waveguide in2 of the optical switch 41 in the 1st row ROW1 and the 2nd column COL2 is connected to the first output waveguide out1 of the optical switch 41 in the 1st row ROW1 and the 3rd column COL3.

[0095] For the optical switch 41 in the j2th column, the second output waveguide out2 of the optical switch 41 in the ith row is connected to the first input waveguide in1 of the optical switch 41 in the i+1th row, where i ranges from 1 to 3 and j2 ranges from 1 to 3. For example, the second output waveguide out2 of the optical switch 41 in the 1st row ROW1 and the 1st column COL1 is connected to the first input waveguide in1 of the optical switch 41 in the 2nd row ROW2 and the 1st column COL1, and the second output waveguide out2 of the optical switch 41 in the 2nd row ROW1 and the 1st column COL1 is connected to the first input waveguide in1 of the optical switch 41 in the 3rd row ROW3 and the 1st column COL1.

[0096] For the optical switch 41 in the first column COL1, the first output waveguide out1 of the optical switch 41 is connected to the three optical output ports OUT1, OUT2, and OUT3 in a one-to-one correspondence. For example, the first output waveguide out1 of the optical switch 41 in the first row ROW1 and the first column COL1 is connected to the optical output port OUT1, the first output waveguide out1 of the optical switch 41 in the second row ROW2 and the first column COL1 is connected to the optical output port OUT2, and the first output waveguide out1 of the optical switch 41 in the third row ROW3 and the first column COL1 is connected to the optical output port OUT3.

[0097] In this embodiment, the optical input ports IN1, IN2, and IN3 are respectively used to input three paths of light, and the optical output ports OUT1, OUT2, and OUT3 are respectively used to input three paths of light. When the optical communication network switching chip is in the on state, only one optical switch 41 needs to be in the on state, and the other optical switches 41 are in the off state. For example, when the light incident from the optical input port IN3 needs to be emitted from the optical output port OUT2, only the optical switch 41 in the second row and the third column can be in the on state, and the other optical switches 41 are in the off state. Since optical loss is introduced only when the optical switch 41 is in the on state, the loss of the optical switch 41 array can be greatly reduced, which is conducive to the use of the optical switch 41 to realize a large switch.

[0098] In this embodiment, if Figure 4 As shown, each optical switch 41 further includes a first optical power monitoring device 413 and a second optical power monitoring device 414. The first optical power monitoring device 413 is used to monitor the power of the output light of the first output waveguide out1, and the second optical power monitoring device 414 is used to detect the power of the output light of the second output waveguide out2. The first optical power monitoring device 413 is used to monitor the light output state of the first output waveguide out1, and the second optical power monitoring device 414 is used to monitor the light output state of the second output waveguide out2, that is, the first optical power monitoring device 413 and the second optical power monitoring device 414 are used to monitor the switch state of the optical switch 41.

[0099] In this embodiment, if Figure 4 As shown, the optical switch 41 of the third column COL3 further includes a third optical power monitoring device 415. The third optical power monitoring device 415 is located at the incident port of the second input waveguide in2 and is used to detect the power of the incident light of the second input waveguide in2.

[0100] In this embodiment, if Figure 4 As shown, for the third row ROW3 optical switch 41, the second optical power monitoring device 414 is located at the exit of the second output waveguide out2, or in other words, the second optical power monitoring device 414 is directly opposite to the exit of the second output waveguide out2.

[0101] In this embodiment, if Figure 4As shown, for the first optical power monitoring device 413 of the optical switches 41 in rows 1 to 3, the first optical power monitoring device 413 includes a first photodetector P1 and a first optical splitter S1, one end of the first optical splitter S1 is close to the first output waveguide out1 and there may be a gap, and the other end is connected to the first photodetector P1. The first optical splitter S1 can use the evanescent wave coupling principle to couple a small amount of light (generally less than 5% of the light emitted from the first output waveguide out1) from the first output waveguide out1, and then detect the optical power through the first photodetector P1. The first photodetector P1 can absorb and detect the light incident therein.

[0102] In other embodiments, the first optical power monitoring device 413 is not limited to the first photodetector P1 and the first optical splitter S1. For example, one end of the first optical splitter S1 may be in contact with the first output waveguide out1, and the other end may be connected to the first photodetector P1.

[0103] For the second optical power monitoring device 414 of the first to second row optical switch 41, the second optical power monitoring device 414 includes a second photodetector P2 and a second optical splitter S2, one end of the second optical splitter S2 is close to the second output waveguide out2 with a gap, and the other end is connected to the second photodetector P2. The second optical splitter S2 can use the evanescent wave coupling principle to couple a small portion of light (generally less than 5% of the light emitted from the second output waveguide out2) from the second output waveguide out2, and then detect the optical power through the second photodetector P2. The second photodetector P2 can absorb and detect the light incident therein.

[0104] In this embodiment, the material of the first photodetector P1 may include Si. In other embodiments, the material of the first photodetector P1 may include Ge or InP.

[0105] In this embodiment, the material of the second photodetector P2 includes Si. In other embodiments, the material of the second photodetector P2 may include Ge or InP.

[0106] In this embodiment, since the first multimode interferometer 412 is a ridge waveguide, the ridge waveguide is at least partially an intrinsic semiconductor. When the optical switch 41 is in the closed state, the intrinsic semiconductor is not doped, and no additional loss is caused by the carrier absorption effect. Moreover, when the optical switch 41 is in the closed state, the ridge waveguide allows the light incident from the first input waveguide in1 to be emitted from the second output waveguide out2 and the light incident from the second input waveguide in2 to be emitted from the first output waveguide out1. When the optical switch 41 is in the open state, the ridge waveguide allows the light incident from the first input waveguide in1 to be emitted from the first output waveguide out1 and the light incident from the second input waveguide in2 to be emitted from the second output waveguide out2. In this way, when the optical switch 41 array is in the open state, only one optical switch 41 in the optical switch 41 array is in the open state. Since optical loss is introduced only when the optical switch 41 is in the open state, the loss of the optical switch 41 array can be greatly reduced, which is conducive to the use of the optical switch 41 to realize a large switch. In summary, the technical solution of the present application can improve the switching speed of the optical switch 41 and reduce the optical loss of the optical switch 41.

[0107] Another exemplary embodiment of the present application also provides an optical communication network switching chip. Figure 8 As shown, the optical switch 41 further includes a first air wall 81, which surrounds the first PIN phase shifter 411 and the ridge waveguide. The first air wall 81 is located on the first insulating layer 52, the phase shift layer 53, the second insulating layer 54 and a portion of the substrate 51. The first air wall 81 is used for heat insulation, reducing the heat loss when the third electrode 57 heats the ridge waveguide, and can increase the modulation efficiency of the third electrode 57 (heating electrode).

[0108] Another exemplary embodiment of the present application also provides an optical communication network switching chip. Fig. 9A and Fig. 9B As shown, in this embodiment, the optical switch 41 further includes a second air wall 91, a cantilever arm 92 and an air bottom groove 93. Fig. 9A is a cross-sectional view of a position other than the cantilever arm 92, Fig. 9B It is a cross-sectional view at the position of the cantilever arm 92.

[0109] The second air wall 91 surrounds the first PIN phase shifter 411 and the ridge waveguide. The cantilever arm 92 is located on the first insulating layer 52, the phase shift layer 53 and the second insulating layer 54, and is located in the second air wall 91. The cantilever arm 92 is used to support the first PIN phase shifter 411, the ridge waveguide, the first electrode 55, the second electrode 56, the third electrode 57 and the second insulating layer 54.

[0110] The air bottom groove 93 is opened on the substrate 51 and is located between the first insulating layer 52 and the substrate 51 . The second air wall 91 is connected to the air bottom groove 93 .

[0111] In this embodiment, the second air wall 91 and the air bottom groove 93 are used for heat insulation, reducing the heat loss when the third electrode 57 heats the ridge waveguide, and can increase the modulation efficiency of the third electrode 57 (heating electrode).

[0112] Another exemplary embodiment of the present application also provides an optical communication network switching chip. Fig.10 As shown, in this embodiment, the first positive doping region 531 is a heavily positive doping region, and the first negative doping region 532 is a heavily negative doping region. The first wing 4122 is a shallow positive doping region, and the second wing 4123 is a shallow negative doping region. The doping concentration of the first positive doping region 531 is greater than the doping concentration of the first wing 4122, and the doping concentration of the first negative doping region 532 is greater than the doping concentration of the second wing 4123.

[0113] In this embodiment, the doping concentration of the first positive doping region 531 and the doping concentration of the first negative doping region 532 are both greater than 10 18 cm -3 The doping concentration of the first wing 4122 and the doping concentration of the second wing 4123 are less than 10 18 cm -3 .

[0114] In this embodiment, since the first wing 4122 and the second wing 4123 of the ridge waveguide are lightly doped, the modulation efficiency and bandwidth of the first PIN phase shifter 411 can be increased.

[0115] It should be noted that shallow doping at the periphery of the ridge waveguide can increase the modulation efficiency and bandwidth of the first PIN phase shifter 411 . However, the doping concentration and area must be strictly controlled to ensure that the absorption loss caused by doping is within a low level range.

[0116] Another exemplary embodiment of the present application also provides an optical communication network switching chip. Fig.11 As shown, in this embodiment, Fig.10 Based on the embodiment shown, the optical switch 41 further includes a first air wall 81, which surrounds the first PIN phase shifter 411 and the ridge waveguide. The first air wall 81 is located on the first insulating layer 52, the phase shift layer 53, the second insulating layer 54 and a portion of the substrate 51. The first air wall 81 is used for heat insulation, reducing the heat loss when the third electrode 57 heats the ridge waveguide, and can increase the modulation efficiency of the third electrode 57 (heating electrode).

[0117] Another exemplary embodiment of the present application also provides an optical communication network switching chip. Fig. 12A and Fig. 12B As shown, in this embodiment, Fig.10Based on the illustrated embodiment, the optical switch 41 further includes a second air wall 91 , a cantilever arm 92 and an air bottom groove 93 .

[0118] The second air wall 91 surrounds the first PIN phase shifter 411 and the ridge waveguide. The cantilever arm 92 is located on the first insulating layer 52, the phase shift layer 53 and the second insulating layer 54, and is located in the second air wall 91. The cantilever arm 92 is used to support the first PIN phase shifter 411, the ridge waveguide, the first electrode 55, the second electrode 56, the third electrode 57 and the second insulating layer 54.

[0119] The air bottom groove 93 is opened on the substrate 51 and is located between the first insulating layer 52 and the substrate 51 . The second air wall 91 is connected to the air bottom groove 93 .

[0120] In this embodiment, the second air wall 91 and the air bottom groove 93 are used for heat insulation, reducing the heat loss when the third electrode 57 heats the ridge waveguide, and can increase the modulation efficiency of the third electrode 57 (heating electrode).

[0121] Another exemplary embodiment of the present application further provides an optical switch 41. Figure 5 As shown, the optical switch 41 includes: a substrate 51 , a first insulating layer 52 , a phase shifting layer 53 , a second insulating layer 54 , a first electrode 55 , a second electrode 56 and a third electrode 57 .

[0122] The first insulating layer 52 is located on the substrate 51 , and the phase shifting layer 53 is located on a side of the first insulating layer 52 away from the substrate 51 .

[0123] The phase shift layer 53 includes a first positive doping region 531, a first multimode interferometer 412 and a first negative doping region 532. The first multimode interferometer 412 is a ridge waveguide, and the ridge waveguide is at least partially an intrinsic semiconductor. The first positive doping region 531 and the first negative doping region 532 are located on both sides of the ridge waveguide. The first positive doping region 531, the ridge waveguide and the first negative doping region 532 form a first PIN phase shifter 411 for switching the on state and the off state of the optical switch 41. The ridge waveguide includes a first input waveguide in1, a second input waveguide in2, a first output waveguide out1 and a second output waveguide out2. The first input waveguide in1 and the second input waveguide in2 are located on a first side of the ridge waveguide, and the first output waveguide out1 and the second output waveguide out2 are located on a second side of the ridge waveguide. The first side is opposite to the second side, the first input waveguide in1 is opposite to the first output waveguide out1, and the second input waveguide in2 is opposite to the second output waveguide out2.

[0124] When the optical switch 41 is in a closed state, the ridge waveguide allows light incident from the first input waveguide in1 to exit from the second output waveguide out2 and light incident from the second input waveguide in2 to exit from the first output waveguide out1; when the optical switch 41 is in an open state, the ridge waveguide allows light incident from the first input waveguide in1 to exit from the first output waveguide out1 and light incident from the second input waveguide in2 to exit from the second output waveguide out2.

[0125] In one embodiment, Figure 8 As shown, the optical switch 41 further includes a first air wall, and the first air wall surrounds the first PIN phase shifter 411 and the ridge waveguide.

[0126] In one embodiment, as shown in FIG. 9 , the optical switch 41 further includes a second air wall 91 , a cantilever arm 92 and an air bottom groove 93 .

[0127] The second air wall 91 surrounds the first PIN phase shifter 411 and the ridge waveguide. The cantilever arm 92 is located between the first insulating layer 52 and the phase shift layer 53 and is located in the second air wall 91. The air bottom groove 93 is opened on the substrate 51 and is located between the first insulating layer 52 and the substrate 51. The second air wall 91 is connected to the air bottom groove 93.

[0128] In one embodiment, Fig.10 As shown, the first positively doped region 531 is a heavily positively doped region, and the first negatively doped region 532 is a heavily negatively doped region; the first wing 4122 is a shallowly positively doped region, and the second wing 4123 is a shallowly negatively doped region; the doping concentration of the first positively doped region 531 is greater than the doping concentration of the first wing 4122, and the doping concentration of the first negatively doped region 532 is greater than the doping concentration of the second wing 4123.

[0129] The doping concentration of the first positive doping region 531 and the doping concentration of the first negative doping region 532 are both greater than 10 18 cm -3 The doping concentration of the first wing 4122 and the doping concentration of the second wing 4123 are less than 10 18 cm -3 .

[0130] In one embodiment, Fig.11 As shown, in Fig.10 Based on the illustrated embodiment, the optical switch 41 further includes a first air wall. The first air wall surrounds the first PIN phase shifter 411 and the ridge waveguide.

[0131] In one embodiment, as shown in FIG. 12 , Fig.10 Based on the illustrated embodiment, the optical switch 41 further includes a second air wall 91 , a cantilever arm 92 and an air bottom groove 93 .

[0132] The second air wall 91 surrounds the first PIN phase shifter 411 and the ridge waveguide. The cantilever arm 92 is located between the first insulating layer 52 and the phase shift layer 53 and is located in the second air wall 91. The air bottom groove 93 is opened on the substrate 51 and is located between the first insulating layer 52 and the substrate 51. The second air wall 91 is connected to the air bottom groove 93.

[0133] The technical solution provided in this application can increase the switching speed of optical switches to nanoseconds, increase the spectral bandwidth to hundreds of nanometers, and control the optical loss on the optical communication network switching chip to an ultra-low level.

[0134] In the present invention, the terms "first" and "second" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance. The term "plurality" refers to two or more than two, unless otherwise clearly defined.

[0135] The above description of the embodiments is to facilitate those of ordinary skill in the art to understand and apply the present application. It is obvious that those familiar with the art can easily make various modifications to these embodiments and apply the general principles described herein to other embodiments without having to pay creative labor. Therefore, the present application is not limited to the embodiments herein, and improvements and modifications made by those skilled in the art based on the contents disclosed in the present application without departing from the scope and spirit of the present application are within the scope of the present application.

Claims

1. An optical switch, characterized in that: include: A substrate, a first insulating layer and a phase shift layer; The first insulating layer is located on the substrate, and the phase shift layer is located on a side of the first insulating layer away from the substrate; The phase shift layer includes a first positive doping region, a first multimode interferometer and a first negative doping region, the first multimode interferometer is a ridge waveguide, and the ridge waveguide is at least partially an intrinsic semiconductor; the first positive doping region and the first negative doping region are located on both sides of the ridge waveguide, and the first positive doping region, the ridge waveguide and the first negative doping region form a first PIN phase shifter for switching the on state and the off state of the optical switch; the ridge waveguide includes a first input waveguide, a second input waveguide, a first output waveguide and a second output waveguide, the first input waveguide and the second input waveguide are located on a first side of the ridge waveguide, the first output waveguide and the second output waveguide are located on a second side of the ridge waveguide, the first side is opposite to the second side, the first input waveguide is opposite to the first output waveguide, and the second input waveguide is opposite to the second output waveguide; When the optical switch is in a closed state, the ridge waveguide allows light incident from the first input waveguide to be emitted from the second output waveguide and light incident from the second input waveguide to be emitted from the first output waveguide; when the optical switch is in an open state, the ridge waveguide allows light incident from the first input waveguide to be emitted from the first output waveguide and light incident from the second input waveguide to be emitted from the second output waveguide; The ridge waveguide comprises a ridge, a first wing and a second wing, the first wing is located between the ridge and the first positively doped region, the second wing is located between the ridge and the first negatively doped region, the height of the first wing is the same as the height of the second wing, and the height of the first wing is less than the height of the ridge; The first positively doped region is a heavily positively doped region, and the first negatively doped region is a heavily negatively doped region; The first wing is a shallow positive doped region, and the second wing is a shallow negative doped region; The doping concentration of the first positively doped region is greater than the doping concentration of the first wing, and the doping concentration of the first negatively doped region is greater than the doping concentration of the second wing.

2. The optical switch according to claim 1, wherein: When the optical switch is in a closed state, the self-imaging point of the entry point of the first multi-mode interferometer is a second antisymmetric image point, wherein the entry point is the position of the first input waveguide or the second input waveguide, and the second antisymmetric image point is a second antisymmetric image point of the entry point in a direction from the first input waveguide to the first output waveguide; When the optical switch is in an on state, the self-imaging point of the entry point of the first multimode interferometer is a first symmetrical image point, and the first symmetrical image point is the first symmetrical image point of the entry point in a direction from the first input waveguide to the first output waveguide.

3. The optical switch according to claim 1, wherein: The ridge, the first wing, and the second wing are all intrinsic semiconductors.

4. The optical switch according to claim 1, wherein: The doping concentration of the first positive doping region and the doping concentration of the first negative doping region are both greater than 10 18 cm -3 The doping concentration of the first wing portion and the doping concentration of the second wing portion are respectively less than 10 18 cm -3 .

5. The optical switch according to claim 1, wherein: It also includes a second insulating layer, a first electrode, a second electrode, a third electrode, a first conductive portion, and a second conductive portion; The second insulating layer is located on a side of the phase-shifting layer away from the first insulating layer, and the first electrode, the second electrode and the third electrode are located on a side of the second insulating layer away from the first insulating layer; The second insulating layer is provided with a first through hole and a second through hole; the first conductive portion is located in the first through hole, and the first conductive portion is used to connect the first electrode and the first positive doping region; the second conductive portion is located in the second through hole, and the second conductive portion is used to connect the second electrode and the first negative doping region; The third electrode is located between the first electrode and the second electrode, and a projection of the third electrode on the second insulating layer is located within a projection of the ridge waveguide on the second insulating layer. The third electrode is used to heat the ridge waveguide.

6. The optical switch according to claim 5, characterized in that: The material of the first electrode is metal, the material of the second electrode is metal, and the material of the third electrode is titanium nitride.

7. The optical switch according to claim 1, wherein: The system further includes a first air wall, wherein the first air wall surrounds the first PIN phase shifter and the ridge waveguide.

8. The optical switch according to claim 1, wherein: It also includes a second air wall, a cantilever arm and an air bottom trough; The second air wall surrounds the first PIN phase shifter and the ridge waveguide, the cantilever arm is located between the first insulating layer and the phase shift layer, and is located in the second air wall, the air bottom groove is opened on the substrate, and is located between the first insulating layer and the substrate, and the second air wall is connected to the air bottom groove.

9. The optical switch according to claim 5, characterized in that: The material of the substrate is silicon; the material of the first insulating layer and the material of the second insulating layer are silicon dioxide respectively; and the material of the intrinsic semiconductor is silicon.

10. The optical switch according to claim 1, wherein: The ridge waveguide is a thermo-optical phase shifter.

11. An optical communication network switching chip, characterized in that: An optical switch comprising M rows and N columns, N light input ports and M light output ports, M is a positive integer, N is a positive integer, and the optical switch is the optical switch according to any one of claims 1 to 9; For the N optical switches in the first row, the first input waveguides of the optical switches are respectively connected to the N light incident ports in a one-to-one correspondence; For the optical switches in the j1th column, the second input waveguides of the optical switches are respectively connected to the first output waveguides of the optical switches in the j1+1th column; the value range of j1 is 1 to N-1; For the optical switch in the j2th column, the second output waveguide of the optical switch in the ith row is connected to the first input waveguide of the optical switch in the i+1th row, where i ranges from 1 to M and j2 ranges from 1 to N; For the optical switches in the first column, the first output waveguides of the optical switches are connected to the M optical output ports in a one-to-one correspondence.

12. The optical communication network switching chip according to claim 11, characterized in that: Each of the optical switches further includes: a first optical power monitoring device and a second optical power monitoring device, wherein the first optical power monitoring device is used to monitor the power of the output light of the first output waveguide, and the second optical power monitoring device is used to detect the power of the output light of the second output waveguide.

13. The optical communication network switching chip according to claim 12, characterized in that: The optical switch in the Nth column further includes a third optical power monitoring device, which is located at the incident port of the second input waveguide and is used to detect the power of the incident light of the second input waveguide.

14. The optical communication network switching chip according to claim 12, characterized in that: For the optical switches in the Mth row, the second optical power monitoring device is located at the exit of the second output waveguide.

15. The optical communication network switching chip according to claim 12, characterized in that: For the first optical power monitoring device of the optical switch in rows 1 to M, the first optical power monitoring device comprises a first photodetector and a first optical splitter, one end of the first optical splitter is close to the first output waveguide with a gap, and the other end is connected to the first photodetector; For the second optical power monitoring device of the optical switches in rows 1 to M-1, the second optical power monitoring device includes a second photodetector and a second optical splitter, one end of the second optical splitter is close to the second output waveguide with a gap, and the other end is connected to the second photodetector.

16. The optical communication network switching chip according to claim 15, characterized in that: The material of the first photodetector includes Si, Ge or InP; The material of the second photodetector includes Si, Ge or InP.

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