Pixel driving circuit and display panel

Abstract

The invention discloses a pixel driving circuit and a display panel. The display panel comprises a first pixel driving unit, a second pixel driving unit and a third pixel driving unit, the first pixel driving unit includes a first light emitting element having a first anode; the second pixel driving unit includes a second light emitting element having a second anode; the third pixel driving unit includes a third light emitting element having a third anode; wherein the light emitting colors of the first light emitting element, the second light emitting element and the third light emitting element are different from one another, the first anode is configured with a first anode initialization signal, the second anode is configured with a second anode initialization signal, and the third anode is configured with a third anode initialization signal; the voltage values of at least two of the first anode initialization signal, the second anode initialization signal and the third anode initialization signal are different.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to a pixel driving circuit and a display panel. Background Art

[0002] With the continuous development of display technology, people have higher and higher requirements on display panels, especially on display quality. However, the performance of existing display panels still needs to be improved. Summary of the invention

[0003] In order to solve the above problems or other problems, the embodiments of the present invention provide the following technical solutions:

[0004] A pixel driving circuit, the pixel driving circuit at least comprising:

[0005] A first pixel driving unit, the first pixel driving unit comprising a first light emitting element, the first light emitting element having a first anode;

[0006] A second pixel driving unit, the second pixel driving unit comprising a second light emitting element, the second light emitting element having a second anode;

[0007] A third pixel driving unit, the third pixel driving unit comprising a third light emitting element, the third light emitting element having a third anode;

[0008] Among them, the light-emitting colors of the first light-emitting element, the second light-emitting element and the third light-emitting element are different from each other, the first anode is configured with a first anode initialization signal, the second anode is configured with a second anode initialization signal, and the third anode is configured with a third anode initialization signal, and the voltage values ​​of at least two of the first anode initialization signal, the second anode initialization signal and the third anode initialization signal are different.

[0009] Optionally, voltage values ​​of the first anode initialization signal, the second anode initialization signal, and the third anode initialization signal are different from each other.

[0010] Optionally, when the first light-emitting element, the second light-emitting element and the third light-emitting element are displayed at a first brightness, the first anode is configured with the first anode initialization signal, the second anode is configured with the second anode initialization signal, and the third anode is configured with the third anode initialization signal;

[0011] When the first light-emitting element, the second light-emitting element and the third light-emitting element are displayed at a second brightness, the first anode, the second anode and the third anode are configured with a common initialization signal, the first brightness is less than the second brightness, and the voltage value of the first anode initialization signal, the voltage value of the second anode initialization signal and the voltage value of the third anode initialization signal are all greater than the voltage value of the common initialization signal;

[0012] Preferably, the first light emitting element has a first cathode, the second light emitting element has a second cathode, the third light emitting element has a third cathode, the first cathode, the second cathode and the third cathode are configured with cathode signals, and the cathode signals are multiplexed as the common initialization signal;

[0013] Preferably, at least two of the first cathode, the second cathode and the third cathode are configured with the cathode signals having different voltage values;

[0014] Preferably, the first cathode, the second cathode and the third cathode are configured with cathode signals having different voltage values.

[0015] Accordingly, an embodiment of the present invention further provides a display panel, comprising the pixel driving circuit according to any embodiment of the present invention, and the display panel further comprises:

[0016] a switch circuit coupled to the pixel driving circuit and connected to a common initialization signal, the first anode initialization signal, the second anode initialization signal, and the third anode initialization signal, wherein the switch circuit is configured to be controlled by at least a first control signal, and when the first light-emitting element, the second light-emitting element, and the third light-emitting element are displayed at a first brightness, the first anode initialization signal, the second anode initialization signal, and the third anode initialization signal are respectively configured to the first anode, the second anode, and the third anode, and when the first light-emitting element, the second light-emitting element, and the third light-emitting element are displayed at a second brightness, the common initialization signal is respectively configured to the first anode, the second anode, and the third anode;

[0017] The first brightness is lower than the second brightness, and the voltage values ​​of the first anode initialization signal, the second anode initialization signal, and the third anode initialization signal are all higher than the voltage value of the common initialization signal.

[0018] Optionally, the switch circuit is further controlled by a second control signal to configure the common initialization signal, the first anode initialization signal, the second anode initialization signal and the third anode initialization signal, and the switch circuit includes a plurality of signal selection units respectively coupled to the first anode, the second anode and the third anode, each of the signal selection units including:

[0019] a first transistor, wherein a gate of the first transistor is connected to the first control signal, a first terminal of the first transistor is connected to the common initialization voltage, and a second terminal of the first transistor is coupled to a corresponding one of the first anode, the second anode and the third anode;

[0020] a second transistor, wherein a gate of the second transistor is connected to the second control signal, a first terminal of the second transistor is connected to a corresponding one of the first anode initialization signal, the second anode initialization signal and the third anode initialization signal, and a second terminal of the second transistor is coupled to a corresponding one of the first anode, the second anode and the third anode;

[0021] Preferably, the first transistor and the second transistor are transistors of the same channel type, and when the first control signal is at a first level, the second control signal is at a second level, and the first level and the second level are different;

[0022] Preferably, the first transistor and the second transistor are transistors of different channel types, and the first control signal is multiplexed into the second control signal.

[0023] Optionally, the display panel further includes:

[0024] a light-emitting functional layer, in which a portion of the first light-emitting elements, a portion of the second light-emitting elements, and a portion of the third light-emitting elements are arranged;

[0025] an isolation layer, used to isolate the first light-emitting element, the second light-emitting element and the third light-emitting element, the isolation layer at least comprising a first initial signal isolation column, a second initial signal isolation column and a third initial signal isolation column;

[0026] Among them, the first initial signal isolation column is coupled to the first anode and is configured with the first anode initialization signal, the second initial signal isolation column is coupled to the second anode and is configured with the second anode initialization signal, and the third initial signal isolation column is coupled to the third anode and is configured with the third anode initialization signal.

[0027] Optionally, the display panel further includes a cathode layer, the cathode layer is disposed on one side of the light-emitting functional layer, and the isolation layer further includes a first cathode isolation column, a second cathode isolation column and a third cathode isolation column, wherein:

[0028] The first light emitting element has a first cathode, the second light emitting element has a second cathode, and the third light emitting element has a third cathode, and the first cathode, the second cathode and the third cathode are electrically isolated and arranged in the cathode layer;

[0029] The first cathode isolation column is coupled to the first cathode and is configured with a first cathode signal, the second cathode isolation column is coupled to the second cathode and is configured with a second cathode signal, and the third cathode isolation column is coupled to the third cathode and is configured with the third cathode signal;

[0030] Preferably, at least two of the first cathode signal, the second cathode signal and the third cathode signal have different voltage values;

[0031] Preferably, voltage values ​​of the first cathode signal, the second cathode signal and the third cathode signal are different from each other.

[0032] Optionally, the pixel driving circuit comprises a plurality of the first pixel driving units, a plurality of the second pixel driving units and a plurality of the third pixel driving units, wherein:

[0033] The first anodes in the first pixel driving units are coupled via the same first initial signal isolation column, the second anodes in the second pixel driving units are coupled via the same second initial signal isolation column, and the third anodes in the third pixel driving units are coupled via the same third initial signal isolation column;

[0034] Preferably, multiple first pixel driving units are arranged into multiple columns, multiple second pixel driving units are arranged into multiple columns, and multiple third pixel driving units are arranged into multiple columns, wherein the first anodes in each of the first pixel driving units in the same column are coupled through the same first initial signal isolation column, the second anodes in each of the second pixel driving units in the same column are coupled through the same second initial signal isolation column, and the third anodes in each of the third pixel driving units in the same column are coupled through the same third initial signal isolation column.

[0035] Optionally, the pixel driving circuit comprises a plurality of the first pixel driving units, a plurality of the second pixel driving units and a plurality of the third pixel driving units, wherein:

[0036] The first cathodes in the first pixel driving units are coupled via the same first cathode isolation column, the second cathodes in the second pixel driving units are coupled via the same second cathode isolation column, and the third cathodes in the third pixel driving units are coupled via the same third cathode isolation column;

[0037] Preferably, a plurality of the first pixel driving units are arranged into multiple columns, a plurality of the second pixel driving units are arranged into multiple columns, and a plurality of the third pixel driving units are arranged into multiple columns, wherein the first cathodes in each of the first pixel driving units in the same column are coupled through the same first cathode isolation column, the second cathodes in each of the second pixel driving units in the same column are coupled through the same second cathode isolation column, and the third cathodes in each of the third pixel driving units in the same column are coupled through the same third cathode isolation column.

[0038] Optionally, the display panel has a display area and a frame area that are adjacently arranged, the pixel driving circuit is located in the display area, and the switch circuit is located in the frame area;

[0039] Preferably, the display panel at least includes:

[0040] A first initial signal bus is located in the border area, and each of the first initial signal isolation columns is coupled to the first initial signal bus;

[0041] A second initial signal bus is located in the frame area, and each of the second initial signal isolation columns is coupled to the second initial signal bus;

[0042] A third initial signal bus is located in the border area, and each of the third initial signal isolation columns is coupled to the third initial signal bus;

[0043] Preferably, a plurality of the first pixel driving units are arranged into a plurality of columns, a plurality of the second pixel driving units are arranged into a plurality of columns, and a plurality of the third pixel driving units are arranged into a plurality of columns, the columns extend along a first direction, the first initial signal bus, the second initial signal bus, and the third initial signal bus extend along a second direction, and the first direction and the second direction have an angle;

[0044] Preferably, the first direction is perpendicular to the second direction;

[0045] Preferably, the display panel further includes:

[0046] A first cathode bus line is located in the frame area, and each of the first cathode isolation columns is coupled to the first cathode bus line;

[0047] A second cathode bus line is located in the frame area, and each of the second cathode isolation columns is coupled to the second cathode bus line;

[0048] A third cathode bus line is located in the frame area, and each of the third cathode isolation columns is coupled to the third cathode bus line;

[0049] Preferably, a plurality of the first pixel driving units are arranged in a plurality of columns, a plurality of the second pixel driving units are arranged in a plurality of columns, and a plurality of the third pixel driving units are arranged in a plurality of columns, the columns extend along a first direction, the first cathode bus, the second cathode bus and the third cathode bus extend along a second direction, and the first direction and the second direction have an angle;

[0050] Preferably, the first direction is perpendicular to the second direction.

[0051] In the embodiment of the present invention, the first anode is configured with a first anode initialization signal, the second anode is configured with a second anode initialization signal, and the third anode is configured with a third anode initialization signal. The voltage values ​​of at least two of the first anode initialization signal, the second anode initialization signal and the third anode initialization signal are different. This can match appropriate anode initialization voltages according to light-emitting elements of different colors, so that the lighting speed of each light-emitting element is the same, which is beneficial to improving the phenomenon that the chromaticity deviates from the specification when switching from a black screen to the first frame of a white screen, improving the ghosting color deviation, and thus improving the display effect.

[0052] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present invention, nor are they intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0053] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0054] Figure 1 A schematic diagram of a pixel driving circuit provided by an embodiment of the present invention;

[0055] Figure 2 A schematic diagram of a circuit in a display panel provided by an embodiment of the present invention;

[0056] Figure 3 A schematic diagram of a circuit in another display panel provided by an embodiment of the present invention;

[0057] Figure 4A schematic diagram of a circuit in another display panel provided by an embodiment of the present invention;

[0058] Figure 5 A schematic diagram of a circuit in another display panel provided by an embodiment of the present invention;

[0059] Figure 6 A schematic diagram of a circuit in another display panel provided by an embodiment of the present invention;

[0060] Figure 7 A schematic diagram of the structure of a display panel provided by an embodiment of the present invention;

[0061] Figure 8 for Figure 7 A schematic cross-sectional structure diagram of the first pixel driving unit along AB;

[0062] Fig. 9 A schematic diagram of a partial structure of a display panel provided by an embodiment of the present invention;

[0063] Fig.10 A schematic diagram of the structure of another display panel provided by an embodiment of the present invention;

[0064] Fig.11 A schematic cross-sectional structure diagram of another display panel provided by an embodiment of the present invention;

[0065] Fig.12 and Fig.13 A schematic diagram of the structure formed in each step of a method for preparing a display panel provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0066] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0067] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0068] The inventors of this case have discovered through research that in some implementations, the light-emitting elements of different colors in the pixel driving circuit are configured with an anode initialization voltage with the same voltage value, which results in a color deviation when the display panel switches from a black screen to the first frame of a white screen, and thus, a problem of color deviation due to ghosting will occur when perceived by the human eye.

[0069] An embodiment of the present invention provides a pixel driving circuit. Figure 1 A schematic diagram of a pixel driving circuit provided by an embodiment of the present invention. Figure 1 , the pixel driving circuit at least comprises:

[0070] A first pixel driving unit 100, wherein the first pixel driving unit 100 comprises a first light emitting element 120, wherein the first light emitting element 120 has a first anode;

[0071] A second pixel driving unit 400, the second pixel driving unit 400 includes a second light emitting element 420, and the second light emitting element 420 has a second anode;

[0072] A third pixel driving unit 300, the third pixel driving unit 300 includes a third light emitting element 320, and the third light emitting element 320 has a third anode;

[0073] Among them, the light-emitting colors of the first light-emitting element 120, the second light-emitting element 420 and the third light-emitting element 320 are different from each other, the first anode is configured with a first anode initialization signal R_Vref, the second anode is configured with a second anode initialization signal G_Vref, and the third anode is configured with a third anode initialization signal B_Vref, and the voltage values ​​of at least two of the first anode initialization signal R_Vref, the second anode initialization signal G_Vref and the third anode initialization signal B_Vref are different.

[0074] This setting can match the appropriate anode initialization voltage according to the light-emitting elements of different colors, so that the lighting speed of each light-emitting element is the same, which is beneficial to improve the phenomenon that the chromaticity deviates from the specification when switching from a black screen to a white screen in the first frame, improve the ghosting color deviation, and thus enhance the display effect.

[0075] In one embodiment of the present invention, optionally, the first anode initialization signal R_Vref is different from the second anode initialization signal G_Vref and the third anode initialization signal B_Vref.

[0076] In another embodiment of the present invention, optionally, the second anode initialization signal G_Vref is different from the first anode initialization signal R_Vref and the third anode initialization signal B_Vref.

[0077] In another embodiment of the present invention, optionally, the third anode initialization signal B_Vref is different from the first anode initialization signal R_Vref and the second anode initialization signal G_Vref.

[0078] In another embodiment of the present invention, optionally, voltage values ​​of the first anode initialization signal R_Vref, the second anode initialization signal G_Vref, and the third anode initialization signal B_Vref are different from each other.

[0079] In practical applications, the voltage values ​​of the first anode initialization signal R_Vref, the second anode initialization signal G_Vref and the third anode initialization signal B_Vref can be determined according to the lighting voltages of the first light-emitting element 120, the second light-emitting element 420 and the third light-emitting element 320. The specific principle is as follows:

[0080] Exemplarily, the first light emitting element 120, the second light emitting element 420 and the third light emitting element 320 are respectively a red light emitting element R, a green light emitting element G and a blue light emitting element B, the start-up voltage of the red light emitting element R is V_R, the start-up voltage of the green light emitting element G is V_G, the start-up voltage of the blue light emitting element B is V_B, and V_R>V_G>V_B. That is, the start-up voltage of the red light emitting element R is greater than the start-up voltage of the green light emitting element G, and the start-up voltage of the green light emitting element G is greater than the start-up voltage of the blue light emitting element B.

[0081] In one embodiment, the entire display panel uses the same anode initialization voltage Vref_COM. Then, in the light-emitting stage, the voltage of the red light-emitting element R is raised by V_R-Vref_COM and then it is lit, the voltage of the green light-emitting element G is raised by V_G-Vref_COM and then it is lit, and the voltage of the blue light-emitting element B is raised by V_B-Vref_COM and then it is lit. Since V_R>V_G>V_B, V_R-Vref_COM>V_G-Vref_COM>V_B-Vref_COM. Under the action of the driving current, the blue light-emitting element B is lit first, followed by the green light-emitting element G, and finally the red light-emitting element R, resulting in the problem of chromaticity deviation from the specification.

[0082] In the embodiment of the present invention, different anode initialization voltages are set for light-emitting elements of different colors. Specifically, the red light-emitting element R is written with the first anode initialization signal R_Vref, the green light-emitting element G is written with the second anode initialization signal G_Vref, and the blue light-emitting element B is written with the third anode initialization signal B_Vref, and R_Vref>G_Vref>B_Vref. Then, in the light-emitting stage, the voltage of the red light-emitting element R is raised by V_R-R_Vref and then lit, the voltage of the green light-emitting element G is raised by V_G-G_Vref and then lit, and the voltage of the blue light-emitting element B is raised by V_B-B_Vref and then lit. Since V_R>V_G>V_B and R_Vref>G_Vref>B_Vref, V_R-R_Vref, V_G-G_Vref, and V_B-B_Vref are closer than those in the related art. By selecting appropriate R_Vref, G_Vref, and B_Vref, V_R-R_Vref, V_G-G_Vref, and V_B-B_Vref can be made equal. Under the action of the driving current, the lighting time of the blue light emitting element B, the green light emitting element G, and the red light emitting element R tends to be equal, thereby improving the problem of chromaticity deviation from the specification, improving the smear color deviation, and improving the display effect.

[0083] It should be noted that in the above embodiment, the start-up voltage of the red light-emitting element R is greater than the start-up voltage of the green light-emitting element G, and the start-up voltage of the green light-emitting element G is greater than the start-up voltage of the blue light-emitting element B. This is not a limitation of the present invention. In practical applications, the start-up voltage of a light-emitting element is also related to factors such as the capacitance of the light-emitting element and the material of the device, and the relationship between the start-up voltages of various light-emitting elements cannot be generalized. However, for light-emitting elements of the same color, their setting methods are usually the same, so the start-up voltages of light-emitting elements of the same color are the same.

[0084] On the basis of the above embodiments, the embodiment of the present invention further provides an optimized technical solution to reduce the power consumption of the driver chip. Specifically:

[0085] When the first light emitting element 120, the second light emitting element 420 and the third light emitting element 320 are displayed at the first brightness, the first anode is configured with the first anode initialization signal R_Vref, the second anode is configured with the second anode initialization signal G_Vref, and the third anode is configured with the third anode initialization signal B_Vref;

[0086] When the first light-emitting element 120, the second light-emitting element 420 and the third light-emitting element 320 are displayed at the second brightness, the first anode, the second anode and the third anode are configured with a common initialization signal, the first brightness is less than the second brightness, and the voltage value of the first anode initialization signal R_Vref, the voltage value of the second anode initialization signal G_Vref and the voltage value of the third anode initialization signal B_Vref are all greater than the voltage value of the common initialization signal.

[0087] Still taking the first light emitting element 120, the second light emitting element 420 and the third light emitting element 320 as an example, which are respectively a red light emitting element R, a green light emitting element G and a blue light emitting element B, the driving method of the embodiment of the present invention is described as follows:

[0088] When displaying the second brightness (high brightness), the first anode, the second anode and the third anode are configured with a common initialization signal Vref_COM, the first pixel driving unit 100 initializes the anode of the first light-emitting element 120 with the common initialization voltage Vref_COM, the second pixel driving unit 400 initializes the anode of the second light-emitting element 420 with the common initialization voltage Vref_COM, and the third pixel driving unit 300 initializes the anode of the third light-emitting element 320 with the common initialization voltage Vref_COM. From the above analysis, it can be seen that under the action of the driving current, the blue light-emitting element B is first lit, followed by the green light-emitting element G, and finally the red light-emitting element R, and there will be a problem of chromaticity deviation from the specification. However, when displaying high brightness, the driving current is large, the charging speed of the anode voltage of each light-emitting element 120 is very fast, and the red light-emitting element R, the green light-emitting element G and the blue light-emitting element B are all very fast. The human eye will not perceive the smear color deviation caused by the difference in anode charging rate. At the same time, the driver chip does not need to provide three different anode initialization voltages, so it is beneficial to reduce the power consumption of the driver chip.

[0089] In addition, in the embodiment of the present invention, the voltage value of the first anode initialization signal R_Vref, the voltage value of the second anode initialization signal G_Vref and the voltage value of the third anode initialization signal B_Vref are all greater than the voltage value of the common initialization signal, thereby shortening the difference between the initialization voltage and the lighting voltage of the first light-emitting element 120, the second light-emitting element 420 and the third light-emitting element 320, which is beneficial to shortening the time for each light-emitting element to be raised from the initialization voltage to the lighting voltage, thereby further improving the display effect.

[0090] On the basis of the above embodiments, optionally, the first light emitting element 120 has a first cathode, the second light emitting element 420 has a second cathode, the third light emitting element 320 has a third cathode, the first cathode, the second cathode and the third cathode are configured with cathode signals, and the cathode signals are multiplexed into a common initialization signal Vref_COM. In this way, the driver chip can omit the setting of the common initialization signal Vref_COM, thereby reducing power consumption.

[0091] In addition, when displaying the second brightness (high brightness), only the cathode signal needs to be used to provide the common initialization signal Vref_COM, thereby reducing the power consumption of the driver chip. Furthermore, in one embodiment, in order to reduce the difference in lighting speed when displaying low brightness, the anode initialization voltage is a voltage value that can be adjusted according to the brightness. Specifically, when displaying high brightness, the anode initialization voltage is lower; when displaying low brightness, the anode initialization voltage is higher. This setting can improve the problem of low-brightness smearing color deviation to a certain extent, but the improvement effect is not good; in addition, the cathode voltage in this embodiment cannot be reused as the anode initialization voltage. Therefore, compared with this embodiment, the embodiment of the present invention can not only improve the problem of low-brightness smearing color deviation, but also reduce the power consumption of the driver chip.

[0092] When displaying the first brightness (low brightness), the first anode is configured with the first anode initialization signal R_Vref, the second anode is configured with the second anode initialization signal G_Vref, and the third anode is configured with the third anode initialization signal B_Vref. Under the action of the driving current, the lighting time of the blue light-emitting element B, the green light-emitting element G and the red light-emitting element R tends to be equal, thereby improving the problem of chromaticity deviation from the specification, improving the ghosting color deviation, and enhancing the display effect.

[0093] Continue to see Figure 1 On the basis of the above embodiments, optionally, the first cathode is configured with a first cathode signal R_ELVSS, the second cathode is configured with a second cathode signal G_ELVSS, and the third cathode is configured with a third cathode signal B_ELVSS. Wherein:

[0094] At least two of the first cathode signal R_ELVSS, the second cathode signal G_ELVSS, and the third cathode signal B_ELVSS have different voltage values.

[0095] As a supplementary solution to the aforementioned embodiments, the embodiment of the present invention can compensate for the voltage difference among the first light-emitting element 120, the second light-emitting element 420 and the third light-emitting element 320 by setting the voltage values ​​of at least two of the first cathode signal R_ELVSS, the second cathode signal G_ELVSS and the third cathode signal B_ELVSS to be different, thereby balancing the efficiency of the first pixel driving unit 100, the second pixel driving unit 400 and the third pixel driving unit 300 and improving the uniformity of the display panel.

[0096] On the basis of the above embodiments, optionally, the voltage of the second cathode signal G_ELVSS is different from the voltages of the first cathode signal R_ELVSS and the third cathode signal B_ELVSS; or, the voltage of the first cathode signal R_ELVSS is different from the voltages of the second cathode signal G_ELVSS and the third cathode signal B_ELVSS; or, the voltage of the third cathode signal B_ELVSS is different from the voltages of the first cathode signal R_ELVSS and the second cathode signal G_ELVSS; or, the voltage values ​​of the first cathode signal R_ELVSS, the second cathode signal G_ELVSS and the third cathode signal B_ELVSS are different from each other.

[0097] Continue to see Figure 1 On the basis of the above embodiments, optionally, the first pixel driving unit 100 has a first anode initialization module 110, and the first anode initialization signal R_Vref is written into the first anode of the first light-emitting element 120 through the first anode initialization module 110; the second anode initialization signal G_Vref is written into the first anode of the second light-emitting element 420 through the second anode initialization module 410; and the third anode initialization signal B_Vref is written into the first anode of the third light-emitting element 320 through the third anode initialization module 310.

[0098] On the basis of the above embodiments, each anode initialization module optionally includes a transistor, which can be called an anode initialization transistor, a first end of the anode initialization transistor is connected to a corresponding anode initialization signal, and a second end of the anode initialization transistor is electrically connected to the anode of the light-emitting element. This arrangement makes the circuit structure simple and easy to implement.

[0099] In other embodiments, each anode initialization module may also be configured to include other transistors, which is not limited in the present invention.

[0100] On the basis of the above embodiments, optionally, the first pixel driving unit 100 further includes a first driving module 130, the second pixel driving unit 400 further includes a second driving module 430, and the third pixel driving unit 300 further includes a third driving module 330. Each driving module includes a transistor, which is called a driving transistor, and the driving transistor is used to provide a driving current to the corresponding light emitting element.

[0101] An embodiment of the present invention further provides a display panel, including a pixel driving circuit as described in any embodiment of the present invention, and having corresponding beneficial effects. Figure 2 A schematic diagram of a circuit in a display panel provided by an embodiment of the present invention. Figure 2 , the display panel further comprises:

[0102] The switch circuit 200 is coupled to the pixel driving circuit and connected to the common initialization signal Vref_COM, the first anode initialization signal R_Vref, the second anode initialization signal G_Vref and the third anode initialization signal B_Vref. The switch circuit 200 is configured to be controlled by at least the first control signal, and when the first light-emitting element 120, the second light-emitting element 420 and the third light-emitting element 320 are displayed at the first brightness, the first anode initialization signal R_Vref, the second anode initialization signal G_Vref and the third anode initialization signal B_Vref are respectively configured to the first anode, the second anode and the third anode, and when the first light-emitting element 120, the second light-emitting element 420 and the third light-emitting element 320 are displayed at the second brightness, the common initialization signal Vref_COM is respectively configured to the first anode, the second anode and the third anode;

[0103] The first brightness is lower than the second brightness, and the voltage values ​​of the first anode initialization signal R_Vref, the second anode initialization signal G_Vref and the third anode initialization signal B_Vref are all higher than the voltage value of the common initialization signal Vref_COM.

[0104] Continue to see Figure 2 In one embodiment of the present invention, optionally, the switch circuit 200 includes multiple input terminals 201 and multiple output terminals 202, the multiple input terminals 201 are respectively connected to the first anode initialization signal R_Vref, the second anode initialization signal G_Vref, the third anode initialization signal B_Vref and the common initialization voltage Vref_COM, and the multiple output terminals 202 are respectively electrically connected to the first pixel driving unit 100, the second pixel driving unit 400 and the third pixel driving unit 300.

[0105] In the above embodiments, there are many ways to configure the switch circuit 200, and several of them are described below, but they are not intended to limit the present invention.

[0106] Figure 3 A schematic diagram of another circuit in a display panel provided by an embodiment of the present invention. Figure 3 In one embodiment of the present invention, optionally, the switch circuit 200 is controlled by a first control signal Vref_SW1 and a second control signal Vref_SW2 to configure a common initialization signal Vref_COM, a first anode initialization signal R_Vref, a second anode initialization signal G_Vref, and a third anode initialization signal B_Vref. The switch circuit 200 includes a plurality of signal selection units respectively coupled to the first anode, the second anode, and the third anode, each of which includes:

[0107] A first transistor, a gate of the first transistor is connected to a first control signal, a first terminal of the first transistor is connected to a common initialization voltage, and a second terminal of the first transistor is coupled to a corresponding one of a first anode, a second anode, and a third anode;

[0108] The second transistor, the gate of the second transistor is connected to the second control signal, the first end of the second transistor is connected to a corresponding one of the first anode initialization signal R_Vref, the second anode initialization signal G_Vref and the third anode initialization signal B_Vref, and the second end of the second transistor is coupled to a corresponding one of the first anode, the second anode and the third anode.

[0109] Exemplarily, still taking the first light-emitting element 120, the second light-emitting element 420 and the third light-emitting element 320 as the red light-emitting element R, the green light-emitting element G and the blue light-emitting element B respectively, the signal selection units are the red signal selection unit 210_R, the green signal selection unit 210_G and the blue signal selection unit 210_B respectively.

[0110] The red signal selection unit 210_R includes: a first transistor T1_R and a red second transistor T2_R. The gate of the first transistor T1_R is connected to the first control signal Vref_SW1, the first end of the first transistor T1_R is connected to the common initialization voltage, and the second end of the first transistor T1_R is electrically connected to the first pixel driving unit 100, so that the first transistor T1_R provides the common initialization voltage to the red light emitting element R.

[0111] The gate of the red second transistor T2_R is connected to the second control signal Vref_SW2, the second end of the red second transistor T2_R is connected to the first anode initialization signal R_Vref of the red light-emitting element R, and the second end of the red second transistor T2_R is electrically connected to the first pixel driving unit 100, so that the red second transistor T2_R provides the first anode initialization signal R_Vref to the red light-emitting element R.

[0112] The green signal selection unit 210_G includes: a second transistor T1_G and a green second transistor T2_G. The gate of the second transistor T1_G is connected to the first control signal Vref_SW1, the first end of the second transistor T1_G is connected to the common initialization voltage, and the second end of the second transistor T1_G is electrically connected to the second pixel driving unit 400, so that the second transistor T1_G provides the common initialization voltage to the green light emitting element G.

[0113] The gate of the green second transistor T2_G is connected to the second control signal Vref_SW2, the second end of the green second transistor T2_G is connected to the second anode initialization signal G_Vref of the green light-emitting element G, and the second end of the green second transistor T2_G is electrically connected to the second pixel driving unit 400, so that the green second transistor T2_G provides the second anode initialization signal G_Vref to the green light-emitting element G.

[0114] The blue signal selection unit 210_B includes: a third transistor T1_B and a blue second transistor T2_B. The gate of the third transistor T1_B is connected to the first control signal Vref_SW1, the first end of the third transistor T1_B is connected to the common initialization voltage, and the second end of the third transistor T1_B is electrically connected to the third pixel driving unit 300, so that the third transistor T1_B provides the common initialization voltage to the blue light emitting element B.

[0115] The gate of the second blue transistor T2_B is connected to the second control signal Vref_SW2, the second end of the second blue transistor T2_B is connected to the third anode initialization signal B_Vref of the blue light-emitting element B, and the second end of the second blue transistor T2_B is electrically connected to the third pixel driving unit 300, so that the second blue transistor T2_B provides the third anode initialization signal B_Vref to the blue light-emitting element B.

[0116] Continue to see Figure 3 On the basis of the above embodiments, optionally, the first transistor and the second transistor are transistors of the same channel type, when the first control signal is at the first level, the second control signal is at the second level, and the first level and the second level are different. For example, when the first level is at a high level, the second level is at a low level; or when the first level is at a low level, the second level is at a high level.

[0117] Preferably, the first transistor and the second transistor are transistors of different channel types, and the first control signal is multiplexed into the second control signal.

[0118] Continue to see Figure 3In one embodiment of the present invention, optionally, at least two of the voltage values ​​of the first anode initialization signal R_Vref, the second anode initialization signal G_Vref and the third anode initialization signal B_Vref are different, and the common initialization voltages corresponding to the first light-emitting element 120, the second light-emitting element 420 and the third light-emitting element 320 are different; wherein the first cathode signal R_ELVSS is multiplexed as the common initialization voltage of the first light-emitting element 120; the second cathode signal G_ELVSS is multiplexed as the common initialization voltage of the second light-emitting element 420; and the third cathode signal B_ELVSS is multiplexed as the common initialization voltage of the third light-emitting element 320.

[0119] Such a configuration is conducive to setting different anode initialization voltages for different cathode voltages, further improving the accuracy of anode initialization for each light-emitting element, thereby further improving the display effect.

[0120] Exemplarily, the driving method of the pixel driving circuit is:

[0121] When the second brightness (high brightness) is displayed, the first control signal Vref_SW1 controls the first transistor T1_R, the second transistor T1_G and the third transistor T1_B to be turned on, and the second control signal Vref_SW2 controls the red second transistor T2_R, the green second transistor T2_G and the blue second transistor T2_B to be turned off. The first transistor T1_R transmits the first cathode signal R_ELVSS to the first anode initialization module 110, and uses the first cathode signal R_ELVSS to initialize the red light emitting element R; the second transistor T1_G transmits the second cathode signal G_ELVSS to the second anode initialization module 410, and uses the second cathode signal G_ELVSS to initialize the green light emitting element G; the third transistor T1_B transmits the third cathode signal B_ELVSS to the third anode initialization module 310, and uses the third cathode signal B_ELVSS to initialize the blue light emitting element B.

[0122] When the first brightness (low brightness) is displayed, the first control signal Vref_SW1 controls the first transistor T1_R, the second transistor T1_G and the third transistor T1_B to be turned off, and the second control signal Vref_SW2 controls the red second transistor T2_R, the green second transistor T2_G and the blue second transistor T2_B to be turned on. The red second transistor T2_R transmits the first anode initialization signal R_Vref to the first anode initialization module 110, and uses the first anode initialization signal R_Vref to initialize the red light emitting element R; the green second transistor T2_G transmits the second anode initialization signal G_Vref to the second anode initialization module 410, and uses the second anode initialization signal G_Vref to initialize the green light emitting element G; the blue second transistor T2_B transmits the third anode initialization signal B_Vref to the third anode initialization module 310, and uses the third anode initialization signal B_Vref to initialize the blue light emitting element B.

[0123] It can be seen that the circuit structure of the display panel provided by the embodiment of the present invention is simple, and can improve the problem of low-brightness streaking and color shift while reducing the power consumption of the driving chip.

[0124] Continue to see Figure 3 In one embodiment of the present invention, optionally, each first transistor and each second transistor are P-type transistors, and the first control signal Vref_SW1 and the second control signal Vref_SW2 are signals with opposite levels. In this way, the channel type of the transistor is single, which is suitable for all low temperature polysilicon (LTPS) display panel products.

[0125] Figure 4 A schematic diagram of a circuit in another display panel provided by an embodiment of the present invention. Figure 4 In another embodiment of the present invention, optionally, each first transistor and each second transistor are N-type transistors, and the first control signal Vref_SW1 and the second control signal Vref_SW2 are signals with opposite levels. In this way, the channel type of the transistor is single, which is suitable for full oxide (IGZO) display panel products.

[0126] Figure 5 A circuit diagram of another display panel provided by an embodiment of the present invention. Figure 5In another embodiment of the present invention, optionally, each first transistor and each second transistor are transistors of different channel types, and the first control signal Vref_SW1 is multiplexed into the second control signal Vref_SW2. In this way, a control signal can be shared, and the driver chip only needs to output a control signal to control the switch circuit to work normally, which reduces the number of driver chip output channels required, and is conducive to reducing the wiring difficulty of the display panel.

[0127] Figure 6 A circuit diagram of another display panel provided by an embodiment of the present invention. Figure 6 Taking the first pixel driving unit 100 as an example, an embodiment of the present invention provides a specific circuit structure. In one embodiment of the present invention, optionally, the first driving module 130 includes a driving transistor T1, and the first anode initialization module 110 includes an anode initialization transistor T7. The first pixel driving unit 100 also includes a data writing transistor T2, a compensation transistor T3, a gate initialization transistor T4, a first light-emitting control transistor T5, a second light-emitting control transistor T6 and a storage capacitor Cst. The pixel circuit also includes a first scanning line providing a first scanning signal Scan1, a second scanning line providing a second scanning signal Scan2, a third scanning line providing a third scanning signal Scan3, a light-emitting control signal line providing a light-emitting control signal EM, and a data line providing a data signal Data.

[0128] The data writing transistor T2 is a data writing transistor, the compensation transistor T3 is a threshold compensation transistor, the gate initialization transistor T4 is a gate initialization transistor, the first light emission control transistor T5 and the second light emission control transistor T6 are light emission control transistors. Exemplarily, each transistor is a P-type transistor.

[0129] The gate of the data writing transistor T2 is connected to the second scanning signal Scan2, the first electrode of the data writing transistor T2 is connected to the source S of the driving transistor T1, and the second electrode of the data writing transistor T2 is connected to the data signal Data; the gate of the compensation transistor T3 is connected to the second scanning signal Scan2, the first electrode of the compensation transistor T3 is connected to the drain D of the driving transistor T1, and the second electrode of the compensation transistor T3 is connected to the gate G of the driving transistor T1; the gate of the gate initialization transistor T4 is connected to the first scanning signal Scan1, the first electrode of the gate initialization transistor T4 is connected to the gate G of the driving transistor T1, and the second electrode of the gate initialization transistor T4 is connected to the first anode initialization signal R_Vref; the first light emitting control transistor The gate of the body tube T5 is connected to the light-emitting control signal EM, the first electrode of the first light-emitting control transistor T5 is connected to the source S of the driving transistor T1, and the second electrode of the first light-emitting control transistor T5 is connected to the voltage ELVDD; the gate of the second light-emitting control transistor T6 is connected to the light-emitting control signal EM, the first electrode of the second light-emitting control transistor T6 is connected to the drain D of the driving transistor T1, and the second electrode of the second light-emitting control transistor T6 is connected to the anode of the first light-emitting element 120; the gate of the anode initialization transistor T7 is connected to the third scanning signal Scan3, the first electrode of the anode initialization transistor T7 is connected to the anode of the first light-emitting element 120, and the second electrode of the anode initialization transistor T7 is connected to the first anode initialization signal R_Vref.

[0130] Exemplarily, the driving process of the first pixel driving unit 100 includes a gate initialization phase, a data writing phase, an anode initialization phase and a light emitting phase.

[0131] In the initialization stage, the light-emitting control signal EM, the second scanning signal Scan2 and the third scanning signal Scan3 are all at high level, and the first scanning signal Scan1 is at low level. The light-emitting control signal EM controls the first light-emitting control transistor T5 and the second light-emitting control transistor T6 to be turned off; the second scanning signal Scan2 controls the data writing transistor T2 and the compensation transistor T3 to be turned off; the third scanning signal Scan3 controls the anode initialization transistor T7 to be turned off. The first scanning signal Scan1 controls the gate initialization transistor T4 to be turned on, and the gate initialization signal Vrefn initializes the gate G of the driving transistor T1 to ensure that the driving transistor T1 is in the on state during the data writing stage.

[0132] In the data writing stage, the light-emitting control signal EM, the first scanning signal Scan1 and the third scanning signal Scan3 are all at high level, and the second scanning signal Scan2 is at low level. The light-emitting control signal EM controls the first light-emitting control transistor T5 and the second light-emitting control transistor T6 to be turned off; the first scanning signal Scan1 controls the gate initialization transistor T4 to be turned off; and the third scanning signal Scan3 controls the anode initialization transistor T7 to be turned off. The second scanning signal Scan2 controls the data writing transistor T2 and the compensation transistor T3 to be turned on, so as to write the data signal Data into the gate G of the driving transistor T1 via the source S and the drain D of the driving transistor T1. And, the first adjustment signal R_BSM is written into the first threshold adjustment gate 111 of the driving transistor T1 to adjust the threshold voltage of the driving transistor T1.

[0133] In the anode initialization stage, the light-emitting control signal EM, the first scanning signal Scan1 and the second scanning signal Scan2 are all at high levels, and the third scanning signal Scan3 is at a low level. The light-emitting control signal EM controls the first light-emitting control transistor T5 and the second light-emitting control transistor T6 to be turned off; the first scanning signal Scan1 controls the gate initialization transistor T4 to be turned off; the second scanning signal Scan2 controls the data writing transistor T2 and the compensation transistor T3 to be turned off. The third scanning signal Scan3 controls the anode initialization transistor T7 to be turned on, so that the first anode initialization signal R_Vref initializes the anode of the first light-emitting element 120.

[0134] In the light-emitting stage, the first scanning signal Scan1, the second scanning signal Scan2 and the third scanning signal Scan3 are all at high levels. The light-emitting control signal EM is at a low level or presents periodic changes, which is not limited by the present invention. The first scanning signal Scan1 controls the gate initialization transistor T4 to be disconnected; the second scanning signal Scan2 controls the data writing transistor T2 and the compensation transistor T3 to be disconnected; the third scanning signal Scan3 controls the anode initialization transistor T7 to be disconnected. When the light-emitting control signal EM controls the first light-emitting control transistor T5 and the second light-emitting control transistor T6 to be turned on, the driving transistor T1 generates a driving current, which flows into the anode of the first light-emitting element 120, driving the first light-emitting element 120 to emit light.

[0135] In another embodiment of the present invention, optionally, the first anode initialization signal R_Vref is multiplexed as an anode initialization signal, thereby reducing the number of signal lines, which is beneficial to the wiring of the display panel.

[0136] On the basis of the above embodiments, optionally, the switch circuit 200 is located in a border area of ​​the display panel, for example, a lower border area, to reduce the difficulty of wiring in the display area.

[0137] On the basis of the above embodiments, the embodiments of the present invention further define the film layer structure of the display panel.

[0138] Figure 7 A schematic diagram of the structure of a display panel provided by an embodiment of the present invention, Figure 8 for Figure 7 It should be noted that the first pixel driving unit 100, the second pixel driving unit 200 and the third pixel driving unit 300 are arranged in the same manner. Figure 8 The structure of the first pixel driving unit 100 is taken as an example for description. Figure 7 and Figure 8 Optionally, the display panel further includes:

[0139] Light-emitting functional layer, first light-emitting element 120, second light-emitting element 420 ( Figure 8 ) and the third light emitting element 320 ( Figure 8 (not shown) is arranged in the light-emitting functional layer;

[0140] The isolation layer is used to isolate the first light emitting element 120, the second light emitting element 420 and the third light emitting element 320, and the isolation layer at least includes a first initial signal isolation column 311, a second initial signal isolation column ( Figure 8 ) and the third initial signal isolation column ( Figure 8 not shown);

[0141] Among them, the first initial signal isolation column 311 is coupled to the first anode in the first pixel driving unit 100 and is configured with a first anode initialization signal R_Vref, the second initial signal isolation column is coupled to the second anode in the second pixel driving unit 400 and is configured with a second anode initialization signal G_Vref, and the third initial signal isolation column is coupled to the third anode in the third pixel driving unit 300 and is configured with a third anode initialization signal B_Vref.

[0142] In the film layer structure, the embodiment of the present invention uses the first initial signal isolation column 311 of the isolation column layer to carry the first anode initialization signal R_Vref, which is conducive to reducing the resistance of the first anode initialization signal R_Vref and improving the uniformity of the first anode initialization signal R_Vref received by the first pixel driving unit 100; similarly, the second initial signal isolation column of the isolation column layer is used to carry the second anode initialization signal G_Vref, which is conducive to reducing the resistance of the second anode initialization signal G_Vref and improving the uniformity of the second anode initialization signal G_Vref received by the second pixel driving unit 400; the third initial signal isolation column of the isolation column layer is used to carry the third anode initialization signal B_Vref, which is conducive to reducing the resistance of the third anode initialization signal B_Vref and improving the uniformity of the third anode initialization signal B_Vref received by the third pixel driving unit 300. Therefore, the embodiment of the present invention further improves the display uniformity of the display panel.

[0143] Continue to see Figure 7 and Figure 8 On the basis of the above embodiments, optionally, the display panel further includes a cathode layer, the cathode layer is arranged on one side of the light-emitting functional layer, and the isolation layer further includes a first cathode isolation column 321, a second cathode isolation column ( Figure 8 ) and the third cathode isolation column ( Figure 8 ), where:

[0144] The first light emitting element 120 has a first cathode, the second light emitting element 420 has a second cathode, the third light emitting element 320 has a third cathode, the first cathode, the second cathode and the third cathode are electrically isolated and arranged in the cathode layer; the first cathode isolation column 321 is coupled to the first cathode and is configured with a first cathode signal, the second cathode isolation column is coupled to the second cathode and is configured with a second cathode signal, and the third cathode isolation column is coupled to the third cathode and is configured with a third cathode signal. This arrangement is conducive to setting the voltage values ​​of at least two of the first cathode signal, the second cathode signal and the third cathode signal to be different, and can compensate for the voltage difference between the first light emitting element 120, the second light emitting element and the third light emitting element, thereby balancing the efficiency of the first pixel driving unit 100, the second pixel driving unit 400 and the third pixel driving unit 300, and improving the uniformity of the display panel.

[0145] It should be understood that the functions of the above-mentioned first initial signal isolation column 311, the second initial signal isolation column and the third initial signal isolation column are, on the one hand, to isolate the first light-emitting element, the second light-emitting element and the third light-emitting element, and on the other hand, to carry the corresponding anode initialization signal; correspondingly, the functions of the first cathode isolation column 321, the second cathode isolation column and the third cathode isolation column are, on the one hand, to isolate the first light-emitting element, the second light-emitting element and the third light-emitting element, and on the other hand, to carry the corresponding cathode signal.

[0146] Continue to see Figure 7 and Figure 8 On the basis of the above embodiments, the display panel may optionally further include other film layers, such as an active layer, a first metal layer, a second metal layer, a third metal layer, and an anode metal layer. An insulating layer (such as a first insulating layer 41, a second insulating layer 42, a third insulating layer 43, and a fourth insulating layer 44) is disposed between each film layer.

[0147] Taking the first pixel driving unit as an example, the first metal layer is provided with a gate 13 of a first anode initialization transistor; the active layer is provided with a semiconductor 12 of the first anode initialization transistor; the third metal layer is provided with a plate 14 of a capacitor; the fourth metal layer is provided with a first end 15 and a second end 16 of the first anode initialization transistor, and the first end 15 and the second end 16 are electrically connected to the semiconductor 12 respectively.

[0148] The first anode initialization transistor is a transistor in the first anode initialization module 110 . Exemplarily, the first anode initialization module 110 only includes the anode initialization transistor. The first anode initialization transistor is denoted by reference numeral 110 hereinafter.

[0149] The anode metal layer is provided with an anode 21 of the first light-emitting element 120, and the anode 21 is also provided with a light-emitting layer 22 and a cathode 23 of the first light-emitting element 120. The isolation column layer is provided with a first initial signal isolation column 31, and the first initial signal isolation column 31 is conductive, and the first initial signal isolation column 31 is electrically connected to the first end 15 of the first anode initialization transistor 110 across the membrane layer; the second end 16 of the first anode initialization transistor 110 is electrically connected to the anode 21 of the first light-emitting element 120.

[0150] The first anode initialization signal R_Vref of the first light emitting element 120 is transmitted by the first initial signal isolation column 31 .

[0151] It should be noted that in the above embodiments, the first end of the first anode initialization transistor is electrically connected to the first isolation column, and the second end is electrically connected to the anode of the first light-emitting element. This is not a limitation of the present invention. In other embodiments, the first anode initialization module may also include other transistors, and the other transistors are used to assist the first anode initialization transistor in initializing the anode of the light-emitting element. For example, other transistors are also provided between the first anode initialization transistor and the anode of the light-emitting element.

[0152] Continue to see Figure 8 On the basis of the above embodiments, optionally, the first metal layer is further provided with a gate 18 of a first driving transistor; the semiconductor 17 of the first driving transistor is provided in the active layer; the first end 19 and the second end 1A of the first driving transistor are provided in the fourth metal layer, and the first end 19 and the second end 20 are electrically connected to the semiconductor 12 respectively. The capacitor plate 14 and the gate 18 of the first driving transistor are overlapped to form a storage capacitor. Among them, the first driving transistor is a transistor in the first driving module 130. Exemplarily, the first driving module 130 only includes the first driving transistor, and the first driving transistor is denoted by the figure mark 130 below. Exemplarily, the anode 21 is electrically connected to the first end 19 of the first driving transistor, and the driving current generated by the first driving transistor is transmitted to the anode 21. Under the action of the voltage of the anode 21 and the voltage of the cathode 23, the light-emitting layer 22 emits light.

[0153] On the basis of the above embodiments, optionally, the first initial signal isolation column 311, the second initial signal isolation column, the third initial signal isolation column, the first cathode isolation column 321, the second cathode isolation column and the third cathode isolation column are an integrated structure, for example, the cross-sectional shape can be a trapezoid with a large top and a small bottom, wherein the large top and the small bottom means that the side of the trapezoid away from the first metal layer is the bottom, and the side close to the first metal layer is the top. Such a setting is conducive to the preparation of the isolation column. Preferably, the first initial signal isolation column 311, the second initial signal isolation column, the third initial signal isolation column, the first cathode isolation column 321, the second cathode isolation column and the third cathode isolation column can be prepared by the same process. Optionally, the first gate isolation column 311, the second gate isolation column, the third gate isolation column, the first cathode isolation column 32, the second cathode isolation column and the third cathode isolation column can also be a layered structure, and the present invention is not limited to this.

[0154] Among them, the first cathode isolation column 321 is used to realize the whole-surface evaporation of the light-emitting material and carry the cathode voltage of the first light-emitting element 120. Exemplarily, after the array film layer provided with the transistor is prepared, an anode metal layer is formed on the array film layer, and the anode 21 is patterned to be electrically connected to the second end 16 of the anode initialization transistor 110, and the anode 21 is electrically connected to the first end 19 of the driving transistor 130; a sixth insulating layer 52 (i.e., a pixel definition layer) and an isolation column layer are prepared on the anode layer, and the isolation column layer is patterned to form a first initial signal isolation column 31 and a first cathode isolation column 321 that are larger at the top and smaller at the bottom; the sixth insulating layer 52 (i.e., a pixel definition layer) is patterned, a pixel opening is formed on the anode 21, and the first light-emitting material is evaporated in the pixel opening; and then the first cathode material is evaporated on the first light-emitting material.

[0155] The method of evaporating the first light-emitting material and the first cathode material is full-layer evaporation, and the first light-emitting material and the first cathode material are evaporated in each pixel opening (including the pixel openings corresponding to the first pixel driving unit 100, the second pixel driving unit 400 and the third pixel driving unit 300). Since the shape of the first cathode isolation column 321 is large at the top and small at the bottom, the material evaporated into two adjacent pixel openings is disconnected by the first cathode isolation column 321, and at the same time, the edge portion of the cathode 23 is electrically connected to the first cathode isolation column 32. Finally, the first light-emitting material and the first cathode material in the pixel openings corresponding to the second pixel driving unit 400 and the third pixel driving unit 300 are removed. At this point, the evaporation of the first light-emitting material and the first cathode material is completed.

[0156] The processes of evaporating the light emitting material and the cathode material in the pixel openings of the second pixel driving unit 400 and the third pixel driving unit 300 are similar and will not be described in detail.

[0157] It can be seen that, when the display panel provided by the embodiment of the present invention is used, when performing vapor deposition of the light-emitting element, a whole-layer vapor deposition process can be used, and a fine mask plate is not required, which is beneficial to reducing the manufacturing cost of the display panel. In addition, in the related art, a support column needs to be provided to support the fine mask plate, but the embodiment of the present invention does not need to use a fine mask plate, so there is no need to make the first initial signal isolation column 311 and the first cathode isolation column 321 play the role of supporting the fine mask plate. Therefore, the size and position of the first initial signal isolation column 311 and the first cathode isolation column 321 can be adjusted as needed.

[0158] Continue to see Figure 8 In the above embodiments, there are many ways to set the insulating layer between the film layers, which are described in detail below, but are not intended to limit the present invention.

[0159] Continue to see Figure 8In the above embodiments, there are many ways to set the insulating layer between the film layers, which are described in detail below, but are not intended to limit the present invention.

[0160] In one embodiment, optionally, a first insulating layer 41 is provided between the active layer and the first metal layer, and the first insulating layer 41 may also be referred to as a gate insulating layer, forming an insulating layer portion of the anode initialization transistor 110 and the driving transistor 130. The material of the first insulating layer 41 may be an inorganic material, such as SiN and / or SiO.

[0161] In one embodiment, optionally, a second insulating layer 42 is provided between the first metal layer and the second metal layer, and the second insulating layer 42 can also be called an intermediate insulating layer, forming an intermediate dielectric layer of the capacitor. The material of the second insulating layer 42 can be an inorganic material, such as SiN and / or SiO.

[0162] In one implementation, optionally, a third insulating layer 43 is disposed between the second metal layer and the third metal layer, and the material of the third insulating layer 43 may be an inorganic material, such as SiN and / or SiO.

[0163] In one embodiment, optionally, a fourth insulating layer 44 is further disposed between the third insulating layer 43 and the third metal layer. The material of the fourth insulating layer 44 may be an organic material, which can isolate the second metal layer and the third metal layer and also play a certain planarization role.

[0164] In one embodiment, optionally, a fifth insulating layer 51 is provided between the third metal layer and the anode metal layer. The fifth insulating layer 51 can flatten the surface of the third metal layer while isolating the third metal layer and the anode metal layer, which is beneficial to the flatness of the film layer during the subsequent preparation of the light-emitting element and optimizes the light emission effect of the light-emitting element.

[0165] In one embodiment, optionally, a sixth insulating layer 52 is further disposed on the anode metal layer. The sixth insulating layer 52 may also be referred to as a pixel definition layer, which can define the size of the pixel opening while isolating the anode metal layer and the isolation column layer.

[0166] In one embodiment, optionally, a seventh insulating layer 53 is further provided on the isolation column layer, and the seventh insulating layer 53 covers the cathode 23 and can isolate the light-emitting element 120; the seventh insulating layer 53 is also filled between the first initial signal isolation column 311 and the first cathode isolation column 321, and can isolate the first initial signal isolation column 311 and the first cathode isolation column 321.

[0167] It should be noted that, due to the shape characteristics of the first initial signal isolation column 311 and the first cathode isolation column 321, the space between the first initial signal isolation column 311 and the first cathode isolation column 321 is small at the top and large at the bottom, and the seventh insulating layer 53 may not be able to fill the space when deposited, which is allowed. With the improvement of the process, the seventh insulating layer 53 can also fill the space, and these situations are within the protection scope of the present invention.

[0168] In one embodiment, optionally, a sealing layer 61 and an encapsulation layer 62 are further disposed on the seventh insulating layer 53. Exemplarily, the sealing layer 61 is formed by inkjet printing, and the encapsulation layer 62 is formed by chemical vapor deposition.

[0169] It should be noted that, in the above-mentioned embodiments, the first driving transistor 130 is directly electrically connected to the first light-emitting element 120, which is not a limitation of the present invention. In other embodiments, for example, for a pixel driving circuit with a compensation function, a light-emitting control transistor is further provided between the first driving transistor 130 and the first light-emitting element 120.

[0170] On the basis of the above embodiments, optionally, the pixel driving circuit includes a plurality of first pixel driving units 100, a plurality of second pixel driving units 400 and a plurality of third pixel driving units 300. Figure 7 ,in:

[0171] The first cathode 111 in each first pixel driving unit 100 is coupled through the same first initial signal isolation column 311, the second cathode 211 in each second pixel driving unit 400 is coupled through the same second initial signal isolation column 312, and the third cathode 311 in each third pixel driving unit is coupled through the same third initial signal isolation column 313.

[0172] Through this arrangement, the same adjustment voltage can be provided to sub-pixels of the same color, thereby further achieving the beneficial effect of reducing the number of signal lines while ensuring the display effect of the display panel.

[0173] Continue to see Figure 7 On the basis of the above embodiments, optionally, multiple first pixel driving units 100 are arranged into multiple columns, multiple second pixel driving units 400 are arranged into multiple columns, and multiple third pixel driving units 300 are arranged into multiple columns, wherein the first cathodes 111 in each of the first pixel driving units 100 in the same column are coupled through the same first initial signal isolation column 311, the second cathodes 211 in each of the second pixel driving units 400 in the same column are coupled through the same second initial signal isolation column 312, and the third cathodes 311 in each of the third pixel driving units 300 in the same column are coupled through the same third initial signal isolation column 313.

[0174] Continue to see Figure 7 On the basis of the above embodiments, optionally, the first cathodes in the first pixel driving units 100 are coupled through the same first cathode isolation column 321, the second cathodes in the second pixel driving units 400 are coupled through the same second cathode isolation column 322, and the third cathodes in the third pixel driving units 300 are coupled through the same third cathode isolation column 323. Through this arrangement, the same cathode voltage can be provided to the sub-pixels of the same color, thereby further achieving the beneficial effect of reducing the number of signal lines on the basis of ensuring the display effect of the display panel.

[0175] Continue to see Figure 7 On the basis of the above embodiments, optionally, multiple first pixel driving units 100 are arranged into multiple columns, multiple second pixel driving units 400 are arranged into multiple columns, and multiple third pixel driving units 300 are arranged into multiple columns, wherein the first cathodes in the first pixel driving units 100 in the same column are coupled through the same first cathode isolation column 321, the second cathodes in the second pixel driving units 400 in the same column are coupled through the same second cathode isolation column 322, and the third cathodes in the third pixel driving units 300 in the same column are coupled through the same third cathode isolation column 323.

[0176] Continue to see Figure 8 and Figure 7 On the basis of the above embodiments, optionally, the first cathode isolation column 321 surrounds the first pixel driving unit 100, and the first initial signal isolation column 311 is located at the periphery of the first cathode isolation column 321; the second cathode isolation column 322 surrounds the second pixel driving unit 400, and the second initial signal isolation column 312 is located at the periphery of the second cathode isolation column 322; the third cathode isolation column 323 surrounds the third pixel driving unit 300, and the third initial signal isolation column 313 is located at the periphery of the third cathode isolation column 323.

[0177] In the above embodiments, the arrangement of the first initial signal isolation column 31 and the first cathode isolation column 321 can be adjusted according to the pixel arrangement. Figure 7 As shown, in one arrangement (such as RGB arrangement), each light emitting element is arranged neatly in the row direction and column direction, and the spacing between each light emitting element is equal. And the first initial signal isolation column 31 is located on the right side of the corresponding light emitting element, and no winding is required.

[0178] Fig. 9 A partial structural diagram of a display panel provided by an embodiment of the present invention. Fig. 9In another arrangement, the size of the blue light-emitting element B is larger; the size of the red light-emitting element R and the green light-emitting element G are smaller and are arranged alternately. The first initial signal isolation column 311 and the second initial signal isolation column 312 are both located on the red light-emitting element R and the green light-emitting element G for winding and routing. Specifically, the first initial signal isolation column 311 is wound on the right side of the red light-emitting element R to form a serpentine routing; the second initial signal isolation column 312 is wound on the left side of the green light-emitting element G to form a serpentine routing. Although the first initial signal isolation column 311 and the second initial signal isolation column 312 are wound, their extension direction is still the column direction. The third initial signal isolation column 313 is on the right side of the blue light-emitting element B and extends in a straight line.

[0179] Optionally, the first initial signal isolation column 311 is closer to the red light emitting element R, the second initial signal isolation column 312 is closer to the green light emitting element G, and the third initial signal isolation column 313 is closer to the blue light emitting element B, so as to simplify the wiring method.

[0180] Continue to see Fig. 9 Optionally, the first initial signal isolation column 31 is located at the periphery of the first cathode isolation column 321. Exemplarily, the first initial signal isolation column 311 is located at the periphery of the first cathode isolation column 3211, the second initial signal isolation column 312 is located at the periphery of the second cathode isolation column 3212, and the third initial signal isolation column 313 is located at the periphery of the third cathode isolation column 3213.

[0181] It should be noted that in an array, rows and columns are relative concepts. Generally, the vertical direction is considered to be a column and the horizontal direction is considered to be a row. However, at different angles, the vertical and horizontal directions are interchangeable, so rows can also be called columns and columns can also be called rows.

[0182] Fig.10 A schematic diagram of the structure of another display panel provided by an embodiment of the present invention. Fig.10 On the basis of the above embodiments, optionally, the display panel has a display area 81 and a frame area (exemplarily, including an upper frame area 82 and a lower frame area 83) arranged adjacent to each other, the pixel driving circuit is located in the display area 81, and the display panel at least includes: a first initial signal bus 711, a second initial signal bus 712, and a third initial signal bus 713. The first initial signal bus 711 is located in the frame area, and each first initial signal isolation column 311 is coupled to the first initial signal bus 711; the second initial signal bus 712 is located in the frame area, and each second initial signal isolation column 312 is coupled to the second initial signal bus 712; the third initial signal bus 713 is located in the frame area, and each third initial signal isolation column 313 is coupled to the third initial signal bus 713. This arrangement further simplifies the wiring of the display panel.

[0183] Optionally, a plurality of first pixel driving units 100 are arranged in a plurality of columns, a plurality of second pixel driving units are arranged in a plurality of columns, and a plurality of third pixel driving units are arranged in a plurality of columns, the columns extend along a first direction, the first initial signal bus 711, the second initial signal bus 712, and the third initial signal bus 713 extend along a second direction, and the first direction and the second direction have an angle. Preferably, the first direction is perpendicular to the second direction.

[0184] See also Fig.10 On the basis of the above embodiments, the display panel may further include: a first cathode bus 721, a second cathode bus 722 and a third cathode bus 723. The first cathode bus 721 is located in the frame area, and each first cathode isolation column 321 is coupled to the first cathode bus 721; the second cathode bus 722 is located in the frame area, and each second cathode isolation column 322 is coupled to the second cathode bus 722; the third cathode bus 723 is located in the frame area, and each third cathode isolation column 323 is coupled to the third cathode bus 723. This arrangement further simplifies the wiring of the display panel.

[0185] Optionally, a plurality of first pixel driving units 100 are arranged in a plurality of columns, a plurality of second pixel driving units are arranged in a plurality of columns, and a plurality of third pixel driving units are arranged in a plurality of columns, the columns extend along a first direction, the first cathode bus, the second cathode bus, and the third cathode bus extend along a second direction, and the first direction and the second direction have an angle. Preferably, the first direction is perpendicular to the second direction.

[0186] Continue to see Fig.10 In one embodiment of the present invention, optionally, the display panel further includes an upper frame area 82 and a lower frame area 83, the upper frame area 82 is located at the top of the display area 81, and the lower frame area 83 is located at the bottom of the display area 81. The upper frame area 82 and the lower frame area 83 are both provided with a first initial signal bus 711, which is equivalent to providing voltage from both ends of the first initial signal isolation column 311, which is conducive to improving the uniformity of the voltage signal received by each pixel driving unit. Similarly, the upper frame area 82 and the lower frame area 83 are both provided with a second initial signal bus 712 and a third initial signal bus 713.

[0187] In another embodiment of the present invention, optionally, the first initial signal bus 711 is only provided in the upper frame area 82; or, the first initial signal bus 711 is only provided in the lower frame area 83. The second initial signal bus 712 is only provided in the upper frame area 82; or, the second initial signal bus 712 is only provided in the lower frame area 83. The third initial signal bus 713 is only provided in the upper frame area 82; or, the third initial signal bus 713 is only provided in the lower frame area 83.

[0188] In one embodiment of the present invention, optionally, the first initial signal bus 711 , the second initial signal bus 712 , and the third initial signal bus 713 are all disposed in the isolation column layer.

[0189] Continue to see Fig.10 In one embodiment of the present invention, optionally, in the upper frame area 82, from top to bottom, there are the first initial signal bus 711, the second initial signal bus 712 and the third initial signal bus 713, each first initial signal isolation column 311 is connected to the first initial signal bus 711 through a crossover line, and each second initial signal isolation column 312 is connected to the second initial signal bus 712 through a crossover line. This arrangement can avoid the first initial signal isolation column 311 from shorting with the second initial signal bus 712 and the third initial signal bus 713; and avoid the second initial signal isolation column 312 from shorting with the second initial signal bus 713. Each third initial signal isolation column 313 is directly connected to the third initial signal bus 713. This arrangement is conducive to simplifying wiring. In the lower frame area 83, the initial signal buses and initial signal isolation columns are arranged in a similar manner and will not be repeated.

[0190] Continue to see Figure 7 In one embodiment of the present invention, optionally, the upper frame area 82 and the lower frame area 83 are both provided with a first cathode bus 721. This arrangement is equivalent to providing voltage from both ends of the first cathode isolation column 321, which is conducive to improving the uniformity of the voltage signal received by each pixel driving unit. Similarly, the upper frame area 82 and the lower frame area 83 are both provided with a second cathode bus 722 and a third cathode bus 723.

[0191] In the above embodiments, there are many ways to set the shape of the first initial signal isolation column 31 and the first cathode isolation column 321 to be larger at the top and smaller at the bottom. Several of them are described below, but they are not intended to limit the present invention. Among them, since the first initial signal isolation column 31 and the first cathode isolation column 321 are set in the same way, only the shape setting of the first initial signal isolation column 31 is described below, and the setting of the second initial signal isolation column, the third initial signal isolation column, the first cathode isolation column 321, the second cathode isolation column, and the third cathode isolation column are not described in detail.

[0192] Continue to see Figure 8 In one embodiment of the present invention, the first initial signal isolation column 31 is optionally provided as an integral part. Exemplarily, the first initial signal isolation column 31 with a larger top and a smaller bottom can be prepared by a lift-off process. Specifically, negative photoresist is applied, and then an opening is formed at the position of the first initial signal isolation column 31 through exposure and development, and then metal is evaporated in the opening, and the remaining photoresist is removed to form the first initial signal isolation column 31 with a larger top and a smaller bottom.

[0193] Fig.11 A schematic cross-sectional structure diagram of another display panel provided by an embodiment of the present invention. Fig.11 In another embodiment of the present invention, optionally, the first initial signal isolation column 31 includes at least two sub-film layers, the width of the upper sub-film layer is greater than the width of the lower sub-film layer, and the materials of the sub-film layers are different. Exemplarily, through multiple exposure + development + etching processes, the following can be formed: Fig.11 The first initial signal isolation column 31 is shown.

[0194] The embodiment of the present invention further provides a method for manufacturing a display panel, which is applicable to the display panel provided by any embodiment of the present invention and has corresponding beneficial effects. One of the methods is described below by way of example.

[0195] Fig.12 and Fig.13 A schematic diagram of the structure formed in each step of a method for manufacturing a display panel provided by an embodiment of the present invention. Fig.12 and Fig.13 , which specifically shows a method for preparing a first pixel driving unit 100, and the method for preparing a display panel includes the following steps:

[0196] S110 , forming an active layer, a first insulating layer 41 and a first metal layer in sequence.

[0197] The material of the first insulating layer 41 may be an inorganic material, such as SiN and / or SiO, and may be formed by deposition or other processes. The first metal layer is provided with a gate 13 of the first anode initialization transistor and a gate 18 of the first drive transistor; the active layer is provided with a semiconductor 12 of the first anode initialization transistor and a semiconductor 17 of the first drive transistor. The material of the first metal layer is metal, and may be formed by sputtering or evaporation processes, and then the gate 13 of the first anode initialization transistor and the gate 18 of the first drive transistor are formed by patterning.

[0198] S120 , forming a second insulating layer 42 and a second metal layer.

[0199] The material of the second insulating layer 42 may be an inorganic material, such as SiN and / or SiO, etc., and may be formed by deposition or other processes. The second metal layer is provided with a capacitor plate 14, and the material of the second metal layer is metal, which may be formed by sputtering or evaporation processes, and then patterned to form the capacitor plate 14.

[0200] S130 , forming a third insulating layer 43 and a third metal layer.

[0201] The material of the third insulating layer 43 may be an inorganic material, such as SiN and / or SiO, etc., and may be formed by a deposition process. Optionally, after forming the third insulating layer 43, a fourth insulating layer 44 is formed on the third insulating layer 43. The material of the fourth insulating layer 44 may be an organic material, which can isolate the second metal layer and the third metal layer and also play a certain flattening role.

[0202] After forming the third insulating layer 43 and the fourth insulating layer 44, a via is formed by processes such as photoresist coating + exposure + development + etching. The third metal layer is provided with a first end 15, a second end 16 of the first anode initialization transistor, a first end 19 and a second end 1A of the first driving transistor. The material of the third metal layer is metal, which can be formed by processes such as sputtering or evaporation, and then the first end 15, the second end 16, the first end 19 and the second end 1A are formed by patterning. The first end 15 and the second end 16 are respectively connected to the semiconductor 12 through vias, and the first end 19 and the second end 1A are respectively connected to the semiconductor 17 through vias.

[0203] S140 , forming a fifth insulating layer 51 and an anode metal layer.

[0204] Among them, the material of the fifth insulating layer 51 can be an organic material. While isolating the third metal layer and the anode metal layer, the fifth insulating layer 51 can flatten the surface of the third metal layer, which is beneficial to the flatness of the film layer during the subsequent preparation of the first light-emitting element and optimizes the light-emitting effect of the first light-emitting element.

[0205] After forming the fifth insulating layer 51, an anode opening is formed by processes such as photoresist coating + exposure + development + etching. The anode metal layer is provided with an anode 21 of the first light-emitting element. The material of the anode metal layer is metal, which can be formed by processes such as sputtering or evaporation, and then the anode 21 is formed by patterning. The source anode 21 is connected to the terminal 15 through the anode opening.

[0206] S150 , forming a sixth insulating layer 52 , and forming an isolation column layer on the sixth insulating layer 52 .

[0207] The isolation column layer includes a first initial signal isolation column 31, which is shaped as being larger at the top and smaller at the bottom, and is conductive; the first initial signal isolation column 31 is electrically connected to the first end 15 of the first anode initialization transistor across the membrane layer. Exemplarily, before forming the isolation column layer, the sixth insulating layer 52 is patterned, a via is formed on the first end 15, and then the isolation column layer is formed to connect the first initial signal isolation column 31 to the first end 15.

[0208] Optionally, the isolation column layer further includes a first cathode isolation column 321, which is shaped larger at the top and smaller at the bottom, and is conductive. The first initial signal isolation column 31 is shaped larger at the top and smaller at the bottom, and the first initial signal isolation column 31 and the first cathode isolation column 321 are prepared using the same process.

[0209] Optionally, the first initial signal isolation column 31 is integrally provided, and the first cathode isolation column 321 is integrally provided. Exemplarily, the first initial signal isolation column 31 and the first cathode isolation column 321, which are larger at the top and smaller at the bottom, can be prepared by a lift-off process. Specifically, negative photoresist is applied, and then openings are formed at the positions of the first initial signal isolation column 31 and the first cathode isolation column 321 through exposure and development, and then metal is evaporated in the openings, and the first initial signal isolation column 31 and the first cathode isolation column 321, which are larger at the top and smaller at the bottom, are formed after removing the remaining photoresist.

[0210] S160 , forming an opening on the sixth insulating layer 52 to expose the anode 21 .

[0211] Exemplarily, an opening exposing the anode 21 is formed by processes such as photoresist coating+exposure+development+etching, and the opening defines the size of the pixel opening.

[0212] S170 , forming the light-emitting layer 22 and the cathode 23 of the first light-emitting element on the anode 21 .

[0213] The light-emitting layer 22 and the cathode 23 can be evaporated in their entirety, the light-emitting layer 22 and cathode 23 of adjacent light-emitting elements are disconnected by the first cathode isolation column 321 , and the cathode 23 of the light-emitting element is connected to the first cathode isolation column 321 .

[0214] Exemplarily, the first light-emitting element is a red light-emitting element, the second light-emitting element is a green light-emitting element, and the third light-emitting element is a blue light-emitting element. The light-emitting layer and the cathode layer of the red light-emitting element are evaporated in the entire layer, and the red light-emitting layer and the cathode layer are evaporated in each pixel opening. Since the shape of the first cathode isolation column 321 is larger at the top and smaller at the bottom, the material evaporated into the two adjacent pixel openings is disconnected by the first cathode isolation column 321, and at the same time, the edge portion of the cathode 23 is electrically connected to the first cathode isolation column 321; the light-emitting layer and the cathode layer outside the red pixel opening are removed;

[0215] The green light-emitting layer and cathode layer of the green light-emitting element are evaporated throughout the layer. The green light-emitting layer and cathode layer are evaporated in each pixel opening. Since the red light-emitting layer and cathode layer have been evaporated in the red pixel opening, the green light-emitting layer and cathode layer are stacked on the red light-emitting layer and cathode layer in the red pixel opening; the green light-emitting layer and cathode layer outside the green pixel opening are removed;

[0216] The light-emitting layer and cathode layer of the blue light-emitting element are evaporated throughout the layer, and the blue light-emitting layer and cathode layer are evaporated in each pixel opening. Since the red light-emitting layer and cathode layer have been evaporated in the red pixel opening, and the green light-emitting layer and cathode layer have been evaporated in the green pixel opening, in the red pixel opening, the blue light-emitting layer and cathode layer are stacked on the red light-emitting layer and cathode layer; in the green pixel opening, the blue light-emitting layer and cathode layer are stacked on the green light-emitting layer and cathode layer; the blue light-emitting layer and cathode layer outside the blue pixel opening are removed.

[0217] Thus, red light-emitting elements, green light-emitting elements, and blue light-emitting elements can be formed without using a fine mask.

[0218] S180 , forming a seventh insulating layer 53 , a sealing layer 61 and an encapsulation layer 62 on the cathode 23 .

[0219] In each embodiment of the display panel, specific descriptions of the preparation methods and processes are given for different display panel structures. These preparation methods and processes can all be considered as the preparation methods of the display panels provided in the embodiments of the present invention, and repeated contents will not be repeated here.

[0220] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps described in the present invention can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solution of the present invention can be achieved, and this document does not limit this.

[0221] The above specific implementations do not constitute a limitation on the protection scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A pixel driving circuit, characterized in that: The pixel driving circuit at least comprises: A first pixel driving unit, the first pixel driving unit comprising a first light emitting element, the first light emitting element having a first anode; A second pixel driving unit, the second pixel driving unit comprising a second light emitting element, the second light emitting element having a second anode; A third pixel driving unit, the third pixel driving unit comprising a third light emitting element, the third light emitting element having a third anode; Among them, the light-emitting colors of the first light-emitting element, the second light-emitting element and the third light-emitting element are different from each other, the first anode is configured with a first anode initialization signal, the second anode is configured with a second anode initialization signal, and the third anode is configured with a third anode initialization signal, and the voltage values ​​of at least two of the first anode initialization signal, the second anode initialization signal and the third anode initialization signal are different.

2. The pixel driving circuit according to claim 1, characterized in that: Voltage values ​​of the first anode initializing signal, the second anode initializing signal, and the third anode initializing signal are different from each other.

3. The pixel driving circuit according to claim 1, characterized in that: in: When the first light-emitting element, the second light-emitting element and the third light-emitting element are displayed at a first brightness, the first anode is configured with the first anode initialization signal, the second anode is configured with the second anode initialization signal, and the third anode is configured with the third anode initialization signal; When the first light-emitting element, the second light-emitting element and the third light-emitting element are displayed at a second brightness, the first anode, the second anode and the third anode are configured with a common initialization signal, the first brightness is less than the second brightness, and the voltage value of the first anode initialization signal, the voltage value of the second anode initialization signal and the voltage value of the third anode initialization signal are all greater than the voltage value of the common initialization signal; Preferably, the first light emitting element has a first cathode, the second light emitting element has a second cathode, the third light emitting element has a third cathode, the first cathode, the second cathode and the third cathode are configured with cathode signals, and the cathode signals are multiplexed as the common initialization signal; Preferably, at least two of the first cathode, the second cathode and the third cathode are configured with the cathode signals having different voltage values; Preferably, the first cathode, the second cathode and the third cathode are configured with cathode signals having different voltage values.

4. A display panel, characterized in that: The display panel comprises the pixel driving circuit according to any one of claims 1 to 3, wherein the display panel further comprises: a switch circuit coupled to the pixel driving circuit and connected to a common initialization signal, the first anode initialization signal, the second anode initialization signal, and the third anode initialization signal, wherein the switch circuit is configured to be controlled by at least a first control signal, and when the first light-emitting element, the second light-emitting element, and the third light-emitting element are displayed at a first brightness, the first anode initialization signal, the second anode initialization signal, and the third anode initialization signal are respectively configured to the first anode, the second anode, and the third anode, and when the first light-emitting element, the second light-emitting element, and the third light-emitting element are displayed at a second brightness, the common initialization signal is respectively configured to the first anode, the second anode, and the third anode; The first brightness is lower than the second brightness, and the voltage values ​​of the first anode initialization signal, the second anode initialization signal, and the third anode initialization signal are all higher than the voltage value of the common initialization signal.

5. The display panel according to claim 4, characterized in that: The switch circuit is also controlled by a second control signal to configure the common initialization signal, the first anode initialization signal, the second anode initialization signal, and the third anode initialization signal. The switch circuit includes a plurality of signal selection units respectively coupled to the first anode, the second anode, and the third anode, each of the signal selection units including: a first transistor, wherein a gate of the first transistor is connected to the first control signal, a first terminal of the first transistor is connected to the common initialization voltage, and a second terminal of the first transistor is coupled to a corresponding one of the first anode, the second anode and the third anode; a second transistor, wherein a gate of the second transistor is connected to the second control signal, a first terminal of the second transistor is connected to a corresponding one of the first anode initialization signal, the second anode initialization signal and the third anode initialization signal, and a second terminal of the second transistor is coupled to a corresponding one of the first anode, the second anode and the third anode; Preferably, the first transistor and the second transistor are transistors of the same channel type, and when the first control signal is at a first level, the second control signal is at a second level, and the first level and the second level are different; Preferably, the first transistor and the second transistor are transistors of different channel types, and the first control signal is multiplexed into the second control signal.

6. The display panel according to claim 4, characterized in that: The display panel further includes: a light-emitting functional layer, in which a portion of the first light-emitting elements, a portion of the second light-emitting elements, and a portion of the third light-emitting elements are arranged; an isolation layer, used to isolate the first light-emitting element, the second light-emitting element and the third light-emitting element, the isolation layer at least comprising a first initial signal isolation column, a second initial signal isolation column and a third initial signal isolation column; Among them, the first initial signal isolation column is coupled to the first anode and is configured with the first anode initialization signal, the second initial signal isolation column is coupled to the second anode and is configured with the second anode initialization signal, and the third initial signal isolation column is coupled to the third anode and is configured with the third anode initialization signal.

7. The display panel according to claim 6, characterized in that: The display panel further includes a cathode layer, which is disposed on one side of the light-emitting functional layer, and the isolation layer further includes a first cathode isolation column, a second cathode isolation column and a third cathode isolation column, wherein: The first light emitting element has a first cathode, the second light emitting element has a second cathode, and the third light emitting element has a third cathode, and the first cathode, the second cathode and the third cathode are electrically isolated and arranged in the cathode layer; The first cathode isolation column is coupled to the first cathode and is configured with a first cathode signal, the second cathode isolation column is coupled to the second cathode and is configured with a second cathode signal, and the third cathode isolation column is coupled to the third cathode and is configured with the third cathode signal; Preferably, at least two of the first cathode signal, the second cathode signal and the third cathode signal have different voltage values; Preferably, voltage values ​​of the first cathode signal, the second cathode signal and the third cathode signal are different from each other.

8. The display panel according to claim 6, characterized in that: The pixel driving circuit comprises a plurality of the first pixel driving units, a plurality of the second pixel driving units and a plurality of the third pixel driving units, wherein: The first anodes in the first pixel driving units are coupled via the same first initial signal isolation column, the second anodes in the second pixel driving units are coupled via the same second initial signal isolation column, and the third anodes in the third pixel driving units are coupled via the same third initial signal isolation column; Preferably, multiple first pixel driving units are arranged into multiple columns, multiple second pixel driving units are arranged into multiple columns, and multiple third pixel driving units are arranged into multiple columns, wherein the first anodes in each of the first pixel driving units in the same column are coupled through the same first initial signal isolation column, the second anodes in each of the second pixel driving units in the same column are coupled through the same second initial signal isolation column, and the third anodes in each of the third pixel driving units in the same column are coupled through the same third initial signal isolation column.

9. The display panel according to claim 7, characterized in that: The pixel driving circuit comprises a plurality of the first pixel driving units, a plurality of the second pixel driving units and a plurality of the third pixel driving units, wherein: The first cathodes in the first pixel driving units are coupled via the same first cathode isolation column, the second cathodes in the second pixel driving units are coupled via the same second cathode isolation column, and the third cathodes in the third pixel driving units are coupled via the same third cathode isolation column; Preferably, a plurality of the first pixel driving units are arranged into multiple columns, a plurality of the second pixel driving units are arranged into multiple columns, and a plurality of the third pixel driving units are arranged into multiple columns, wherein the first cathodes in each of the first pixel driving units in the same column are coupled through the same first cathode isolation column, the second cathodes in each of the second pixel driving units in the same column are coupled through the same second cathode isolation column, and the third cathodes in each of the third pixel driving units in the same column are coupled through the same third cathode isolation column.

10. The display panel according to claim 4, characterized in that: The display panel has a display area and a frame area that are adjacent to each other, the pixel driving circuit is located in the display area, and the switch circuit is located in the frame area; Preferably, the display panel at least includes: A first initial signal bus is located in the border area, and each of the first initial signal isolation columns is coupled to the first initial signal bus; A second initial signal bus is located in the frame area, and each of the second initial signal isolation columns is coupled to the second initial signal bus; A third initial signal bus is located in the border area, and each of the third initial signal isolation columns is coupled to the third initial signal bus; Preferably, a plurality of the first pixel driving units are arranged into a plurality of columns, a plurality of the second pixel driving units are arranged into a plurality of columns, and a plurality of the third pixel driving units are arranged into a plurality of columns, the columns extend along a first direction, the first initial signal bus, the second initial signal bus, and the third initial signal bus extend along a second direction, and the first direction and the second direction have an angle; Preferably, the first direction is perpendicular to the second direction; Preferably, the display panel further includes: A first cathode bus line is located in the frame area, and each of the first cathode isolation columns is coupled to the first cathode bus line; A second cathode bus line is located in the frame area, and each of the second cathode isolation columns is coupled to the second cathode bus line; A third cathode bus line is located in the frame area, and each of the third cathode isolation columns is coupled to the third cathode bus line; Preferably, a plurality of the first pixel driving units are arranged in a plurality of columns, a plurality of the second pixel driving units are arranged in a plurality of columns, and a plurality of the third pixel driving units are arranged in a plurality of columns, the columns extend along a first direction, the first cathode bus, the second cathode bus and the third cathode bus extend along a second direction, and the first direction and the second direction have an angle; Preferably, the first direction is perpendicular to the second direction.

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