Analog domain content addressable memory system

Abstract

The invention belongs to the technical field of data retrieval, and particularly discloses an analog domain content addressable memory system, which comprises a main processor, at least one content addressable memory submodule and a comparator, the main processor is used for splitting search data into search fields and distributing the search fields to the corresponding content addressable memory sub-modules; the content addressable memory sub-module is used for comparing the difference degree between each search word bit in the search field and the simulation content stored in the simulation content addressable memory of the corresponding column, and outputting current corresponding to each row; and the comparator is used for determining a target row which is most matched with the search data based on the current corresponding to each row in each content addressable memory sub-module. Through the method and the device, storage and search of the analog value data can be realized, the current value with the corresponding size is output based on the matching degree of each bit of data, and the difference between the input data and the stored data is accurately quantified.

Description

Technical Field

[0001] The present application belongs to the technical field of data retrieval, and more specifically, relates to an analog domain content addressable memory system. Background Art

[0002] Content-addressable memory (CAM) is a memory that stores data by content rather than address. It can efficiently compare input data with stored data in parallel. In addition to being used for network transmission and reception, routing addressing, CAM has been widely used in machine learning, pattern recognition and other fields in recent years, thanks to its ability to perform similarity search at high speed.

[0003] For big data and large models, as the size of the database continues to increase, the hardware overhead of using CAM to implement retrieval tasks has also increased dramatically. Compared with traditional binary or ternary CAM, analog CAM can store and search data in the analog domain without the need for digital-to-analog converters. It has significant advantages in density and energy efficiency and is more capable of high-dimensional and large-data-volume application scenarios.

[0004] However, most analog CAMs do not have the ability to express the degree of matching between each bit of data, which cannot meet the requirements of similarity search for machine learning and data retrieval tasks. How to improve the data retrieval accuracy of analog domain content addressable memory systems is a technical problem that needs to be solved urgently in this field. Summary of the invention

[0005] In view of the defects of the prior art, the purpose of the present application is to improve the data retrieval accuracy of the analog domain content addressable memory system.

[0006] To achieve the above object, the present application provides an analog domain content addressable memory system, the system comprising: a main processor, at least one content addressable memory submodule and a comparator, the content addressable memory submodule having an analog content addressable memory with m rows and n columns, m and n being positive integers, and the analog content stored in the same row of all the content addressable memory submodules represents a piece of stored data;

[0007] The main processor is used to split the search data into s search fields (when s=1, the search data is 1 search field), and allocate each search field to a corresponding content addressable memory submodule, s is the number of content addressable memory submodules, and the number of bits of the search field is less than or equal to n;

[0008] The content addressable memory submodule is used to compare the difference between each search word bit in the search field and the analog content stored in the analog content addressable memory of the corresponding column, and output the current corresponding to each row, wherein the current corresponding to one row is determined based on the first current output by each analog content addressable memory in the corresponding row, and the first current has a preset proportional relationship with the difference;

[0009] The comparator is used to determine the target row that best matches the search data based on the current corresponding to each row in each content addressable memory submodule.

[0010] The relevant concepts of search data, search field and search word bit are explained here. Search data is the data input to the content addressable memory sub-module. When the search data length is less than n, a search data can be searched directly; when the search data length is greater than n, a search data will be split into multiple search fields; a search field can include multiple bits, and the search word bit is a bit in the search field.

[0011] The relevant concepts of storage data, storage fields and storage word bits are explained here. Storage data refers to data stored in the content addressable memory sub-module. When the storage data length is less than n, a storage data can be directly stored in a content addressable memory sub-module; when the storage data length is greater than n, a storage data will be split into multiple storage fields; a storage field can include multiple bits, and a storage word bit is a bit in the storage field.

[0012] The data storage method of the content addressable memory sub-module is explained here. The main processor can split each piece of storage data into s storage fields (a storage field is a field in the storage data) based on m pieces of storage data, and the number of bits of the storage field is less than n; the s storage fields of each piece of storage data are written to the corresponding rows in each content addressable memory sub-module, and an analog content addressable memory is used to store an analog value corresponding to a storage word bit (a storage word bit is a bit in the storage field).

[0013] For example, the analog domain content addressable memory system is configured with two content addressable memory sub-modules, and the content addressable memory sub-module has an analog content addressable memory with three rows and four columns. Three pieces of storage data can be split into two storage fields, each storage field has four storage word bits, and the two storage fields of the first piece of storage data are respectively stored in the first row of the two content addressable memory sub-modules, and the two storage fields of the second piece of storage data are respectively stored in the second row of the two content addressable memory sub-modules, and so on.

[0014] The above-mentioned splitting of the search data into s search fields is explained here. When the analog domain content addressable memory system is configured with 1 content addressable memory sub-module, the search data can be used as 1 search field. When the analog domain content addressable memory system is configured with 2 content addressable memory sub-modules, the search data can be split into 2 search fields. Similarly, when the analog domain content addressable memory system is configured with s content addressable memory sub-modules, the search data can be split into s search fields.

[0015] Here, an example is given to illustrate the above-mentioned allocation of each search field to the corresponding content addressable memory sub-module. For example, the analog domain content addressable memory system is configured with 3 (i.e., s=3) content addressable memory sub-modules. The search data can be split into 3 search fields, and the first search field is allocated to the first content addressable memory sub-module, the second search field is allocated to the second content addressable memory sub-module, and the third search field is allocated to the third content addressable memory sub-module, so as to allocate one search field to each content addressable memory sub-module.

[0016] Here, an example is given to illustrate the difference between the above-mentioned comparison of the difference between each search word bit in the search field and the analog content stored in the analog content addressable memory of the corresponding column. For example, the content addressable memory submodule has an analog content addressable memory with 2 rows and 3 columns, and the search field has 3 search word bits. In this case, the content addressable memory submodule can simultaneously compare the difference between the first search word bit in the search field and the analog content stored in each analog content addressable memory in the first column, and compare the difference between the second search word bit in the search field and the analog content stored in each analog content addressable memory in the second column, and compare the difference between the third search word bit in the search field and the analog content stored in each analog content addressable memory in the third column. Optionally, in the number of bits n in the search field, Bit When the number of columns of the content addressable memory submodule is greater than the number of bits in the search field, the content addressable memory submodule can compare each search word bit in the search field with the first n Bit The difference between the analog contents stored in the analog content addressable memories of corresponding columns in the columns.

[0017] Here, an exemplary explanation is given of the current corresponding to the above-mentioned row being determined based on the first current output by each analog content addressable memory in the corresponding row. For example, the sum of the first currents output by each analog content addressable memory in the 1st row is used as the current corresponding to the 1st row, the sum of the first currents output by each analog content addressable memory in the 2nd row is used as the current corresponding to the 2nd row, and so on. The sum of the first currents output by each analog content addressable memory in the mth row is used as the current corresponding to the mth row.

[0018] It can be understood that by splitting the search data into s search fields and assigning each search field to a corresponding content addressable memory sub-module, the content addressable memory sub-module can store m pieces of storage data (the analog content stored in the same row in all content addressable memory sub-modules represents one piece of storage data).

[0019] Furthermore, the content addressable memory submodule can compare the difference between each search word bit in the search field and the analog content (representing a storage word bit) stored in the analog content addressable memory of the corresponding column, and output the current corresponding to each row to the comparator. The first current and the difference have a preset proportional relationship. The first current can represent the Manhattan distance between a search word bit in a search data and a corresponding storage word bit in a storage data, and has the ability to express the degree of matching between each bit of data. The current corresponding to a row is determined based on the sum of the first currents output by each analog content addressable memory in the corresponding row (the analog content stored in the analog content addressable memory of a row represents a storage field). Therefore, the current corresponding to a row can represent the Manhattan distance between a search field in a search data and a corresponding storage field in a storage data.

[0020] Furthermore, the comparator can determine the Manhattan distance between a search data and any one of the m storage data (that is, the analog content stored in the same row in all the content addressable memory sub-modules) based on the current corresponding to each row in each content addressable memory sub-module, and then can determine the target row that best matches the search data in the m rows, that is, the analog content stored in the target row in all the content addressable memory sub-modules best matches the search data.

[0021] Therefore, the analog domain content addressable memory system provided by the present application stores and searches data in the form of analog values, and the storage density is greatly improved compared to binary or ternary CAM. At the same time, the output current of the analog CAM can reflect the Manhattan distance between the data, has the ability to express the degree of matching between each bit of data, can accurately output the difference between the search data and the stored data, and can effectively improve the data retrieval accuracy of the analog domain content addressable memory system. The high-density and similarity search capabilities of this design can well meet the current application requirements in the fields of machine learning and data retrieval.

[0022] In a possible implementation, the content addressable memory submodule includes a voltage driving unit, an analog content addressable memory array and a current reading unit, and the analog content addressable memory array is composed of m rows and n columns of analog content addressable memories;

[0023] The voltage driving unit is used to encode each search word bit in the search field into a voltage signal (the voltage signal can represent the content of the search word bit), and input the voltage signal corresponding to each search word bit into the analog content addressable memory of the corresponding column;

[0024] The analog content addressable memory is used to compare the difference between the search word bit and the analog content based on the voltage signal and the stored analog content (the analog value corresponding to the storage word bit), and output the first current to the current reading unit;

[0025] The current readout unit includes m input ports and m output ports, one input port corresponds to one output port, and the first current output by the analog content addressable memory in the same row enters the same input port of the current readout unit (through the matching line) (the first current output by the analog content addressable memory in different rows enters different input ports of the current readout unit);

[0026] The current sensing unit is used to stabilize the voltage of the input port and copy the current of the input port as the current of the output port;

[0027] The comparator comprises m input ports (one input port of the comparator corresponds to the same row in each analog content addressable memory array), and the output ports corresponding to the same row in different current readout units are connected to the same input port in the comparator;

[0028] The comparator is used to determine the target row that best matches the search data based on the currents of the m input ports.

[0029] Here, it is explained that the first current output by the analog content addressable memory in the same row enters the same input port of the current reading unit. The current output end of the analog content addressable memory in the same row is connected to the same matching line, and then the sum of the first currents output by the analog content addressable memory in the same row will enter the input port of the current reading unit through the matching line.

[0030] Here, an example is given of connecting the output ports corresponding to the same row in different current readout units to the same input port in the comparator. For example, the analog domain content addressable memory system is configured with 2 content addressable memory sub-modules, and the content addressable memory sub-module has 3 rows and 4 columns of analog content addressable memory. Accordingly, the comparator includes 3 input ports. In this case, the output ports corresponding to the 1st row in the current readout units of the 2 content addressable memory sub-modules are all connected to the 1st input port in the comparator; the output ports corresponding to the 2nd row are all connected to the 2nd input port in the comparator; and the output ports corresponding to the 3rd row are all connected to the 3rd input port in the comparator.

[0031] The search process is described here. The search process includes the following steps: (1) The main processor determines that the analog content addressable memory working mode is the exact match mode or the interval match mode, and inputs the search data into the content addressable memory sub-module, and starts the voltage clamping circuit in the current reading unit to stabilize the matching line voltage; (2) The input search data is encoded into a corresponding voltage value through the voltage driving unit, input into the analog content addressable memory array, and then searched and compared with the data stored in the array in parallel, and the results are reflected in the current of each matching line; (3) After the current reading unit reads the matching line current, the matching line with the smallest current value is screened out through the comparator circuit. This row is the location of the data with the highest matching degree.

[0032] Therefore, the current of an input port of the comparator can represent the Manhattan distance between a search data and a storage data. Then, based on the currents of the m input ports, the target row that best matches the search data can be determined among the m rows, that is, the analog content stored in the target row in the entire content addressable memory submodule best matches the search data.

[0033] In a possible implementation, the analog content addressable memory includes: a first storage unit (unit P) and a second storage unit (unit N);

[0034] The first storage unit is used to compare the difference between the search word bit and the analog content based on the analog content stored in the storage unit and the voltage signal provided by the voltage driving unit; if the search word bit is smaller than the analog content stored in the storage unit, the second current proportional to the difference is output; otherwise, the output current is 0;

[0035] The second storage unit is used to compare the difference between the search word bit and the analog content based on the analog content stored in the storage unit and the voltage signal provided by the voltage driving unit; if the search word bit is greater than the analog content stored in the storage unit, output a third current proportional to the difference; otherwise, the output current is 0;

[0036] The current output terminal of the first storage unit and the current output terminal of the second storage unit are connected to the same input port of the current readout unit through a matching line, and the first current is the sum of the second current and the third current.

[0037] In a possible implementation, the voltage driving unit is used to encode each search word bit in the search field into a first voltage signal V BLP , the second voltage signal The third voltage signal V BLN and the fourth voltage signal

[0038] The first storage unit includes: a first non-volatile device, a second non-volatile device and a first MOSFET, and the voltage driving unit provides a first voltage signal V corresponding to the search word bit (through the first bit line) BLP To the top electrode of the first non-volatile device; the bottom electrode of the first non-volatile device, the drain of the first MOSFET and the bottom electrode of the second non-volatile device are electrically connected, and the voltage driving unit (through the second bit line) provides a second voltage signal corresponding to the search word bit to a top electrode of a second nonvolatile device;

[0039] The second storage unit includes: a third non-volatile device, a fourth non-volatile device and a second MOSFET, and the voltage driving unit provides (through a third bit line) a third voltage signal V corresponding to the search word bit. BLN The top electrode of the third non-volatile device is electrically connected to the bottom electrode of the third non-volatile device, the drain of the second MOSFET and the bottom electrode of the fourth non-volatile device, and the voltage driving unit (through the fourth bit line) provides a fourth voltage signal corresponding to the search word bit. to a top electrode of a fourth nonvolatile device;

[0040] The first MOSFET and the second MOSFET are N-type transistors operating in a diode mode, the drain and the gate of the MOSFET are electrically connected, and the source of the first MOSFET and the source of the second MOSFET are commonly connected to the same input port of the current reading unit through a matching line;

[0041] The non-volatile device is used to store the conductivity value corresponding to a storage word bit in a piece of storage data;

[0042] VBLP It is determined by the following formula: V BLP =V ML +V GS +V P1 , V p1 = kV max +(1-k)V min ;

[0043] It is determined by the following formula:

[0044] V BLN It is determined by the following formula: V BLP =V ML +V GS +V N1 ;

[0045] It is determined by the following formula:

[0046] Among them, k represents the search word position, V ML Represents the voltage on the matching line, V GS Represents the voltage between the gate and source of the MOSFET, V P1 represents the voltage between the top electrode and the bottom electrode of the first nonvolatile device, V P2 represents the voltage between the top electrode and the bottom electrode of the second nonvolatile device, V N1 represents the voltage between the top electrode and the bottom electrode of the third nonvolatile device, V N2 represents the voltage between the top electrode and the bottom electrode of the fourth nonvolatile device, V max Indicates the maximum voltage difference between the two ends of the non-volatile device, V min Indicates the minimum value of the voltage difference between the two ends of the non-volatile device.

[0047] Here, the first bit line, the second bit line, the third bit line and the fourth bit line are explained. The voltage driving unit can be configured with n groups of bit lines, one group of bit lines corresponds to a column of analog content addressable memory, and the group of bit lines includes a first bit line, a second bit line, a third bit line and a fourth bit line. The first bit line is connected to the top electrode of the first non-volatile device of the first storage unit (unit P) in the analog content addressable memory of the corresponding column, the second bit line is connected to the top electrode of the second non-volatile device of the first storage unit (unit P) in the analog content addressable memory of the corresponding column, the third bit line is connected to the top electrode of the third non-volatile device of the second storage unit (unit N) in the analog content addressable memory of the corresponding column, and the fourth bit line is connected to the top electrode of the fourth non-volatile device of the second storage unit (unit N) in the analog content addressable memory of the corresponding column.

[0048] Here, the above-mentioned match line is explained. Each input port of the current readout unit may be configured with a match line, and one match line corresponds to the source of the MOSFET of the analog content addressable memory of one row.

[0049] In a possible implementation, in the first matching mode (precise matching mode), the conductance value G of the first non-volatile device is p1 , the conductivity value G of the second non-volatile device p2 , the conductivity value G of the third non-volatile device N1 and the conductance value G of the fourth nonvolatile device N2 Determined by the following formula:

[0050] G P1 =(1-j)G max +jG min ;

[0051] G P2 =jG max +(1-j)G min ;

[0052] G N1 =G P2 ,G N2 =G P1 ;

[0053] Among them, j represents the storage word bit, G max Indicates the maximum value of the conductance of the non-volatile device, G min Indicates the minimum value of the conductance of the nonvolatile device.

[0054] Optionally, k and j are both normalized data, that is, 0≤k, j≤1.

[0055] In a possible implementation, in the first matching mode (precise matching mode), the preset proportional relationship is determined by the following formula:

[0056] I ML =|kj|·α;

[0057] α=V max G max -V min G min ;

[0058] Among them, I ML represents the first current, |kj| represents the difference, and α represents the proportionality coefficient.

[0059] In a possible implementation, in the second matching mode (interval matching mode), the conductance value G of the first non-volatile device is p1, the conductivity value G of the second non-volatile device p2 , the conductivity value G of the third non-volatile device N1 and the conductance value G of the fourth nonvolatile device N2 Determined by the following formula:

[0060] G P1 =(1-j P )G max +j P G min ;

[0061] G P2 =j P G max +(1-j P )G min ;

[0062] G N1 =j N G max +(1-j N )G min ;

[0063] G N2 =(1-j N )G max +j N G min ;

[0064] Among them, j P <j N , j P Indicates the lower limit of the interval of the storage word, j N Indicates the upper limit of the storage word, G max Indicates the maximum value of the conductance of the non-volatile device, G min Indicates the minimum value of the conductance of the nonvolatile device.

[0065] In a possible implementation, in the second matching mode (interval matching mode), the preset proportional relationship is determined by the following formula:

[0066] When k is in the matching interval [j P ,j N ]In time, I ML =0;

[0067] In k <j P When ML =|kj P |α;

[0068] In k>j N When ML =|kj N |α;

[0069] α = V max G max -V min G min ;

[0070] Wherein, I ML represents the first current, |k - j P | and |k - j N | represent the degree of difference, and α represents the proportionality coefficient.

[0071] Optionally, the main processor can control the working mode (exact match mode or range match mode) of the analog content addressable memory and receive the final matching result (target row) output by the comparator.

[0072] In a possible implementation, the non-volatile device is a resistive random access memory, a ferroelectric memory, a phase change memory, a spin transfer torque magnetic random access memory, a NOR Flash device or a NAND Flash device.

[0073] In a possible implementation, the search bit k and the stored bit j are discrete values.

[0074] In a possible implementation, the current readout unit includes m current readout sub-units, and the current readout sub-unit includes a voltage clamping circuit and a current mirror;

[0075] The voltage clamping circuit is used to stabilize the voltage on the corresponding match line, and the first current output by the analog content addressable memory in the same row enters the current readout sub-unit through the same match line;

[0076] The current mirror is used to copy the current on the corresponding match line and output it to the comparator.

[0077] It should be noted that the current readout sub-unit has an input end and an output end. The input end of the current readout sub-unit serves as an input end of the current readout unit, and the output end of the current readout sub-unit serves as an output end of the current readout unit. The first current output by the analog content addressable memory in the same row enters the input end of the current readout sub-unit through the same match line, and the current output port of the current mirror serves as the output end of the current readout sub-unit.

[0078] In a possible implementation, when the preset proportional relationship is a direct proportional relationship, the comparator is a loser-take-all (LTA) circuit.

[0079] LTA includes m input ports (one input port of LTA corresponds to the same row in each analog content addressable memory array), and the output ports corresponding to the same row in different current readout units are connected to the same input port in LTA. LTA will compare the input currents in parallel, find the lowest value, and set the output of the row to 1, while the outputs of other rows are set to 0.

[0080] In general, the above technical solutions conceived by this application have the following beneficial effects compared with the prior art:

[0081] (1) The analog domain content addressable memory system provided by the embodiment of the present application stores and searches data in the form of analog values, which greatly improves the storage density compared to binary or ternary CAM. At the same time, the output current of the analog CAM can reflect the Manhattan distance between the data, has the ability to express the degree of matching between each bit of data, can accurately output the difference value between the search data and the stored data, and can effectively improve the data retrieval accuracy of the analog domain content addressable memory system. The high-density and similarity search capabilities of this design can well meet the current application requirements in the fields of machine learning and data retrieval.

[0082] (2) The analog content addressable memory provided in the embodiment of the present application can achieve an output proportional to the degree of matching, and can be configured as an exact match mode and an interval match mode. The exact match mode requires that each data bit must be completely consistent, while in the interval match mode, the data is matched within a given range. Compared with the analog content addressable memory that can only output "match" and "mismatch", it can adapt to the requirements of different application scenarios for data retrieval accuracy, and is applicable to a wider range of application scenarios, especially in scenarios where data needs to be clustered or similarity needs to be calculated in machine learning and neural network applications.

[0083] (3) The embodiments of the present application use a current readout circuit and a comparator circuit to directly compare the analog currents of the matching lines and output the results. The entire process is performed in the analog circuit without the need to convert to the digital domain for comparison, thus avoiding the large hardware resource and energy consumption overhead of the digital-to-analog converter. In the fields of artificial intelligence and other fields, it has significant energy efficiency advantages over existing computing systems. BRIEF DESCRIPTION OF THE DRAWINGS

[0084] Figure 1 It is a schematic diagram of the structure of the analog domain content addressable storage system provided in an embodiment of the present application;

[0085] Figure 2 It is a schematic diagram of the basic unit structure and working principle of the analog domain content addressable memory provided by the embodiment of the present application;

[0086] Figure 3 is a curve diagram showing the relationship between input data and input voltage value and storage data and device conductance value provided in an embodiment of the present application;

[0087] Figure 4 is a graph of output current of a matching line in an accurate matching mode provided in an embodiment of the present application;

[0088] Figure 5 is a curve diagram of the matching line output current of the interval matching mode provided in the embodiment of the present application;

[0089] Figure 6 is a matching line voltage clamping and current reading circuit diagram provided in an embodiment of the present application;

[0090] Figure 7 It is a schematic diagram of the search process provided by the embodiment of the present application;

[0091] Figure 8 It is a schematic diagram of an example of a simulated content addressable memory performing a precise search process provided by an embodiment of the present application;

[0092] Fig. 9 It is a simulation waveform diagram of a simulated content addressable memory performing a precise search process provided by an embodiment of the present application;

[0093] Fig.10 It is a schematic diagram of an example of simulating a content addressable memory execution interval search process provided by an embodiment of the present application;

[0094] Fig.11 It is a simulation waveform diagram of the interval search process performed by the simulated content addressable memory provided in the embodiment of the present application.

[0095] Throughout the drawings, the same reference numerals are used to denote the same elements or structures, wherein:

[0096] 100: main processor; 102: content addressable memory submodule; 104: comparator; 106: voltage driving unit; 108: analog content addressable memory array; 110: current reading unit; 202: unit P; 204: unit N; 206: first non-volatile device; 208: second non-volatile device; 210: first MOSFET; 212: third non-volatile device; 214: fourth non-volatile device; 216: second MOSFET. DETAILED DESCRIPTION

[0097] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0098] The terms "first" and "second" in the specification and claims herein are used to distinguish different objects rather than to describe a specific order of the objects. For example, a first storage unit and a second storage unit are used to distinguish different response messages rather than to describe a specific order of the storage units.

[0099] In the embodiments of the present application, words such as "exemplary" or "for example" are used to indicate examples, illustrations or descriptions. Any embodiment or design described as "exemplary" or "for example" in the embodiments of the present application should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of words such as "exemplary" or "for example" is intended to present related concepts in a specific way.

[0100] In the description of the embodiments of the present application, unless otherwise specified, "multiple" means two or more than two. For example, multiple processing units refer to two or more processing units, etc.; multiple elements refer to two or more elements, etc.

[0101] The present application provides an analog domain content addressable memory system, which includes: a main processor, a content addressable memory sub-module, and a comparator; the main processor is used to split data into small data fields, and each data field is output to each content addressable memory sub-module respectively; at the same time, the main processor needs to configure the content addressable memory working mode to be exact match or interval match.

[0102] The content addressable memory submodule includes: a voltage driving unit, an analog content addressable memory array and a current reading unit.

[0103] (1) A voltage driving unit, used to output a voltage signal of an analog value to the analog content addressable memory array.

[0104] (2) Analog content addressable memory array, used to store analog value data, where each bit of data is stored through two complementary cells (cell P and cell N). Each cell (cell P or cell N) contains two non-volatile devices and an N-type metal-semiconductor-oxide field effect transistor operating in diode mode. The top electrodes of the two non-volatile devices are respectively connected to a pair of complementary bit lines (BL), while the bottom electrodes are connected to the gate and drain of the transistor, and the source of the transistor is connected to the matching line (ML). At this time, the transistor operates in diode mode. The input signal is applied to the analog CAM cell through the bit line in the form of a voltage. At this time, the second current I flowing from the cell P to the matching line OP is the current I of the two nonvolatile devices P1 with I P2 Similarly, the third current I flowing from unit N to the matching line ONis the current I of the two nonvolatile devices N1 with I N2 Let the searched data be k, the stored information be j, and simulate the sum of the currents flowing from CAM units P and N to the matching line, i.e., the first current I ML =I OP +I ON Will be proportional to the difference between the search data and the stored data, that is: I ML =|kj|·α, where α is the proportionality coefficient. The analog CAM cells on the same match line are added according to Kirchhoff's current law, and finally a current based on the total matching degree is output on the match line.

[0105] (3) A current reading unit, including a matching line voltage clamping circuit and a current reading circuit. The voltage clamping circuit uses an operational amplifier to implement a negative feedback function to clamp the matching line voltage at a reference voltage V ref The current sensing circuit uses a current mirror to sense the current on the matching line and outputs it to the comparator for comparison.

[0106] Alternatively, for longer fields, the host processor can split the data into s shorter fields and store them in s content addressable memory submodules. When performing a search, the input data will also be split into s subfields and input into the corresponding submodules. Each submodule has m rows of match lines, so the total number of readout currents is m×s.

[0107] After the s readout currents corresponding to the match lines of the same row are accumulated using Kirchhoff's law, the resulting m currents will be input into the comparator. The comparator consists of m loser-take-all circuits (LTA) to filter out the data with the highest matching degree in the analog CAM array. The higher the matching degree between the stored data and the search data, the smaller the output current of its match line. LTA can quickly find the lowest value among the m rows of match line currents and set the output of that row to 1, while the other outputs will be set to 0.

[0108] Optionally, the analog CAM cell can be configured in interval matching mode: two complementary cells (cell P and cell N) are configured to store different data values ​​j respectively. P and j N , and j P <j N When the input information is in a given interval, that is, j P <k<j N When the output current I ML =0; when the input information is outside the interval, that is, k≤j P or k ≥ j N When the output current I MLA current proportional to the difference between the data.

[0109] Optionally, the data value k and the storage value j may be separate values, in which case the content addressable memory is in a multi-value mode.

[0110] Optionally, the non-volatile device is a resistive random access memory, a ferroelectric memory, a phase change memory, a spin transfer torque magnetic random access memory, a NOR Flash device or a NAND Flash device.

[0111] The embodiments of the present application are described below in conjunction with the drawings in the embodiments of the present application.

[0112] Example 1

[0113] Figure 1 is a schematic diagram of the structure of the analog domain content addressable storage system provided in the embodiment of the present application, such as Figure 1 As shown, the system includes a main processor 100, a content addressable memory submodule 102, and a comparator 104. The submodule includes a voltage driving unit 106, an analog content addressable memory array 108, and a current reading unit 110.

[0114] The analog domain content addressable storage system provided by the present application can split a long data into multiple units for searching. Specifically, let a search data be Q, and the main processor splits it into Q1, Q2, ..., Q according to the length of the data Q. S There are s fields in total, and each field is no longer than n bits. Q1, Q2, ..., Q S They are input into s content-addressable memory submodules respectively. Each content-addressable memory submodule stores m×n analog contents respectively, and a row of analog contents (n analog contents) represents a field in a piece of stored data. The voltage driving unit in each submodule converts the input data into an analog voltage and inputs it into the analog content-addressable memory array. Each analog content-addressable memory array contains m rows and n columns, with a total of m×n analog content-addressable memories. An analog content-addressable memory can store an analog value, and an analog value represents a bit of a field in a piece of stored data.

[0115] Specifically, after the voltage driving unit encodes the input data into a voltage signal, the voltage is input through the bit line (BL). The storage data is stored in the analog content addressable memory array in the form of conductance value. The input data and output data here can both be analog data, and their ranges are both 0 to 1. After the search process is completed, the output data will be output through the match line (ML) current. The match line is connected to the current reading unit, which is used to maintain the match line voltage and read the current of the match line. Each content addressable memory submodule will output m output currents, corresponding to m rows of match lines. The match lines of different content addressable memory submodules in the same row are connected to each other. After the output currents in the same row are accumulated, they will be input to the comparator. The comparator is specifically an LTA circuit, which is used to screen out the smallest match line current. When the input current value of a row is the smallest, the output of the row will be set to "1", corresponding to the data address with the highest matching degree, and the outputs of other rows will be set to "0".

[0116] Figure 2 Schematic diagram of the basic unit structure and working principle of the analog domain content addressable memory provided by the embodiment of the present application, such as Figure 2 As shown, the analog content addressable memory is composed of a unit P 202 and a unit N 204. Each unit (unit P or unit N) contains two non-volatile memories and a metal-semiconductor-oxide field-effect transistor (Metal-Semiconductor-Oxide Field-Effect Transistor, referred to as MOSFET). P , BL N , Four bit lines are input, and the data is in the form of conductance value G P1 , G P2 , G N1 , G N2 The first non-volatile device 206, the second non-volatile device 208, the third non-volatile device 212, and the fourth non-volatile device 214 are respectively stored in the form of. The first MOSFET 210 and the second MOSFET 216 are N-type transistors working in diode mode, whose drains and gates are connected to each other, and whose sources are connected to the matching line. Inside each unit, the top electrode of the non-volatile device is connected to the bit line, and the bottom electrode is connected to the drain of the transistor.

[0117] Specifically, when the analog content addressable memory performs a search, the search voltage V applied to the bit line BLP , V BLN , The value of is the transistor gate-source voltage V GS , matching line voltage V MLand the voltage difference across the nonvolatile device (V P1 , -V P2 、V N1 , -V N2 ). For example, BL P The search voltage value on BLP =V ML +V GS +V P1 , The search voltage value on

[0118] It should be noted that the transistor gate-source voltage V GS , matching line voltage V ML The value of needs to comprehensively consider the suitable working range of the transistor and the readout circuit, and is set by the main processor through the control voltage drive unit.

[0119] Specifically, the input voltage value and the storage conductance value are set within a given range. The maximum voltage difference between the two ends of the non-volatile device is specified as V max , the minimum value is V min The maximum value of the conductivity is G max , the minimum value is G min , are encoded by the main processor through the control voltage drive unit. It is stipulated that the above electrical signals satisfy the following relationship: V max G min =V min G max In various embodiments, the analog content addressable memory input data value is k, and the storage data value is j, wherein k and j are both normalized analog quantity data, that is, 0≤k, j≤1.

[0120] Specifically, data k and j are encoded as a voltage signal and a conductance value of a nonvolatile device, respectively. Figure 3 is a curve diagram showing the relationship between input data and input voltage value and storage data and device conductance value provided in an embodiment of the present application, Figure 3 The search voltage and conductance values ​​corresponding to data values ​​k and j are shown. The search voltage V in each simulation unit P1 and V P2 And store the conductivity value G P1 , G P2 For example, the voltage in unit P satisfies: V p1 = kV max +(1-k)V min , V p2 =(1-k)V max +kV min ; Conductivity value satisfies: G p1 =(1-j)Gmax +jG min , G p2 =jG max +(1-j)G min The voltage and conductance values ​​in unit N are interchangeable with those in unit P, that is, V N1 =V P2 ,V N2 =V P1 , G N1 =G P2 ,G N2 =G P1 .

[0121] When a voltage signal is applied, the analog CAM will output current to the matching line. For the unit P of the analog CAM, its output current I OP The current I flowing out of the two non-volatile devices P1 ,I P2 For the analog CAM unit N, its output current I OP The current I flowing out of the two non-volatile devices N1 ,I N2 Since transistor T P 、T N Working in diode mode, the current flowing to the matching line is limited, so when I OP and I ON When it is less than 0, the actual output current is 0. Specifically, the current I flowing from the unit P to the matching line OP , the current I flowing from unit N to the matching line ON Satisfy the following formula:

[0122]

[0123] Where α = V max G max -V min G min , is the proportionality coefficient.

[0124] Figure 4 is a curve diagram of the output current of the matching line in the precise matching mode provided in the embodiment of the present application, Figure 4 shows the matched line output current I ML The relationship between the input signal and the storage signal difference. The match line output current is the sum of the output currents of the two CAM units: I ML =I OP +I ON=|kj|α. In various embodiments, the magnitude of the output current of the match line reflects the degree of match between the search data and the stored data. Through the aforementioned analog CAM search method, the match line will output a current proportional to the difference between the data, and its proportionality coefficient is α. When the difference between the input data k and the stored data j is greater, the output current I ML It also increases according to the proportional coefficient α. Therefore, the output current can reflect the matching degree between the data, that is, the smaller the output current, the higher the matching degree.

[0125] Optionally, data k, j can be set to discrete values ​​to alleviate the problem that non-volatile devices are difficult to accurately implement arbitrary analog value encoding. In this case, the CAM works in a multi-value mode. For example, k can be set to 0, 0.25, 0.5, 0.75, which is a 2-bit encoding mode.

[0126] Optionally, the analog CAM can be configured in interval matching mode. In this mode, the data stored in the analog CAM cell P and the cell N are no longer the same value, but two different data j P and j N . Provisions P <j N When the input data k is in the matching interval (j P ,j N ) within the output current I ML will be 0. When the input data is in the mismatch interval, that is, k <k P or k>k N , I ML The output will be a current proportional to the difference.

[0127] Figure 5 is a curve diagram of the matching line output current of the interval matching mode provided in the embodiment of the present application, Figure 5 The relationship between input data and output current working in range matching mode is shown.

[0128] Figure 6 is a matching line voltage clamping and current reading circuit diagram provided in an embodiment of the present application, such as Figure 6 As shown in FIG. 1 , the current sensing subunit is composed of a voltage clamp circuit and a current mirror. The voltage clamp circuit is composed of an N-type transistor and an amplifier. The function of this circuit is to match the line voltage V ML Clamped at reference voltage V ref When the matching line current I ML After flowing out of the transistor source, the current mirror converts I ML Copied as output current I c , I ML =I c , and input to the comparator.

[0129] Figure 7 is a schematic diagram of a search process provided in an embodiment of the present application, Figure 7 The overall framework of simulating CAM to implement search is shown. For a long data Q, it will be split into s fields Q1, Q2, …, Q s . Each field is input to the analog content addressable memory array, and the size of the array is m×n. After the input is compared with the stored data, the obtained match line current is output through the readout circuit. The current output lines in the same row in different content addressable memory sub-modules are connected to the same input port of the minimum comparator LTA circuit. The output current of the same row is directly added on the connected match lines through Kirchhoff's current law and input into the LTA circuit. LTA will screen out the path with the smallest current and set the output of the corresponding row to 1, while the other rows are set to 0. The path with an output of 1 is the location of the data with the highest matching degree with the input data.

[0130] Example 2

[0131] Figure 8 is a schematic diagram of an example of a simulated content addressable memory performing a precise search process provided by an embodiment of the present application, such as Figure 8 As shown, in this example, the length of the data is 4 and the array size of the analog content addressable device is 3×4. Matching line voltage V ML is 0.3V, the transistor source-drain voltage V DS is 0.56V, the maximum search voltage V max =0.5V, minimum search voltage V min =0.05V, maximum conductivity value G max 100μS, minimum conductance value G min is 10μS, the proportional coefficient α=V max G max -V min G min =45μA. Taking the search data "0.1, 0.3, 0.6, 0.7" as an example, the first row stores data "0.4, 0.1, 0.5, 0.3". From the first to the fourth bit, the difference between each bit is 0.3, 0.2, 0.1, 0.4, so the sum of the mismatch is 1; similarly, the sum of the mismatch of the second and third rows is 1.6 and 0.8, respectively. Multiplying the output current value by the mismatch |kj| can get the theoretical output current I of the matching line. o1 , I o2 , I o3 The above currents are then compared in the comparator circuit LTA. o3is the minimum value, the third row will be filtered out, and the data in this row is the value with the highest matching degree.

[0132] Fig. 9 is a simulation waveform diagram of a simulated content addressable memory performing a precise search process provided by an embodiment of the present application, Fig. 9 The simulation waveform diagram shows the precise search process. At t = 10ns, a voltage signal is input on the search line. When the current stabilizes, the output current I o2 >I o1 >I o3 , therefore, the third row is the data with the highest matching degree.

[0133] Fig.10 is a schematic diagram of an example of simulating a content addressable memory execution interval search process provided by an embodiment of the present application, such as Fig.10 As shown, in this example, the configuration of the circuit signal is the same as the previous example. Taking the search for the first row as an example, the search data is "0.1, 0.3, 0.6, 0.7", and the stored data is "0.4-0.5, 0.1-0.8, 0-1.0, 0.5-0.9". For the first bit of data, the matching interval is (0.4, 0.5), that is, the lower limit of the interval is 0.4, and the upper limit of the interval is 0.5. At this time, the first bit of data is outside the matching interval, and the difference with the lower limit of the interval is 0.3, while the second to fourth bits are all within the matching interval, so the total mismatch is 0.3; similarly, the mismatch of the second and third rows of data are 1 and 0.5 respectively. Theoretical output current of the matching line I o1 , I o2 , I o3 They are 13.5μA, 45μA, and 22.5μA respectively. After the output current is compared by LTA, the first row will output "1", corresponding to the highest matching degree, while the other two rows will output "0", corresponding to the lower matching degree.

[0134] Fig.11 is a simulation waveform diagram of a simulated content addressable memory performing an interval search process provided by an embodiment of the present application, Fig.11 The simulation waveform diagram shows the precise search process. At t = 10ns, a voltage signal is input on the search line. When the current stabilizes, the output current I o2 >I o3 >I o1 , therefore, the first row is the data with the highest matching degree.

[0135] It should be understood that expressions such as "including" and "may include" that may be used in the present application indicate the existence of the disclosed functions, operations, or constituent elements, and do not limit one or more additional functions, operations, and constituent elements. In the present application, terms such as "including" and / or "having" may be interpreted as indicating specific characteristics, numbers, operations, constituent elements, components, or combinations thereof, but may not be interpreted as excluding the existence or possibility of adding one or more other characteristics, numbers, operations, constituent elements, components, or combinations thereof.

[0136] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. An analog domain content addressable memory system, characterized in that: include: A main processor, at least one content addressable memory submodule and a comparator, wherein the content addressable memory submodule has an analog content addressable memory with m rows and n columns, m and n are positive integers, and the analog content stored in the same row of all the content addressable memory submodules represents a piece of stored data; The main processor is used to split the search data into s search fields, and allocate each search field to a corresponding content addressable memory submodule, s is the number of content addressable memory submodules, and the number of bits of the search field is less than or equal to n; The content addressable memory submodule is used to compare the difference between each search word bit in the search field and the analog content stored in the analog content addressable memory of the corresponding column, and output the current corresponding to each row, the current corresponding to one row is determined based on the first current output by each analog content addressable memory in the corresponding row, and the first current has a preset proportional relationship with the difference; The comparator is used to determine the target row that best matches the search data based on the current corresponding to each row in each content addressable memory submodule.

2. The analog domain content addressable memory system according to claim 1, characterized in that: The content addressable memory submodule includes a voltage driving unit, an analog content addressable memory array and a current reading unit, wherein the analog content addressable memory array is composed of m rows and n columns of analog content addressable memories; The voltage driving unit is used to encode each search word bit in the search field into a voltage signal, and input the voltage signal corresponding to each search word bit into the analog content addressable memory of the corresponding column; The analog content addressable memory is used to compare the difference between the search word bit and the analog content based on the voltage signal and the stored analog content, and output a first current to the current readout unit; The current reading unit includes m input ports and m output ports, one input port corresponds to one output port, and the first current output by the analog content addressable memory in the same row enters the same input port of the current reading unit; The current reading unit is used to stabilize the voltage of the input port and copy the current of the input port as the current of the output port; The comparator comprises m input ports, and the output ports corresponding to the same row in different current readout units are connected to the same input port in the comparator; The comparator is used to determine a target row that best matches the search data based on the currents of the m input ports.

3. The analog domain content addressable memory system according to claim 2, characterized in that: The analog content addressable memory comprises: a first storage unit and a second storage unit; The first storage unit is used to compare the difference between the search word bit and the analog content based on the analog content stored in the storage unit and the voltage signal provided by the voltage driving unit; if the search word bit is smaller than the analog content stored in the storage unit, output a second current proportional to the difference; otherwise, the output current is 0; The second storage unit is used to compare the difference between the search word bit and the analog content based on the analog content stored in the storage unit and the voltage signal provided by the voltage driving unit; if the search word bit is greater than the analog content stored in the storage unit, output a third current proportional to the difference; otherwise, the output current is 0; The current output terminal of the first storage unit and the current output terminal of the second storage unit are commonly connected to the same input port of the current readout unit, and the first current is the sum of the second current and the third current.

4. The analog domain content addressable memory system according to claim 3, characterized in that: The voltage driving unit is used to encode each search word in the search field into a first voltage signal V BLP , the second voltage signal The third voltage signal V BLN and the fourth voltage signal The first storage unit includes: a first non-volatile device, a second non-volatile device and a first MOSFET, and the voltage driving unit provides a first voltage signal V corresponding to the search word bit. BLP To the top electrode of the first non-volatile device, the bottom electrode of the first non-volatile device, the drain of the first MOSFET and the bottom electrode of the second non-volatile device are electrically connected, and the voltage driving unit provides a second voltage signal corresponding to the search word bit to a top electrode of the second nonvolatile device; The second storage unit includes: a third non-volatile device, a fourth non-volatile device and a second MOSFET, and the voltage driving unit provides a third voltage signal V corresponding to the search word bit. BLN To the top electrode of the third non-volatile device, the bottom electrode of the third non-volatile device, the drain of the second MOSFET and the bottom electrode of the fourth non-volatile device are electrically connected, and the voltage driving unit provides a fourth voltage signal corresponding to the search word bit to a top electrode of the fourth nonvolatile device; The first MOSFET and the second MOSFET are N-type transistors operating in a diode mode, the drain and the gate of the MOSFET are electrically connected, and the source of the first MOSFET and the source of the second MOSFET are commonly connected to the same input port of the current reading unit through a matching line; The non-volatile device is used to store the conductivity value corresponding to a storage word bit in a piece of storage data; V BLP It is determined by the following formula: V BLP =V ML +V GS +V P1 , V p1 = kV max +(1-k)V min ; It is determined by the following formula: V p2 =(1-k)V max +kV min ; V BLN It is determined by the following formula: V BLP =V ML +V GS +V N1 ; It is determined by the following formula: V N1 =V P2 ,V N2 =V P1 ; Among them, k represents the search word position, V ML Represents the voltage on the matching line, V GS Represents the voltage between the gate and source of the MOSFET, V P1 represents the voltage between the top electrode and the bottom electrode of the first non-volatile device, V P2 represents the voltage between the bottom electrode and the top electrode of the second nonvolatile device, V N1 represents the voltage between the top electrode and the bottom electrode of the third non-volatile device, V N2 represents the voltage between the bottom electrode and the top electrode of the fourth non-volatile device, V max Indicates the maximum voltage difference between the two ends of the non-volatile device, V min Indicates the minimum value of the voltage difference between the two ends of the non-volatile device.

5. The analog domain content addressable memory system according to claim 4, characterized in that: In the first matching mode, the conductance value G of the first non-volatile device p1 , the conductance value G of the second non-volatile device p2 , the conductance value G of the third non-volatile device N1 and the conductance value G of the fourth nonvolatile device N2 Determined by the following formula: G P1 =(1-j)G max +jG min ; G P2 =jG max +(1-j)G min ; G N1 =G P2 ,G N2 =G P1 ; Among them, j represents the storage word bit, G max Indicates the maximum value of the conductance of the non-volatile device, G min Indicates the minimum value of the conductance of the nonvolatile device.

6. The analog domain content addressable memory system according to claim 5, characterized in that: In the first matching mode, the preset ratio relationship is determined by the following formula: I ML =|k-j|α; α=V max G max -V min G min ; Among them, I ML represents the first current, |kj| represents the difference, and α represents the proportionality coefficient.

7. The analog domain content addressable memory system according to claim 4, characterized in that: In the second matching mode, the conductance value G of the first non-volatile device p1 , the conductance value G of the second non-volatile device p2 , the conductance value G of the third non-volatile device N1 and the conductance value G of the fourth nonvolatile device N2 Determined by the following formula: G P1 =(1-j P )G max +j P G min ; G P2 =j P G max +(1-j P )G min ; G N1 =j N G max +(1-j N )G min ; G N2 =(1-j N )G max +j N G min ; Among them, j P <j N , j P Indicates the lower limit of the interval of the storage word, j N Indicates the upper limit of the storage word, G max Indicates the maximum value of the conductance of the non-volatile device, G min Indicates the minimum value of the conductance of the nonvolatile device.

8. The analog domain content addressable memory system according to claim 7, characterized in that: In the second matching mode, the preset ratio relationship is determined by the following formula: When k is in the matching interval [j P ,j N ]In time, I ML =0; In k <j P When ML =|kj P |α; In k>j N When ML =|kj N |·α; α=V max G max -V min G min ; Among them, I ML represents the first current, |k - j P | and |k - j N | represent the degree of difference, and α represents the proportionality coefficient.

9. The analog domain content addressable memory system according to any one of claims 2 to 8, characterized in that: The search word bit k and the storage word bit j can be configured as separate values.

10. The analog domain content addressable memory system according to any one of claims 2 to 8, characterized in that: The current readout unit includes m current readout subunits, and the current readout subunits include a voltage clamping circuit and a current mirror; The voltage clamp circuit is used to stabilize the voltage on the corresponding matching line, and the first current output by the analog content addressable memory in the same row enters the current readout subunit through the same matching line; The current mirror is used for replicating the current on the corresponding matching line and outputting the copied current to the comparator.

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