Method for preparing back-contact solar cell and method for preparing photovoltaic module

Abstract

This application relates to a method for preparing a back-contact solar cell and a method for preparing a photovoltaic module. The back-contact solar cell preparation method of this application utilizes a single prefabricated dielectric layer and a single mask layer to assist in forming a first doped conductive portion and a second doped conductive portion. The method of this application requires fewer steps to form the doped conductive portions, and therefore, the method of this application can improve the production efficiency of back-contact solar cells.

Description

Technical Field

[0001] The present application relates to the field of photovoltaic technology, and in particular to a method for preparing a back-contact solar cell and a method for preparing a photovoltaic module. Background Art

[0002] Back-contact solar cells feature both positive and negative electrodes on the backside of the cell. During the manufacturing process, a masking process is used to assist in forming two doped regions: one for contact with the positive electrode metallization, and the other for contact with the negative electrode metallization. However, existing methods for manufacturing back-contact solar cells require a large number of steps to form the doped conductive regions using masking, resulting in low production efficiency. Summary of the Invention

[0003] In view of this, the present application provides a method for preparing a back-contact solar cell and a method for preparing a photovoltaic module, wherein the preparation method provided in the present application can improve the production efficiency of the back-contact solar cell.

[0004] The present application provides a method for preparing a back-contact solar cell, the method comprising: providing a silicon substrate, a tunneling layer, and a prefabricated dielectric layer, wherein the tunneling layer is located between the silicon substrate and the prefabricated dielectric layer; forming a patterned mask layer on a side of the prefabricated dielectric layer away from the tunneling layer, wherein the patterned mask layer is provided with a first diffusion channel, and a portion of the prefabricated dielectric layer corresponding to the first diffusion channel is a first portion to be diffused; diffusing conductive impurities into the first portion to be diffused through the first diffusion channel so that the first portion to be diffused becomes a first doped conductive portion, and forming a first doped conductive portion on a side of the first doped conductive portion away from the tunneling layer and on a side of the patterned mask layer away from the tunneling layer. A first silicon glass layer is formed on one side of the tunneling layer; a laser is used to remove a portion of the first silicon glass layer and to irradiate a portion of the patterned mask layer to form a second diffusion channel spaced apart from the first diffusion channel, wherein a portion of the prefabricated dielectric layer corresponding to the second diffusion channel is a second portion to be diffused, and the second portion to be diffused is spaced apart from the first doped conductive portion; another conductive impurity is diffused into the second portion to be diffused through the second diffusion channel to make the second portion to be diffused become a second doped conductive portion, and a second silicon glass layer is formed on a side of the second doped conductive portion facing away from the tunneling layer and on a side of the first silicon glass layer facing away from the tunneling layer.

[0005] Optionally, the method of using laser to irradiate a portion of the patterned mask layer includes: using laser to remove a portion of the patterned mask layer to form a window that serves as part of the second diffusion channel; or, using laser to modify a portion of the patterned mask layer, wherein the portion of the patterned mask layer modified by the laser serves as part of the second diffusion channel.

[0006] Optionally, the method of forming a patterned mask layer on the side of the prefabricated dielectric layer facing away from the tunneling layer includes: forming a patterned mask layer on the side of the prefabricated dielectric layer facing away from the tunneling layer using a screen printing process or a transfer process; or, forming a prefabricated mask layer on the side of the prefabricated dielectric layer facing away from the tunneling layer using a deposition process or a coating process, and removing a portion of the prefabricated mask layer using a laser to form a patterned mask layer.

[0007] Optionally, conductive impurities including at least one element of the third main group are diffused into the first part to be diffused, and conductive impurities including at least one element of the fifth main group are diffused into the second part to be diffused; or, conductive impurities including at least one element of the fifth main group are diffused into the first part to be diffused, and conductive impurities including at least one element of the third main group are diffused into the second part to be diffused.

[0008] Optionally, after forming the second silicon glass layer, the preparation method further comprises: removing the second silicon glass layer, the first silicon glass layer and the patterned mask layer on the side of the tunneling layer away from the silicon substrate by an acid pickling process.

[0009] Optionally, after forming the second silicon glass layer and before removing the second silicon glass layer, the first silicon glass layer and the patterned mask layer, the preparation method further includes: using an acid pickling process to remove the expansion layer located on the side of the silicon substrate away from the tunneling layer, wherein the expansion layer is formed sequentially during the process of forming the first doped conductive portion and during the process of forming the second doped conductive portion; and using an alkaline washing process to texturize the surface of the silicon substrate on the side away from the tunneling layer.

[0010] Optionally, after removing the second silicon glass layer, the first silicon glass layer and the patterned mask layer, the preparation method further includes: forming a passivation layer on the surface of the silicon substrate facing away from the tunneling layer, on the surface of the first doped conductive part facing away from the tunneling layer, on the surface of the second doped conductive part facing away from the tunneling layer and on the surface of the prefabricated dielectric layer facing away from the tunneling layer.

[0011] Optionally, after forming the passivation layer, the preparation method further includes: forming a first metal electrode in a portion of the passivation layer located on the side of the tunneling layer away from the silicon substrate corresponding to the first doped conductive part, and making the first metal electrode in metallization contact with the first doped conductive part; forming a second metal electrode in a portion of the passivation layer located on the side of the tunneling layer away from the silicon substrate corresponding to the second doped conductive part, and making the second metal electrode in metallization contact with the second doped conductive part.

[0012] Compared with the prior art which requires the preparation of at least two mask layers in succession to assist in forming the doped conductive part, the back-contact solar cell preparation method of the present application utilizes a single mask layer to assist in forming the doped conductive part (the first doped conductive part and the second doped conductive part). Accordingly, the number of steps required for forming the doped conductive part in the method of the present application is relatively small. Therefore, the method of the present application can improve the production efficiency of the back-contact solar cell.

[0013] Compared with the prior art which requires the preparation of at least two layers of prefabricated dielectric layers in succession to assist in forming the doped conductive part, the preparation method of the back-contact solar cell of the present application utilizes a single layer of prefabricated dielectric layer to assist in forming the doped conductive part (the first doped conductive part and the second doped conductive part). Accordingly, the number of steps required for forming the doped conductive part in the method of the present application is relatively small. Therefore, the method of the present application can improve the production efficiency of the back-contact solar cell. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0015] Figure 1 is a schematic diagram of the partial structure of a silicon substrate, a tunneling layer and a prefabricated dielectric layer in a specific embodiment;

[0016] Figure 2 A schematic diagram of the local structure of a silicon substrate, a tunneling layer, a prefabricated dielectric layer, and a patterned mask layer in a specific embodiment;

[0017] Figure 3 A schematic diagram of a partial structure of a silicon substrate, a tunneling layer, a prefabricated dielectric layer, a patterned mask layer, a first doped conductive portion, and a first silicon glass layer in a specific embodiment;

[0018] Figure 4 A schematic diagram of a partial structure of a silicon substrate, a tunneling layer, a prefabricated dielectric layer, a patterned mask layer, a first doped conductive portion, and a first silicon glass layer in a specific embodiment, wherein a second diffusion channel is provided;

[0019] Figure 5 A schematic diagram of the partial structure of a silicon substrate, a tunneling layer, a prefabricated dielectric layer, a patterned mask layer, a first doped conductive portion, a first silicon glass layer, a second doped conductive portion, and a second silicon glass layer in a specific embodiment;

[0020] Figure 6A schematic diagram of a partial structure of a silicon substrate, a tunneling layer, a prefabricated dielectric layer, a patterned mask layer, a first doped conductive portion, and a first silicon glass layer in another specific embodiment, wherein another second diffusion channel is provided;

[0021] Figure 7 A schematic diagram of the partial structure of a silicon substrate, a tunneling layer, a prefabricated dielectric layer, and a prefabricated mask layer in a specific embodiment;

[0022] Figure 8 A schematic diagram of a partial structure of a silicon substrate, a tunneling layer, a prefabricated dielectric layer, a first doped conductive portion, and a second doped conductive portion in a specific embodiment;

[0023] Figure 9 A schematic structural diagram of a back-contact solar cell provided in this application in a specific embodiment;

[0024] Figure 10 A schematic diagram of a partial structure of a silicon substrate, a tunneling layer, a first doped conductive portion, a second doped conductive portion, and a trench in a specific embodiment;

[0025] Figure 11 A schematic diagram of a partial structure of a silicon substrate, a tunneling layer, a first doped conductive portion, a second doped conductive portion, a passivation layer, and a trench in a specific embodiment;

[0026] Figure 12 A schematic diagram of a partial structure of a silicon substrate, a tunneling layer, a first doped conductive portion, a second doped conductive portion, a passivation layer, a first metal electrode, a second metal electrode, and a trench in a specific embodiment;

[0027] Figure 13 is a schematic diagram of the charge distribution and built-in electric field of the silicon substrate, the tunneling layer and the first doped conductive portion;

[0028] Figure 14 Schematic diagram of the charge distribution and built-in electric field in the silicon substrate, tunneling layer and second doped conductive part.

[0029] 10- back contact solar cell;

[0030] 1-Silicon substrate;

[0031] 2- tunneling layer;

[0032] 3-prefabricated dielectric layer;

[0033] 3a-first doped conductive portion;

[0034] 3b-second doped conductive portion;

[0035] 3c-isolated part;

[0036] 4-patterned mask layer;

[0037] 4a-prefabricated mask layer;

[0038] 51-first diffusion channel;

[0039] 52-second diffusion channel;

[0040] 521-first window;

[0041] 522-second window;

[0042] 523-modified part;

[0043] 61-first silicon glass layer;

[0044] 62-second silicon glass layer;

[0045] 71-first passivation layer;

[0046] 72- second passivation layer;

[0047] 81- third passivation layer;

[0048] 82- fourth passivation layer;

[0049] 91-first metal electrode;

[0050] 92- second metal electrode;

[0051] 10a-groove. DETAILED DESCRIPTION

[0052] In order to better understand the technical solution of the present application, the embodiments of the present application are described in detail below with reference to the accompanying drawings.

[0053] It should be clear that the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0054] The terms used in the embodiments of the present application are for the purpose of describing specific embodiments only and are not intended to limit the present application. The singular forms "a", "an", "the" and "the" used in the embodiments of the present application and the appended claims are also intended to include plural forms unless the context clearly indicates otherwise.

[0055] It should be understood that the term "and / or" as used herein simply describes a relationship between associated objects, indicating that three possible relationships exist. For example, "A and / or B" can represent: A alone, A and B together, or B alone. Furthermore, the character " / " in this document generally indicates an "or" relationship between the associated objects.

[0056] In a first aspect, an embodiment of the present application provides a method for preparing a back-contact solar cell, and the preparation method includes the following contents.

[0057] First, provide Figure 1 The silicon substrate 1 , tunneling layer 2 and prefabricated dielectric layer 3 are shown. The prefabricated dielectric layer 3 , tunneling layer 2 and silicon substrate 1 are stacked along direction Y, and the tunneling layer 2 is located between the silicon substrate 1 and the prefabricated dielectric layer 3 .

[0058] The silicon substrate 1 may be an N-type substrate, and may be doped with at least one N-type element (a Group V element in the periodic table), such as phosphorus, arsenic, antimony, or other N-type elements. The tunneling layer 2 may include at least one of silicon oxide, silicon nitride, and silicon oxynitride. The prefabricated dielectric layer 3a may include at least one of polycrystalline silicon, amorphous silicon, and microcrystalline silicon.

[0059] Please refer to Figure 2 As shown, a patterned mask layer 4 is formed on the side of the prefabricated dielectric layer 3 facing away from the tunneling layer 2. The patterned mask layer 4 is provided with a first diffusion channel 51. The patterned mask layer 4 has a blocking effect on conductive impurities to be diffused in the subsequent diffusion process. That is, the portion of the prefabricated dielectric layer 3 covered by the patterned mask layer 4 will not be doped with conductive impurities in the subsequent diffusion process, while the portion of the prefabricated dielectric layer 3 exposed by the first diffusion channel 51 will be doped with conductive impurities in the subsequent diffusion process. That is, the portion of the prefabricated dielectric layer 3 corresponding to the first diffusion channel 51 is the first portion to be diffused.

[0060] Among them, the portion of the patterned mask layer 4 located between two adjacent first diffusion channels 51 and covering the prefabricated dielectric layer 3 is a gate line portion, and the width of the gate line portion in the direction X is 150um to 1500um, and specifically can be 150um, 200um, 250um, 300um, 350um, 400um, 450um, 500um, 550um, 600um, 650um, 750um, 800um, 850um, 900um, 950um, 1000um, 1100um, 1150um, 1200um, 1250um, 1300um, 1350um, 1400um, 1450um or 1500um.

[0061] In addition, the thickness of the patterned mask layer 4 in the direction Y is 1 um to 30 um, and specifically can be 1 um, 5 um, 10 um, 15 um, 20 um, 25 um or 30 um.

[0062] Please refer to Figure 3 As shown, conductive impurities are diffused into the first portion to be diffused through the first diffusion channel 51, so that the first portion to be diffused becomes a first doped conductive portion 3a, and a first silicon glass layer 61 is formed on the side of the first doped conductive portion 3a facing away from the tunneling layer 2 and on the side of the patterned mask layer 4 facing away from the tunneling layer 2.

[0063] The conductivity of the first doped conductive portion 3a doped with conductive impurities is stronger than that of the prefabricated dielectric layer 3 not doped with conductive impurities, so that the first doped conductive portion 3a serves as a portion in contact with the metal electrode metallization in the subsequent metallization process. The conductive impurity elements doped in the first doped conductive portion 3a may include at least one P-type element (a third main group element in the periodic table of chemical elements), such as boron, aluminum, gallium, and other P-type elements. The concentration of the P-type element doped in the first doped conductive portion 3a may be 1*10 19 at / cm 3 ~1*10 21 at / cm 3 , the concentration of P-type elements can be specifically 1*10 19 at / cm 3 , 2*10 19 at / cm 3 , 4*10 19 at / cm 3 , 6*10 19 at / cm 3 ,8*10 19 at / cm 3 , 1*10 20 at / cm 3 , 2*10 20 at / cm 3 , 4*10 20 at / cm 3 , 6*10 20 at / cm 3 ,8*10 20 at / cm 3 or 1*10 21 at / cm 3 The first silicon glass layer 61 may be a borosilicate glass layer.

[0064] In addition, the thickness of the first silicon glass layer 61 in direction Y can be 10nm to 150nm, specifically 10nm, 20nm, 30nm, 40nm, 50nm, 60nm, 70nm, 80nm, 90nm, 100nm, 110nm, 120nm, 130nm, 140nm or 150nm.

[0065] Please refer to Figure 4 As shown, laser light is used to partially remove the first silica glass layer 61 and partially remove the patterned mask layer 4 to form a second diffusion channel 52. The first diffusion channel 51 and the second diffusion channel 52 are spaced apart in the direction X. The retained portions of the first silica glass layer 61 and the patterned mask layer 4 act as a barrier to conductive impurities that are intended to be diffused during the subsequent diffusion process. This means that the portions of the prefabricated dielectric layer 3 covered by the first silica glass layer 61 and the patterned mask layer 4 will not be doped with conductive impurities during the subsequent diffusion process. Furthermore, the first doped conductive portion 3a, covered by the first silica glass layer 61, will not be doped with conductive impurities during the subsequent diffusion process. The portion of the prefabricated dielectric layer 3 exposed by the second diffusion channel 52 will be doped with conductive impurities during the subsequent diffusion process. This means that the portion of the prefabricated dielectric layer 3 corresponding to the second diffusion channel 52 is the second portion to be diffused. The second portion to be diffused is spaced apart from the first doped conductive portion 3a in the direction X.

[0066] The first silicon glass layer 61 is partially removed by laser to form a first window 521 , and then the patterned mask layer 4 is partially removed by laser to form a second window 522 . The first window 521 and the second window 522 are connected to form a second diffusion channel 52 .

[0067] In addition, when the laser is sequentially irradiated on the surface of the first silicon glass layer 61 and the surface of the patterned mask layer 4, the laser will sequentially form a light spot on the two surfaces. The size of the light spot in the direction X can be 150um to 1500um, specifically 150um, 200um, 250um, 300um, 350um, 400um, 450um, 500um, 550um, 600um, 650um, 700um, 750um, 800um, 850um, 900um, 950um, 1000um, 1050um, 1100um, 1150um, 1200um, 1250um, 1300um, 1350um, 1400um, 1450um or 1500um. However, the size of the light spot in the direction X must be less than Figure 2 The size of the middle gate line portion in the direction X is such that the laser can remove a portion of the patterned mask layer 4 .

[0068] Furthermore, the laser may specifically be a green laser, a violet laser or an infrared laser.

[0069] Furthermore, if the thickness of the first silica glass layer 61 in the direction Y is too small, for example, less than 10 nm, the first silica glass layer 61 may not effectively block the conductive impurities to be diffused by the first doped conductive portion 3 a during the subsequent diffusion process. If the thickness of the first silica glass layer 61 in the direction Y is too large, for example, greater than 150 nm, the subsequent removal of the first silica glass layer 61 may require considerable time. Therefore, the thickness of the first silica glass layer 61 in the direction Y is preferably between 10 nm and 150 nm.

[0070] Please refer to Figure 5 As shown, another conductive impurity is diffused into the second portion to be diffused through the second diffusion channel 52, so that the second portion to be diffused becomes a second doped conductive portion 3b, and a second silicon glass layer 62 is formed on the side of the second doped conductive portion 3b facing away from the tunneling layer 2 and on the side of the first silicon glass layer 61 facing away from the tunneling layer 2.

[0071] The conductivity of the second doped conductive portion 3b doped with conductive impurities is stronger than that of the prefabricated dielectric layer 3 not doped with conductive impurities, so that the second doped conductive portion 3b serves as a portion in contact with another metal electrode in a subsequent metallization process. The conductive impurity elements doped in the second doped conductive portion 3b may include at least one N-type element (element of the fifth main group in the periodic table of chemical elements), such as phosphorus, arsenic, antimony and other N-type elements. The concentration of the N-type element doped in the second doped conductive portion 3b may be 1*10 19 at / cm 3 ~1*10 22 at / cm 3 , the concentration of N-type elements can be specifically 1*10 19 at / cm 3 , 2*10 19 at / cm 3 , 4*10 19 at / cm 3 , 6*10 19 at / cm 3 ,8*10 19 at / cm 3 , 1*10 20 at / cm 3 , 2*10 20 at / cm 3 , 4*10 20 at / cm 3 , 6*10 20 at / cm 3 ,8*1020 at / cm 3 , 1*10 21 at / cm 3 , 2*10 21 at / cm 3 , 4*10 21 at / cm 3 , 6*10 21 at / cm 3 ,8*10 21 at / cm 3 or 1*10 22 at / cm 3 The second silica glass layer 62 may be a phosphosilicate glass layer.

[0072] In addition, please refer to Figure 5 As shown, the last undoped portion in the prefabricated dielectric layer 3 is used as a portion for isolating the first doped conductive portion 3a and the second doped conductive portion 3b.

[0073] Furthermore, the thickness of the second silicon glass layer 62 in the direction Y may be 10 nm to 120 nm, specifically 10 nm, 20 nm, 30 nm, 40 nm, 50 nm, 60 nm, 70 nm, 80 nm, 90 nm, 100 nm, 110 nm or 120 nm.

[0074] Compared with the prior art which requires the preparation of at least two mask layers in succession to assist in forming the doped conductive part, the preparation method of the back-contact solar cell of the embodiment of the present application utilizes a single mask layer to assist in forming the doped conductive part (the first doped conductive part 3a and the second doped conductive part 3b). Accordingly, the method of the embodiment of the present application requires fewer steps for forming the doped conductive part. Therefore, the method of the embodiment of the present application can improve the production efficiency of the back-contact solar cell.

[0075] Compared with the prior art which requires the preparation of at least two layers of prefabricated dielectric layers in succession to assist in forming the doped conductive part, the preparation method of the back-contact solar cell of the embodiment of the present application utilizes a single layer of prefabricated dielectric layer 3 to assist in forming the doped conductive part (the first doped conductive part 3a and the second doped conductive part 3b). Accordingly, the number of steps required for forming the doped conductive part in the method of the embodiment of the present application is relatively small. Therefore, the method of the embodiment of the present application can improve the production efficiency of the back-contact solar cell.

[0076] In other embodiments, the silicon substrate 1 may also be a P-type substrate, and the silicon substrate 1 may be doped with at least one P-type element (a third main group element in the periodic table of chemical elements), such as boron, aluminum, gallium, or other P-type elements.

[0077] The following content of this article is mainly described by taking the silicon substrate 1 as an N-type substrate as an example.

[0078] In other embodiments, the conductive impurity elements doped into the first doped conductive portion 3a may also include at least one N-type element (element from the fifth main group of the periodic table), such as phosphorus, arsenic, antimony, and the like. The conductive impurity elements doped into the second doped conductive portion 3b may also include at least one P-type element (element from the third main group of the periodic table), such as boron, aluminum, gallium, and the like. That is, the N-type element may be diffused first, followed by the P-type element.

[0079] The following content of this article is mainly described by taking “first diffusing P-type elements to form the first doped conductive portion 3 a , and then diffusing N-type elements to form the second doped conductive portion 3 b ” as an example.

[0080] In other embodiments, please refer to Figure 6 As shown, after the laser is used to remove a portion of the first silicon glass layer 61 to form the first window 521, the laser can also be used to modify a portion of the patterned mask layer 4. The portion of the patterned mask layer 4 modified by the laser is the modified portion 523. The modified portion 523 is as shown in FIG. Figure 6 The portion within the dotted rectangle is shown in FIG. Although the modified portion 523 is not removed by the laser, it does not block the subsequent diffusion of conductive impurities. That is, the modified portion 523 can serve as part of the second diffusion channel 52, allowing the conductive impurities to diffuse sequentially through the first window 521 and the modified portion 523 into the prefabricated dielectric layer 3 to form the second doped conductive portion 3b.

[0081] Among them, the mechanism of using laser to form the modified part 523 is: microscopic holes will be formed inside the part of the patterned mask layer 4 irradiated by the laser, and the microscopic holes will not have a blocking effect on the conductive impurities to be diffused. Therefore, the part including the microscopic holes is called the modified part 523.

[0082] In addition, the power of the laser used to form the modified portion 523 is lower than that of the laser used to remove the local structure. Therefore, by using the laser to modify the local portion of the patterned mask layer 4, the prefabricated dielectric layer 3, the tunneling layer 2, and the silicon substrate 1 are not easily damaged by laser heat.

[0083] Regardless of whether the local structure of the target object is removed by laser or modified by laser, the local structure of the target object needs to be irradiated by laser.

[0084] Optionally, the method of forming the patterned mask layer 4 on the side of the prefabricated dielectric layer 3 facing away from the tunneling layer 2 may include:

[0085] The following is directly formed on the side of the prefabricated dielectric layer 3 away from the tunneling layer 2 by using a screen printing process or a transfer process: Figure 2 The patterned mask layer 4 shown is a patterned mask layer 4 directly provided with the first diffusion channel 51 .

[0086] If a screen printing process or a transfer process is used, the slurry used to form the patterned mask layer 4 can be a solid non-metallic compound mixed slurry, the solute includes at least one of non-metallic oxides, sulfides, nitrides, phosphides and borides, and the solvent includes at least one of water, styrene, perchloroethylene, trichloroethylene, ethylene glycol ether and triethanolamine.

[0087] Optionally, the method of forming the patterned mask layer 4 on the side of the prefabricated dielectric layer 3 facing away from the tunneling layer 2 may also include:

[0088] A deposition process or a coating process is used to form a layer such as the following on the side of the prefabricated dielectric layer 3 facing away from the tunneling layer 2: Figure 7 The pre-made mask layer 4a shown in FIG. 4 is partially removed by laser to form a Figure 2 The patterned mask layer 4 is shown provided with a first diffusion channel 51 .

[0089] Optionally, in forming Figure 5 After the second silicon glass layer 62 is formed, the preparation method of the embodiment of the present application further comprises removing the second silicon glass layer 62, the first silicon glass layer 61 and the patterned mask layer 4 located on the side of the tunneling layer 2 away from the silicon substrate 1 by an acid pickling process. Figure 8 As shown, the first doped conductive portion 3a and the second doped conductive portion 3b are exposed.

[0090] Compared with the prior art which requires removing the first silicon glass layer and the second silicon glass layer in two steps, the preparation method of the embodiment of the present application removes the second silicon glass layer 62, the first silicon glass layer 61 and the patterned mask layer 4 at one time. The method of the embodiment of the present application requires fewer steps. Therefore, the method of the embodiment of the present application can improve the production efficiency of back-contact solar cells.

[0091] Optionally, after forming the second silicon glass layer 62 and before removing the second silicon glass layer 62, the first silicon glass layer 61 and the patterned mask layer 4, the preparation method of the embodiment of the present application further includes:

[0092] An acid-washing process is used to remove the wrap-around layer (not shown) located on the side of the silicon substrate 1 facing away from the tunneling layer 2, thereby exposing the surface of the silicon substrate 1 facing away from the tunneling layer 2 (i.e., the front or top surface of the silicon substrate 1). The wrap-around layer is formed sequentially during the formation of the first doped conductive portion 3a and during the formation of the second doped conductive portion 3b. In other words, the wrap-around layer comprises two silicon glass layers, such as a borosilicate glass layer and a phosphosilicate glass layer.

[0093] Wherein, the process for removing the expansion layer can be specifically chain single-sided acid etching, and the single-sided etching amount is 0.05g~0.5g, and can specifically be 0.05g, 0.1g, 0.15g, 0.2g, 0.25g, 0.3g, 0.35g, 0.4g, 0.45g or 5g, so that the reflectivity of the surface of the silicon substrate 1 away from the tunneling layer 2 side is 20%~40%, and can specifically be 21%, 22%, 23%, 24%, 25%, 26%, 27%, 28%, 29%, 30%, 31%, 32%, 33%, 34%, 35%, 36%, 37%, 38%, 39% or 40%.

[0094] After removing the expansion layer, the surface of the silicon substrate 1 facing away from the tunneling layer 2 is textured using an alkaline washing process so that the surface of the silicon substrate 1 facing away from the tunneling layer 2 is a velvet surface (the velvet surface has multiple micron-sized grooves). The velvet surface is used to improve the efficiency of light incident into the interior of the silicon substrate 1, so as to improve the efficiency of the silicon substrate 1 in generating photogenerated electrons and photogenerated holes, thereby improving the photoelectric conversion efficiency and output power of the back-contact solar cell to be prepared.

[0095] Among them, after texturing, the reflectivity of the surface of the silicon substrate 1 facing away from the tunneling layer 2 is 6% to 15%, specifically 6%, 7%, 8%, 9%, 10%, 11%, 12%, 13%, 14% or 15%.

[0096] In other embodiments, the second silicon glass layer 62, the first silicon glass layer 61, the patterned mask layer 4 and the wrap-around layer may be removed together by an acid pickling process, which may further improve the production efficiency of the back-contact solar cell.

[0097] Optionally, after removing the second silicon glass layer 62, the first silicon glass layer 61 and the patterned mask layer 4, the preparation method of the embodiment of the present application further includes: Figure 9 As shown, passivation layers (e.g., a first passivation layer 71, a second passivation layer 72, a third passivation layer 81, and a fourth passivation layer 82) are formed on the surface of the silicon substrate 1 facing away from the tunneling layer 2, on the surface of the first doped conductive portion 3a facing away from the tunneling layer 2, on the surface of the second doped conductive portion 3b facing away from the tunneling layer 2, and on the surface of the prefabricated dielectric layer 3 facing away from the tunneling layer 2.

[0098] The passivation layer can perform chemical passivation and field passivation to reduce the rate of recombination between holes and electrons at the interface within the silicon substrate 1. The passivation layer can include at least one of aluminum oxide and silicon nitride. If the passivation layer includes silicon nitride, the passivation layer has a low reflectivity, which can increase the efficiency of light entering the interior of the silicon substrate 1, thereby increasing the efficiency of the silicon substrate 1 in generating photogenerated electrons and photogenerated holes, thereby improving the photoelectric conversion efficiency and output power of the back-contact solar cell to be prepared.

[0099] The embodiments of the present application do not limit the specific number of passivation layers to be prepared.

[0100] Optionally, after forming the passivation layer, the preparation method of the embodiment of the present application further includes:

[0101] Please refer to Figure 9 As shown, a first metal electrode 91 is formed in a portion of the passivation layer located on the side of the tunneling layer 2 facing away from the silicon substrate 1, corresponding to the first doped conductive portion 3a, and the first metal electrode 91 is in metallized contact with the first doped conductive portion 3a. A second metal electrode 92 is formed in a portion of the passivation layer located on the side of the tunneling layer 2 facing away from the silicon substrate 1, corresponding to the second doped conductive portion 3b, and the second metal electrode 92 is in metallized contact with the second doped conductive portion 3b.

[0102] If the first doped conductive portion 3a is doped with a P-type element, the first metal electrode 91 can serve as a positive electrode, and if the second doped conductive portion 3b is doped with an N-type element, the second metal electrode 92 can serve as a negative electrode.

[0103] In addition, the required first metal electrode 91 and second metal electrode 92 may be formed by first printing a metal-containing paste and then sintering the paste.

[0104] Optionally, before providing the silicon substrate 1, tunneling layer 2, and prefabricated dielectric layer 3, the preparation method of the embodiment of the present application may further include preparing the silicon substrate 1, tunneling layer 2, and prefabricated dielectric layer 3. First, a double-sided polished silicon wafer is used as the silicon substrate 1. Then, the tunneling layer 2 is formed on one side of the silicon substrate 1 using a method such as thermal oxidation or wet oxidation. The ambient temperature required for preparing the tunneling layer 2 may be 500°C to 900°C, specifically 500°C, 520°C, 540°C, 560°C, 580°C, 600°C, 620°C, 640°C, 660°C, 680°C, 700°C, 720°C, 740°C, 760°C, 780°C, 800°C, 820°C, 840°C, 860°C, 880°C, or 900°C. The thickness of the tunneling layer 2 in the direction Y can be 1 nm to 2.5 nm, specifically 1 nm, 1.1 nm, 1.2 nm, 1.3 nm, 1.4 nm, 1.5 nm, 1.6 nm, 1.7 nm, 1.8 nm, 1.9 nm, 2 nm, 2.1 nm, 2.2 nm, 2.3 nm, 2.4 nm, or 2.5 nm. Next, a prefabricated dielectric layer 3 is formed on the side of the tunneling layer 2 facing away from the silicon substrate 1 by chemical vapor deposition. Specifically, the chemical vapor deposition method can be low pressure chemical vapor deposition (LPCVD), plasma enhanced chemical vapor deposition (PECVD), or atmospheric pressure chemical vapor deposition (APCVD). The ambient temperature required for preparing the prefabricated dielectric layer 3 may be 500° C. to 700° C., specifically 500° C., 520° C., 540° C., 560° C., 580° C., 600° C., 620° C., 640° C., 660° C., 670° C., or 700° C. The thickness of the prefabricated dielectric layer 3 in direction Y may be 30 nm to 500 nm, specifically 30 nm, 50 nm, 70 nm, 90 nm, 110 nm, 130 nm, 150 nm, 170 nm, 190 nm, 210 nm, 230 nm, 250 nm, 270 nm, 290 nm, 310 nm, 330 nm, 350 nm, 370 nm, 390 nm, 410 nm, 430 nm, 450 nm, 470 nm, 490 nm, or 500 nm.

[0105] In other embodiments, after removing the second silicon glass layer 62, the first silicon glass layer 61 and the patterned mask layer 4, and before forming the passivation layer, the preparation method of the embodiment of the present application may also include: removing the prefabricated dielectric layer 3, removing the portion of the tunneling layer 2 corresponding to the prefabricated dielectric layer 3, and removing the local structure of the silicon substrate 1 corresponding to the prefabricated dielectric layer 3, so as to form the following: Figure 10 The groove 10a shown in FIG. Figure 10 After the trench 10a is formed, Figure 11 The passivation layer shown in FIG. 1 (eg, the stacked first passivation layer 71 and the second passivation layer 72). Figure 11 After forming the passivation layer shown in FIG. 1 (eg, the first passivation layer 71 and the second passivation layer 72 stacked), the following is formed: Figure 12 The first metal electrode 91 and the second metal electrode 92 are shown. In this embodiment, the trench 10a can separate the first doped conductive portion 3a and the second doped conductive portion 3b.

[0106] From the above, it can be seen that the preparation Figure 9 The back contact solar cell shown is prepared as Figure 12 The back contact solar cell shown does not require removal of the prefabricated dielectric layer 3 or the so-called isolation portion 3c. Figure 9 The number of steps required for the back contact solar cell shown is relatively small, and accordingly, the Figure 9 The production efficiency of the back contact solar cell shown is relatively high.

[0107] In a second aspect, the present invention provides a back-contact solar cell, which can be obtained by the preparation method described above. Figure 9 As shown, the back-contact solar cell 10 includes a silicon substrate 1, a tunneling layer 2, a first doped conductive portion 3a, a second doped conductive portion 3b, and an isolation portion 3c. The isolation portion 3c is the portion of the prefabricated dielectric layer 3 in the above-described preparation method that is ultimately not doped with conductive impurities. That is, the isolation portion 3c can serve as an electrical insulator.

[0108] The first doped conductive portion 3a, the second doped conductive portion 3b and the isolation portion 3c are all arranged on the side of the tunneling layer 2 away from the silicon substrate 1, and the first doped conductive portion 3a, the isolation portion 3c and the second doped conductive portion 3b are alternately arranged in sequence along a first direction (direction X), and the first direction (direction X) is perpendicular to the thickness direction (direction Y) of the back contact solar cell 10.

[0109] If the first doped conductive portion 3a contains P-type elements, the first doped conductive portion 3a can be P-type polysilicon; if the second doped conductive portion 3b contains N-type elements, the second doped conductive portion 3b can be N-type polysilicon; if the silicon substrate 1 is an N-type substrate, the concentration of the N-type element in the second doped conductive portion 3b needs to be greater than the concentration of the N-type element in the silicon substrate 1; the isolation portion 3c is intrinsic polysilicon.

[0110] Please refer to Figure 13 As shown, the first doped conductive portion 3a containing P-type elements and the tunneling layer 2 can form a tunneling passivation contact structure, and the tunneling passivation contact structure is used to passivate the contact surface between the silicon substrate 1 (N-type substrate) and the tunneling layer 2. In detail, the lattice of the tunneling layer 2 can be well matched with the lattice of the silicon substrate 1 to reduce the recombination center at the contact surface between the silicon substrate 1 and the tunneling layer 2 (the contact surface is prone to form recombination center energy levels due to the presence of impurities, and the recombination center energy levels are prone to cause electrons and holes to recombine), that is, the tunneling layer 2 can well passivate the contact surface between the silicon substrate 1 and the tunneling layer 2 to reduce the rate at which photogenerated electrons and photogenerated holes in the silicon substrate 1 recombine at the contact surface between the silicon substrate 1 and the tunneling layer 2. A tunneling passivation contact structure can be formed between the first doped conductive portion 3a and the silicon substrate 1 (N-type substrate). Figure 13 The built-in electric field E1 shown, Figure 13 Here, "+" represents positive charge, and "-" represents negative charge. The built-in electric field E1 can hinder the photogenerated electrons in the silicon substrate 1 from moving toward the first doped conductive portion 3a, and the built-in electric field E1 can attract the photogenerated holes in the silicon substrate 1 to move toward the first doped conductive portion 3a. Although the tunneling layer 2 is between the silicon substrate 1 and the first doped conductive portion 3a, the thickness of the tunneling layer 2 is relatively small. Under the action of the built-in electric field E1, the electrons in the valence band of the first doped conductive portion 3a (which are different from the photogenerated electrons or free electrons in the conduction band) can approach the tunneling layer 2 under the action of the built-in electric field E1 and use the tunneling effect to pass through the tunneling layer 2 until they move into the silicon substrate 1. After tunneling, the valence band electrons occupy the photogenerated holes in the silicon substrate 1. After the electrons in the valence band of the first doped conductive portion 3a move, new holes are generated in the first doped conductive portion 3a. This phenomenon can also be regarded as the equivalent of the photogenerated holes in the silicon substrate 1 moving into the first doped conductive portion 3a. Therefore, the tunneling passivation contact structure formed by the tunneling layer 2 and the first doped conductive part 3a can improve the efficiency of the first doped conductive part 3a in collecting holes, so that the first doped conductive part 3a exhibits good positive charge, which is beneficial to improve the photoelectric conversion efficiency and output power of the back-contact solar cell 10 to be prepared.

[0111] In addition, please refer to Figure 14As shown, the second doped conductive portion 3b containing N-type elements and the tunneling layer 2 can also form a tunneling passivation contact structure, which is used to passivate the contact surface between the silicon substrate 1 (N-type substrate) and the tunneling layer 2. The passivation effect of the tunneling layer 2 has been described above and will not be repeated here. Figure 14 The built-in electric field E2 is shown. The built-in electric field E2 can hinder the photogenerated holes in the silicon substrate 1 from moving toward the second doped conductive portion 3b, and the built-in electric field E2 can attract the photogenerated electrons in the silicon substrate 1 to move toward the second doped conductive portion 3b. Although the tunneling layer 2 is between the silicon substrate 1 and the first doped conductive portion 3a, the thickness of the tunneling layer 2 is relatively small. Under the action of the built-in electric field E2, the photogenerated electrons in the silicon substrate 1 approach the tunneling layer 2 and use the tunneling effect to pass through the tunneling layer 2 until they move into the second doped conductive portion 3b. Therefore, the tunneling passivation contact structure formed by the tunneling layer 2 and the second doped conductive portion 3b can improve the efficiency of the second doped conductive portion 3b in collecting electrons, so that the second doped conductive portion 3b exhibits a good negative charge, which in turn helps to improve the photoelectric conversion efficiency and output power of the back-contact solar cell 10 to be prepared.

[0112] In other embodiments, the first doped conductive portion 3 a may also contain N-type elements, and correspondingly, the second doped conductive portion 3 b may also contain P-type elements.

[0113] In other embodiments, the silicon substrate 1 may also be a P-type substrate.

[0114] Referring to FIG9 , the back-contact solar cell 10 may further include a first passivation layer 71, a second passivation layer 72, a third passivation layer 81, and a fourth passivation layer 82. The first passivation layer 71 is located on the side of the first doped conductive portion 3a, the second doped conductive portion 3b, and the isolation portion 3c facing away from the tunneling layer 2. The second passivation layer 72 is located on the side of the first passivation layer 71 facing away from the tunneling layer 2. The first passivation layer 71 may comprise aluminum oxide and may function as a field passivation layer. The second passivation layer 72 may comprise silicon nitride and may function to reduce reflectivity. The third passivation layer 81 is located on the side of the silicon substrate 1 facing away from the tunneling layer 2. The fourth passivation layer 82 is located on the side of the third passivation layer 81 facing away from the silicon substrate 1. The third passivation layer 81 may comprise aluminum oxide and may function as a field passivation layer. The fourth passivation layer 82 may comprise silicon nitride and may function to reduce reflectivity.

[0115] In other embodiments, the number of passivation layers on the top surface of the back-contact solar cell 10 can also be three, four, or five layers, etc. Similarly, the number of passivation layers on the bottom surface of the back-contact solar cell 10 can also be three, four, or five layers, etc.

[0116] Please refer to Figure 9 As shown, back-contact solar cell 10 further includes a first metal electrode 91 and a second metal electrode 92. Both first metal electrode 91 and second metal electrode 92 are located below or on the bottom surface of silicon substrate 1. First metal electrode 91 is in metallized contact with first doped conductive portion 3a, and second metal electrode 92 is in metallized contact with second doped conductive portion 3b. If first doped conductive portion 3a contains a P-type element, first metal electrode 91 can serve as a positive electrode. If second doped conductive portion 3b contains an N-type element, second metal electrode 92 can serve as a negative electrode.

[0117] Since the top surface of the back-contact solar cell 10 is not blocked by a metal electrode, the area of ​​the top surface of the back-contact solar cell 10 illuminated by sunlight is larger, and the number of photogenerated electrons and photogenerated holes generated by the back-contact solar cell 10 per unit time is larger. Accordingly, the photoelectric conversion efficiency and output power of the back-contact solar cell 10 are higher.

[0118] In other embodiments, the structure of the bottom surface of the back contact solar cell 10 may be provided as follows: Figure 12 As shown in the trench 10 a , the first doped conductive portion 3 a and the second doped conductive portion 3 b are separated by the trench 10 a .

[0119] regardless Figure 9 The back contact solar cell shown is still Figure 12 In the back-contact solar cell shown, the first doped conductive portion 3a and the second doped conductive portion 3b are spaced apart.

[0120] In a third aspect, embodiments of the present application provide a photovoltaic module comprising a laminate and a frame, the frame being mounted to an edge of the laminate. The laminate comprises a stacked arrangement of photovoltaic glass, a first encapsulating film, a cell string, a second encapsulating film, and a backsheet. Alternatively, the laminate comprises a stacked arrangement of the first photovoltaic glass, the first encapsulating film, the cell string, the second encapsulating film, and the second photovoltaic glass.

[0121] The cell string is formed by electrically connecting a plurality of back-contact solar cells as described above.

[0122] The photovoltaic module of the embodiment of the present application also includes the technical effects of the back-contact solar cell 10 described above, which will not be repeated here.

[0123] The above description is merely a preferred embodiment of the present application and is not intended to limit the present application. Various modifications and variations are possible for those skilled in the art. Any modifications, equivalent substitutions, or improvements made within the spirit and principles of the present application shall be included within the scope of protection of the present application.

Claims

1. A method for preparing a back-contact solar cell, characterized in that: include: Providing a silicon substrate, a tunneling layer and a prefabricated dielectric layer, wherein the tunneling layer is located between the silicon substrate and the prefabricated dielectric layer; forming a patterned mask layer on a side of the prefabricated dielectric layer away from the tunneling layer, wherein the patterned mask layer is provided with a first diffusion channel, and a portion of the prefabricated dielectric layer corresponding to the first diffusion channel is a first portion to be diffused; diffusing conductive impurities into the first portion to be diffused through the first diffusion channel to transform the first portion to be diffused into a first doped conductive portion, and forming a first silicon glass layer on a side of the first doped conductive portion facing away from the tunneling layer and on a side of the patterned mask layer facing away from the tunneling layer; Using a laser to remove a portion of the first silicon glass layer and irradiate a portion of the patterned mask layer to form a second diffusion channel spaced apart from the first diffusion channel, wherein the portion of the prefabricated dielectric layer corresponding to the second diffusion channel is a second portion to be diffused, and the second portion to be diffused is spaced apart from the first doped conductive portion; Another conductive impurity is diffused into the second portion to be diffused through the second diffusion channel to make the second portion to be diffused become a second doped conductive portion, and a second silicon glass layer is formed on a side of the second doped conductive portion facing away from the tunneling layer and on a side of the first silicon glass layer facing away from the tunneling layer.

2. The method for preparing a back-contact solar cell according to claim 1, wherein: The method of using laser to irradiate a part of the patterned mask layer includes: removing a portion of the patterned mask layer using a laser to form a window serving as a portion of the second diffusion channel; Alternatively, a portion of the patterned mask layer is modified by using a laser, wherein the portion of the patterned mask layer modified by the laser serves as a part of the second diffusion channel.

3. The method for preparing a back-contact solar cell according to claim 1, wherein: The method of forming a patterned mask layer on a side of the prefabricated dielectric layer away from the tunneling layer includes: forming the patterned mask layer on a side of the prefabricated dielectric layer away from the tunneling layer by using a screen printing process or a transfer process; Alternatively, a prefabricated mask layer is formed on a side of the prefabricated dielectric layer away from the tunneling layer by using a deposition process or a coating process, and a portion of the prefabricated mask layer is removed by using a laser to form the patterned mask layer.

4. The method for preparing a back-contact solar cell according to claim 1, wherein: diffusing conductive impurities including at least one element of the third main group into the first portion to be diffused, and diffusing conductive impurities including at least one element of the fifth main group into the second portion to be diffused; Alternatively, conductive impurities including at least one element of the fifth main group are diffused into the first portion to be diffused, and conductive impurities including at least one element of the third main group are diffused into the second portion to be diffused.

5. The method for preparing a back-contact solar cell according to any one of claims 1 to 4, characterized in that: After forming the second silicon glass layer, the preparation method further includes: The second silicon glass layer, the first silicon glass layer and the patterned mask layer located on a side of the tunnel layer away from the silicon substrate are removed by an acid pickling process.

6. The method for preparing a back contact solar cell according to claim 5, wherein: After forming the second silicon glass layer and before removing the second silicon glass layer, the first silicon glass layer and the patterned mask layer, the preparation method further includes: removing a wrap-around layer located on a side of the silicon substrate facing away from the tunneling layer by an acid pickling process, wherein the wrap-around layer is formed sequentially during the process of forming the first doped conductive portion and during the process of forming the second doped conductive portion; The surface of the silicon substrate on the side away from the tunneling layer is textured by using an alkali washing process.

7. The method for preparing a back-contact solar cell according to claim 5, wherein: After removing the second silicon glass layer, the first silicon glass layer and the patterned mask layer, the preparation method further includes: A passivation layer is formed on a surface of the silicon substrate facing away from the tunneling layer, a surface of the first doped conductive portion facing away from the tunneling layer, a surface of the second doped conductive portion facing away from the tunneling layer, and a surface of the prefabricated dielectric layer facing away from the tunneling layer.

8. The method for preparing a back-contact solar cell according to claim 7, wherein: After forming the passivation layer, the preparation method further comprises: forming a first metal electrode at a portion of the passivation layer located on a side of the tunneling layer facing away from the silicon substrate and corresponding to the first doped conductive portion, and making the first metal electrode in metallization contact with the first doped conductive portion; A second metal electrode is formed in a portion of the passivation layer located on a side of the tunneling layer facing away from the silicon substrate and corresponding to the second doped conductive portion, and the second metal electrode is in metallization contact with the second doped conductive portion.

9. A method for preparing a photovoltaic module, characterized in that: A method for preparing a back-contact solar cell according to any one of claims 1 to 8.

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