Reset signal transmission method, storage medium, electronic device, computer program product

Abstract

The embodiment of the application provides a reset signal sending method, a storage medium, an electronic device and a computer program product, relates to the field of communication, and the reset signal sending method comprises the following steps: determining the working state of the first optical module and the working state of the second optical module; according to the working state of the first optical module, the working state of the second optical module and the first reset signal sending condition of the host, the first reset signal is sent to the first optical module, so that the first reset signal is sent to the device through the first optical module and the second optical module, wherein the first reset signal is used for resetting the device and instructing the device to perform training of a communication link between the host. By adopting the technical scheme, the problem that the host cannot reasonably send a reset signal in the case that the host and the device perform data communication based on optical signals is solved.

Description

Technical Field

[0001] This application relates to the field of communications, and more specifically, to a method for transmitting a reset signal, a storage medium, an electronic device, and a computer program product. Background Technology

[0002] Currently, existing Peripheral Component Interconnect Express (PCIe) links typically use electrical signals to transmit PCIe signals. The PCIe signals and PERST signals from the PCIe host are directly connected to the PCIe link end device via onboard traces or cables. When both the PCIe host and the PCIe end device are in normal working order, the PERST reset signal from the PCIe host can be directly transmitted to the PCIe end device to reset it, thus enabling PCIe link training. Applications using optical signals to transmit PCIe signals are less common. Instead, optical modules are typically added between the PCIe host and the PCIe end device. These modules convert external electrical signals into optical signals, and the optical signals are transmitted between the modules via fiber optic cables. When the PCIe host resets, the PERST reset signal is directly transmitted to the PCIe end device through the optical module.

[0003] When resetting a PCIe link based on electrical signal transmission, only the PCIe host and PCIe link terminal device need to be in normal working condition. However, when resetting a PCIe link based on optical signal transmission, the working status of the optical module must also be taken into account. Optical modules have multiple states when powered on and can configure optical link parameters. If the optical module is not in normal working condition or if the configuration parameters of the optical module meet the requirements of the PCIe link, and the reset method of the electrical signal scheme is still used when resetting a PCIe link that is still transmitting optical signals, the PCIe signal may have problems such as excessive amplitude, insufficient amplitude, or even failure to be transmitted through the optical module after transmission. This will cause the PCIe terminal device to be unable to properly identify and process the received PCIe signal, resulting in problems such as packet loss, reduced speed, reduced bandwidth, or even failure of the PCIe link to reconnect properly after reset.

[0004] There is currently no effective solution to the problem that the host cannot properly send a reset signal when the host and device communicate data based on optical signals in related technologies. Summary of the Invention

[0005] This application provides a method for transmitting a reset signal, a storage medium, an electronic device, and a computer program product, to at least solve the problem that the host cannot reasonably transmit a reset signal when the host and the device communicate data based on optical signals.

[0006] According to one embodiment of this application, a method for transmitting a reset signal is provided, applied to a communication scenario between a host and a device. The communication scenario includes a host, a first optical module of the host, a device, and a second optical module of the device. The host transmits electrical signals with the first optical module, the first optical module transmits optical signals with the second optical module, and the second optical module transmits electrical signals with the device. The method includes: determining the operating state of the first optical module and the operating state of the second optical module; based on the operating state of the first optical module, the operating state of the second optical module, and the first reset signal transmission status of the host, transmitting a first reset signal to the first optical module, so that the first reset signal is transmitted to the device through the first optical module and the second optical module, wherein the first reset signal is used to reset the device and instruct the device to train the communication link with the host.

[0007] In an exemplary embodiment, sending the first reset signal to the first optical module based on the operating state of the first optical module, the operating state of the second optical module, and the first reset signal transmission status of the host includes: sending the first reset signal to the first optical module when both the operating states of the first and second optical modules are in normal working condition and the first reset signal transmission status indicates that the host has sent the first reset signal; waiting for the first reset signal from the host when both the operating states of the first and second optical modules are in normal working condition and the first reset signal transmission status indicates that the host has not sent the first reset signal, and sending the first reset signal to the first optical module upon receiving the first reset signal from the host; and prohibiting the sending of the first reset signal to the first optical module when either the operating state of the first or second optical module is not in normal working condition.

[0008] In an exemplary embodiment, the method further includes: after sending the first reset signal to the first optical module, if it is detected that the operating state of the first optical module switches from a normal operating state to an abnormal operating state within a preset time and then switches back to a normal operating state, and / or the operating state of the second optical module switches from a normal operating state to an abnormal operating state within the preset time and then switches back to a normal operating state, a second reset signal is sent to the host, wherein the second reset signal is used to instruct the host to send the first reset signal again; if the first reset signal sent by the host is received and the operating states of both the first optical module and the second optical module are in a normal operating state, the first reset signal is sent to the first optical module.

[0009] In an exemplary embodiment, the method further includes: upon receiving reset indication information sent by the host's baseboard management controller, sending a second reset signal to the host, wherein the reset indication information is used to instruct for resetting the device and training the communication link between the host and the device, and the second reset signal is used to instruct the host to send the first reset signal again; and upon receiving the first reset signal sent by the host and both the first optical module and the second optical module are in normal working condition, sending the first reset signal to the first optical module.

[0010] In an exemplary embodiment, the method further includes: after sending the first reset signal to the first optical module, if it is detected that the working state of the device switches from a normal working state to an abnormal working state within a preset time, and then switches back to a normal working state, sending a second reset signal to the host, wherein the second reset signal is used to instruct the host to send the first reset signal again; and if the first reset signal sent by the host is obtained, and the working states of both the first optical module and the second optical module are in a normal working state, sending the first reset signal to the first optical module.

[0011] In an exemplary embodiment, determining the operating state of the first optical module includes: upon receiving first indication information sent by the host's baseboard management controller, determining that the operating state of the first optical module is a normal operating state, wherein the first indication information is the indication information sent by the host's baseboard management controller when it determines that the first optical module is in an active state by detecting the status register in the first optical module.

[0012] In an exemplary embodiment, determining the operating state of the second optical module includes: upon receiving second indication information sent by the host's baseboard management controller, determining that the operating state of the second optical module is a normal operating state, wherein the second indication information is the indication information sent by the host's baseboard management controller after receiving the third indication information forwarded by the first optical module, and the third indication information is the information sent by the device's baseboard management controller to the second optical module when it determines that the second optical module is in an active state by detecting the status register in the second optical module.

[0013] In an exemplary embodiment, the method further includes: detecting an on-premises status signal of the first optical module; controlling the first optical module to enter an initialization process when the on-premises status signal indicates that the first optical module is in place; and instructing the host's substrate management controller to process the interruption of the first optical module when an interrupt signal sent by the first optical module is received.

[0014] In an exemplary embodiment, instructing the host's baseboard management controller to process the interrupt of the first optical module includes: instructing the host's baseboard management controller to perform the following operations: determining the interrupt type of the first optical module's interrupt, and if the interrupt type is a first type, determining the target parameter of the configuration register of the first optical module, wherein the first type of interrupt is an interrupt generated after the first optical module enters the initialization process and configures the configuration register according to the default configuration parameters of the configuration register; configuring the configuration register of the first optical module according to the target parameter; and clearing the interrupt status of the first optical module.

[0015] In an exemplary embodiment, determining the target parameter of the configuration register of the first optical module includes: determining the module type of the first optical module; and determining the target parameter from a configuration file based on the module type of the first optical module, wherein the configuration file contains parameters of configuration registers corresponding to different module types.

[0016] In an exemplary embodiment, determining the target parameter of the configuration register of the first optical module includes: determining the module type of the first optical module; and if the module type of the first optical module is the same as the module type of the optical module of the motherboard previously detected by the substrate management controller, determining the stored parameter of the configuration register of the optical module of the motherboard previously detected as the target parameter.

[0017] In an exemplary embodiment, instructing the host's baseboard management controller to process the interruption of the first optical module includes: instructing the host's baseboard management controller to perform the following operations: determining the interrupt type of the interruption of the first optical module, and if the interrupt type is a second type, determining the state of the first optical module by detecting the status register in the first optical module, wherein the second type of interruption is an interruption generated after the first optical module configures the configuration register of the first optical module according to the target parameters determined by the baseboard management controller, after the first optical module configures the configuration register of the first optical module according to the target parameters determined by the baseboard management controller, the first optical module updates the state of the first optical module in the status register to an active state; and clearing the interruption state of the first optical module.

[0018] According to yet another embodiment of this application, a computer-readable storage medium is also provided, wherein a computer program is stored therein, and the computer program is configured to perform the steps in any of the above method embodiments when it is run.

[0019] According to yet another embodiment of this application, an electronic device is also provided, including a memory and a processor, wherein the memory stores a computer program and the processor is configured to run the computer program to perform the steps in any of the above method embodiments.

[0020] According to yet another embodiment of this application, a computer program product is also provided, which includes a computer program that, when executed by a processor, implements the steps in any of the above method embodiments.

[0021] This application, based on the operating status of the first optical module on the motherboard, the operating status of the second optical module on the device, and the first reset signal transmission status of the host, sends a first reset signal to the first optical module, so that the first reset signal is transmitted to the device through the first and second optical modules. Because the operating status of the optical modules is considered when sending the reset signal, the transmission of the reset signal can be performed reasonably. This technical solution solves the problem that the host cannot properly send a reset signal when the host and device are communicating via optical signals. This allows the communication link to transmit stably at the expected rate through the optical modules, enabling stable communication between the host and device, and thus completing the training of the communication link. Attached Figure Description

[0022] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings:

[0023] Figure 1 This is a hardware structure block diagram of a server device for a method of transmitting a reset signal according to an embodiment of this application;

[0024] Figure 2 This is a schematic diagram illustrating a method for transmitting a reset signal according to an embodiment of this application.

[0025] Figure 3 This is a flowchart of a method for transmitting a reset signal according to an embodiment of this application;

[0026] Figure 4 This is a flowchart of another method for sending a reset signal according to an embodiment of this application;

[0027] Figure 5 This is a structural block diagram of a reset signal transmitting device according to an embodiment of this application;

[0028] Figure 6 This is a schematic diagram of the structure of an optional electronic device according to an embodiment of this application. Detailed Implementation

[0029] The embodiments of this application will be described in detail below with reference to the accompanying drawings and examples.

[0030] It should be noted that the terms "first," "second," etc., in the specification, claims, and drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0031] The reset signal transmission method provided in this application embodiment can be executed in a server device or a similar computing device. Taking running on a server device as an example, Figure 1 This is a hardware structure block diagram of a server device for a method of transmitting a reset signal according to an embodiment of this application. Figure 1 As shown, the server device may include one or more ( Figure 1 Only one is shown in the diagram. A processor 102 (which may include, but is not limited to, a microprocessor MCU or a programmable logic device FPGA, etc.) and a memory 104 for storing data are also shown. The server device may further include a transmission device 106 for communication functions and an input / output device 108. Those skilled in the art will understand that... Figure 1 The structure shown is for illustrative purposes only and does not limit the structure of the server equipment described above. For example, the server equipment may also include components that are more... Figure 1 The more or fewer components shown, or having the same Figure 1 The different configurations shown.

[0032] The memory 104 can be used to store computer programs, such as application software programs and modules, like the computer program corresponding to the reset signal sending method in this embodiment. The processor 102 executes various functional applications and data processing by running the computer program stored in the memory 104, thus implementing the above-described method. The memory 104 may include high-speed random access memory and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some instances, the memory 104 may further include memory remotely located relative to the processor 102, and these remote memories can be connected to server devices via a network. Examples of such networks include, but are not limited to, the Internet, corporate intranets, local area networks, mobile communication networks, and combinations thereof.

[0033] The transmission device 106 is used to receive or send data via a network. Specific examples of the network described above may include a wireless network provided by a communication provider for the server device. In one example, the transmission device 106 includes a Network Interface Controller (NIC), which can connect to other network devices via a base station to communicate with the Internet. In another example, the transmission device 106 may be a Radio Frequency (RF) module used for wireless communication with the Internet.

[0034] It's important to note that the PCIe protocol is a high-speed, high-bandwidth serial data transmission standard used for data transmission between expansion cards and computer motherboards. As PCIe speeds increase, the requirements for PCIe signal quality also rise, and the transmission distance of PCIe signals over traditional PCBs or copper cables continues to shorten. In some long-distance PCIe transmission applications, designers need to add additional driver circuitry to improve signal quality, increasing both design complexity and cost. Compared to traditional PCIe copper cable transmission, using optical signals for PCIe signal transmission offers advantages such as low loss, low latency, high bandwidth, and long distances. However, the PCIe protocol currently does not require the use of optical signals for PCIe signal transmission, leading to some differences between PCIe optical transmission applications and traditional PCIe applications.

[0035] An optical module is a photoelectric conversion device that converts externally input electrical signals into optical signals for transmission via optical fiber, and can also convert received optical signals into electrical signals for transmission to relevant processors. Unlike the plug-and-play functionality of passive copper cables, optical modules are active devices. After power is supplied, the optical module requires a period of internal initialization. During this process, the optical module reads its internal default configuration and configures the corresponding input / output links. Simultaneously, the external processor can also modify the optical module parameters and adjust the input / output port link characteristics to ensure that the link initialization results meet system operating requirements. Because different manufacturers use different photoelectric conversion design schemes, internal manufacturing processes, and port numbers, the duration of the initialization process varies. When the PCIe host sends a reset signal to notify the terminal device on the PCIe link to perform link training, the uncertainty of the initialization time may cause the PCIe signal and reset signal to fail to transmit normally. The PCIe terminal device may not be able to stably receive the PCIe signal or reset signal, resulting in the PCIe link training failing to proceed normally, failing to reach the system's designed expected speed, and affecting the system's operating status.

[0036] To address the aforementioned issues, this application provides a method for transmitting a reset signal, applicable to a communication scenario between a host and a device. The communication scenario includes a host, a first optical module of the host, a device, and a second optical module of the device. The host transmits electrical signals with the first optical module, the first optical module transmits optical signals with the second optical module, and the second optical module transmits electrical signals with the device.

[0037] Optionally, when the host and device communicate via a PCIe link, a schematic diagram of the communication scenario is shown below. Figure 2As shown, a PCIe link can consist of a Host device, a Device device, a Host optical module (i.e., the first optical module), a Device optical module (i.e., the second optical module), PCIe electrical signals transmitted between the Host device and the Host optical module, PCIe electrical signals transmitted between the Device device and the Device optical module, and PCIe optical signals transmitted between the Host optical module and the Device optical module. Taking the Host side as an example, in addition to transmitting PCIe electrical signals with the Host device, the Host optical module is also connected to the Host-side Complex Programmable Logic Device (CPLD) and Baseboard Management Controller (BMC), transmitting low-speed signals such as GPIO (General Purpose Input / Output), I2C (Inter-Integrated Circuit), and PERST (Peripheral Reset) for PCIe link reset control. The connection method on the device side is similar to that on the host side. The difference is that the PERST reset signal is sent from the device-side optical module to the device-side CPLD, and the device-side CPLD then sends the PERST reset signal to the device to notify it to reset the PCIe link. Additionally... Figure 2 In this context, TX stands for Transmit, RX stands for Receive, RST stands for Reset, and MCU stands for Microcontroller Unit.

[0038] It should be noted that the Host device and the Host-side CPLD transmit two sets of reset signals, including a low-active PCIe link reset signal PERST (i.e., the first reset signal below) actively sent by the Host device to the Host-side CPLD, and a low-active PCIe reset signal RST (i.e., the second reset signal below) actively sent by the Host-side CPLD to the Host device. After the Host device is powered on, it automatically sends out the PERST reset signal to reset the Device device connected to the corresponding PCIe link in this application. When the Host device receives the low-level RST signal sent by the Host-side CPLD, it will send out the PERST reset signal again to notify the Device device to reset the PCIe link.

[0039] It should be noted that there are five sets of signals between the host optical module and the host-side CPLD, including:

[0040] (1) When the LPmode signal sent by the CPLD to the optical module is high, the optical module enters a low power consumption state.

[0041] (2) The Reset signal sent by the CPLD to the optical module is considered as a reset action after the external system pulls the signal low for a period of time and then pulls it high again. This signal is used to control the optical module to reset.

[0042] (3) The INT signal (i.e. interrupt signal) sent by the optical module to the CPLD. When the signal is high, it indicates that there is an abnormality inside the CPLD optical module and an external device is needed to handle this abnormal state.

[0043] (4) The host optical module transmits the optical module presence status signal PRSNT to the host CPLD. When the optical module is installed, the PRSNT signal is low, and vice versa.

[0044] (5) The Host optical module receives the PERST reset signal sent by the Host CPLD, converts it into an optical signal through the internal photoelectric conversion part, and then transmits it to the Device end through the optical fiber. This signal is the output signal of the Device optical module at the Device end. The Device optical module converts the received reset optical signal into an electrical signal and sends it to the Device CPLD.

[0045] It should be noted that the Host optical module also transmits I2C signals with the Host BMC for: (1) the optical module converts the I2C electrical signal into an optical signal and transmits it to the Device end via the optical fiber; (2) the BMC reads the status information of the Host optical module through I2C to determine whether the optical module is working properly.

[0046] It should be noted that, Figure 3 This is a flowchart of a method for transmitting a reset signal according to an embodiment of this application, including the following steps S302-S304:

[0047] Step S302: Determine the working status of the first optical module and the working status of the second optical module;

[0048] Step S304: Based on the working state of the first optical module, the working state of the second optical module, and the first reset signal transmission status of the host, the host sends the first reset signal to the first optical module to transmit the first reset signal to the device through the first optical module and the second optical module. The first reset signal is used to reset the device and instruct the device to train the communication link with the host.

[0049] Optionally, the main body of the method in this application embodiment is a programmable device of the host, such as the host's CPLD.

[0050] The above steps involve sending a first reset signal to the first optical module based on the operating status of the first optical module on the motherboard, the operating status of the second optical module on the device, and the first reset signal transmission status of the host. This first reset signal is then transmitted to the device via the first and second optical modules. Because the operating status of the optical modules is considered when sending the reset signal, the transmission of the reset signal can be performed reasonably. This technical solution solves the problem of the host being unable to properly send a reset signal when the host and device are communicating via optical signals. This ensures that the communication link can transmit stably at the expected rate through the optical modules, enabling stable communication between the host and device, and thus completing the training of the communication link.

[0051] In an exemplary embodiment, the sending of the first reset signal to the first optical module based on the operating state of the first optical module, the operating state of the second optical module, and the first reset signal sending status of the host is achieved through the following steps S11-S13:

[0052] Step S11: When both the first optical module and the second optical module are in normal working state, and the first reset signal transmission status is used to indicate that the host has sent the first reset signal, send the first reset signal to the first optical module;

[0053] Step S12: When both the first optical module and the second optical module are in normal working state and the first reset signal transmission status is used to indicate that the host has not sent the first reset signal, wait for the first reset signal sent by the host, and when the first reset signal sent by the host is obtained, send the first reset signal to the first optical module.

[0054] Step S13: If the first optical module is not in a normal working state or the second optical module is not in a normal working state, the first reset signal shall not be sent to the first optical module.

[0055] It should be noted that the steps S11-S13 mentioned above are steps performed under different circumstances, and there is no specific order in which they are performed.

[0056] In other words, in this embodiment, the host's CPLD analyzes and determines the received optical module operating status, device optical module operating status, and the host's first reset signal transmission status. When both the host's and device's optical modules are in normal operating condition, the CPLD determines whether the host has already sent a first reset signal. If a first reset signal has been sent, the host's CPLD controls the first reset signal of the connected optical module to also generate a reset action. If no first reset signal has been received, the CPLD waits for the host to send a first reset signal before sending another first reset signal. If the host has already sent a first reset signal, but the host's or device's optical module is still not in normal operating condition, the host's CPLD needs to wait until both the host's and device's optical modules are in normal operating condition before outputting a first reset signal to the host's optical module.

[0057] It should be noted that the above steps S11 to S13 have the following technical effects:

[0058] 1. Enhanced Link Stability: In steps S11 and S12, the reset signal is allowed to be transmitted only when both the first and second optical modules are in normal working condition. This ensures that the optical modules at both ends of the link can stably process and transmit the reset signal, thereby avoiding link training failure or link instability caused by abnormal optical module status.

[0059] 2. Precise Control of Reset Action: Monitoring the transmission of the first reset signal in steps S11 and S12 ensures the accurate and error-free transmission of the host reset signal, thus ensuring the synchronization of the reset action at both ends of the link. When the host has sent a reset signal, it is immediately transmitted to the optical module; when the host has not sent one, it waits until the signal is received. This avoids unnecessary link resets and saves reset time and system resources.

[0060] 3. Fault prevention and security mechanism: The step S13 describes a fault prevention mechanism that prevents the transmission of a reset signal when any optical module is in an abnormal working state. This prevents the optical module from being reset when it fails to initialize properly or when a fault occurs, thereby avoiding the potential risk of link damage or data loss.

[0061] 4. Improve overall system efficiency: The entire solution avoids invalid or premature link resets by precisely controlling the transmission of reset signals, reduces unnecessary initialization time, improves the working efficiency of PCIe optical interconnect links, and thus enhances the overall performance of systems such as servers.

[0062] 5. Enhanced compatibility and interoperability: Since different optical modules may have their own initialization times and configuration requirements, this solution enhances the compatibility between different optical modules by detecting and adapting to the working status of the optical modules, ensuring that PCIe links based on optical modules from different manufacturers can be stably reset and operate.

[0063] 6. Reduced maintenance costs and time: By preventing resets in abnormal optical module states, false alarms and malfunctions are reduced, thereby lowering maintenance costs and time and improving availability and user satisfaction.

[0064] In summary, the above steps, through precise control and synchronous transmission of link reset signals, ensure the stability and efficiency of the optical module during the reset process, thereby enhancing the performance and reliability of the PCIe optical interconnect link based on the optical module, while reducing maintenance costs and improving compatibility and interoperability.

[0065] In an exemplary embodiment, the method further includes the following steps S21-S22:

[0066] Step S21: After sending the first reset signal to the first optical module, if it is detected that the working state of the first optical module changes from a normal working state to an abnormal working state within a preset time and then changes back to a normal working state, and / or the working state of the second optical module changes from a normal working state to an abnormal working state within the preset time and then changes back to a normal working state, a second reset signal is sent to the host, wherein the second reset signal is used to instruct the host to send the first reset signal again.

[0067] Step S22: When the first reset signal sent by the host is received and both the first optical module and the second optical module are in normal working state, the first reset signal is sent to the first optical module.

[0068] In other words, in this embodiment, when the Host's CPLD has already issued a reset action (i.e., issued a first reset signal), and the Host optical module or Device optical module exits normal working state (the optical module is unplugged or some abnormal state occurs), the Host CPLD waits for the Host or Device optical module to return to normal working state. When both have returned to normal working state, the Host CPLD issues a reset action to the Host device (i.e., sends a second reset signal) to notify the Host device that the PCIe link needs to be initialized again. The Host device needs to issue a reset action again (i.e., issue a first reset signal) to notify the Device device to reset and retrain the PCIe link.

[0069] The first reset signal sent by the Host CPLD to the Host optical module passes through the Host optical module, the fiber optic cable, and the Device optical module. It is then output to the Device CPLD. After the Device CPLD detects the first reset signal from the Host and initiates a reset action, it transmits this reset action to the Device device. The Host device and the Device device can then stably transmit PCIe signals through the optical module for subsequent link training, achieving the expected effect of PCIe optical interconnection and thus completing a full PCIe link reset.

[0070] In other words, in this embodiment, the PCIe link between the host and the device can be reset by unplugging either the first or second optical module. Furthermore, the above steps endow the system with self-detection and self-repair capabilities. Even in the event of a temporary failure of the optical module, it can automatically reset and restore normal link operation without manual intervention, thus improving the system's automation and self-healing capabilities.

[0071] In an exemplary embodiment, the method further includes the following steps S31-S32:

[0072] Step S31: Upon receiving reset instruction information sent by the baseboard management controller of the host, a second reset signal is sent to the host, wherein the reset instruction information is used to indicate the reset of the device and the training of the communication link between the host and the device, and the second reset signal is used to instruct the host to send the first reset signal again;

[0073] Step S32: When the first reset signal sent by the host is received and the working states of the first optical module and the second optical module are both in normal working state, the first reset signal is sent to the first optical module.

[0074] In other words, in this embodiment, the PCIe link between the host and the device can be reset by sending a reset instruction message from the baseboard management controller, thereby avoiding the need for manual insertion and removal of the optical module to reset the PCIe link between the host and the device.

[0075] In an exemplary embodiment, the method further includes the following steps S41-S42:

[0076] Step S41: After sending the first reset signal to the first optical module, if it is detected that the working state of the device switches from normal working state to abnormal working state within a preset time and then switches back to normal working state, a second reset signal is sent to the host, wherein the second reset signal is used to instruct the host to send the first reset signal again.

[0077] Optionally, the device's BMC can detect the device's operating status, and then the device's BMC sends the device's operating status to the host's BMC, and then the host's BMC sends the device's operating status to the host's CPLD.

[0078] Optionally, the device's BMC can detect the device's operating status and then send it to the host's CPLD via the device's CPLD.

[0079] Step S42: When the first reset signal sent by the host is received and both the first optical module and the second optical module are in normal working state, the first reset signal is sent to the first optical module.

[0080] It should be noted that steps S41 and S42 above further enhance the stability and recovery capability of the PCIe optical interconnect link based on optical modules when the device status fluctuates. The specific technical effects include:

[0081] 1. Equipment Status Monitoring and Response: In step S41, after the host's CPLD sends a first reset signal to the first optical module, it can actively detect the equipment's operating status. If it detects an abnormal equipment status but subsequently recovers, the host's CPLD will automatically send a second reset signal to notify the host to reset again. This enables the host's CPLD to react quickly to momentary equipment failures, reducing fault recovery time and enhancing link stability.

[0082] 2. The precise control of the device status monitoring and reset signal in steps S41 and S42 ensures that the PCIe optical interconnect link can quickly return to normal operation even when the device status fluctuates, improving the overall reliability of the communication scenario and reducing downtime caused by faults.

[0083] In an exemplary embodiment, the method further includes steps S51-S53:

[0084] Step S51: Detect the presence status signal of the first optical module;

[0085] Step S52: When the presence status signal indicates that the first optical module is in place, control the first optical module to enter the initialization process;

[0086] Step S53: Upon receiving an interrupt signal sent by the first optical module, instruct the host's baseboard management controller to process the interrupt of the first optical module.

[0087] It should be noted that the above steps, by detecting the presence status signal of the first optical module, enable real-time monitoring of whether the optical module is correctly installed. This helps prevent link failures caused by incorrect installation or detachment of the optical module.

[0088] It should be noted that the system only begins controlling the optical modules to enter the initialization process after confirming that the first optical module is in place. This measure avoids unnecessary initialization attempts for optical modules that are not present or not in place, reduces the waste of system resources, and ensures the accuracy and success rate of optical module initialization, thereby improving the stability of the link.

[0089] It should be noted that when a programmable device (such as a CPLD) receives an interrupt signal from the first optical module, the system can quickly instruct the host's baseboard management controller (BMC) to handle the interrupt. This mechanism ensures that abnormal states occurring inside the optical module can be detected and handled in a timely manner, avoiding the continuous impact of abnormal states on link performance and improving fault response speed and overall reliability.

[0090] In an exemplary embodiment, instructing the host's substrate management controller to handle an interruption of the first optical module includes: instructing the host's substrate management controller to perform the following steps S61-S63:

[0091] Step S61: Determine the interrupt type of the first optical module, and if the interrupt type is the first type, determine the target parameters of the configuration register of the first optical module, wherein the first type of interrupt is the interrupt generated after the first optical module enters the initialization process and configures the configuration register according to the default configuration parameters of the configuration register;

[0092] Step S62: Configure the configuration register of the first optical module according to the target parameters;

[0093] Step S63: Clear the interrupt status of the first optical module.

[0094] It should be noted that in this embodiment, the BMC can identify the type of interrupt and, when the interrupt type is a specific first type, further determine the target parameters of the configuration register. This precise identification mechanism helps to quickly locate the root cause of the problem, avoids invalid processing of irrelevant interrupts, and improves the efficiency and accuracy of fault handling.

[0095] It should be noted that once the interrupt type is determined to be Type 1, the BMC will adjust the configuration register of the first optical module according to the target parameters. This mechanism allows the system to dynamically adjust the configuration parameters based on the current state and requirements of the optical module to address potential issues such as signal quality, power consumption, or compatibility during initialization, thereby improving the working performance of the optical module and the stability of the link.

[0096] It should be noted that after adjusting the configuration parameters, the BMC will clear the interrupt status of the first optical module and restore its normal operation. This operation can promptly eliminate interruption alarms in the system, avoid continuous interference from the interruption status to subsequent communication operations, and ensure the continuity and high efficiency of the PCIe optical interconnect link.

[0097] In an exemplary embodiment, determining the target parameter of the configuration register of the first optical module includes: determining the module type of the first optical module; and determining the target parameter from a configuration file based on the module type of the first optical module, wherein the configuration file contains parameters of configuration registers corresponding to different module types.

[0098] It should be noted that by determining the optical module type, the system intelligently selects configuration parameters from the configuration file that match that type of optical module. This mechanism ensures the accuracy of the configuration parameters, avoids initialization failures or link performance degradation due to parameter mismatches, and improves link stability and efficiency.

[0099] It should be noted that, since different optical modules may have different photoelectric conversion characteristics, power requirements or communication protocols, the ability to dynamically obtain target parameters from the configuration file enables flexible adaptation to various types of optical modules, enhances interoperability and adaptability, and reduces the risk when replacing or upgrading optical modules.

[0100] It should be noted that accurately and quickly obtaining target parameters from the configuration file reduces blind attempts at configuring optical modules, shortens parameter configuration time in the initialization process, thereby reducing the initialization time of the entire PCIe optical interconnect link and improving the link's response speed and overall performance.

[0101] In an exemplary embodiment, determining the target parameter of the configuration register of the first optical module includes: determining the module type of the first optical module; and, if the module type of the first optical module is the same as the module type of the optical module of the motherboard previously detected by the substrate management controller, determining the stored parameter of the configuration register of the optical module of the motherboard previously detected as the target parameter.

[0102] It should be noted that when the module type of the first optical module is the same as the type of the optical module on the motherboard detected by the Baseboard Management Controller (BMC) last time, the BMC can directly use the previously stored configuration register parameters as the target parameters without having to reread or configure the parameters, thereby greatly speeding up the initialization process of the optical module and reducing the waiting time for startup or restart.

[0103] It should be noted that the above steps simplify the parameter configuration process during initialization, avoiding repeated parameter reading and configuration steps. Especially for large server environments or data centers, this can significantly improve the initialization efficiency of batch devices and reduce operation and maintenance costs.

[0104] It should be noted that using the previously recorded and verified configuration parameters ensures that the optical module can quickly enter a stable working state during this startup, reducing the risk of initialization failure or instability due to improper parameter configuration.

[0105] It should be noted that by determining the module type of the optical module and directly using the stored configuration parameters when the module types are consistent, this technical solution effectively improves the initialization efficiency of PCIe optical interconnect link devices and reduces resource consumption.

[0106] In an exemplary embodiment, instructing the host's substrate management controller to handle an interruption of the first optical module includes: instructing the host's substrate management controller to perform the following steps S71-S72:

[0107] Step S71: Determine the interrupt type of the first optical module, and if the interrupt type is the second type, determine the state of the first optical module by detecting the status register in the first optical module. The second type of interrupt is an interrupt generated after the first optical module configures the configuration register of the first optical module according to the target parameters determined by the substrate management controller. After the first optical module configures the configuration register of the first optical module according to the target parameters determined by the substrate management controller, the first optical module updates the state of the first optical module in the status register to the active state.

[0108] Step S72: Clear the interrupt status of the first optical module.

[0109] It should be noted that in step S71, the BMC can identify the interrupt type. When the interrupt type is determined to be type two, it further detects the status of the optical module by reading the status register. This precise status detection mechanism helps to quickly diagnose whether the optical module has been configured according to the target parameters and entered the active state. This ensures that the configuration status of the optical module is accurately tracked, and any problems that do not meet the expected state after configuration can be detected in a timely manner.

[0110] It should be noted that after the first optical module configures its configuration register according to the target parameters determined by the BMC, the status of the optical module in the status register will be updated to the active state. This indicates that the optical module has completed initialization and is ready for normal communication. This status update mechanism provides a reliable hardware status guarantee for subsequent link reset and data transmission.

[0111] It should be noted that by handling the second type of interrupt, it is possible to quickly confirm that the optical module has been configured according to the target parameters and has entered the activation state, reducing the waiting time in the initialization phase and speeding up the startup speed of the entire PCIe optical interconnect link.

[0112] It should be noted that by identifying and handling specific types of interruptions, the system can automatically detect and confirm changes in the optical module's state, enhancing its self-recovery capability in resolving initialization issues, reducing the need for manual intervention, and improving its level of intelligence.

[0113] In an exemplary embodiment, determining the operating state of the first optical module includes: upon receiving first indication information sent by the host's baseboard management controller, determining that the operating state of the first optical module is a normal operating state, wherein the first indication information is the indication information sent by the host's baseboard management controller when it determines that the first optical module is in an active state by detecting the status register in the first optical module.

[0114] In an exemplary embodiment, determining the operating state of the second optical module includes: upon receiving second indication information sent by the host's baseboard management controller, determining that the operating state of the second optical module is a normal operating state, wherein the second indication information is the indication information sent by the host's baseboard management controller after receiving the third indication information forwarded by the first optical module, and the third indication information is the information sent by the device's baseboard management controller to the second optical module when it determines that the second optical module is in an active state by detecting the status register in the second optical module.

[0115] It should be noted that in this embodiment, the processes of the Device-side CPLD, BMC, and optical module are similar to those on the Host side. The difference is that when the Device-side BMC detects that the Device optical module is working normally, the Device-side BMC transmits this status information to the Device-side optical module via an I2C electrical signal. The Device-side optical module converts the I2C electrical signal into an I2C optical signal and transmits it to the Host-side optical module through the optical fiber. Inside the Host-side optical module, the I2C optical signal transmitted from the Device side is converted back into an I2C electrical signal. After the Host-side BMC parses the I2C signal, it transmits the working status of the Device-side optical module to the Host-side CPLD for subsequent logic judgment.

[0116] In this embodiment, to better understand the above process, the following is a detailed explanation: The BMC determines whether the optical module is working properly by a combination of the CPLD, BMC, and optical module. The determination process is described below:

[0117] 1. The CPLD detects the optical module's PRSNT presence signal (i.e., the aforementioned presence status signal). When the optical module is detected to be in place, the CPLD pulls the Reset signal high, controlling the optical module to enter the normal initialization process.

[0118] 2. The optical module reads the power-on default configuration into the relevant configuration register, changes its state from the initial Reset state to the LowPwr state, records this state change in the state change register, updates the state register, and sets the INT interrupt signal to high level.

[0119] 3. When the CPLD detects that the INT interrupt signal is high, it notifies the BMC to check the relevant interrupt registers of the optical module to clear the interrupt status. At the same time, the BMC reads the power requirements and system requirements of the optical module and can modify and optimize the configuration register parameters of the optical module to meet the overall PCIe link requirements. After completing the above actions, the CPLD sets the LPmode signal to a low level and controls the optical module to enter the High Power Mode during normal operation.

[0120] 4. When the optical module detects that the LPmode signal is low, its state changes from LowPwr to ModuleReady, and the state is updated in the status register.

[0121] 5. The optical module initializes each data link according to the parameters set in the configuration register. After completion, the module enters the Active state, updates the state register, records the state change in the state change register, and sets the INT interrupt signal to high level.

[0122] 6. When the CPLD detects that the interrupt signal has returned to a high level, it notifies the BMC to check the relevant status change register and clear the interrupt status of the optical module. The BMC reads the status register and detects that the optical module status has changed to the Active state. At this point, it is considered that the optical module has completed normal initialization and can work normally.

[0123] It should be noted that, Figure 4 The reset process of the PCIe optical interconnect link based on the optical module is illustrated. For details, please refer to the above implementation method. This application will not repeat the process here.

[0124] It should be noted that the Device-side CPLD detects the PERST reset signal status of the Host device. When the PERST signal changes from high to low and then back to high, it is considered that the Host device has issued a reset action. This is used by Device devices on the PCIe link. The Host-side CPLD continuously monitors whether the Host device issues a reset action for subsequent logic judgment. The Host-side CPLD detects the presence status of the Host optical module. When the optical module is present, the CPLD and BMC control the optical module to enter the normal initialization process and determine whether the optical module has entered the normal working state according to the judgment process mentioned above. After the Host BMC detects that the Host optical module is working normally, it transmits this information to the Host-side CPLD for subsequent logic judgment.

[0125] It should be noted that in the field of high-speed data communication, especially in server and data center environments, the performance and stability of PCIe optical interconnect links are critical to system design. As a bridge for photoelectric signal conversion, the working state and performance of optical modules directly affect the link's transmission rate and data integrity. However, the configuration parameters of optical modules are typically set during the initialization phase and remain fixed during subsequent operation, which may not adapt to performance demands arising from changes in link load or environmental conditions. Therefore, this application also proposes a system capable of dynamically adjusting optical module configuration parameters based on the real-time status of the link, which is of great significance for maintaining optimal link performance.

[0126] This application proposes an intelligent dynamic adjustment and performance optimization system for PCIe optical interconnect links based on optical modules. Its core is the introduction of a real-time performance monitoring and dynamic parameter adjustment mechanism. The specific implementation steps are as follows:

[0127] 1. Real-time performance monitoring: The CPLD continuously monitors the real-time performance indicators of the PCIe optical interconnect link, such as bit error rate, transmission delay, and signal strength, and transmits these data to the BMC for analysis.

[0128] 2. Intelligent Analysis and Decision-Making: After receiving performance data, the BMC analyzes the link status using a preset algorithm to determine whether the configuration parameters of the optical module need to be adjusted. If the link performance drops below a preset threshold, the BMC will automatically trigger the parameter adjustment process.

[0129] 3. Dynamic parameter adjustment: Based on the current link status and adjustment strategy, the BMC sends adjustment commands to the optical module via the I2C bus to dynamically adjust the parameters in the configuration register, such as output optical power, receiver sensitivity, modulation mode, etc., to optimize link performance.

[0130] 4. Performance Optimization Confirmation: After adjustment, the performance monitoring module re-monitors the link performance to confirm whether the optimization target has been achieved. If not, BMC can continue adjustments until the performance improves to a satisfactory level.

[0131] 5. Parameter Tuning Log Recording: Throughout the tuning process, BMC records the parameter changes, link status before and after tuning, and effects for each tuning, which are used for subsequent performance analysis and tuning strategy optimization.

[0132] It should be noted that adopting the above-mentioned extended technical solutions can significantly improve the performance stability and efficiency of PCIe optical interconnect links based on optical modules. The specific technical effects are as follows:

[0133] 1. Dynamic optimization of link performance: Through real-time monitoring and intelligent analysis, the system can dynamically adjust the configuration parameters of optical modules to adapt to changing link conditions, ensure optimal link performance, reduce data transmission error rate and latency, and improve data transmission reliability.

[0134] 2. Enhanced link adaptability: The dynamic adjustment mechanism enables the link to automatically respond to environmental changes and load fluctuations, improving the system's adaptability and robustness, and reducing link performance bottlenecks caused by fixed parameter settings.

[0135] 3. Improve operational efficiency and intelligence: Automated parameter tuning and optimization processes reduce the need for manual intervention, simplify operation and maintenance work, and provide operation and maintenance personnel with detailed performance tuning history and effect evaluation through log recording, thereby improving the system's operational efficiency and intelligence.

[0136] In summary, by introducing real-time performance monitoring and dynamic parameter adjustment mechanisms, intelligent dynamic adjustment and performance optimization of PCIe optical interconnect links based on optical modules have been achieved. This has significant technical effects on improving link stability and efficiency, reducing costs, and enhancing the intelligent operation and maintenance level of the system, and represents an important direction for the future development of server and data center communication technologies.

[0137] It should be noted that this application uses a CPLD to determine the presence status of the optical modules at both ends of the fiber optic cable, and uses a combination of BMC, CPLD, and the internal status register of the optical module to determine the working status of the optical module. Based on the working status of the optical modules at both ends of the fiber optic cable, the CPLD controls whether to transmit the link reset action issued by the PCIe host, thereby controlling when the PCIe link terminal device performs a link reset. This avoids the problem of link instability caused by inappropriate optical module configuration parameters or the optical module not yet entering normal working state during PCIe link reset, resulting in the PCIe rate failing to reach the expected rate and the system operating in a reduced speed and bandwidth state.

[0138] It should be noted that the technical solution of this application can accurately determine whether the optical module is in a normal working state. When the PCIe optical interconnect link based on the optical module is reset, the PCIe link can transmit stably at the expected rate through the optical module, and the PCIe host and PCIe terminal device can communicate stably, thereby completing the PCIe link training. This effectively solves the problem that when the PCIe optical interconnect link is reset, due to differences in optical module initialization time and internal configuration parameters, the optical module has not yet completed its internal initialization and is not working properly, resulting in the PCIe link being unable to transmit stably through the optical module, causing the PCIe link to communicate in a reduced speed and bandwidth state.

[0139] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods according to the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk), and includes several instructions to cause a terminal device (which may be a mobile phone, computer, server, or network device, etc.) to execute the methods described in the various embodiments of this application.

[0140] This embodiment also provides a reset signal transmitting device for implementing the above embodiments and preferred embodiments; details already described will not be repeated. As used below, the term "module" can refer to a combination of software and / or hardware that performs a predetermined function. Although the modules described in the following embodiments are preferably implemented in software, hardware implementation, or a combination of software and hardware, is also possible and contemplated.

[0141] Figure 5This is a structural block diagram of a reset signal transmitting device according to an embodiment of this application, applied in a communication scenario between a host and a device. The communication scenario includes a host, a first optical module of the host, a device, and a second optical module of the device. The host transmits electrical signals with the first optical module, the first optical module and the second optical module transmit optical signals, and the second optical module and the device transmit electrical signals. The device includes:

[0142] Determining module 52 is used to determine the working status of the first optical module and the working status of the second optical module;

[0143] The transmitting module 54 is configured to transmit the first reset signal to the first optical module according to the working state of the first optical module, the working state of the second optical module, and the first reset signal transmission status of the host, so as to transmit the first reset signal to the device through the first optical module and the second optical module, wherein the first reset signal is used to reset the device and instruct the device to train the communication link with the host.

[0144] The aforementioned device sends a first reset signal to the first optical module based on the operating status of the first optical module on the motherboard, the operating status of the second optical module on the device, and the first reset signal transmission status of the host. This first reset signal is then transmitted to the device via the first and second optical modules. Because the operating status of the optical modules is considered when sending the reset signal, the transmission of the reset signal can be performed reasonably. This technical solution solves the problem that the host cannot properly send a reset signal when the host and device are communicating via optical signals. This allows the communication link to transmit stably at the expected rate through the optical modules, enabling stable communication between the host and device, and thus completing the training of the communication link.

[0145] In one exemplary embodiment, the transmitting module 54 is configured to transmit the first reset signal to the first optical module when both the first optical module and the second optical module are in normal working condition and the first reset signal transmission status indicates that the host has transmitted the first reset signal; when both the first optical module and the second optical module are in normal working condition and the first reset signal transmission status indicates that the host has not transmitted the first reset signal, the module waits for the first reset signal to be transmitted by the host, and transmits the first reset signal to the first optical module upon receiving the first reset signal from the host; and prohibits transmitting the first reset signal to the first optical module when either the first optical module or the second optical module is not in normal working condition.

[0146] In an exemplary embodiment, the device further includes: a processing module, configured to, after sending the first reset signal to the first optical module, detect that the operating state of the first optical module switches from a normal operating state to an abnormal operating state within a preset time and then switches back to a normal operating state, and / or the operating state of the second optical module switches from a normal operating state to an abnormal operating state within the preset time and then switches back to a normal operating state, send a second reset signal to the host, wherein the second reset signal is used to instruct the host to send the first reset signal again; and when the first reset signal sent by the host is received, and the operating states of both the first optical module and the second optical module are in a normal operating state, send the first reset signal to the first optical module.

[0147] In an exemplary embodiment, the processing module is further configured to send a second reset signal to the host upon receiving reset indication information sent by the host's baseboard management controller, wherein the reset indication information is used to instruct the device to be reset and to train the communication link between the host and the device, and the second reset signal is used to instruct the host to send the first reset signal again; and to send the first reset signal to the first optical module upon receiving the first reset signal from the host and when both the first optical module and the second optical module are in normal working condition.

[0148] In an exemplary embodiment, the processing module is further configured to send a second reset signal to the host after detecting that the working state of the device switches from a normal working state to an abnormal working state within a preset time after sending the first reset signal to the first optical module, and then switches back to a normal working state, wherein the second reset signal is used to instruct the host to send the first reset signal again.

[0149] When the first reset signal is received from the host and both the first optical module and the second optical module are in normal working condition, the first reset signal is sent to the first optical module.

[0150] In an exemplary embodiment, the determining module 52 is further configured to determine that the working state of the first optical module is a normal working state when the first indication information sent by the substrate management controller of the host is obtained, wherein the first indication information is the indication information sent by the substrate management controller of the host when it determines that the first optical module is in an active state by detecting the status register in the first optical module.

[0151] In an exemplary embodiment, the determining module 52 is further configured to determine that the working state of the second optical module is a normal working state when it receives the second indication information sent by the baseboard management controller of the host, wherein the second indication information is the indication information sent by the baseboard management controller of the host after receiving the third indication information forwarded by the first optical module, and the third indication information is the information sent by the baseboard management controller of the device to the second optical module when it determines that the second optical module is in an active state by detecting the status register in the second optical module.

[0152] In an exemplary embodiment, the processing module is further configured to detect the presence status signal of the first optical module; when the presence status signal indicates that the first optical module is in place, control the first optical module to enter the initialization process; and when an interrupt signal sent by the first optical module is received, instruct the host's substrate management controller to process the interrupt of the first optical module.

[0153] In an exemplary embodiment, the processing module is further configured to instruct the host's baseboard management controller to perform the following operations: determine the interrupt type of the first optical module's interrupt, and if the interrupt type is a first type, determine the target parameter of the configuration register of the first optical module, wherein the first type of interrupt is an interrupt generated after the first optical module enters the initialization process and configures the configuration register according to the default configuration parameters of the configuration register; configure the configuration register of the first optical module according to the target parameter; and clear the interrupt status of the first optical module.

[0154] In an exemplary embodiment, the processing module is further configured to determine the module type of the first optical module; and determine the target parameters from a configuration file based on the module type of the first optical module, wherein the configuration file contains parameters of configuration registers corresponding to different module types.

[0155] In an exemplary embodiment, the processing module is further configured to determine the module type of the first optical module; if the module type of the first optical module is the same as the module type of the optical module of the motherboard previously detected by the substrate management controller, the stored parameters of the configuration register of the previously detected optical module of the motherboard are determined as the target parameters.

[0156] In an exemplary embodiment, the processing module is further configured to instruct the host's baseboard management controller to perform the following operations: determine the interrupt type of the interrupt of the first optical module, and if the interrupt type is a second type, determine the state of the first optical module by detecting the status register in the first optical module, wherein the second type of interrupt is an interrupt generated after the first optical module configures the configuration register of the first optical module according to the target parameters determined by the baseboard management controller, after the first optical module configures the configuration register of the first optical module according to the target parameters determined by the baseboard management controller, the first optical module updates the state of the first optical module in the status register to an active state; and clears the interrupt state of the first optical module.

[0157] It should be noted that the above modules can be implemented by software or hardware. For the latter, they can be implemented in the following ways, but are not limited to: all the above modules are located in the same processor; or, the above modules are located in different processors in any combination.

[0158] Embodiments of this application also provide a computer-readable storage medium storing a computer program, wherein the computer program is configured to execute the steps in any of the above method embodiments when run.

[0159] Optionally, in this embodiment, the computer program described above can be configured to perform the following steps:

[0160] S1, determine the working state of the first optical module and the working state of the second optical module;

[0161] S2, based on the working state of the first optical module, the working state of the second optical module, and the first reset signal transmission status of the host, the host sends the first reset signal to the first optical module, so as to send the first reset signal to the device through the first optical module and the second optical module, wherein the first reset signal is used to reset the device and instruct the device to train the communication link with the host.

[0162] In one exemplary embodiment, the aforementioned computer-readable storage medium may include, but is not limited to, various media capable of storing computer programs, such as a USB flash drive, read-only memory (ROM), random access memory (RAM), portable hard disk, magnetic disk, or optical disk.

[0163] Embodiments of this application also provide an electronic device, such as... Figure 6As shown, the electronic device includes a memory 602 and a processor 604. The memory 602 stores a computer program, and the processor 604 is configured to execute the steps in any of the above method embodiments via the computer program.

[0164] Optionally, in this embodiment, the processor 604 can be configured to perform the following steps via a computer program:

[0165] S1, determine the working state of the first optical module and the working state of the second optical module;

[0166] S2, based on the working state of the first optical module, the working state of the second optical module, and the first reset signal transmission status of the host, the host sends the first reset signal to the first optical module, so as to send the first reset signal to the device through the first optical module and the second optical module, wherein the first reset signal is used to reset the device and instruct the device to train the communication link with the host.

[0167] Specific examples in this embodiment can be found in the examples described in the above embodiments and exemplary implementations, and will not be repeated here.

[0168] Alternatively, as those skilled in the art will understand, Figure 6 The structure shown is for illustrative purposes only. Figure 6 This does not limit the structure of the aforementioned electronic devices. For example, the electronic device may also include components that are more... Figure 6 The more or fewer components shown (such as network interfaces, etc.), or having the same Figure 6 The different configurations shown.

[0169] The memory 602 can be used to store software programs and modules, such as the program instructions / modules corresponding to the reset signal sending method and reset signal sending device in this embodiment. The processor 604 executes various functional applications and data processing by running the software programs and modules stored in the memory 602, thereby implementing the aforementioned reset signal sending method. The memory 602 may include high-speed random access memory, and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some instances, the memory 602 may further include memory remotely located relative to the processor 604, and these remote memories can be connected to the terminal via a network. Examples of such networks include, but are not limited to, the Internet, corporate intranets, local area networks, mobile communication networks, and combinations thereof. Specifically, the memory 602 may be used, but is not limited to, to store information such as system configuration files. As an example, such as... Figure 6As shown, the memory 602 may include, but is not limited to, the determining module 52 and the transmitting module 54 in the aforementioned reset signal transmitting device. Furthermore, it may include, but is not limited to, other module units in the aforementioned reset signal transmitting device, which will not be elaborated upon in this example.

[0170] Optionally, the transmission device 606 described above is used to receive or send data via a network. Specific examples of the network described above may include wired networks and wireless networks. In one example, the transmission device 606 includes a Network Interface Controller (NIC), which can be connected to other network devices and a router via a network cable to communicate with the Internet or a local area network. In another example, the transmission device 606 is a Radio Frequency (RF) module, used for wireless communication with the Internet.

[0171] In addition, the above-mentioned electronic device also includes: a display 608; and a connection bus 610 for connecting the various module components in the above-mentioned electronic device.

[0172] Embodiments of this application also provide a computer program product, which includes a computer program that, when executed by a processor, implements the steps in any of the above method embodiments.

[0173] Embodiments of this application also provide another computer program product, including a non-volatile computer-readable storage medium storing a computer program that, when executed by a processor, implements the steps in any of the above method embodiments.

[0174] The embodiments described herein also provide a computer program that includes computer instructions stored in a computer-readable storage medium; a processor of a computer device reads the computer instructions from the computer-readable storage medium and executes the computer instructions, causing the computer device to perform the steps in any of the above method embodiments.

[0175] Obviously, those skilled in the art should understand that the modules or steps of this application described above can be implemented using general-purpose computing devices. They can be centralized on a single computing device or distributed across a network of multiple computing devices. They can be implemented using computer-executable program code, and thus can be stored in a storage device for execution by a computing device. In some cases, the steps shown or described can be performed in a different order than those presented here, or they can be fabricated as separate integrated circuit modules, or multiple modules or steps can be fabricated as a single integrated circuit module. Thus, this application is not limited to any particular combination of hardware and software.

[0176] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the principles of this application should be included within the protection scope of this application.

Claims

1. A method for transmitting a reset signal, characterized in that, An application to a communication scenario between a host and a device, wherein the communication scenario includes a host, a first optical module of the host, a device, and a second optical module of the device; The host transmits electrical signals with the first optical module, the first optical module and the second optical module transmit optical signals, and the second optical module and the device transmit electrical signals. include: Determine the operating status of the first optical module and the operating status of the second optical module; Based on the operating status of the first optical module, the operating status of the second optical module, and the first reset signal transmission status of the host, the host sends the first reset signal to the first optical module to transmit the first reset signal to the device through the first optical module and the second optical module. The first reset signal is used to reset the device and instruct the device to train the communication link with the host. The step of sending the first reset signal to the first optical module based on the operating state of the first optical module, the operating state of the second optical module, and the first reset signal transmission status of the host includes: When both the first optical module and the second optical module are in normal working condition, and the first reset signal transmission status is used to indicate that the host has sent the first reset signal, the first reset signal is sent to the first optical module. When both the first optical module and the second optical module are in normal working condition, and the first reset signal transmission status is used to indicate that the host has not sent the first reset signal, wait for the first reset signal sent by the host, and send the first reset signal to the first optical module when the first reset signal sent by the host is received; If the first optical module or the second optical module is not in a normal working state, the first reset signal shall not be sent to the first optical module. The method further includes: monitoring the real-time performance indicators of the communication link and sending the real-time performance indicators of the communication link to the baseboard management controller of the host, wherein the baseboard management controller of the host determines to adjust the configuration parameters of the optical module according to the real-time performance indicators of the communication link, and sends an adjustment command to the optical module according to the link status and adjustment strategy of the communication link to adjust the parameters in the configuration register of the optical module. The determination of the operating state of the first optical module includes: upon receiving a first indication message sent by the host's baseboard management controller, determining that the operating state of the first optical module is a normal operating state, wherein the first indication message is the indication message sent by the host's baseboard management controller when it determines that the first optical module is in an active state by detecting the status register in the first optical module; after configuring the configuration register of the first optical module according to the target parameters determined by the baseboard management controller, the first optical module updates the state of the first optical module in the status register to an active state; the target parameters are the target parameters of the configuration register of the first optical module determined by the baseboard management controller when it determines that the interrupt type of the first optical module's interrupt is a first type, wherein the first type of interrupt is the interrupt generated after the first optical module enters the initialization process and configures the configuration register according to the default configuration parameters of the configuration register.

2. The method according to claim 1, characterized in that, The method further includes: After sending the first reset signal to the first optical module, if it is detected that the working state of the first optical module switches from a normal working state to an abnormal working state within a preset time and then switches back to a normal working state, and / or the working state of the second optical module switches from a normal working state to an abnormal working state within the preset time and then switches back to a normal working state, a second reset signal is sent to the host, wherein the second reset signal is used to instruct the host to send the first reset signal again. When the first reset signal is received from the host and both the first optical module and the second optical module are in normal working condition, the first reset signal is sent to the first optical module.

3. The method according to claim 1, characterized in that, The method further includes: Upon receiving a reset instruction from the host's baseboard management controller, a second reset signal is sent to the host. The reset instruction is used to instruct the device to be reset and to train the communication link between the host and the device. The second reset signal is used to instruct the host to send the first reset signal again. When the first reset signal is received from the host and both the first optical module and the second optical module are in normal working condition, the first reset signal is sent to the first optical module.

4. The method according to claim 1, characterized in that, The method further includes: After sending the first reset signal to the first optical module, if the device's operating state is detected to switch from normal operating state to abnormal operating state within a preset time, and then switch back to normal operating state, a second reset signal is sent to the host, wherein the second reset signal is used to instruct the host to send the first reset signal again. When the first reset signal is received from the host and both the first optical module and the second optical module are in normal working condition, the first reset signal is sent to the first optical module.

5. The method according to claim 1, characterized in that, Determining the operating status of the second optical module includes: Upon receiving the second indication information sent by the host's baseboard management controller, the operating state of the second optical module is determined to be a normal operating state. The second indication information is the indication information sent by the host's baseboard management controller after receiving the third indication information forwarded by the first optical module. The third indication information is the information sent by the device's baseboard management controller to the second optical module when it determines that the second optical module is in an active state by detecting the status register in the second optical module.

6. The method according to claim 1, characterized in that, The method further includes: Detect the presence status signal of the first optical module; When the presence status signal indicates that the first optical module is in place, the first optical module is controlled to enter the initialization process; Upon receiving an interrupt signal from the first optical module, the host computer's baseboard management controller is instructed to process the interrupt from the first optical module.

7. The method according to claim 6, characterized in that, The instruction to the host's substrate management controller to handle the interruption of the first optical module includes: The host's baseboard management controller is instructed to perform the following operations: Determine the interrupt type of the first optical module, and if the interrupt type is the first type, determine the target parameters of the configuration register of the first optical module; Configure the configuration register of the first optical module according to the target parameters; Clear the interrupt status of the first optical module.

8. The method according to claim 7, characterized in that, Determining the target parameters of the configuration register of the first optical module includes: Determine the module type of the first optical module; The target parameters are determined from the configuration file based on the module type of the first optical module, wherein the configuration file contains parameters of the configuration registers corresponding to different module types.

9. The method according to claim 7, characterized in that, Determining the target parameters of the configuration register of the first optical module includes: Determine the module type of the first optical module; If the module type of the first optical module is the same as the module type of the optical module of the motherboard that the substrate management controller detected last time, the stored parameters of the configuration register of the optical module of the motherboard that was detected last time will be determined as the target parameters.

10. The method according to claim 6, characterized in that, The instruction to the host's substrate management controller to handle the interruption of the first optical module includes: The host's baseboard management controller is instructed to perform the following operations: The interrupt type of the first optical module is determined, and if the interrupt type is the second type, the state of the first optical module is determined by detecting the status register in the first optical module. The second type of interrupt is the interrupt generated after the first optical module configures the configuration register of the first optical module according to the target parameters determined by the substrate management controller. Clear the interrupt status of the first optical module.

11. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program, wherein the computer program, when executed by a processor, implements the steps of the method described in any one of claims 1 to 10.

12. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the steps of the method described in any one of claims 1 to 10.

13. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by a processor, it implements the method of any one of claims 1 to 10.

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