Two-wire authentication chip

Abstract

This application provides a two-wire authentication chip, relating to the field of electronic device technology. The authentication chip includes an H-bridge circuit for extracting communication commands sent by the host device; a bidirectional communication module for parsing the communication commands to obtain communication commands sent by the host device, and for transmitting data fed back by the authentication chip based on the communication commands; a finite state machine module for scheduling the bidirectional communication module, the memory, and the encryption module to execute corresponding functions; a load adjustment module for adjusting the load of the authentication chip itself; the memory for storing data; and the encryption module for encrypting the data. This application can reduce the cost of authentication chips.

Description

Technical Field

[0001] This application relates to the field of electronic device technology, and more particularly to a two-wire authentication chip. Background Technology

[0002] We frequently use a large number of consumable products in our daily lives and work, such as ink cartridges, e-cigarette cartridges, various filters, medical supplies, and so on.

[0003] In the existing technology, in order to better control the quality of consumable products, manufacturers usually add an authentication chip to the consumable products and use the authentication chip to enable the host device to authenticate the consumable products and achieve quality control.

[0004] However, the inventors discovered that most existing certification chips use single-wire or dual-wire communication designs. If more communication interfaces are added to the existing power and ground terminals, the number of metal connection points for this consumable product will exceed three, increasing the difficulty and cost of production.

[0005] It should be noted that the above content is not necessarily prior art, nor is it intended to limit the scope of patent protection of this application. Summary of the Invention

[0006] This application provides a two-wire authentication chip to solve or alleviate one or more of the technical problems mentioned above.

[0007] One aspect of this application provides a two-wire authentication chip, which is installed on a consumable product for communicating with a host device. The authentication chip has two contacts and includes an H-bridge circuit, a bidirectional communication module, a finite state machine module, a load regulation module, a memory, and an encryption module.

[0008] The H-bridge circuit, electrically connected to the two contacts, is used to extract communication commands sent by the host device.

[0009] The bidirectional communication module is electrically connected to the H-bridge circuit, the load adjustment module, and the finite state machine module. It is used to parse the communication instructions to obtain the communication commands sent by the host device, and to transmit the data fed back by the authentication chip based on the communication commands.

[0010] The finite state machine module is electrically connected to the bidirectional communication module, the memory, and the encryption module, and is used to schedule the bidirectional communication module, the memory, and the encryption module to perform corresponding functions;

[0011] The load adjustment module is electrically connected to the bidirectional communication module and is used to adjust the load of the authentication chip itself.

[0012] The memory is electrically connected to the finite state machine module and is used to store data;

[0013] The encryption module is electrically connected to the finite state machine module and is used to encrypt data.

[0014] Optionally, the communication command includes multiple pulse signals, each pulse signal representing a binary data to be transmitted. The bidirectional communication module is further configured to measure the high-level pulse width and low-level pulse width of each pulse signal, and determine the data corresponding to each pulse signal based on the measurement results. Specifically, when the high-level pulse width and low-level pulse width of the pulse signal meet a preset condition, the data corresponding to that pulse signal is determined to be "1"; when the high-level pulse width and low-level pulse width of the pulse signal do not meet the preset condition, the data corresponding to that pulse signal is determined to be "0".

[0015] The bidirectional communication module is also used to parse the data corresponding to the multiple pulse signals according to a preset communication protocol to obtain the communication command sent by the host device.

[0016] Optionally, the bidirectional communication module is further configured to determine the data to be fed back based on the communication command;

[0017] The finite state machine module is also used to call the encryption module to encrypt the data to be fed back, so as to obtain encrypted data;

[0018] The bidirectional communication module is also used to return the encrypted data to the host device through the H-bridge circuit.

[0019] Optionally, the finite state machine module is further configured to read the encryption key from the memory and send the encryption key to the encryption module;

[0020] The encryption module is also used to generate a random number based on the data to be fed back, and combine the random number with the data to be fed back to obtain combined data;

[0021] The encryption module is further configured to encrypt the combined data based on the encryption key to obtain the encrypted data.

[0022] Optionally, the bidirectional communication module is further configured to extract multiple excitation pulses sent by the host device through the H-bridge circuit;

[0023] The bidirectional communication module is further configured to, according to a preset encoding strategy and the encrypted data, perform [further processing / processing].

[0024] The above multiple excitation pulses are encoded to obtain encoded pulse data;

[0025] The bidirectional communication module is also used to return the encoded pulse data to the host device through the H-bridge circuit.

[0026] Optionally, one excitation pulse corresponds to one binary data to be returned to the host device, and the preset encoding strategy is as follows: when the data to be encoded is "1", the excitation pulse corresponding to the current data to be encoded is subjected to high-frequency modulation processing; when the data to be encoded is "0", the excitation pulse corresponding to the current data to be encoded is not processed.

[0027] Optionally, two excitation pulses correspond to a binary data to be returned to the host device. The preset encoding strategy is as follows: when the data to be encoded is "1", the first excitation pulse of the two excitation pulses corresponding to the current data to be encoded is subjected to a first high-frequency modulation process using a first frequency, and the second excitation pulse of the two excitation pulses corresponding to the current data to be encoded is subjected to a second high-frequency modulation process using a second frequency; when the data to be encoded is "0", the two excitation pulses corresponding to the current data to be encoded are not processed.

[0028] Optionally, the three excitation pulses correspond to a binary data to be returned to the host device. The preset encoding strategy is as follows: when the data to be encoded is "1", the voltage of the high-level pulse in the first excitation pulse and the high-level pulse in the third excitation pulse of the three excitation pulses corresponding to the current data to be encoded is pulled low; when the data to be encoded is "0", the voltage of the high-level pulse in the second excitation pulse of the three excitation pulses corresponding to the current data to be encoded is pulled low.

[0029] Optionally, the H-bridge circuit is further configured to calculate the absolute difference between the first voltage value obtained from the first contact and the second voltage value obtained from the second contact; if the absolute difference is greater than or equal to a preset threshold, the currently extracted input signal is determined to be a high-level pulse signal; if the absolute difference is less than the preset threshold, the currently extracted input signal is determined to be a low-level pulse signal.

[0030] Optionally, the load regulation module includes a field-effect transistor with an internal resistance greater than a preset resistance value.

[0031] The embodiments of this application employing the above-described technical solution may have the following advantages:

[0032] No additional communication interface contacts are needed for the authentication chip, saving costs. Furthermore, the authentication chip in this application can be connected to the existing power and ground contacts in either direction, regardless of their orientation. In addition, the authentication chip in this application can achieve encrypted communication, and during encryption, all internal operations are controlled by an internal finite state machine module. Since the finite state machine module is a hardware circuit, compared to software implementation, the overall security and stability of the chip are greatly improved. Attached Figure Description

[0033] The accompanying drawings exemplify embodiments and form part of the specification, serving together with the textual description to explain exemplary implementations of the embodiments. The illustrated embodiments are for illustrative purposes only and do not limit the scope of the claims. Throughout the drawings, the same reference numerals refer to similar but not necessarily identical elements.

[0034] Figure 1 The schematic diagram illustrates a module diagram of a two-wire authentication chip according to Embodiment 1 of this application.

[0035] Figure 2 A schematic diagram of the main control circuit module is shown in one embodiment.

[0036] Figure 3 A schematic diagram of the main control circuit module is shown in another embodiment.

[0037] Figure 4 The diagram illustrates a pulse signal representation corresponding to data "1" in one embodiment.

[0038] Figure 5 The diagram illustrates a pulse signal representation corresponding to data "0" in one embodiment.

[0039] Figure 6 A schematic diagram illustrating the pulse signal representation corresponding to data "1" in another embodiment is shown.

[0040] Figure 7 A schematic diagram illustrating the pulse signal representation corresponding to data "0" in another embodiment is shown. Detailed Implementation

[0041] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. The components of the embodiments of the present invention described and shown in the accompanying drawings can be arranged and designed in various different configurations. The present invention can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to make the disclosure of the present invention more thorough and complete. Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without inventive effort are within the scope of protection of the present invention.

[0042] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0043] In the description of this invention, it should also be noted that, unless otherwise explicitly specified and limited, the terms "set up," "connected," and "electrically connected" should be interpreted broadly. For example, they can refer to a direct connection or an indirect connection through an intermediate medium, or they can refer to the internal connection of two elements. It should be noted that when one element is considered to be "connected" to another element, it can be directly connected to the other element or there may be an intervening element present.

[0044] The following detailed description of some embodiments of the present invention is provided in conjunction with the accompanying drawings. Unless otherwise specified, the following embodiments and features can be combined with each other.

[0045] Example 1

[0046] Figure 1 The schematic diagram illustrates a module diagram of a two-wire authentication chip according to Embodiment 1 of this application.

[0047] The authentication chip is installed on consumable products for communication with the host device. The host device has a main control circuit with two contacts, designated as the first and second contacts. The authentication chip also has two contacts, designated as the third and fourth contacts.

[0048] The host device can be a printer, an e-cigarette cartridge, a water dispenser, a medical device, etc. Correspondingly, the consumable products include ink cartridges, e-cigarette cartridges, water dispenser filters, medical supplies, etc.

[0049] When a consumable product is installed on a host device, two contacts in the main control circuit on the host device will be electrically connected to two contacts in the authentication chip on the consumable product, thus forming a complete communication transmission link.

[0050] In one example, see Figure 2 The main control circuit 100 has a first contact 101 and a second contact 102. When the consumable product is correctly installed on the host device, the two contacts in the main control circuit 100 on the host device will be electrically connected to the two contacts in the authentication chip on the consumable product, thereby forming a complete communication transmission link.

[0051] In this embodiment, the main control circuit 100 includes a battery 103, a main control chip 104, and a switch module 105.

[0052] Battery 103 can be a built-in rechargeable battery or a removable non-rechargeable battery. Battery 103 is used to power the main control circuit 100 and the authentication chip.

[0053] The main control chip 104 is used to encode the data sent by the main control circuit 100 and decode the data returned by the authentication circuit 200. The main control chip 104 can be a chip such as an MCU, CPU, or field-programmable gate array (FPGA).

[0054] The switching module 105 is used to open and close the circuit under the control of the main control chip 104. The switching module 105 includes a field-effect transistor or a bipolar transistor.

[0055] In this embodiment, the first pin 1041 of the main control chip 104 and the first terminal 1051 of the switch module 105 are both electrically connected to one end (positive or negative) of the battery 103. The second pin 1042 of the main control chip 104 is electrically connected to the second terminal 1052 of the switch module 105. The third pin 1043 of the main control chip 104 and the other end (negative or positive) of the battery 103 are both electrically connected to the second contact 102. The third terminal 1053 of the switch module 105 is electrically connected to the first contact 101, and the second terminal 1052 of the switch module 105 is the control terminal.

[0056] See another example. Figure 3 The main control circuit 100' has a first contact 101' and a second contact 102'. When the consumable product is correctly installed on the host device, the two contacts in the main control circuit 100 on the host device will be electrically connected to the two contacts in the authentication chip on the consumable product, thereby forming a complete communication transmission link.

[0057] In this embodiment, the main control circuit 100' includes a battery 103', a main control chip 104', a switching module 105', and a filtering module 106'.

[0058] Battery 103' can be a built-in rechargeable battery or a removable non-rechargeable battery. Battery 103' is used to power the main control circuit 100' and the authentication chip.

[0059] The main control chip 104' is used to encode the data sent by the main control circuit 100' and decode the data returned by the authentication chip. The main control chip 104' can be a chip such as an MCU, CPU, or Field Programmable Gate Array (FPGA).

[0060] The switching module 105' is used to open and close under the control of the main control chip 104'. The switching module 105' includes a field-effect transistor or a bipolar transistor.

[0061] The filtering module 106' is used to perform filtering processing. Preferably, the filtering module 106' is a high-frequency filtering module.

[0062] In this embodiment, the first pin 1041' of the main control chip 104' and the first terminal 1051' of the switch module 105' are both electrically connected to one end (positive or negative) of the battery 103'. The second pin 1042' of the main control chip 104' is electrically connected to the second terminal 1052' of the switch module 105'. The third pin 1043' of the main control chip 104' is electrically connected to the first terminal 1061' of the filter module 106'. The fourth pin 1044' of the main control chip 104', the other end (negative or positive) of the battery 103', and the second terminal 1062' of the filter module 106' are all connected to the second contact 102'. The third terminals 1053' of the switch module 105' and 1063' of the filter module 106' are both electrically connected to the first contact 101', and the second terminal 1052' of the switch module 105' is the control terminal.

[0063] In an optional embodiment, when the main control circuit 100 (100') sends a communication command to the authentication chip, the main control chip 104 (104') in the main control circuit 100 (100') controls the switch module 105 (105') to open and close in a first preset manner, generating a communication command composed of multiple first signals, and transmitting the communication command to the authentication chip through two contacts of the main control circuit 100 (100').

[0064] In this embodiment, when the main control circuit sends a communication command to the authentication chip, it can use encoding methods such as Morse code or Manchester encoding to encode each piece of data to be sent in the communication command.

[0065] Correspondingly, the first preset method includes setting the control method for the switch module corresponding to data "1" and setting the control method for the switch module corresponding to data "0". The control methods for the switch module corresponding to data "1" and data "0" can be set according to actual conditions, and their specific control methods are not limited in this embodiment.

[0066] It should be noted that when different encoding methods are used to encode the data to be sent, the first preset method should also correspond to the encoding method used.

[0067] In one example, when Morse code is used to encode the data to be transmitted, the time required to transmit one bit of data (hereinafter referred to as bit time) can be divided into two time periods of unequal length, such as a one-quarter bit time period and a three-quarter bit time period. Since the voltage (also called level) of each time period can be high or low, when the data to be transmitted is data "1", the data "1" can be characterized by a first pulse signal consisting of a high-level pulse in the first three-quarter bit time period and a low-level pulse in the second one-quarter bit time period, such as... Figure 4 As shown. When the data to be sent is data "0", the data "0" can be represented by a second pulse signal consisting of a low-level pulse for a first time period of three-quarters of a bit and a high-level pulse for a second time period of one-quarter of a bit, as shown. Figure 5 As shown.

[0068] It should be noted that the representation of data "0" and data "1" can also be the opposite of the above description.

[0069] Furthermore, it should be noted that, in order to enhance interference, the representation of data "0" and data "1" can also be represented by multiple pulse signals as described above. For example, data "0" and data "1" can be represented by two pulse signals as described above, that is, data "0" can be represented by two second pulse signals, and data "1" can be represented by two first pulse signals.

[0070] In one example, when using Manchester encoding to encode the data to be transmitted, the time required to transmit one bit of data (hereinafter referred to as bit time) can be divided into two equal-length time intervals. Since the voltage (also called level) of each time interval can be high or low, when the data to be transmitted is data "1", it can be defined as a third pulse signal consisting of a high-level pulse in the first time interval and a low-level pulse in the second time interval, such as... Figure 6As shown. When the data to be sent is data "0", the data "0" can be represented by a fourth pulse signal consisting of a low-level pulse in the first time period and a high-level pulse in the second time period, as shown. Figure 7 As shown.

[0071] It should be noted that, in order to improve interference, the representation of data "0" and data "1" can also be represented by multiple pulse signals as described above. For example, data "0" and data "1" can be represented by two pulse signals as described above, that is, data "0" can be represented by two fourth pulse signals and data "1" can be represented by two third pulse signals.

[0072] It is understandable that when the data to be transmitted is encoded using Morse code as described in the above example, when the data to be transmitted is "1", the main control chip 104 (104') will control the switch module 105 (105') to be in a closed state for the first three-quarters of the bit time and in an open state for the last quarter of the bit time, thereby encoding the power signal into the first signal corresponding to the data to be transmitted "1". Similarly, when the data to be transmitted is "0", the main control chip 104 (104') will control the switch module 105 (105') to be in an open state for the first three-quarters of the bit time and in a closed state for the last quarter of the bit time, thereby encoding the power signal into the first signal corresponding to the data to be transmitted "0".

[0073] It should be noted that when multiple data to be sent need to be sent, the main control chip 104 (104') will control the opening and closing time of the switch module 105 (105') in the manner described above for each data to be sent.

[0074] like Figure 1 As shown, the authentication chip includes an H-bridge circuit 200, a bidirectional communication module 201, a finite state machine module 202, a load adjustment module 203, a memory 204, and an encryption module 205.

[0075] The H-bridge circuit 200 is electrically connected to the two contacts and is used to extract communication commands sent by the host device.

[0076] The bidirectional communication module 201 is electrically connected to the H-bridge circuit 200, the load adjustment module 203, and the finite state machine module 202. It is used to parse the communication instructions to obtain the communication commands sent by the host device, and to transmit the data fed back by the authentication chip based on the communication commands.

[0077] The finite state machine module 202 is electrically connected to the bidirectional communication module 201, the memory 204, and the encryption module 205, and is used to schedule the bidirectional communication module, the memory, and the encryption module to perform corresponding functions;

[0078] The load adjustment module 203 is electrically connected to the bidirectional communication module 201 and is used to adjust the load of the authentication chip itself.

[0079] The memory 204 is electrically connected to the finite state machine module 202 and is used to store data;

[0080] The encryption module 205 is electrically connected to the finite state machine module 202 and is used to encrypt data.

[0081] The authentication chip in this application eliminates the need for additional communication interface contacts, saving costs. Furthermore, the authentication chip in this application can be connected to the existing power and ground contacts in either direction, regardless of their orientation. In addition, the authentication chip in this application can achieve encrypted communication, and during the encryption process, all internal operations are controlled by an internal finite state machine module. Since the finite state machine module is a hardware circuit, compared to software implementation, the overall security and stability of the chip are greatly improved.

[0082] In an optional embodiment, the communication command includes multiple pulse signals, each pulse signal representing a binary data to be transmitted. The bidirectional communication module 201 is further configured to measure the high-level pulse width and low-level pulse width of each pulse signal, and determine the data corresponding to each pulse signal based on the measurement results. Specifically, when the high-level pulse width and low-level pulse width of the pulse signal meet a preset condition, the data corresponding to the pulse signal is determined to be "1"; when the high-level pulse width and low-level pulse width of the pulse signal do not meet the preset condition, the data corresponding to the pulse signal is determined to be "0".

[0083] After obtaining the measurement results of each pulse signal, the authentication chip determines whether the high-level pulse width and low-level pulse width in the pulse signal meet the preset conditions according to the decoding rules pre-stored in the memory 204. When the high-level pulse width and low-level pulse width in the pulse signal meet the preset conditions, the data corresponding to the pulse signal can be determined to be "1"; when the high-level pulse width and low-level pulse width in the pulse signal do not meet the preset conditions, the data corresponding to the pulse signal is determined to be "0".

[0084] The preset condition is the condition required in the decoding rule to determine that the data corresponding to the pulse signal is "1". For example, the preset condition is that the high-level pulse width accounts for three-quarters of the pulse signal.

[0085] The bidirectional communication module 201 is also used to parse the data corresponding to the multiple pulse signals according to a preset communication protocol to obtain the communication command sent by the host device.

[0086] The communication protocol is used to define the communication commands corresponding to different combinations of binary data.

[0087] After obtaining the binary combination data corresponding to all pulse signals contained in the communication command, the bidirectional communication module 201 will parse it according to the communication protocol to obtain the communication command sent by the host device. For example, the parsed communication command is: "The authentication chip needs to provide feedback on the remaining available time of consumable products".

[0088] In an optional embodiment, the bidirectional communication module 201 is further configured to determine the data to be fed back based on the communication command.

[0089] The finite state machine module 202 is also used to call the encryption module 205 to encrypt the data to be fed back, so as to obtain encrypted data.

[0090] The bidirectional communication module 201 is also used to return the encrypted data to the host device through the H-bridge circuit 200.

[0091] In this embodiment, after the bidirectional communication module 201 parses and obtains the communication command, it determines the data to be fed back through the finite state machine module 202 and returns the data to be fed back to the bidirectional communication module 201.

[0092] After receiving the data to be fed back, if the data requires encryption, the finite state machine module 202 will call the encryption module 205 to encrypt the data, obtaining encrypted data. If the data does not require encryption, the finite state machine module 202 will not call the encryption module 205 to encrypt the data. Whether the data needs encryption can be determined based on the communication command.

[0093] After encrypting the data to be fed back, the encryption module 205 will return the encrypted data to the bidirectional communication module 201 through the finite state machine module 202. After receiving the data, the bidirectional communication module 201 can return the encrypted data to the host device through the H-bridge circuit 201.

[0094] In an optional embodiment, the finite state machine module 202 is further configured to read the encryption key from the memory and send the encryption key to the encryption module 205.

[0095] The encryption module 205 is further configured to generate a random number based on the data to be fed back, and combine the random number with the data to be fed back to obtain combined data;

[0096] The encryption module 205 is further configured to encrypt the combined data based on the encryption key to obtain the encrypted data.

[0097] In this embodiment, during encryption, the encryption key stored in the memory is retrieved, and a random number is generated based on the authentication content data (data to be fed back) for encryption authentication. All internal operations are controlled by the finite state machine module 202, which is a hardware circuit. Compared to software implementation, this greatly improves the security and stability of the entire chip. Furthermore, adding random numbers for encryption further enhances encryption security.

[0098] In an optional embodiment, the bidirectional communication module 201 is further configured to communicate via the H-bridge circuit 20

[0099] 0. Extract multiple excitation pulses sent by the host device.

[0100] The bidirectional communication module 201 is further configured to, according to a preset encoding strategy and the encrypted data

[0101] The multiple excitation pulses are encoded to obtain encoded pulse data.

[0102] The bidirectional communication module 201 is also used to return the encoded pulse data to the host device through the H-bridge circuit 200.

[0103] In this embodiment, the excitation pulse is generated by the main control chip controlling the switch module to open and close according to a second preset method. The second preset method includes setting the time period during which the switch module is in an open or closed state within one bit of data transmission cycle. The data transmission cycle includes a data preparation time period, a data modulation time period, and a data transmission completion time period. The data preparation time period is used for the authentication chip to prepare the data to be transmitted. The data modulation time period is used for the authentication chip to modulate the data to be transmitted. The data transmission completion time period is used for the authentication chip to transmit information that the data to be transmitted has been modulated.

[0104] In one example, the second preset mode is as follows: the switch module 105 is in a closed state for the first one-fifth of the data transmission cycle, in a closed state for the middle three-fifths of the cycle, and in an open state for the last one-fifth of the cycle. In another example, the second preset mode is as follows: the switch module 105 is in a closed state for the first one-tenth of the data transmission cycle, in a closed state for the middle seven-tenths of the cycle, and in an open state for the last two-tenths of the cycle.

[0105] In an optional implementation, one excitation pulse corresponds to one binary data to be returned to the host device. The preset encoding strategy is as follows: when the data to be encoded is "1", the excitation pulse corresponding to the current data to be encoded is subjected to high-frequency modulation processing; when the data to be encoded is "0", the excitation pulse corresponding to the current data to be encoded is not processed.

[0106] Among them, high-frequency modulation processing refers to using a high-frequency signal to modulate the high-level pulse signal in the excitation pulse corresponding to the current data to be encoded, thereby encoding the high-level pulse in the excitation pulse into a carrier signal with a frequency greater than that of the excitation pulse, and thus generating the encoded pulse data.

[0107] In an optional embodiment, two excitation pulses correspond to a binary data to be returned to the host device. The preset encoding strategy is as follows: when the data to be encoded is "1", the first excitation pulse of the two excitation pulses corresponding to the current data to be encoded is subjected to a first high-frequency modulation process using a first frequency, and the second excitation pulse of the two excitation pulses corresponding to the current data to be encoded is subjected to a second high-frequency modulation process using a second frequency; when the data to be encoded is "0", the two excitation pulses corresponding to the current data to be encoded are not processed.

[0108] In this embodiment, by modulating the two excitation pulses with carrier signals of different frequencies, the data sent by the authentication chip can be determined by combining the modulation signals corresponding to the two excitation pulses when decoding the encoded pulse data, thereby better avoiding environmental interference.

[0109] It should be noted that when the host device receives the encoded pulse data, it can utilize... Figure 3 The filtering module in the main control circuit shown detects high-frequency signals from the encoded pulse data. Then, the high-frequency signals can be processed by the analog-to-digital converter or comparator integrated inside the main control chip to obtain the data returned by the authentication chip.

[0110] It should be noted that the processing method varies depending on the modulation method used for the data to be encoded. For example, if the modulation methods used for the data to be encoded, "1" and "0", are: high-frequency modulation for "1" and no processing for "0", then a comparator can be used during decoding. If the comparator detects a high-frequency signal, the data returned by the authentication chip is determined to be "1"; if the comparator does not detect a high-frequency signal, the data returned by the authentication chip is determined to be "0". As another example, if the modulation methods used for the data to be encoded, "1" and "0", are: first high-frequency modulation for "1" (carrier frequency is a first frequency) and second high-frequency modulation for "0" (carrier frequency is a second frequency), then an analog-to-digital converter can be used to obtain the frequency of the high-frequency signal during decoding. If the frequency is the first frequency, the data returned by the authentication chip 204 is determined to be "1"; if the frequency is the second frequency, the data returned by the authentication chip 204 is determined to be "0".

[0111] In an optional implementation, three excitation pulses correspond to a binary data to be returned to the host device. The preset encoding strategy is as follows: when the data to be encoded is "1", the voltage of the high-level pulse in the first excitation pulse and the high-level pulse in the third excitation pulse of the three excitation pulses corresponding to the current data to be encoded is pulled low; when the data to be encoded is "0", the voltage of the high-level pulse in the second excitation pulse of the three excitation pulses corresponding to the current data to be encoded is pulled low.

[0112] It should be noted that when the host device receives the encoded pulse data, it can utilize... Figure 2 The main control circuit shown decodes the encoded pulse data. Specifically, during decoding, the main control chip groups every three pulses. For each group, it calculates the average voltage of the high-level pulses in the first and third excitation pulses, and measures the voltage of the high-level pulse in the second excitation pulse. Then, it compares the calculated average voltage with the measured voltage. If the average voltage is less than the measured voltage, the data represented by this group of pulses is determined to be "1"; if the average voltage is greater than the measured voltage, the data represented by this group of pulses is determined to be "0".

[0113] In this embodiment, since noise and interference may exist in the circuit during actual application, in order to filter out noise and interference and improve the stability of the circuit, when the main control circuit reads one bit of data from the authentication chip, it uses multiple excitation pulses to encode one bit of data to generate feedback data corresponding to each bit of data, thereby reducing the impact of the drop in battery voltage.

[0114] In an optional embodiment, the H-bridge circuit is further configured to calculate the absolute difference between a first voltage value obtained from the first contact and a second voltage value obtained from the second contact; if the absolute difference is greater than or equal to a preset threshold, the currently extracted input signal is determined to be a high-level pulse signal; if the absolute difference is less than the preset threshold, it is a low-level pulse signal.

[0115] The preset threshold is a pre-set value that can be set and modified according to actual conditions. For example, the preset threshold is 0.1V.

[0116] It should be noted that the determination of whether the currently extracted input signal is a high-level pulse signal or a low-level pulse signal can also be reversed. That is, if the absolute difference between the two signals is greater than the preset threshold, the currently extracted input signal is determined to be a low-level pulse signal; otherwise, the currently extracted input signal is determined to be a high-level pulse signal.

[0117] In this embodiment, the H-bridge circuit determines whether the input signal is a high-level pulse signal or a low-level pulse signal based on the absolute difference between the two contacts, thereby enabling the authentication chip to support reverse connection.

[0118] In an optional embodiment, the load adjustment module includes a field-effect transistor (FET) with an internal resistance greater than a preset value. The authentication chip adjusts its own load by controlling the conduction and cutoff of the FET.

[0119] In an alternative embodiment, the load adjustment module may also be a high-frequency ring resonator circuit or a digital logic circuit.

[0120] In this embodiment, the authentication chip changes the load characteristics of the entire circuit by changing its own load characteristics, thereby achieving the purpose of transmitting data in reverse according to the voltage change of the power supply signal.

[0121] It should be noted that the above are merely preferred embodiments of this application and do not limit the scope of patent protection of this application. Any equivalent structural or procedural changes made using the content of this application's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the scope of patent protection of this application.

Claims

1. A two-wire authentication chip, characterized in that, The authentication chip is installed on the consumable product for communication with the host device. The authentication chip has two contacts and includes an H-bridge circuit, a bidirectional communication module, a finite state machine module, a load adjustment module, a memory, and an encryption module. The H-bridge circuit, electrically connected to the two contacts, is used to extract communication commands sent by the host device. The bidirectional communication module is electrically connected to the H-bridge circuit, the load adjustment module, and the finite state machine module. It is used to parse the communication instructions to obtain the communication commands sent by the host device, and to transmit the data fed back by the authentication chip based on the communication commands. The finite state machine module is electrically connected to the bidirectional communication module, the memory, and the encryption module, and is used to schedule the bidirectional communication module, the memory, and the encryption module to perform corresponding functions; The load adjustment module is electrically connected to the bidirectional communication module and is used to adjust the load of the authentication chip itself. The memory is electrically connected to the finite state machine module and is used to store data; The encryption module is electrically connected to the finite state machine module and is used to encrypt data.

2. The two-wire authentication chip according to claim 1, characterized in that, The communication command includes multiple pulse signals, each pulse signal representing a binary data to be transmitted. The bidirectional communication module is further used to measure the high-level pulse width and low-level pulse width of each pulse signal, and determine the data corresponding to each pulse signal based on the measurement results. Specifically, when the high-level pulse width and low-level pulse width of the pulse signal meet a preset condition, the data corresponding to the pulse signal is determined to be "1"; when the high-level pulse width and low-level pulse width of the pulse signal do not meet the preset condition, the data corresponding to the pulse signal is determined to be "0". The bidirectional communication module is also used to parse the data corresponding to the multiple pulse signals according to a preset communication protocol to obtain the communication command sent by the host device.

3. The two-wire authentication chip according to claim 1 or 2, characterized in that, The bidirectional communication module is also used to determine the data to be fed back based on the communication command; The finite state machine module is also used to call the encryption module to encrypt the data to be fed back, so as to obtain encrypted data; The bidirectional communication module is also used to return the encrypted data to the host device through the H-bridge circuit.

4. The two-wire authentication chip according to claim 3, characterized in that, The finite state machine module is also used to read the encryption key from the memory and send the encryption key to the encryption module; The encryption module is also used to generate a random number based on the data to be fed back, and combine the random number with the data to be fed back to obtain combined data; The encryption module is further configured to encrypt the combined data based on the encryption key to obtain the encrypted data.

5. The two-wire authentication chip according to claim 3, characterized in that, The bidirectional communication module is also used to extract multiple excitation pulses sent by the host device through the H-bridge circuit; The bidirectional communication module is further configured to, according to a preset encoding strategy and the encrypted data, perform [further processing / processing]. The above multiple excitation pulses are encoded to obtain encoded pulse data; The bidirectional communication module is also used to return the encoded pulse data to the host device through the H-bridge circuit.

6. The two-wire authentication chip according to claim 5, characterized in that, One excitation pulse corresponds to one binary data to be returned to the host device. The preset encoding strategy is: when the data to be encoded is "1", the excitation pulse corresponding to the current data to be encoded is subjected to high-frequency modulation processing. When the data to be encoded is "0", the excitation pulse corresponding to the current data to be encoded is not processed.

7. The two-wire authentication chip according to claim 5, characterized in that, Two excitation pulses correspond to a binary data to be returned to the host device. The preset encoding strategy is as follows: when the data to be encoded is "1", the first excitation pulse of the two excitation pulses corresponding to the current data to be encoded is subjected to a first high-frequency modulation process using a first frequency, and the second excitation pulse of the two excitation pulses corresponding to the current data to be encoded is subjected to a second high-frequency modulation process using a second frequency. When the data to be encoded is "0", the two excitation pulses corresponding to the current data to be encoded are not processed.

8. The two-wire authentication chip according to claim 5, characterized in that, Three excitation pulses correspond to one binary data to be returned to the host device. The preset encoding strategy is as follows: when the data to be encoded is "1", the voltage of the high-level pulse in the first excitation pulse and the high-level pulse in the third excitation pulse of the three excitation pulses corresponding to the current data to be encoded is pulled low; when the data to be encoded is "0", the voltage of the high-level pulse in the second excitation pulse of the three excitation pulses corresponding to the current data to be encoded is pulled low.

9. The two-wire authentication chip according to claim 2, characterized in that, The H-bridge circuit is also used to calculate the absolute difference between the first voltage value obtained from the first contact and the second voltage value obtained from the second contact; if the absolute difference is greater than or equal to a preset threshold, the currently extracted input signal is determined to be a high-level pulse signal. If the absolute difference is less than a preset threshold, then the currently extracted input signal is determined to be a low-level pulse signal.

10. The two-wire authentication chip according to claim 1, characterized in that, The load regulation module includes a field-effect transistor with an internal resistance greater than a preset resistance value.

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