Overvoltage protection for transistor switches

Abstract

An electronic circuit for overvoltage protection of a transistor switch includes: an overvoltage comparator configured to detect an overvoltage on a Vsource of the transistor switch by comparing the Vsource with Vref, and output a turn-on signal when the overvoltage is detected; a switch configured to be turned on by the conduction signal; a voltage regulator configured to regulate a Vclamp when the switch is turned on, where the Vclamp regulates a Vgate of the transistor switch; and a further comparator configured to detect a Vcc of the transistor switch and output a turn-off signal when the Vcc is below a threshold voltage, where the switch is configured to be turned off by the turn-off signal, and where the voltage regulator and the further comparator are turned off when the switch is turned off.

Description

Technical Field

[0001] The present disclosure relates to an electronic circuit for overvoltage protection to limit the voltage on an electronic load controlled by an electronic switch, and is particularly suitable for an eFuse circuit. Background Art

[0002] N-channel metal oxide semiconductor field effect transistor (NMOS FET) and P-channel metal oxide semiconductor field effect transistor (PMOS FET) are types of transistors that use NMOS or PMOS as a conducting channel. NMOS FET and PMOSFET are commonly used in digital and analog circuits for various applications such as switching, amplification, and signal routing.

[0003] The core component of an NMOS switch is an n-channel MOSFET, which typically includes a drain terminal (connected to the input signal), a source terminal (connected to the output), and a gate terminal. The gate terminal controls the conduction of current through the channel. It is made of silicon dioxide (SiO 2 ) is electrically insulated from the channel.

[0004] When a voltage is applied to the gate terminal, an electric field is generated, which forms a conductive channel between the drain region and the source region. The channel allows current to flow from the drain to the source. The amount of current flowing through the channel is controlled by the voltage applied to the gate terminal.

[0005] In an NMOS switch configuration, the source terminal may be connected to a load (output) and the drain terminal may be connected to a power supply (input). A control signal may be applied to the gate terminal. When the gate-source voltage is high enough, the NMOS switch is "turned on" to allow current to flow from the drain to the source, thereby passing the supply voltage to the output. In an NMOS switch configuration, the gate voltage is higher than the supply voltage (the NMOS FET is "on"). If the gate voltage is low, the NMOS switch is "turned off" and little or no current flows from the drain to the source, effectively blocking the supply voltage. Such an NMOS switch may be referred to as an NMOS pass FET.

[0006] A charge pump is a circuit that can be used to generate a higher voltage level than the input voltage. In the case of an NMOS pass FET, a charge pump can be used to provide the required gate voltage to the FET to turn it "on" and allow current to flow.

[0007] An NMOS transistor (NMOST) switch such as an NMOS pass FET or a PMOS transistor (PMOST) switch such as a PMOS pass FET may include sensing and protection circuits for preventing overvoltage or overcurrent from being output through the switch. Such protection circuits may be implemented inside the eFuse. Overvoltage clamping, also known as voltage clamping or overvoltage protection, is a mechanism that can be used to limit the voltage across an electronic component controlled by an electronic switch. It ensures that the voltage does not exceed a certain threshold, thereby protecting the component from potential damage caused by excessive voltage levels. In the case of a pass FET, an overvoltage clamp may be implemented to prevent the source voltage (Vsource) from reaching a value that could damage the electronic load or cause it to fail. Overvoltage clamping circuits are typically designed to limit the voltage at the source terminal to a safe level. Summary of the invention

[0008] The present disclosure aims to provide an eFuse circuit with overvoltage protection for a transistor switch, such as an NMOST switch or a PMOST switch, wherein the overvoltage circuit is functionally independent of the eFuse load impedance, load current, and load capacitance.

[0009] According to one aspect of the present disclosure, an electronic circuit for overvoltage protection of a transistor switch is proposed. The electronic circuit may include an overvoltage comparator configured to detect an overvoltage on a source voltage of a transistor switch by comparing the source voltage with a reference voltage. The overvoltage comparator may also be configured to output a turn-on signal when an overvoltage is detected. The electronic circuit may include a switch configured to be opened by a turn-on signal. The electronic circuit may include a voltage regulator configured to adjust a clamping voltage when the switch is opened. The clamping voltage may adjust a gate voltage on a gate of the transistor switch. The electronic circuit may include another comparator configured to detect an input voltage of the transistor switch. The other comparator may be further configured to output a turn-off signal when the input voltage is lower than a threshold voltage. The switch may be further configured to be turned off by a turn-off signal. When the switch is turned off, the voltage regulator and the other comparator may be turned off.

[0010] In one embodiment, the electronic circuit may further include a fast discharge circuit configured to quickly discharge the gate-source capacitance of the transistor switch. The fast discharge circuit may be configured to be activated when an overvoltage event triggered by the turn-on signal begins.

[0011] In one embodiment, the electronic circuit may further include an undershoot protection transistor. The drain of the undershoot protection transistor may be connected to the input voltage. The source of the undershoot protection transistor may be connected to the gate of the transistor switch via the switch. The gate of the undershoot protection transistor may be connected to the clamping voltage.

[0012] In one embodiment, the transistor switch may be an NMOST switch (high side).

[0013] In one embodiment, the transistor switch may be a PMOST switch (low side).

[0014] In one embodiment, the overvoltage comparator and the further comparator may be Schmitt trigger comparators.

[0015] In one embodiment, the gate of the transistor switch may be connected to a charge pump. The charge pump may operate independently of the switch.

[0016] In one embodiment, the electronic circuit may be part of an eFuse circuit for overvoltage protection of an electronic load. The eFuse circuit may be configured to be turned on and off by a switch under the control of an on signal and an off signal, in addition to an overvoltage comparator, which may be active regardless of whether the switch is on or off.

[0017] According to one aspect of the present disclosure, an electronic device is provided, which may include an electronic circuit and a transistor switch having one or more of the above features.

[0018] The following describes an overview of various aspects of certain examples disclosed herein. It should be understood that these aspects are presented only to provide the reader with a brief overview of these specific embodiments, and these aspects are not intended to limit the scope of the present disclosure. In fact, the present disclosure may encompass various aspects and / or combinations of aspects that may not be described. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Embodiments of the present disclosure will now be described, by way of example only, with reference to the accompanying schematic drawings, wherein corresponding reference numerals indicate corresponding parts, and wherein:

[0020] FIG. 1 shows a simplified example schematic diagram of an electronic circuit including an NMOST switch and a charge pump.

[0021] FIG. 2 shows an example schematic diagram of an electronic circuit having an NMOST switch and including an overvoltage protection circuit.

[0022] FIG. 3 shows another example schematic diagram of an electronic circuit having an NMOST switch and including an overvoltage protection circuit.

[0023] Figure 4 Another example schematic diagram of an electronic circuit having an NMOST switch and including an overvoltage protection circuit is shown.

[0024] Figures 5 to 7 An example of an eFuse overvoltage protection topology according to an embodiment of the present disclosure is shown.

[0025] Figure 8 An electronic device including an electronic circuit for overvoltage protection of a transistor switch according to an embodiment of the present disclosure is shown.

[0026] The drawings are for illustration purposes only and are not intended to limit the scope of protection defined by the claims. DETAILED DESCRIPTION

[0027] It will be readily appreciated that the components of the embodiments as generally described herein and illustrated in the accompanying drawings may be arranged and designed in a variety of different configurations. Therefore, the following more detailed description of various embodiments, as shown in the figures, is not intended to limit the scope of the present disclosure, but is merely representative of various embodiments. Although various aspects of the embodiments are presented in the accompanying drawings, the drawings are not necessarily drawn to scale unless otherwise indicated.

[0028] The described embodiments are to be considered in all respects as illustrative and not restrictive. Therefore, the scope of the present disclosure is indicated by the appended claims rather than by this detailed description. All changes within the meaning and equivalent range of the claims should be included within their scope.

[0029] References throughout this specification to features, advantages, or similar language do not mean that all features and advantages that can be achieved by the present disclosure should be or are present in any single example of the present disclosure. Instead, language referring to features and advantages is understood to mean that a particular feature, advantage, or characteristic described in conjunction with an embodiment is included in at least one embodiment of the present disclosure. Therefore, discussions of features and advantages and similar language throughout this specification may, but do not necessarily, refer to the same example.

[0030] In addition, the described features, advantages and characteristics of the present disclosure can be combined in any suitable manner in one or more embodiments. According to the description herein, those skilled in the relevant art will recognize that the present disclosure can be practiced without one or more specific features or advantages of a particular embodiment. In other cases, additional features and advantages that may not be present in all embodiments of the present disclosure can be recognized in certain embodiments. Throughout the specification, reference to "one embodiment", "embodiment" or similar language means that the specific features, structures or characteristics described in conjunction with the indicated embodiment are included in at least one embodiment of the present disclosure. Therefore, the phrases "in one embodiment", "in an embodiment" and similar language throughout this specification may but do not necessarily all refer to the same embodiment.

[0031] For an eFuse with an NMOST switch driven by a charge pump, such as an NMOS pass FET, the output will be limited during an input overvoltage event. At this point, the circuit can clamp the output voltage to a fixed level. The overvoltage circuit is preferably functionally independent of the eFuse load impedance, load current, and load capacitance (where the load current is typically from microamperes to amperes, and the load capacitance is typically from microfarads to millifarads). The present application provides a system that can clamp the output voltage to a fixed level by sensing the output voltage and enables automatic correction for process, current load, and temperature.

[0032] In the following, an example circuit including an NMOST switch is shown. The present disclosure is not limited to NMOST switches and can be applied to transistor switches in general, for example to PMOST switches, by making the required modifications to the circuit, such as changing the voltages applied to Vcc and Vsource, and this is known per se. An example of an NMOST switch is an NMOS pass FET. An example of a PMOST switch is a PMOS pass FET.

[0033] 1 shows a simplified example schematic diagram of an electronic circuit 100 including an NMOS pass FET 102 and a charge pump 104. Vcc may be connected to the drain of the NMOS pass FET 102 and the charge pump 104. The charge pump 104 may also receive the output voltage (Vout) of the NMOS pass FET 102 to control the gate voltage Vgate 102. Vgate may be used to turn the NMOS pass FET 102 “on” and “off”.

[0034] The eFuse can protect the load when a large overshoot occurs at the input of the eFuse.In an example embodiment, the input rise time can be set to <1V / μs.

[0035] To detect overvoltage, the e-Fuse can sense the input supply (Vcc), the output voltage (Vsource), or both.

[0036] Figure 2 shows an example simplified schematic diagram 200 of an eFuse implementation for monitoring input power supply Vcc. In Figure 2, an NMOST switch 202, a charge pump 204 providing Vgate to the NMOST switch 202, and a comparator 206 are shown. The comparator 206 is, for example, a Schmitt trigger comparator.

[0037] After detecting an overvoltage on Vcc, a "regulation" loop may be activated to clamp the output voltage to a fixed value. An internal voltage may be used to clamp the gate of the NMOST switch 202 to a fixed value to limit the output voltage. When Vcc drops below the clamping voltage, the overvoltage clamp may be deactivated.

[0038] Unfortunately, in the eFuse circuit of FIG. 2 , the output voltage clamp voltage will typically depend on load current and temperature (eg, in a Vgs NMOS switch).

[0039] Figure 3 shows an example simplified schematic diagram 300 of an eFuse implementation for monitoring the output voltage Vsource. In Figure 3, an NMOST switch 302, a charge pump 304 providing Vgate to the NMOST switch 302, and a comparator 306 are shown. The comparator 306 is, for example, a Schmitt trigger comparator.

[0040] After detecting an overvoltage on Vsource, a "regulation" loop may be activated to clamp the output voltage to a fixed value. An internal voltage may be used to clamp the gate of the NMOST switch 302 to a fixed value to limit the output voltage. The output voltage clamping voltage will typically depend on the load current and temperature (e.g., in a Vgs NMOST switch), however the sensing structure makes it possible to correct the output clamping voltage.

[0041] Unfortunately, in the eFuse circuit of FIG. 3 , a sensing structure (on the input) is required to determine when to release the clamp.

[0042] Figure 4 An example simplified schematic diagram 400 of an eFuse implementation for monitoring input power supply Vcc and output voltage Vsource is shown. Figure 4 , there are shown an NMOST switch 402, a charge pump 404 that provides Vgate to the NMOST switch 402, and two comparators 406, 408. The comparators 406, 408 are, for example, Schmitt trigger comparators.

[0043] After detecting an overvoltage on the input Vcc or output Vsource, a "regulation" loop can be activated to clamp the output voltage to a fixed value. The output voltage clamp voltage will typically depend on the load current and temperature (e.g., in a Vgs NMOS switch), however the source sensing structure makes it possible to correct the output clamp voltage. When Vcc drops below the clamp voltage, the overvoltage clamp can be deactivated.

[0044] exist Figure 4 The eFuse circuit can make the clamping voltage independent of the load current and can completely release the clamp when the supply voltage returns to "normal".

[0045] Figure 5 FIG. 5 shows an eFuse overvoltage protection topology 500 of an exemplary embodiment of the present application. Figure 5In it, an NMOST switch (M1) 502, a charge pump 504 that provides Vgate to the NMOST switch 502, two comparators 506, 508, a switch (S3) 510, and a voltage regulator 512 are shown. The comparators 506, 508 are, for example, Schmitt trigger comparators.

[0046] The overvoltage protection topology 500 uses source voltage clamp correction enabling an overvoltage clamp with source monitoring for overvoltage detection and release. In this example, the NMOST switch 502 is a large transistor, for example, Gm>40 mA / mV. The load current can vary, for example, from 0 to 15 A, and Vgs can vary, for example, from Vth to Vth + 0.4 V, where Vth is the threshold voltage.

[0047] Comparator 508 can detect overvoltage by comparing Vsource with a reference voltage Vref. When overvoltage is detected, comparator 508 can output a signal indicating that overvoltage has been detected, for example, by outputting a voltage indicating a "high" signal. Under overvoltage, switch 510 can close, and Vgate for the NMOST switch 502 can be fixed to the voltage VG_set from the voltage source V in the voltage regulator 512.

[0048] VG_set can be corrected to reduce the spread of the clamped (DC) output voltage Vsource.

[0049] For stability and to be insensitive to the output (dynamic) load, VG_set can have a limited adjustment range. For example, VG_set can have a correction range for an extended Vgs of -1 V to +1 V, which can be controlled by the correction voltage source ΔV in the voltage regulator 512.

[0050] The charge pump 504 can be used to have a VG_set higher than Vcc.

[0051] In a non - restrictive example, Vref can be set to 14.5 V. When comparator 508 detects that Vsource > Vref (14.5 V), comparator 508 can output an overvoltage conduction signal. When overvoltage is on (for example, comparator 508 outputs a high signal OV_on), switch 510 can close, and Vsource can be "regulated" by the voltage regulator 512 to Vclamp (for example, 14.5 V). When Vsource < Vclamp (for example, 14.3 V) and comparator 506 detects that Vcc < Vdetect, there is no longer overvoltage, and switch 510 can be triggered to open by a signal from comparator 506, for example, OV_off.

[0052] Advantageously, when overvoltage is off, all eFuse circuits 506, 512 can be turned off when closing switch (S3) 510 to enable overvoltage detection on Vsource, except for the overvoltage detection comparator 508. Therefore, advantageously, when there is no overvoltage, no load impedance, load current or load capacitance is applied from the eFuse circuit to the NMOST switch (M1) 502.

[0053] Figure 6 A more detailed eFuse overvoltage protection topology 600 of an example embodiment of the present application is shown. Figure 6 In the figure, an NMOST switch (M1) 602, a charge pump 604 providing Vgate to the NMOST switch 602, two comparators 606, 608, a switch (S3) 610, a current mirror 612, a fast discharge circuit 614, further transistor switches M2-M4, further switches S1-S2, resistors R1-R3 and a capacitor Cset are shown. Further electronic components (resistors, capacitors, transistors, power supplies) are shown without labels. Comparators 606, 608 are, for example, Schmitt trigger comparators.

[0054] Figure 6 The eFuse topology 600 is similar to Figure 5 608 can detect an overvoltage on Vsource. When an overvoltage is detected, comparator 608 can output an OV_det signal, which can trigger an output "clamp on" (C_on) signal. The OV_det and C_on signals can be the same signal, such as a 5V output or any other output signal. The C_on signal triggers switch (S3) 610 to close, current mirror 612 to open, and capacitor Cset can begin charging.

[0055] Optionally, and as Figure 6 As shown in the example of , the C_on signal can also trigger a fast discharge via a fast discharge circuit 614. Therefore, the gate-source capacitance Cgs of the NMOST switch (M1) 602 can be quickly discharged, for example, from about 5V to about 1V, and the remaining energy from the NMOST switch (M1) 602 can flow to ground via transistor M2. The fast discharge is usually activated only at the beginning of an overvoltage event triggered by C_on, that is, it can have a short activation pulse.

[0056] Transistor M4 may enable undershoot protection to prevent the Vgate of the NMOST switch (M1) 602 from dropping too low during rapid discharge.

[0057] The gate of NMOST switch (M1) 602 may be connected to a clamping voltage Vclamp via switch (S3) 610 and transistor M2 operating as a source follower. Vclamp may start at the highest reference voltage.

[0058] As long as comparator 608 is high (i.e., detects overvoltage and outputs OV_det), Vclamp can be adjusted downward by charging Vset until comparator 608 releases OV detection (i.e., no longer detects overvoltage and stops outputting OV_det). Figure 6 In the example shown in FIG. 1 , the Vclamp voltage range can be adjusted from I×(R3+R2) to I×(R3+R2 / / R1).

[0059] The source of transistor M3 can sense the Vcc voltage. When transistor M3 stops conducting, the overvoltage clamp can be released. Comparator 606 can then be triggered and output a "clamp off" (C_off) signal. The C_off signal can trigger switch (S3) 610 to open, and capacitor Cset can discharge. The C_off signal can be connected to Figure 5 The OV_off signal is the same as in .

[0060] Advantageously, and similarly to Figure 5 In the example of, when the overvoltage is turned off, all eFuse circuits 606, 612, 614 can be turned off when closing switch (S3) 610, except for the overvoltage detection comparator 608, to enable overvoltage detection on Vsource. Therefore, advantageously, when there is no overvoltage, no load impedance, load current or load capacitance is applied from the eFuse circuit to the NMOST switch (M1) 602.

[0061] Figure 7 A more detailed eFuse overvoltage protection topology 700 of another exemplary embodiment of the present application is shown. Figure 7 In the figure, an NMOST switch (M1) 702, a charge pump 704 providing Vgate to the NMOST switch 702, three comparators 706, 708, 716, a switch (S3) 710, a current mirror 712, a fast discharge circuit 714, further transistor switches M2-M4, further switches S1-S2, resistors R1-R and a capacitor Cset are shown. Further electronic components (resistors, capacitors, transistors, power supplies) are shown without labels. Comparators 706, 708 are, for example, Schmitt trigger comparators.

[0062] eFuse topology 700 is similar to Figure 6 The eFuse topology 600 is shown with the addition of a comparator 716 next to the overvoltage comparator 708 .

[0063] Comparator 708 can detect overvoltage on Vsource. When overvoltage is detected, comparator 708 can output an OV_det signal, which can trigger the output of a "clamp on" (C_on) signal. The OV_det and C_on signals can be the same signal, such as a 5V output or any other output signal. The C_on signal triggers switch (S3) 710 to close, and capacitor Cset can begin charging.

[0064] Optionally, and as Figure 7 As shown in the example of , the C_on signal can also trigger a fast discharge via a fast discharge circuit 714. Therefore, the gate-source capacitance Cgs of the NMOST switch (M1) 702 can be quickly discharged, for example, from about 5V to about 1V, and the remaining energy from the NMOST switch (M1) 702 can flow to ground via transistor M2. The fast discharge is usually activated only at the beginning of an overvoltage event triggered by C_on, that is, it can have a short activation pulse.

[0065] Transistor M4 may enable undershoot protection to prevent the Vgate of the NMOST switch (M1) 702 from dropping too low during rapid discharge.

[0066] The gate of NMOST switch (M1) 702 may be connected to a clamping voltage Vclamp via switch (S3) 710 and transistor M2 operating as a source follower. Vclamp may start at the highest reference voltage.

[0067] The clamp reference voltage may be continuously corrected by comparator 716, which compares Vsource to Vref and adjusts Vset accordingly, until comparator 708 releases OV detection (i.e., no longer performs overvoltage detection and stops outputting OV_det). Thus, overvoltage clamping with Vgs correction for NMOST switch (M1) 702 may be achieved. Figure 7 In the example shown in FIG. 1 , the Vclamp voltage range can be adjusted from I×(R3+R2) to I×(R3+R2 / / R1).

[0068] The source of transistor M3 can sense the Vcc voltage. The gate voltage of M3 can follow the regulated clamp voltage. When Vcc reaches the OV release level, Vclamp can be adjusted upward to maintain the Vsource clamp voltage, thereby increasing the M3 source voltage. When transistor M3 stops conducting, the overvoltage clamp can be released. The comparator 706 can then be triggered and output a "clamp off" (C_off) signal. The C_off signal can trigger the switch (S3) 710 to open, and the capacitor Cset can discharge. The C_off signal can be connected to Figure 5 The OV_off signal is the same as in .

[0069] Advantageously, and similarly to Figure 5 and Figure 6 In the example of FIG. 7 , when the overvoltage is off, all eFuse circuits except the overvoltage detection comparator 708 can be turned off by closing the switch (S3) 710 to enable overvoltage detection on Vsource. Therefore, advantageously, when there is no overvoltage, no load impedance, load current or load capacitance is applied from the eFuse circuit to the NMOST switch (M1) 702.

[0070] like Figures 5 to 7 As shown in the example of , advantageously, the eFuse solution of the present disclosure enables low current consumption in normal operation when no overvoltage is detected. When there is no overvoltage, only the overvoltage comparator 508, 608, 708 of the eFuse circuit is activated.

[0071] like Figure 6 and Figure 7 As shown in the example of , when a fast discharge is applied, a fast activation of the overvoltage circuit can be achieved. By applying a fast discharge, for example, using the fast discharge circuit 614, 714, the clamping delay can become mainly dependent on the discharge of the NMOST switch (M1) 602, 702.

[0072] This application, such as Figures 5 to 7 The example eFuse topology shown in FIG. 1 advantageously allows correction for output load current, temperature, and process (Vgs variation correction).

[0073] This application, such as Figures 5 to 7 As shown in the example eFuse topology of , advantageously, the voltage correction range can be limited by the voltage regulator 512. This ensures that there is no large overshoot or undershoot of Vsource when the voltage clamp is applied.

[0074] like Figure 8 As shown, the electronic circuit of the eFuse overvoltage protection topology of the present disclosure, such as the electronic circuit of the eFuse overvoltage protection topology 500, 600, 700 (including NMOST switch (M1) 502, 602, 702) can be implemented in any device 800 or a portion thereof using a transistor switch such as NMOST switch (M1) 502, 602, 702.

Claims

1. An electronic circuit (500, 600, 700) for overvoltage protection of a transistor switch (502, 602, 702), comprising: an overvoltage comparator (508, 608, 708) configured to detect an overvoltage on the source voltage (Vsource) of the transistor switch (502, 602, 702) by comparing the source voltage (Vsource) with a reference voltage (Vref), and further configured to output a turn-on signal (OV_on, C_on) when an overvoltage is detected; a switch (510, 610, 710) configured to be turned on by the on-signal (OV_on, C_on); a voltage regulator (512) configured to adjust a clamping voltage (Vclamp) when the switch (510, 610, 710) is open, wherein the clamping voltage (Vclamp) adjusts a gate voltage (Vgate) on a gate of the transistor switch (502, 602, 702); as well as another comparator (506, 606, 706) configured to detect an input voltage (Vcc) of the transistor switch (502, 602, 702) and further configured to output an off signal (OV_off, C_off) when the input voltage (Vcc) is lower than a threshold voltage, wherein the switch (510, 610, 710) is further configured to be closed by the shutdown signal (OV_off, C_off), and When the switch (510, 610, 710) is closed, the voltage regulator (512) and the other comparator (506, 606, 706) are closed.

2. The electronic circuit (500, 600, 700) according to claim 1, further comprising a fast discharge circuit (614, 714) configured to quickly discharge the gate-source capacitance of the transistor switch (502, 602, 702), wherein the fast discharge circuit is configured to be activated at the beginning of an overvoltage event triggered by the turn-on signal (V_on, C_on).

3. The electronic circuit (500, 600, 700) according to any of the preceding claims, further comprising an undershoot protection transistor (M4), wherein the drain of the undershoot protection transistor (M4) is connected to the input voltage (Vcc), wherein the source of the undershoot protection transistor (M4) is connected to the gate of the transistor switch (502, 602, 702) via the switch (510, 610, 710), and wherein the gate of the undershoot protection transistor (M4) is connected to the clamping voltage (Vclamp).

4. The electronic circuit (500, 600, 700) according to any one of claims 1 to 3, wherein the transistor switch (502, 60, 702) is an NMOST switch.

5. The electronic circuit (500, 600, 700) according to any one of claims 1 to 3, wherein the transistor switch (502, 60, 702) is a PMOST switch.

6. The electronic circuit (500, 600, 700) according to any one of the preceding claims, wherein the overvoltage comparator (508, 608, 708) and the further comparator (506, 606, 706) are Schmitt trigger comparators.

7. The electronic circuit (500, 600, 700) according to any of the preceding claims, wherein the gate of the transistor switch (502, 602, 702) is connected to a charge pump (504), wherein the charge pump (504) operates independently of the switch (510, 610, 710).

8. An electronic circuit (500, 600, 700) according to any of the preceding claims, wherein the electronic circuit (500, 600, 700) is part of an eFuse circuit for overvoltage protection of an electronic load, wherein the eFuse circuit is configured to be opened and closed by the switch (510, 610, 710) under the control of the on-signal (OV_on, C_on) and the off-signal (OV_off, C_off), except for the overvoltage comparator (508, 608, 708), which is activated regardless of whether the switch (510, 610, 710) is opened or closed.

9. An electronic device (800) comprising the electronic circuit (500, 600, 700) and a transistor switch (502, 602, 702) according to any one of claims 1 to 8.

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