Wafer testing system and method

Abstract

The present invention provides a wafer testing system and method, belonging to the field of semiconductor testing. The wafer testing system includes: a control host, a probe card and a test device; the probe card includes a signal switch; the control host is used to generate a target mode test instruction and send the target mode test instruction to the probe card; the probe card is used to make the signal switch select the corresponding target mode based on the target mode test instruction to collect the test signal corresponding to the wafer device to be tested, and send the test signal to the test device to obtain the test data of the wafer device to be tested. The present invention integrates the devices required for dynamic detection and static detection of wafer devices into the probe card, and performs mode selection through a signal switch. When it is necessary to switch between dynamic testing and static testing, there is no need to switch the probe, only the opening and closing of the signal switch is required, thereby improving the efficiency of wafer testing.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor testing technology, and in particular to a wafer testing system and method. Background Art

[0002] With the development of science and technology, micro-devices manufactured using micro-electro-mechanical systems (MEMS) technology are increasingly being used in aviation, aerospace, and industrial fields due to their advantages in lifespan, reliability, cost, size, and weight. With the advancement of MEMS processing technology, micromachining technology is widely used in the manufacture of sensors and actuators.

[0003] Wafer testing is a critical step in MEMS device production, used to verify the performance of MEMS structures, eliminate substandard chips at the wafer level, and reduce subsequent packaging and testing costs. Currently, MEMS device wafer test vectors fall into two main categories: static and dynamic. Static tests primarily include capacitance, resistance, voltage, and current, and are performed using instruments such as capacitance meters, resistance meters, voltmeters, and switch matrices. Dynamic tests primarily include natural frequency, quality factor, and orthogonal coupling, and are performed using signal conversion circuits and data processing modules.

[0004] Because the detection signal in dynamic testing is very small, it cannot be routed through the test point via a test cable, a switch matrix, and then to a signal conversion circuit, as is the case with static testing. Too long a test link causes dynamic detection signal attenuation and distortion, leading to inaccurate testing. Therefore, dynamic testing currently typically incorporates detection circuitry into the test probe card to minimize line attenuation and loss.

[0005] However, dynamic and static tests use different probe cards. Static test probe cards do not require detection circuits, while dynamic test probe cards do. Dynamic and static tests must be performed separately. Switching between different probes during testing significantly reduces test efficiency. Summary of the Invention

[0006] The embodiments of the present invention provide a wafer testing system and method to solve the problem of low wafer testing efficiency at the current stage.

[0007] In a first aspect, an embodiment of the present invention provides a wafer testing system, the system comprising:

[0008] Control host, probe card and test equipment; the probe card includes a signal switch;

[0009] A control host, configured to generate a target pattern test instruction and send the target pattern test instruction to the probe card;

[0010] The probe card is used to make the signal switch select the corresponding target mode based on the target mode test instruction to collect the test signal corresponding to the wafer device to be tested, and send the test signal to the test device to obtain the test data of the wafer device to be tested.

[0011] In a possible implementation, the probe card further includes a static test terminal and a dynamic test detection circuit;

[0012] The target mode test instruction is a static mode test instruction or a dynamic mode test instruction;

[0013] If the target mode test instruction is a static mode test instruction, the signal switch is switched to connect to the static test terminal;

[0014] If the target mode test instruction is a dynamic mode test instruction, the signal switch is switched to connect to the dynamic test detection circuit.

[0015] In one possible implementation, the wafer test system further includes a switch matrix;

[0016] The switch matrix is used to receive a target mode test instruction, adjust itself to a corresponding test mode based on the target mode test instruction, and send the target mode test instruction to the probe card.

[0017] In a possible implementation, if the target mode test instruction is a static mode test instruction, the target mode test instruction further includes a target test quantity detection instruction;

[0018] The switch matrix is also used to adjust itself and the corresponding test device to a conductive state based on the target test quantity detection instruction, so as to send the test signal corresponding to the wafer device to be tested to the corresponding test device to obtain the target test quantity of the wafer device to be tested.

[0019] In a possible implementation, the test device includes an acquisition card;

[0020] an acquisition card, configured to receive a target mode test instruction and send the target mode test instruction to a switch matrix;

[0021] The acquisition card is further used to receive the test data output by the dynamic test detection circuit when the target mode test instruction is a dynamic mode test instruction.

[0022] In a possible implementation, the probe card includes at least one group of dynamic test detection circuits;

[0023] If the number of dynamic test detection circuits is greater than or equal to two groups, each group of dynamic test detection circuits is connected in parallel.

[0024] In one possible implementation, the wafer testing system further includes a static signal cable and a dynamic signal cable;

[0025] The static signal cable and the dynamic signal cable are arranged between the switch matrix and the probe card;

[0026] Static signal cables are used to transmit various signals under static mode test instructions;

[0027] The dynamic signal cable is used to transmit various signals under the dynamic mode test instructions.

[0028] In a possible implementation, the wafer testing system further includes a probe, which is used to connect the wafer device to be tested and the signal switch.

[0029] In one possible implementation, the wafer testing system further includes a probe station;

[0030] Probe station, used to place wafer devices to be tested.

[0031] In a second aspect, an embodiment of the present invention provides a wafer testing method, comprising:

[0032] Get target mode test instructions;

[0033] Selecting a corresponding target mode based on the target mode test instruction;

[0034] In the selected corresponding target mode, the test signal corresponding to the wafer device to be tested is collected, and the test signal is sent to the testing device to obtain the test data of the wafer device to be tested.

[0035] The embodiment of the present invention provides a wafer testing system and method, which solves the problem of low efficiency of wafer testing at this stage by setting a signal switch on the probe card. Specifically, the embodiment of the present invention integrates the devices required for dynamic detection and static detection of wafer devices into the probe card, and performs mode selection through a signal switch. When static detection is required, the control host sends a corresponding instruction. After the probe receives the instruction, the control signal switch selects the static detection mode to obtain relevant test data of the wafer device to be tested under static detection. Conversely, the same is true when dynamic detection is required. It can be seen that when the embodiment of the present invention needs to switch between dynamic testing and static testing, there is no need to switch the probe, and the efficiency of wafer testing can be improved by simply opening and closing the signal switch. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments or related technical descriptions. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0037] Figure 1 1 is a schematic structural diagram of a wafer testing system provided by an embodiment of the present invention;

[0038] Figure 2 is a structural diagram of a wafer testing system provided by another embodiment of the present invention;

[0039] Figure 3 This is a flowchart of the wafer testing method provided by an embodiment of the present invention; DETAILED DESCRIPTION

[0040] In the following description, specific details such as particular system structures and techniques are provided for purposes of illustration, not limitation, to facilitate a thorough understanding of the embodiments of the present invention. However, it will be apparent to those skilled in the art that the present invention may be practiced in other embodiments without these specific details. In other cases, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present invention with unnecessary detail.

[0041] In order to make the purpose, technical solutions and advantages of the present invention more clear, specific embodiments will be described below with reference to the accompanying drawings.

[0042] Figure 1 FIG. 1 is a schematic diagram of the structure of a wafer testing system provided by an embodiment of the present invention. Figure 1 As shown, the system may include:

[0043] The control host 1 , the probe card 2 and the test device 3 ; the probe card 2 includes a signal switch 21 .

[0044] The control host 1 is used to generate a target mode test instruction and send the target mode test instruction to the probe card 2.

[0045] The probe card 2 is used to make the signal switch 21 select the corresponding target mode based on the target mode test instruction to collect the test signal corresponding to the wafer device to be tested, and send the test signal to the test device 3 to obtain the test data of the wafer device to be tested.

[0046] In this embodiment, the probe card 2 may include multiple signal switches 21. The number of signal switches 21 may be determined based on the number of wafer devices to be tested during each inspection. The signal switch 21 may be a single-pole double-throw switch. The fixed terminal 21a of the signal switch 21 is used to connect to the wafer device to be tested, and the movable terminals 21b and 21c are connected to the static test terminal and the dynamic test terminal, respectively.

[0047] When wafer device testing is required, host computer 1 generates and issues a target mode test command. This command, after passing through testing device 3, is transmitted to probe card 2. Based on the target mode test command, probe card 2 determines whether dynamic or static testing is required and switches signal switch 21 to active terminal 21b or 21c, selecting the corresponding target mode.

[0048] After the signal switch 21 selects and turns on the corresponding target mode, the test signal for the wafer device to be tested is input through the fixed terminal 21a of the signal switch 21, flows through the selected target terminal, and then flows to the test device 3. The test device 3 is equipped with various detection instruments. According to the target mode test instructions, the corresponding detection instrument can be selected for detection to obtain test data of the wafer device to be tested, and the test data is sent to the control host 1. When the control host 1 determines that the test data required by the current target mode test instruction has been fully tested, it generates a new target mode test instruction according to the test requirements and repeats the above instructions until all items of the wafer device to be tested are tested.

[0049] In this embodiment, the system provided by this embodiment integrates the test devices required for both static and dynamic testing modes onto probe card 2. Switching is performed based on test requirements via the active terminal of probe card 2, eliminating the need for probe replacement and improving test efficiency. Furthermore, because the stationary terminal 21a of signal switch 21 is directly connected to the wafer device under test via the probe, the proximity of stationary terminal 21a to the probe minimizes the impact of cables and switches on weak dynamic signals. The signal converted by the detection circuit is larger and less affected by subsequent cables.

[0050] Figure 2 FIG. 1 is a schematic structural diagram of a wafer testing system provided by another embodiment of the present invention. Figure 2 As shown, the system may also include the following structures:

[0051] Optionally, the probe card 2 further includes a static test terminal 22 and a dynamic test detection circuit 23 .

[0052] The target mode test instruction is a static mode test instruction or a dynamic mode test instruction.

[0053] If the target mode test instruction is a static mode test instruction, the signal switch 21 is switched to connect to the static test terminal 22 .

[0054] If the target mode test instruction is a dynamic mode test instruction, the signal switch 21 is switched to connect to the dynamic test detection circuit 23 .

[0055] In this embodiment, for the sake of simplicity, only the fixed terminal of one signal switch 21 is depicted in the figure. However, those skilled in the art will appreciate that, in actual use, the fixed terminal of each signal switch 21 in the probe card 2 needs to be connected to both the static test terminal 22 and the dynamic test detection circuit 23. Of course, in actual use, the movable terminal 21b of each signal switch 21 may also be connected to the dynamic test detection circuit 23, and the movable terminal 21c may also be connected to the static test terminal 22.

[0056] In this embodiment, the wafer device under test is typically a MEMS gyroscope or a MEMS accelerometer. MEMS gyroscope dynamic parameters include frequency, quality factor, and orthogonal coupling. MEMS accelerometer dynamic parameters primarily include -3dB bandwidth or +3dB bandwidth. Because MEMS gyroscopes and MEMS accelerometers operate differently, they require different forms of dynamic test detection circuit 23 . Therefore, the form of dynamic test detection circuit 23 is determined by the form of the wafer device under test.

[0057] When dynamic detection is required for the wafer device to be tested, the control host 1 generates a dynamic mode test instruction, and transmits the instruction to the probe card 2 after passing through the test device 3 to control the dynamic ends of all signal switches 21 to switch to 21c to connect the dynamic test detection circuit 23, so that the test signal input from the fixed ends 21a of all signal switches 21 of the wafer device to be tested flows through the dynamic test detection circuit 23 to obtain test data, and the test data is sent to the control host 1 through the test device 3.

[0058] When static detection is required for the wafer device to be tested, the control host 1 generates a static mode test instruction, and transmits the instruction to the probe card 2 after passing through the test device 3 to control the active ends of all signal switches 21 to switch to 21b to connect the static test end 22, so that the test signal input from the fixed ends 21a of all signal switches 21 to the wafer device to be tested flows through the static test end 22 and is input into the test device 3. In the test device 3, testing is performed according to the test items required in the static mode test instruction to obtain test data, and the test data is sent to the control host 1.

[0059] Optionally, the probe card 2 includes at least one group of dynamic test detection circuits 23 .

[0060] If the number of the dynamic test detection circuits 23 is greater than or equal to two groups, each group of dynamic test detection circuits 23 is connected in parallel.

[0061] In this embodiment, when the wafer device to be tested is a multi-axis device, for example, when the wafer device to be tested is a three-axis MEMS gyroscope, it is necessary to test the dynamic parameters of the four axes: drive, detection X, detection Y, and detection Z. In this way, there are four types of dynamic test probe cards, and each wafer test requires switching between the four probe cards. To solve this technical problem, the embodiment of the present invention can increase the number of dynamic test detection circuits 23, and each group of dynamic test detection circuits 23 can be connected in parallel in hardware and then expanded to the probe card 2. In this way, in specific applications, for example, for the test of a three-axis gyroscope, four gyroscope detection circuit modules can be designed on the moving end 21c of the signal switch 21; for static testing, that is, three-axis meter addition test, three meter addition detection circuit modules can be designed. Similarly, four detection circuit modules and three meter addition modules can be designed on the IMU measurement unit MEMS probe card.

[0062] Of course, whether or not each test path can be run in parallel depends on the specific situation. For example, if the drive and three detection paths of a three-axis gyroscope share a mass block, each path can only be tested sequentially. However, with a three-axis plus meter, the three paths do not interfere with each other and can be tested in parallel.

[0063] Optionally, the wafer testing system further includes a switch matrix 4 .

[0064] The switch matrix 4 is configured to receive a target mode test instruction, adjust itself to a corresponding test mode based on the target mode test instruction, and send the target mode test instruction to the probe card 2 .

[0065] In this embodiment, after the control host 1 issues a target mode test instruction, the target mode test instruction is transmitted to the switch matrix 4 through the test device 3 to instruct the switch matrix 4 to adjust itself to a designated test channel according to the target mode test instruction.

[0066] Exemplarily, when the target mode test instruction is a static mode test instruction, the switch matrix 4 turns on the static test channel. When the test signal of the wafer device to be tested is input from the fixed end 21a of all the signal switches 21 and flows through the static test end 22, the test signal flows through the turned-on static test channel to the test device 3 for static detection.

[0067] Exemplarily, when the target mode test instruction is a dynamic mode test instruction, the switch matrix 4 turns on the dynamic test channel. When the test signal of the wafer device to be tested input by 21a of all signal switches 21 flows through the dynamic test detection circuit 23, the test data is obtained, and the test data flows to the control host 1 through the turned-on dynamic test channel.

[0068] It can be seen that the embodiment of the present invention reconfigures the signal switch 21 and the switch matrix 4 in the wafer testing system, and selects static testing and dynamic testing through two-stage switches, which can maximize the efficiency of wafer testing.

[0069] Optionally, if the target mode test instruction is a static mode test instruction, the target mode test instruction also includes a target test quantity detection instruction.

[0070] The switch matrix 4 is also used to adjust itself and the corresponding test device 3 to a conductive state based on the target test quantity detection instruction, so as to send the test signal corresponding to the wafer device to be tested to the corresponding test device 3 to obtain the target test quantity of the wafer device to be tested.

[0071] In this embodiment, the test device 3 may include various test instruments required for static mode detection, such as a voltmeter, an ammeter, and a resistance meter. When the target mode test instruction is a static mode test instruction, the static mode test instruction also includes target detection items, such as voltage detection.

[0072] For example, if the static mode test instruction includes voltage detection, then upon receiving the static mode test instruction, switch matrix 4 adjusts the detection channel between itself and the voltmeter to a conductive mode. In this case, the test signal corresponding to the wafer device under test can flow to the voltmeter in test device 3 via the conductive detection channel to perform voltage detection and obtain a voltage test value.

[0073] Optionally, the testing device 3 may further include an acquisition card 31 .

[0074] The acquisition card 31 is used to receive the target mode test instruction and send the target mode test instruction to the switch matrix 4 .

[0075] The acquisition card 31 is further configured to receive the test data output by the dynamic test detection circuit when the target mode test instruction is a dynamic mode test instruction.

[0076] In this embodiment, when the control host 1 issues a target mode test command, it is transmitted to the acquisition card 31 in the test device 3. Acquisition card 31 controls the switch matrix 4 to conduct the corresponding test channel based on the target mode test command. Simultaneously, acquisition card 31 controls the probe card 2 based on the target mode test command, conducting the selectable active terminal 21b or 21c of the signal switch 21 in the probe card 2, thereby achieving the corresponding control.

[0077] Furthermore, in this embodiment, when the target mode test instruction is a dynamic mode test instruction, since the dynamic test data required by the wafer device to be tested has already been obtained by the dynamic test detection circuit 23, the dynamic test detection circuit 23 can be directly sent to the acquisition card 31 through the switch matrix 4. After receiving the dynamic test data, the acquisition card 31 stores and sends the dynamic test data to the control host 1.

[0078] Optionally, the wafer testing system also includes static signal cables and dynamic signal cables.

[0079] Static signal cables and dynamic signal cables are provided between the switch matrix 4 and the probe card 2 .

[0080] The static signal cable is used to transmit various signals under the static mode test command.

[0081] The dynamic signal cable is used to transmit various signals under the dynamic mode test instructions.

[0082] In this embodiment, the wafer test system also includes static signal cables and dynamic signal cables, which are coaxial cables with strong anti-interference capabilities. These two cables are set between the switch matrix 4 and the probe card 2. When the target mode test command is a static mode test command, the relevant command and the data signal transmitted back by the probe card 2 are transmitted via the static signal cable.

[0083] When the target mode test instruction is a dynamic mode test instruction, the related instruction and the data signal transmitted back by the probe card 2 are transmitted through the dynamic signal cable.

[0084] Optionally, the wafer testing system further includes a probe, which is used to connect the wafer device to be tested and the signal switch 2.

[0085] Optionally, the wafer testing system further includes a probe station 5 .

[0086] The probe station 5 is used to place the wafer device to be tested.

[0087] In this embodiment, the wafer testing system may further include a probe station 5 for placing the wafer device to be tested. The probe station 5 is a wafer carrier that moves in a certain step length and may be a manual probe station, a semi-automatic probe station, or a fully automatic probe station.

[0088] In this embodiment, the probe material is generally rhenium-tungsten alloy or beryllium-copper alloy. The probe material and size depend on the material and size of the chip pad to be tested. When the wafer device to be tested is a MEMS device, it is generally placed on the probe station 5 in the form of a wafer with a size of 4 inches, 6 inches, 8 inches or 12 inches.

[0089] When the wafer device to be tested is placed in the corresponding position and the test can be started, the control host 1 sends a control signal to control the probe station 5 to rise and fall according to the control signal so that each probe can accurately connect with each wafer device to be tested. After the test items required in the current target mode test instruction are completed, the probe station 5 feeds back a test completion signal to the control host 1, and the control host 1 displays the corresponding feedback signal to facilitate the tester to determine whether to perform other tests on the current test wafer device on the probe station 5, or to control the probe station 5 to replace the new wafer device to be tested and re-test it.

[0090] It can be seen that the embodiment of the present invention provides a wafer testing system, which integrates the devices required for dynamic detection and static detection of wafer devices into a probe card, and selects the mode through a signal switch. When static detection is required, the control host sends a corresponding instruction. After the probe receives the instruction, the control signal switch selects the static detection mode to obtain relevant test data of the wafer device to be tested under static detection. Conversely, the same is true when dynamic detection is required. It can be seen that when the embodiment of the present invention needs to switch between dynamic testing and static testing, there is no need to switch the probe. The efficiency of wafer testing can be improved by simply opening and closing the signal switch.

[0091] It should be understood that the size of the serial numbers of the steps in the above embodiments does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present invention.

[0092] Figure 3 This is a flowchart of the wafer testing method provided by an embodiment of the present invention. For parts not fully described in this embodiment, please refer to the other related embodiments mentioned above. Accordingly, the wafer testing method may include:

[0093] Step 110: Obtain target mode test instructions.

[0094] Step 120: Select a corresponding target mode based on the target mode test instruction.

[0095] Step 130: Under the selected corresponding target mode, collect the test signal corresponding to the wafer device to be tested, and send the test signal to the testing device to obtain the test data of the wafer device to be tested.

[0096] In this embodiment, the target mode test instruction can be a dynamic mode test instruction or a static mode test instruction. When the target mode test instruction is a dynamic mode test instruction, the dynamic mode is selected to collect test signals corresponding to the wafer device to be tested, and the collected test signals are input into the dynamic test circuit to obtain dynamic test data of the wafer device to be tested.

[0097] When the target mode test instruction is a static mode test instruction, the static mode test instruction also includes a target test item. The test mode is adjusted to the static mode, a test signal corresponding to the wafer device to be tested is collected, and the collected test signal is input into the target test instrument of the test device to obtain the static test data of the wafer device to be tested.

[0098] In the above embodiments, the description of each embodiment has its own focus. For parts that are not described or recorded in detail in a certain embodiment, reference can be made to the relevant description of other embodiments.

[0099] Those skilled in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the present invention.

[0100] The embodiments described above are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present invention, and should all be included in the scope of protection of the present invention.

Claims

1. A wafer testing system, characterized in that: include: Control host, probe card and test device; the probe card includes a signal switch; The control host is configured to generate a target mode test instruction and send the target mode test instruction to the probe card; The probe card is configured to cause the signal switch to select a corresponding target mode based on the target mode test instruction, so as to collect a test signal corresponding to the wafer device to be tested, and send the test signal to the test device to obtain test data of the wafer device to be tested; The probe card also includes a static test terminal and a dynamic test detection circuit; The target mode test instruction is a static mode test instruction or a dynamic mode test instruction; If the target mode test instruction is a static mode test instruction, switching the signal switch to connect to the static test terminal; If the target mode test instruction is a dynamic mode test instruction, switching the signal switch to connect to the dynamic test detection circuit; The wafer testing system further includes a switch matrix; the switch matrix is connected to the testing device; The switch matrix is configured to receive the target mode test instruction, adjust itself to a corresponding test mode based on the target mode test instruction, and send the target mode test instruction to the probe card; If the target mode test instruction is a static mode test instruction, the target mode test instruction further includes a target test quantity detection instruction; The switch matrix is also used to adjust itself and the corresponding test device to a conductive state based on the target test quantity detection instruction, so as to send the test signal corresponding to the wafer device to be tested to the corresponding test device to obtain the target test quantity of the wafer device to be tested.

2. The wafer testing system according to claim 1, wherein: The testing device includes an acquisition card; The acquisition card is used to receive the target mode test instruction and send the target mode test instruction to the switch matrix; The acquisition card is further configured to receive the test data output by the dynamic test detection circuit when the target mode test instruction is a dynamic mode test instruction.

3. The wafer testing system according to claim 1, wherein: The probe card includes at least one group of dynamic test detection circuits; If the number of the dynamic test detection circuits is greater than or equal to two groups, each group of dynamic test detection circuits is connected in parallel in the probe card.

4. The wafer testing system according to claim 1, wherein: The wafer testing system further includes a static signal cable and a dynamic signal cable; The static signal cable and the dynamic signal cable are arranged between the switch matrix and the probe card; The static signal cable is used to transmit various signals under the static mode test instruction; The dynamic signal cable is used to transmit various signals under the dynamic mode test instruction.

5. The wafer testing system according to claim 1, wherein: The wafer testing system further includes a probe, which is used to connect the wafer device to be tested and a signal switch.

6. The wafer testing system according to claim 1, wherein: The wafer testing system also includes a probe station; The probe station is used to place the wafer device to be tested.

7. A wafer testing method, characterized in that: include: Obtaining a target mode test instruction; wherein the target mode test instruction is a static mode test instruction or a dynamic mode test instruction; the static mode test includes a target test quantity detection instruction; selecting a corresponding target mode based on the target mode test instruction; Adjusting the switch matrix to a corresponding test mode based on the target mode test instruction; Under the selected corresponding target mode, a test signal corresponding to the wafer device to be tested is collected; if the target mode test instruction is a static mode test instruction, the test signal is sent to the test device through the static test terminal together with the target test quantity detection instruction in the static mode test to obtain test data of the wafer device to be tested; If the target mode test instruction is a dynamic mode test instruction, the test signal is sent to a test device through a dynamic test detection circuit to obtain test data of the wafer device to be tested.

Images