Matrix storage method and device

Abstract

The invention discloses a matrix storage method and device, and the method comprises the steps: obtaining a plurality of first sub-blocks corresponding to a to-be-stored original matrix, enabling the plurality of first sub-blocks to be obtained through the cutting of the original matrix with a sub-block with the scale of M1 * N1 as a unit, and carrying out the compression of non-zero elements in each sub-matrix obtained through the cutting according to a designated direction, wherein M1 and N1 are positive integers; each first sub-block is cut by taking a sub-block with the scale of M2 * N2 as a unit to obtain a plurality of second sub-blocks, M2 is a positive integer not greater than M1, and N2 is a positive integer not greater than N1; and sequentially storing the data of the plurality of second sub-blocks by taking the second sub-blocks as storage units. According to the design, a compression storage mode capable of realizing alignment of rows and columns of non-zero elements and rows and columns of blocks is provided, and the data locality of matrix data access, the data compression rate and the parallelism of matrix calculation can be improved.

Description

[0001] This application is a divisional application. The application number of the original application is 202310875441.5, and the original application date is July 14, 2023. The entire contents of the original application are incorporated into this application by reference. Technical Field

[0002] The present application relates to the field of data processing technology, and in particular to a matrix storage method and device. Background Art

[0003] Sparse matrix data format is the most important data type for artificial intelligence (AI), high performance computing (HPC), graph computing (Graph), graph neural network convolution computing (GNN), etc. At present, sparse matrix data formats mainly include: coordinate format (COO), compressed sparse row format (CSR), compressed sparse column format (CSC), ELLPACK format (ELL), etc.

[0004] At present, new types of matrix accelerators such as CPU, GPU, NPU, PIM and other chips are booming. The efficiency gap between sparse computing and dense computing is gradually widening. The existing sparse compression format may no longer be able to meet the high concurrency requirements of GPU, vector and matrix units. A new compression storage method for sparse matrices is urgently needed. Summary of the invention

[0005] The present application provides a matrix storage method and device, which are used to provide a new sparse matrix compression storage method.

[0006] In a first aspect, the present application provides a matrix storage method, which can be executed by a device with a data processing function (such as a computing device) or by a component in the device (such as a processor). Taking a computing device as an example, in this method, the computing device can obtain multiple sub-blocks (referred to as first sub-blocks) corresponding to the original matrix. There are multiple ways to obtain the sub-blocks. For example, the computing device receives multiple first sub-blocks input by a user, or the computing device obtains multiple first sub-blocks stored by itself. The computing device first obtains the original matrix and then processes the original matrix to obtain the multiple first sub-blocks.

[0007] The plurality of first sub-blocks are obtained after a computing device or other device performs processing such as slicing and compressing the original matrix. For example, the original matrix is ​​processed by a computing device or other device with a size of M.1 ×N 1 The sub-blocks are taken as units and the blocks are cut in half (where M 1 、N 1 is a positive integer) to obtain multiple scales of M 1 ×N 1 Then, the non-zero elements in each sub-matrix are compressed in a specified direction (such as a row direction or a column direction) to obtain a plurality of first sub-blocks.

[0008] Afterwards, the computing device performs a calculation on each first sub-block with a scale of M. 2 ×N 2 The blocks are cut into units of M to obtain multiple second sub-blocks, where M 2 Not greater than M 1 A positive integer, N 2 is not greater than N 1 A positive integer, M 2 ×N 2 The sub-block size is smaller than M 1 ×N 1 The second sub-block is used as a storage unit, and data of a plurality of second sub-blocks are sequentially stored.

[0009] Through the above design, multiple first sub-blocks corresponding to the original matrix are obtained. The multiple first sub-blocks are obtained by compressing the non-zero elements in multiple sub-matrices of the original matrix according to the specified direction. Then, each first sub-block is cut into small blocks to obtain multiple second sub-blocks corresponding to one first sub-block.

[0010] Among them, cutting the original matrix into multiple first sub-blocks is conducive to improving the compression rate, and cutting the first sub-block into multiple second sub-blocks for storage can further improve the compression rate. In this way, it can adapt to sparse matrices of any distribution, and can maintain a high compression rate under any sparse matrix. The method of storing multiple second sub-blocks in the order of second sub-blocks can facilitate memory access. At least one complete second sub-block can be read out in one memory access, reducing the number of memory accesses during sparse matrix calculation. Moreover, since the lengths of all rows and columns of the second sub-blocks are consistent, it provides a data access method that is more friendly to vector processors or matrix processors. It can achieve better locality for row order or column order access, and can be adapted to dedicated hardware accelerators with higher efficiency, which is conducive to improving the parallelism of sparse matrix calculation. On the one hand, one memory access can read multiple complete second sub-blocks, and the multiple second sub-blocks can be calculated in parallel by multiple dedicated hardware accelerators, which can improve multi-core parallelism. On the other hand, since a second sub-block can provide a dedicated hardware accelerator with sufficient data volume, it is more suitable for the dedicated hardware accelerator to accelerate the calculation, which is beneficial to improving the intra-core parallelism of a single dedicated accelerator, and the performance of the dedicated hardware accelerator can be greatly improved.

[0011] In a possible implementation, the method further includes:

[0012] The computing device obtains the subscript data of each first sub-block in various ways, such as the computing device receiving the subscript data of each first sub-block input by a user, or the computing device obtaining the subscript data of each first sub-block stored in itself, or the computing device determining the subscript data of each first sub-block according to the obtained original matrix. In some cases, the subscript data of the first sub-block may be obtained together with the first sub-block, which is not specifically limited.

[0013] Taking a first sub-block as an example, the subscript data of the first sub-block is used to indicate the position (subscript, i.e., row and column number) of each element in the first sub-block in the original matrix; the subscript data of the first sub-block includes a displacement value pair, an index matrix, and an index vector corresponding to the first sub-block; they are introduced as follows:

[0014] In one example, when the specified direction is row direction:

[0015] (1) The displacement value pair includes a pair of displacement values, recorded as a first displacement value and a second displacement value, wherein the first displacement value is used to indicate a first offset of a corresponding row of the first row (i.e., the starting row) of the first sub-block in the original matrix relative to a starting row (e.g., the 0th row) of the original matrix, and the second displacement value is used to indicate a second offset of a corresponding column of the first column (i.e., the first column) of the first sub-block in the original matrix relative to a starting column (e.g., the 0th column) of the original matrix;

[0016] (2) The value of any element (such as the first element) in the index matrix is ​​equal to the difference between the column number of the element in the first sub-block corresponding to the first element in the original matrix and the second offset. The multiple elements in the index matrix correspond one-to-one to the multiple elements in the first sub-block.

[0017] (3) The value of any element (such as the second element) in the index vector is used to indicate the difference between the row number of the element in the first sub-block corresponding to the second element in the original matrix and the first offset. The multiple elements in the index vector correspond one-to-one to each row of the first sub-block.

[0018] In another example, when the direction is specified as column direction:

[0019] 1) The displacement value pair includes a pair of displacement values, recorded as a first displacement value and a second displacement value, wherein the first displacement value is used to indicate a first offset of a corresponding row of the first row (i.e., the starting row) of the first sub-block in the original matrix relative to a starting row (e.g., the 0th row) of the original matrix, and the second displacement value is used to indicate a second offset of a corresponding column of the first column (i.e., the real column) of the first sub-block in the original matrix relative to a starting column (e.g., the 0th column) of the original matrix;

[0020] 2) Multiple elements in the index matrix correspond one-to-one to multiple elements in the first sub-block, and the value of any element in the index matrix (such as the first element) is equal to the difference between the row number of the element in the first sub-block corresponding to the first element in the original matrix and the first offset. The multiple elements in the index matrix correspond one-to-one to multiple elements in the first sub-block.

[0021] 3) The value of any element (such as the second element) in the index vector is used to indicate the difference between the column number of the element in the first sub-block corresponding to the second element in the original matrix and the second offset. The multiple elements in the index vector correspond one-to-one to each row of the first sub-block.

[0022] Through the above design, slicing the original matrix can mainly optimize the subscript data of the elements, and split the global subscript data of the original matrix into displacement value pairs, index arrays and index vectors of sub-matrices. Those skilled in the art will know that when the scale of the original matrix is ​​large, the original global subscript data range is usually high-precision such as INT64 or INT32, and the data volume is also relatively large. The subscript data range of each submatrix after slicing by the method of the embodiment of the present application will become smaller, and only a lower subscript precision is required, such as using INT16 or INT8 to completely include the subscript range, and each submatrix only needs to uniformly store a displacement value pair, and the amount of subscript data required to store the entire submatrix can be greatly reduced.

[0023] In a possible implementation, the method further includes: the aforementioned plurality of second sub-blocks include a plurality of third sub-blocks, the plurality of third sub-blocks being an index matrix corresponding to each first sub-block with a scale of M 2 ×N 2 The result is obtained by cutting into sub-blocks.

[0024] In a possible implementation manner, the computing device stores a mapping relationship between the second sub-block and the third sub-block, in which the plurality of second sub-blocks correspond one-to-one to the plurality of third sub-blocks. Specifically, taking a first sub-block as an example, in the mapping relationship, the plurality of second sub-blocks corresponding to the first sub-block correspond one-to-one to the plurality of third sub-blocks corresponding to the index matrix corresponding to the first sub-block.

[0025] The second sub-block is stored in the following manner: the first sub-block is selected in the row order or column order of the plurality of first sub-blocks, and then the second sub-block is used as a storage module, and the second sub-block is sequentially selected from the selected first sub-blocks in the row direction for storage, and the elements in each second sub-block can be stored in the row order or column order. Similarly, the third sub-block can be stored in the following manner: the third sub-block is used as a unit, and the third sub-block is sequentially selected from the index matrix corresponding to the selected first sub-block in the row direction for storage. Alternatively, all the second sub-blocks corresponding to the plurality of first sub-blocks are arranged in the row order or column order, and then the second sub-blocks are sequentially selected in the row order or column order for storage of all the arranged second sub-blocks. Similarly, all the third sub-blocks corresponding to the plurality of first sub-blocks are arranged in the row order or column order, and then the third sub-blocks are sequentially selected in the row order or column order for storage of all the arranged third sub-blocks.

[0026] Among them, multiple second sub-blocks and multiple third sub-blocks can be stored separately or at intervals. Separate storage means that multiple second sub-blocks are stored in the first storage space, and the multiple second sub-blocks are stored sequentially in the first storage space. For example, a storage order in the first storage space is: second sub-block A, second sub-block B, second sub-block C, and so on. Similarly, multiple third sub-blocks are stored in the second storage space, and the multiple third sub-blocks are stored continuously in the second storage space. For example, a storage order in the second storage space is: the third sub-block corresponding to the second sub-block A, the third sub-block corresponding to the second sub-block B, the third sub-block corresponding to the second sub-block C, and so on. In this way, when reading multiple second sub-blocks sequentially, the third sub-blocks corresponding to the multiple second sub-blocks can also be read sequentially.

[0027] Interval storage refers to storing the second sub-block and the third sub-block adjacent to each other, that is, taking a second sub-block and the third sub-block corresponding to the second sub-block as a storage module, and sequentially storing each second sub-block and the third sub-block corresponding to the second sub-block. For example, one storage order is: second sub-block A, the third sub-block corresponding to the second sub-block A, second sub-block B, the third sub-block corresponding to the second sub-block B, second sub-block C, and so on. In this way, the second sub-block and the third sub-block corresponding to the second sub-block can be read continuously through one memory access.

[0028] Optionally, the addresses of the plurality of second sub-blocks and / or the plurality of third sub-blocks stored sequentially are continuous, which facilitates data reading and pre-fetching.

[0029] Through the above design, based on this storage method, the data access of multiple consecutive second sub-blocks and / or third sub-blocks can be completed through one data access, which is convenient for memory access, helps to reduce the number of memory accesses during sparse matrix calculations, and can be adapted to dedicated hardware accelerators with higher efficiency, which is helpful to improve the parallelism of sparse matrix calculations.

[0030] In one possible implementation, each second sub-block stored by the computing device includes at least one non-zero element; in some cases, before the computing device sequentially stores the values ​​of the elements in each second sub-block, it includes: eliminating the second sub-block including all zero elements.

[0031] Through the above design, the second sub-block of all zeros can be completely deleted and does not need to be stored. In this way, it can adapt to sparse matrices with arbitrary distribution and maintain a high compression rate under any sparse matrix.

[0032] In the second aspect, an embodiment of the present application provides a matrix computing device, which has the function of implementing the above-mentioned first aspect and any possible implementation method example of the first aspect. The beneficial effects can be found in the description of the first aspect and will not be repeated here. The function can be implemented by hardware, or by hardware executing corresponding software implementations. The hardware or software includes one or more modules corresponding to the above-mentioned functions. In a possible design, the structure of the device includes an acquisition module, a processing module, and a storage module. These modules can execute the function of the behavior of the computing device in the above-mentioned first aspect and any possible implementation method example of the first aspect. For details, please refer to the detailed description in the method example, which will not be repeated here.

[0033] In a third aspect, an embodiment of the present application provides a computing device, which has the function of implementing the computing device behavior in the above-mentioned first aspect and any possible implementation method example of the first aspect. The beneficial effects can be found in the description of the first aspect and will not be repeated here. The structure of the computing device includes a processor and a memory, and the processor is configured to support the device to perform the corresponding functions of the computing device in the method example of the above-mentioned first aspect. The memory is coupled to the processor, which stores the necessary program instructions and data for the communication device. The structure of the communication device also includes a communication interface for communicating with other devices.

[0034] In a fourth aspect, the present application also provides a computer-readable storage medium, which stores instructions, and when the computer-readable storage medium is run on a computer, it enables the computer to execute the method in the above-mentioned first aspect and each possible implementation of the first aspect, or enables the computer to execute the above-mentioned first aspect and each possible implementation of the first aspect.

[0035] In a fifth aspect, the present application also provides a computer program product comprising instructions, which, when executed on a computer, enables the computer to execute the method in the above-mentioned first aspect and each possible implementation manner of the first aspect, or enables the computer to execute the above-mentioned first aspect and each possible implementation manner of the first aspect.

[0036] In a sixth aspect, the present application also provides a computer chip, which is connected to a memory, and the chip is used to read and execute a software program stored in the memory, to execute the methods of the above-mentioned first aspect and various possible designs of the first aspect, or to enable a computer to execute the above-mentioned first aspect and various possible implementations of the first aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] Figure 1 to Figure 7 A schematic diagram of a sparse matrix data format;

[0038] Figure 8 A schematic diagram of the structure of a computing device provided in an embodiment of the present application;

[0039] Fig. 9 A schematic diagram of a flow chart corresponding to a matrix storage method provided in an embodiment of the present application;

[0040] Fig.10 A schematic diagram of a matrix blocking process provided in an embodiment of the present application;

[0041] Fig.11 A schematic diagram of a process for compressing a sub-matrix provided in an embodiment of the present application;

[0042] Fig.12A schematic diagram of a sub-matrix and a corresponding element value array provided in an embodiment of the present application;

[0043] Fig.13 A schematic diagram of another method of compressing a sub-matrix provided in an embodiment of the present application;

[0044] Fig.14 A schematic diagram of cutting into small pieces provided in an embodiment of the present application;

[0045] Fig.15 A schematic diagram of a small block storage method provided in an embodiment of the present application;

[0046] Fig.16 A schematic diagram of another small block storage method provided in an embodiment of the present application;

[0047] Fig.17 A schematic diagram of the structure of a computing device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0048] In order to better explain the embodiments of the present application, the relevant terms or technologies in the present application are first explained:

[0049] 1. Row Vector

[0050] A row vector is a 1×m matrix, where m is any positive integer, for example: x = [x 1 x 2 …x m ].

[0051] Column vectors

[0052] A column vector is an n×1 matrix, where n is any positive integer, for example:

[0053] Matrix size / scale

[0054] An m×n matrix is ​​a rectangular array of elements arranged in m rows and n columns. For example:

[0055]

[0056] Each number that makes up the matrix is ​​called an element of the matrix. 11 , A 12 , …, A mn etc. are all elements of matrix A. The subscript (or coordinate) of the element is used to indicate the position of the element in the matrix, which can be the row number (or row coordinate) or column number (or column coordinate) of the element in the matrix. 11 The subscript "11" indicates that the element is located in the first row and first column of matrix A. 21Indicates that the element is located in the second row and first column of matrix A. In addition, the subscript of the element can also have different forms, such as A 11 It can also be written as A 1，1 , A 21 It can also be written as A 2，1 Etc. Similar details will not be repeated below.

[0057] It should be noted that the row number of the starting row of a matrix is ​​not limited to 1, but can also be other values, such as 0. Similarly, the column number of the starting column of the matrix is ​​not limited to 1, but can also be other data such as 0. For example, if the row number of the starting row and the column number of the starting column of the above matrix are 0 and 0 respectively, then the subscript of the first element in the matrix is ​​"00", indicating that the element is in the 0th row and 0th column of the matrix.

[0058] 4. Matrix addition

[0059] Matrix addition refers to the addition of two matrices of the same size (or the same size, that is, the two matrices have the same number of rows and columns). For example, A and B are both m×n matrices, and matrix C=A+B.

[0060]

[0061] Similarly, matrix subtraction means subtracting the elements at the same position in two matrices of the same size.

[0062] 5. Matrix multiplication

[0063] For two matrices to be multiplied (such as matrices D and E), the number of columns of D is required to be the same as the number of rows of E. For example, if D is an m×n matrix and E is an n×p matrix, their product will be an m×p matrix. For example:

[0064]

[0065] 6. Sparse matrix / dense matrix

[0066] The matrix is ​​divided into sparse matrix and dense matrix according to the ratio of non-zero elements in the matrix. Non-zero elements refer to elements whose values ​​are not 0, while zero elements refer to elements whose values ​​are 0.

[0067] If most (e.g. more than 50%) elements in a matrix are non-zero elements, then the matrix is ​​a dense matrix. On the contrary, if most of the elements in the matrix are zero, then it is a sparse matrix. Sparsity is used to reflect the proportion of non-zero elements in a sparse matrix. The higher the sparsity, the lower the proportion of non-zero elements. The following is an example of a sparse matrix:

[0068]

[0069]

[0070] It is understandable that large matrices require a lot of memory to store, and the values ​​of most elements in a sparse matrix are 0. Therefore, when a computer stores and operates a sparse matrix, the elements of the sparse matrix are usually encoded as sparse codes. Sparse codes usually only include information about non-zero elements (such as element values ​​and subscripts). By storing their sparse codes, the memory cost of operating sparse matrices is saved. In contrast, matrices in non-compressed formats are generally called dense matrices. Dense matrices only include the values ​​of matrix elements, but do not store the coordinates of the elements.

[0071] The following is an introduction to several common sparse coding formats (also known as sparse matrix data formats):

[0072] (1) Coordinate format (coordinate, COO): The matrix is ​​represented by a triplet, which includes three values: row number (row), column number (column) and element value (data). The row number and column number are used to identify the position of the element value in the original matrix. See Figure 1 , Figure 1 A simple sparse matrix is ​​used as an example to show the coordinate format corresponding to the sparse matrix. Please note that for simplicity, Figure 1 Only non-zero elements are shown in the sparse matrix in , and the rest not shown are zero elements. Similarities will not be repeated below.

[0073] (2) Compressed sparse column format (CSC): The sparse matrix is ​​represented by three types of data: column offset value, row number, and element value. The difference between CSC and COO is that column offset value is used instead of column number. The column offset indicates the starting offset position of the first non-zero element of a column in the numerical data.

[0074] Figure 2 An example of CSC compression is shown below. The three types of data are introduced as follows:

[0075] like Figure 2As shown, based on index pointer (011467), several intervals can be obtained, namely: [0,1), [1,1), [1,4), [4,6), [6,7), which correspond to the elements of column 0, column 1, column 2, column 3, and column 4 respectively. That is, [0,1) corresponds to column 0, [1,1) corresponds to column 1, [1,4) corresponds to column 2, and so on.

[0076] Based on [0,1), select the 0th row number in indices, which is 0. Since [1,1) does not exist in the valid range, the row number selected in indices based on [1,1) is None. Based on [1,4), select the 1st to 3rd row numbers in indices, which are 0, 1, and 4. Based on [4,6), select the 4th and 5th row numbers in indices, which are 4 and 6. Based on [6,7), select the 6th row number in indices, which is 4.

[0077] Combined with data, we can determine that [0,1) corresponds to the element 8 in the 0th column and 0th row. [1,1) has no corresponding element, [1,4) corresponds to the element 2 in the 2nd column and 0th row, the element 5 in the 2nd column and 1st row, and the element 5 in the 2nd column and 4th row. [4,6) corresponds to the element 1 in the 3rd column and 4th row, and the element 9 in the 3rd column and 6th row. [6,7) corresponds to the element 9 in the 4th column and 4th row.

[0078] (3) Compressed sparse row format (CSR): Sparse matrices are represented by three types of data: row offset, column number, and element value. The difference between CSR and COO is that row offset is used instead of row number. The row offset indicates the starting offset position of the first non-zero element of a row in the numerical data. Figure 3 An example of compression in CSR format is shown as an example. The usage of the row offset value of CSR is similar to the column offset value of CSC, which can be found in the above introduction and will not be repeated here.

[0079] (4) ELLPACK format (ELL): Two matrices with the same rows as the original matrix are used to store values, column indices, and values. The matrix used to store column indices can be called a column matrix, and the matrix used to store values ​​can be called a value matrix. In these two matrices, if there are no elements, they are padded with 0 to the set row length.

[0080] Figure 4An example of ELL compression is shown. It can be seen that if a row contains too much attribute information, the column number matrix and the value matrix will become abnormally "fat", and there will be many zero-filled elements at the end of other rows, which wastes storage space and affects the compression rate, and the compression rate may be relatively low.

[0081] (5) Sliced ​​ELLPACK Format (SELL): SELL is an extension of the ELL format. It divides the input matrix into slices of C adjacent rows, sorts the rows in the slice according to the number of non-zero elements, and stores each slice in the ELL format. The number of non-zero elements stored in the ELL may vary from slice to slice, and each strip may have a different row length, which can reduce the number of zero-paddings in each strip, thereby improving the compression rate of the format. In addition, it introduces sorting to save storage overhead. Another variation is to limit the range of matrix sorting to the range of σ. In other words, this format does not sort the matrix rows globally but within σ consecutive rows, which can further reduce the additional computation introduced by sorting. Finally, each strip can be divided into arrays of various specifications for storage according to the distribution of the sorted elements, further reducing the compression rate.

[0082] Figure 5 is a compression example of SELL, such as Figure 5 As shown in the figure, the original matrix is ​​divided into two strips, and the rows in each strip are sorted from large to small according to the row length (measured by the number of non-zero elements), and the data of each strip is stored in the ELL format. Among them, the first strip includes an array of 8×6 size and an array of 3×6 size, and the second strip includes an array of 9×6 size and an array of 3×6 size.

[0083] Several sparse matrix data formats are introduced above. At present, sparse matrix data formats are important data types in technical fields such as artificial intelligence (AI), high performance computing (HPC), graph computing (Graph), and graph neural network convolution computing (GNN). These compressed data are widely used in many matrix operation scenarios such as sparse matrix-vector multiplication (SpMV), sparse matrix-sparse vector multiplication (SpMSpV), sparse matrix-matrix multiplication (SpMM), sparse matrix-sparse matrix multiplication (SpGEMM or SpMSpM or SpSpMM), etc.

[0084] Among them, the compressed sparse column format (CSC), the compressed sparse row format (CSR), and the coordinate format matrix (COO) are the more mainstream data formats. The idea of ​​this type of data format is to compress non-zero elements in the row direction or column direction to store information such as the values ​​and subscripts of non-zero elements. Specifically, as mentioned above, CSC and CSR use two independent arrays to store the values ​​of all non-zero elements in the original sparse matrix and the indexes of rows or columns, and use a third array to point to the starting position of each row or column in these arrays. In practice, the main disadvantage of CSC and CSR is that the access to the values ​​or indexes of the sparse matrix has poor locality. The locality here can be understood as when the processor (such as CPU) accesses the memory (such as memory), whether it is accessing instructions or accessing data, the accessed storage modules tend to be concentrated in a smaller continuous area. For example, see Figure 6 As shown in (a), CSC has good locality for data storage and access in the column direction, but poor locality for access in the row direction. Figure 6 As shown in (b), CSR has good locality for data storage and access in the row direction, but poor locality for access in the column direction. In addition, the length of rows or columns of this type of format is inconsistent, and it is difficult to complete the access of multiple vectors at a time. This is because a vector instruction can only access row vectors or column vectors of fixed length. When the row or column length is inconsistent, multiple vectors cannot be accessed through a vector instruction. This also makes it difficult to use processors with higher parallelism to accelerate matrix calculations.

[0085] In recent years, the elliptic equation format (ELLPACK) has also received much attention. The elliptic equation format is designed to improve the execution efficiency of vector processors. Figure 7 As shown in the figure, compared with the compressed sparse row format, it uses zero-padding to make the length of non-zero elements in each row consistent. For a matrix A of size m×n and a maximum row length (the number of non-zero elements in the row) of k, it requires an array of size m×k to store the matrix A. The main disadvantage of the elliptic equation format is that if the non-zero elements in the original sparse matrix are distributed irregularly, the length of the compressed row will be greatly different. There will be more zero padding in the array of the elliptic equation format, resulting in a decrease in compression rate, and the computational efficiency of the vector processor will also decrease accordingly.

[0086] Therefore, some improved data formats have been derived based on the elliptic equation format (ELLPACK), such as the slice elliptic equation format (SELL). Figure 5It is understood that although the sliced ​​elliptic equation format can further reduce the compression rate relative to the elliptic equation format, the sliced ​​elliptic equation format has the same problem as the elliptic equation format, that is, when the non-zero elements in a slice (such as a strip) are distributed irregularly, there is still a problem of low compression rate.

[0087] In summary, existing sparse matrix compression formats all have some shortcomings, which make the existing data formats unable to meet the high concurrency requirements of new forms of vector processors (or matrix accelerators), thus limiting the development of vector processors. A data format that can meet data locality and high compression rate is very important and is also an important technology driving the development of sparse matrix computing acceleration chips.

[0088] In view of this, the present application provides a matrix storage method, which is implemented based on a new sparse matrix data format provided by the present application. The data format is suitable for sparse matrices of arbitrary sparsity and arbitrary non-zero element distribution, which can solve the determination of the above-mentioned existing data formats, including good locality and high compression rate. Simply put, in this method, taking the execution of a computing device as an example, the computing device processes the original matrix based on the data format to obtain a sparse code of the data format, and stores the sparse code of the data format with a fixed-size array as the granularity. This storage method can save storage overhead, and has good data locality, high compression rate and parallelism.

[0089] Next, the technical solution provided in the embodiments of the present application is described in detail with reference to the accompanying drawings.

[0090] Figure 8 A schematic diagram of a computing device provided for the present application, the computing device 800 includes: a processor 801, a memory 802. Optionally, the device 800 may also include a communication interface 804 and a matrix operator 806, wherein the processor 801, the memory 802, the matrix operator 806 and the communication interface 804 may be interconnected via a communication line 805; the communication line 805 may be a peripheral component interconnect (PCI) bus or an extended industry standard architecture (EISA) bus, etc. The communication line 805 may be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 8 Only one thick line is used in the diagram, but this does not mean that there is only one bus or only one type of bus.

[0091] Processor 801 can be a central processing unit (CPU), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), an artificial intelligence (AI) chip, a system on chip (SoC) or a complex programmable logic device (CPLD), a graphics processing unit (GPU), a neural network processing unit (NPU), a microprocessor, or one or more integrated circuits for controlling the execution of the program of the present application.

[0092] Please note, Figure 8 Only one processor 801 is shown. In actual applications, there may be multiple processors 801. The multiple processors 801 may include multiple processors of the same type or multiple processors of different types. For example, the multiple processors 801 include multiple CPUs. For another example, the multiple processors 801 include at least one CPU and at least one GPU. A CPU has one or more CPU cores. This embodiment does not limit the number of processors 801, the number of CPU cores, etc.

[0093] Specifically, the processor 801 is used to process data access requests from outside the computing device 800 (such as other computing devices, etc.), and is also used to process requests generated inside the computing device 800. For example, the request is a write data request, and the write data request includes an original matrix, and the original matrix may be a sparse matrix. After receiving the write data request, the processor 801 may execute the matrix storage method provided in the embodiment of the present application, process the original matrix, and save the processed data in the memory 802. For another example, the request may also be a read data request, and the read data request is used to request to read matrix data, and the matrix data may include part or all of the original matrix. After receiving the read data request, the processor 801 reads the matrix data from the memory 802.

[0094] In addition, the processor 801 is also used to perform other data calculations or processing, such as matrix operations, such as sparse matrix-vector multiplication (SpMV), sparse matrix-sparse vector multiplication (SpMSpV), sparse matrix-matrix multiplication (SpMM), sparse matrix-sparse matrix multiplication (SpGEMM or SpMSpM or SpSpMM), etc., without specific limitation. Optionally, the above-mentioned matrix operations can also be assigned to the matrix operator 806 for execution. In some cases, when the processor 801 has multiple cores, or the computing device 800 includes multiple processors 801, or the computing device 800 includes multiple matrix operators 806, multiple cores or multiple processors 801 or multiple matrix operators 806 can perform matrix operations in parallel, which will not be emphasized here.

[0095] The matrix operator 806 can be used to process matrix operations. Please refer to the above introduction to matrix operations, which will not be repeated here. The matrix operator 806 may include but is not limited to: a vector processor (VP), a vector processor system (VPS), a matrix processor, a matrix accelerator, etc., without specific limitation.

[0096] The communication interface 804 uses any transceiver-like device to communicate with other devices or communication networks, such as Ethernet, radio access network (RAN), wireless local area network (WLAN), wired access network, etc. For example, to obtain read data request, write data request, matrix data, etc.

[0097] The memory 802 is used to store data and computer executable program codes. The data includes, but is not limited to, data of the original matrix, sparse coding of the sparse matrix, etc. The executable program code may include the program code of the matrix storage method provided in the embodiment of the present application, and the processor 801 executes the executable program code to implement the matrix storage method provided in the present embodiment. That is, the memory 1406 stores computer execution instructions for executing the scheme of the present application, and the execution is controlled by the processor 801. The processor 801 is used to execute the computer execution instructions stored in the memory 802, thereby implementing the matrix storage method provided in the above-mentioned embodiment of the present application.

[0098] For example, the memory 802 may also store a sparse matrix function library (spares blas), which may include but is not limited to one or more instructions provided in the present embodiment: a block instruction (the function of the instruction can be found in the description of step 902, which will not be repeated here), a compression processing instruction (the function of the instruction can be found in the description of step 903, which will not be repeated here), a zero filling instruction, a tiling instruction (the function of the instruction can be found in the description of step 904, which will not be repeated here). And the function library may also include other instructions, such as instructions for implementing existing sparse matrix data formats, such as compressed sparse column format instructions, elliptic equation format instructions, etc. The memory 802 may also store matrix operation instructions, such as read vector instructions, sparse matrix vector multiplication (SpMV), sparse matrix sparse vector multiplication (SpMSpV), sparse matrix matrix multiplication (SpMM), sparse matrix sparse matrix multiplication (SpGEMM or SpMSpM or SpSpMM), etc. Optionally, the memory 802 may also store source code for implementing any instruction or function in the function library.

[0099] The memory 802 may exist independently and be connected to the processor via the communication line 805. The memory 802 may also be integrated with the processor. Specifically, the memory 802 may include a memory and may also include a hard disk. The memory refers to an internal memory that directly exchanges data with the processor 801. It can read and write data at any time, and it is very fast, and serves as a temporary data storage device for an operating system or other running programs. Unlike the memory, the hard disk reads and writes data slower than the memory, and is usually used to store data persistently. In some application scenarios, the processor 801 may temporarily store data (such as sparse coding of a sparse matrix) in the memory, and when the total amount of data in the memory reaches a certain threshold, the processor 801 sends the data stored in the memory to the hard disk for persistent storage. These data may be obtained from an external device, or input by a user, or generated by the computing device 800, and are not specifically limited. Alternatively, the processor 801 reads data from the memory, and when the memory misses, the processor 801 reads the data from the hard disk into the memory, and then reads the data from the memory.

[0100] Among them, the memory includes at least two types of memories, for example, the memory can be either a random access memory or a read-only memory (ROM). For example, the random access memory is a dynamic random access memory (DRAM) or a storage class memory (SCM). The memory can also include other random access memories, such as a static random access memory (SRAM), etc. As for the read-only memory, for example, it can be a programmable read only memory (PROM), an erasable programmable read only memory (EPROM), etc. In addition, the memory can also be a dual in-line memory module or a dual in-line memory module (DIMM), that is, a module composed of DRAM. In actual applications, multiple memories and different types of memories can be configured in the computing device 800. This embodiment does not limit the number and type of memory.

[0101] The hard disk can specifically be a disk or other types of storage media, such as a solid-state drive (solid-state drive / solid-state disk, SSD), a hard disk drive (hard disk drive, HDD), a compact disc read-only memory (compact disc read-only memory, CD-ROM) or other optical disk storage, optical disc storage (including compressed optical discs, laser discs, optical discs, digital versatile discs, Blu-ray discs, etc.), disk storage media or other magnetic storage devices, or any other medium that can be used to carry or store desired program codes in the form of instructions or data structures and can be accessed by a computer, but is not limited to these.

[0102] It should be noted that Figure 8 The structure of the computing device 800 shown is only an example. In actual applications, the computing device 800 may have more or fewer components. For example, the computing device 800 may also include input / output devices such as a keyboard, a mouse, and a display screen. This embodiment of the present application does not limit this.

[0103] Next, apply to Figure 8 Taking the computing device shown as an example, the data format and the corresponding matrix storage method provided in the embodiment of the present application are introduced in detail.

[0104] Fig. 9Schematic diagram of the flow chart corresponding to the compression storage method provided in the embodiment of the present application. The method can be executed by a computing device (such as computing device 800) having data processing capabilities, or a component of the computing device, such as processor 801 or matrix operator 806. For ease of explanation, the following is an introduction using computing device 800 as an example. Fig. 9 As shown, the method includes:

[0105] Step 901, obtaining matrix data of the original matrix to be processed.

[0106] There are also multiple ways to obtain matrix data. One way to obtain is that the processor 801 receives matrix data input from the outside. For example, the matrix data can be input to the computing device 800 by the user through a terminal device, or directly input to the computing device 800 by the user. Accordingly, the computing device 800 (processor 801) receives the matrix data directly or indirectly input by the user. Another way to obtain is that the processor 801 obtains the matrix data locally from the computing device 800, such as the processor 801 obtains the matrix data from the memory 802.

[0107] Among them, the matrix data can be the data of the original matrix, wherein the original matrix can be a dense matrix or a sparse matrix of any sparsity. Alternatively, the matrix data can be a sparse code of a sparse matrix, and the data format adopted by the sparse code can be any sparse matrix data format other than the data format provided in this application, such as including but not limited to: CSC, CSR, COO, ELLPACK, etc. In short, sparse codes of any data format that can restore the original matrix are applicable to the embodiments of this application. Alternatively, the matrix data can also be data after further value-added processing of the sparse code, and the value-added processing such as deduplication, compression, etc. is not specifically limited.

[0108] The above is only an example. In actual applications, any type of matrix data and acquisition method are applicable to the embodiments of the present application.

[0109] Step 902: the original matrix is 1 ×N 1 Blocking is performed in units of sub-blocks to obtain multiple sub-matrices.

[0110] Step 902 is introduced by taking the original matrix being a sparse matrix as an example.

[0111] Fig.10 A schematic diagram of sparse matrix slicing provided in this embodiment, assuming that the size of the sparse matrix is ​​X×Y and the size of the sub-block is M 1 ×N 1 , where M 1 、N 1is a positive integer, M 1 ×N 1 Less than X×Y, in one case, M 1 Take a positive integer less than X, N 1 Take a positive integer not greater than Y, or, M 1 Take a positive integer not greater than X, N 1 Take a positive integer less than Y. Usually, M 1 Take a positive integer less than X, N 1 Take a positive integer less than Y, M 1 Can be equal to N 1 , X can be equal to Y. For the sake of illustration, assume Fig.10 In, M 1 =N 1 =3, the sparse matrix is ​​cut into blocks of 3×3 size, and at least one sub-matrix of 3×3 size can be obtained, that is, the sparse matrix is ​​divided into multiple sub-matrices of 3×3 size. The multiple sub-matrices are adjacent to each other and do not overlap. In addition, since X may not be M 1 An integer multiple of N, and / or, Y may not be 1 Therefore, the scales of the multiple sub-matrices may be completely the same, or completely different, or not completely the same.

[0112] like Fig.10 As shown in (a), the sparse matrix A is cut into 4 sub-matrices with a size of 3×3. The size of the 4 sub-matrices is the same, all 3×3. Fig.10 As shown in (b), the sparse matrix B is cut into 4 sub-matrices with a size of 3×3. The sizes of the 4 sub-matrices are not exactly the same. The sizes of the upper two sub-matrices are 3×3, and the sizes of the lower two sub-matrices are 3×2. Fig.10 As shown in (c), the sparse matrix C is cut into 4 sub-matrices with a size of 3×3. The sizes of the 4 sub-matrices are completely different. The sizes of the 4 sub-matrices are: 3×3, 2×3, 3×2, and 2×2. Please note that Fig.10 The scale of the sparse matrix and the scale of the sub-block are examples. The scale of the sparse matrix in practical applications is usually relatively large, and this application does not limit this.

[0113] Step 903: compress each sub-matrix to obtain compressed data corresponding to each sub-matrix.

[0114] Taking a sub-matrix as an example, the compression processing flow provided in the present application may include: the processor 801 compresses the non-zero elements in the sub-matrix in a specified direction (such as a row direction or a column direction) to obtain compressed data of the sub-matrix.

[0115] The compression processing method provided by this embodiment is introduced below in combination with the two situations where the specified direction is the row direction or the column direction. In the following, compression in the row direction may also be referred to as row compression, and the two have the same meaning. Similarly, compression in the column direction may also be referred to as column compression.

[0116] 1. Specify the direction as row direction.

[0117] See also Fig.11 ,exist Fig.11 In the example, the sparse matrix is ​​represented by a matrix of size M. 1 ×N 1 The sub-block is cut into 4 sub-matrices, and the 4 sub-matrices are recorded as sub-matrix 1, sub-matrix 2, sub-matrix 3, and sub-matrix 4 in order from left to right and from top to bottom.

[0118] First, Fig.11 Taking the sub-matrix 1 shown as an example, the specific process of the processor 801 compressing the sub-matrix 1 may include:

[0119] The non-zero elements in the submatrix 1 are compressed in the row direction to generate compressed data of the submatrix 1. The compressed data of the submatrix includes: an element value array (such as block data) and subscript data of the submatrix 1.

[0120] (1) The element value array of submatrix 1 includes the non-zero elements in submatrix 1.

[0121] Among them, the element value array includes non-zero elements arranged in row order in submatrix 1, and the non-zero elements in the same row in the original matrix are still in the same row in the element value array, and there is no interval between the non-zero elements in the element value array. The compression process of obtaining the element value array can include: compressing the non-zero elements in submatrix 1 in the row direction (when there are full element rows in the submatrix, the full zero element row can be compressed in the entire row), and zero-filling according to the maximum row length after compression to obtain the element value array (also referred to as the element value matrix) corresponding to submatrix 1. Optionally, zero-filling can also be performed on the maximum row length after compression of submatrix 1 to obtain the element value data corresponding to submatrix 1, in which all row lengths and all column lengths are consistent. The compression process of the element value arrays of the remaining submatrices is the same, and will not be repeated here.

[0122] (2) The subscript data (such as global index) of submatrix 1 is used to indicate the position (or subscript, referred to as original position / original subscript below) of each non-zero element in the element value array in the original matrix. The original subscript includes the original row number and the original column number. The original row number refers to the row number of the non-zero element in the element value array in the original matrix, and the original column number refers to the column number of the non-zero element in the element value array in the original matrix. For example, Fig.11 For example, the element in the 0th row and 0th column of the element value array has an original subscript (0,0) in the original matrix. For another example, the element in the 0th row and 1st column of the element value array has an original subscript (0,2) in the original matrix. For another example, the element in the 0th row and 2nd column of the element value array has an original subscript (0,6) in the original matrix.

[0123] The subscript data of submatrix 1 includes a displacement value pair, an index array (or index matrix), and an index vector of submatrix 1.

[0124] 1) First, introduce the displacement value pair:

[0125] The subscript data of submatrix 1 includes a displacement value pair (such as block offset) of the submatrix. The so-called displacement value pair includes a row offset and a column offset. The row offset refers to the offset between the starting row of the submatrix in the original matrix and the starting row of the original matrix. The column offset refers to the offset between the starting column of the submatrix in the original matrix and the starting column of the original matrix.

[0126] Combination Fig.11 Understand, assuming the size of the sub-block is M 1 ×N 1 =16×16. The starting row number of the original matrix is ​​0, and the starting column number is 0. The (original row number of the starting row, the original column number of the starting column) of submatrix 1 is (0, 0); the (original row number of the starting row, the original column number of the starting column) of submatrix 2 is (0, 16); the (original row number of the starting row, the original column number of the starting column) of submatrix 3 is (16, 0); the (original row number of the starting row, the original column number of the starting column) of submatrix 4 is (16, 16).

[0127] Based on this, the row offset of submatrix 1 = the original row number of the starting row of submatrix 1 - the row number of the starting row of the original matrix = 0 - 0 = 0, and the column offset of submatrix 1 = the original column number of the starting column of submatrix 1 - the column number of the starting column of the original matrix = 0. That is, the displacement value pair of submatrix 1 is (0, 0).

[0128] The row offset of submatrix 2 = the original row number of the starting row of submatrix 2 - the row number of the starting row of the original matrix = 0-0 = 0, and the column offset of submatrix 2 = the original column number of the starting column of submatrix 2 - the column number of the starting column of the original matrix = 16-0 = 16. That is, the displacement value pair of submatrix 2 is (0, 16).

[0129] The row offset of submatrix 3 = the original row number of the starting row of submatrix 3 - the row number of the starting row of the original matrix = 16 - 0 = 16, and the column offset of submatrix 3 = the original column number of the starting column of submatrix 3 - the column number of the starting column of the original matrix = 0 - 0 = 0. That is, the displacement value pair of submatrix 3 is (16, 0).

[0130] The row offset of submatrix 4 = the original row number of the starting row of submatrix 4 - the row number of the starting row of the original matrix = 16-0 = 16, and the column offset of submatrix 4 = the original column number of the starting column of submatrix 4 - the column number of the starting column of the original matrix = 16-0 = 16. That is, the displacement value pair of submatrix 4 is (16, 16).

[0131] 2) The index array and index vector are introduced as follows:

[0132] When the specified direction is different, the elements in the index array and the index vector have different meanings. The following continues to specify the direction as the row direction and introduces the index data and index vector of submatrix 1.

[0133] The value of the element in the index array of submatrix 1 and the column offset of submatrix 1 are used to indicate the original column number of the corresponding element in the element value array of submatrix 1. Specifically, as shown in Formula 1: the original column number of any element (recorded as the first element) in the element value array of submatrix 1 = the column offset of submatrix 1 + the value of the element corresponding to the first element in the index array of submatrix 1 (recorded as the second element). In simple terms, the original column number of a non-zero element = the row offset + the value of the corresponding element in the index array.

[0134] The elements included in the index array of submatrix 1 correspond one-to-one to the elements included in the element value array of submatrix 1. One-to-one correspondence means that two elements at the same position in the index array and the element value array correspond one-to-one. In other words, the element at position (i, j) in the index array (such as the first element) corresponds to the element at position (i, j) in the element value array (such as the second element). For example, the element at position (0, 0) in the index array corresponds to the element at position (0, 0) in the element value array, the element at position (0, 1) in the index array corresponds to the element at position (0, 1) in the element value array, the element at position (16, 4) in the index array corresponds to the element at position (16, 4) in the element value array, and so on.

[0135] Based on Formula 1, the value of any element in the index array of submatrix 1 = the original column number of the corresponding (position) element in the element value array of submatrix 1 - the column offset of submatrix 1. For example, continue to refer to Fig.11 , for example, the element at position (0,1) in the element value array of submatrix 1 (such as Fig.11 The original column number of the element marked with "a" in the matrix is ​​2. Since the column offset of submatrix 1 is 0, the value of the element at position (0,1) in the index array of submatrix 1 = 2-0 = 2. For another example, the element at position (0,2) in the element value array of submatrix 1 (such as Fig.11 The original column number of the element marked with "b" in the matrix is ​​6. Since the column offset of submatrix 1 is 0, the value of the element at position (0,2) in the index array of submatrix 1 = 6-0 = 6. For another example, the element at position (1,0) in the element value array of submatrix 1 (such as Fig.11 The original column number of the element identified by "c" in (in) is 3. Since the column offset of submatrix 1 is 0, the value of the element at position (1,0) in the index array of submatrix 1 = 3-0 = 3.

[0136] The value of the element in the index vector of submatrix 1 and the row offset of submatrix 1 are used to indicate the original row number of the corresponding element in the element value array of submatrix 1. Specifically, as shown in Formula 2: the original row number of any element (recorded as the first element) in the element value array of submatrix 1 = the row offset of submatrix 1 + the value of the element corresponding to the first element (such as the second element) in the index vector of submatrix 1. In short, the original row number of the non-zero element = the row offset + the value of the corresponding element in the index vector.

[0137] The elements included in the index vector correspond one-to-one to the multiple rows included in the element value array. For example, the 0th element of the index vector corresponds to the 0th row of the element value array, the 1st element of the index vector corresponds to the 1st row of the element value array, the ith element of the index vector corresponds to the ith row of the element value array, and so on. In other words, the element in the ith row of the element value array corresponds to the ith element of the index vector.

[0138] Based on Formula 2, the value of any element in the index vector of submatrix 1 = the original row number of the corresponding row element in the element value array of submatrix 1 - the row offset of submatrix 1. The index vector can be a 1×n matrix, or an n×1 matrix. Assume that the index vector of submatrix 1 is x=[x 0 x 1 …x n-1 ], see Fig.11For example, the original row number of the elements in the 0th row of the element value array of submatrix 1 is 0. Since the row offset of submatrix 1 is 0, the value of the 0th element in the index vector of submatrix 1 (such as x 0 )=0-0=0. For another example, the original row number of the first row element in the element value array of submatrix 1 is 1. Since the row offset of submatrix 1 is 0, the first row element in the index vector of submatrix 1 (such as x 1 )=1-0=1. For another example, the original row number of the 15th row element in the element value array of submatrix 1 is 15. Since the row offset of submatrix 1 is 0, the 15th row element in the index vector of submatrix 1 (such as x 15 ) = 15-0 = 15. That is, the index vector of submatrix 1 is [0 1 2 3 ... 14 15]. It can be understood that when submatrix 1 does not include a row of all zero elements, the value of the element in the index vector of submatrix 1 is the original row number of the corresponding row element in the element value array.

[0139] The above describes the process of determining the compressed data of submatrix 1. The following briefly describes examples of determining the compressed data of other submatrices.

[0140] As mentioned above, the displacement value pair of submatrix 2 is (0,16), combined with Fig.11 and Fig.12 Understand, for example, the element at position (0,0) in the element value array of submatrix 2 (such as Fig.11 The original subscript of the element marked with "e" in (in) is (3,19), and the value of the element at position (0,0) in the index array of submatrix 2 = 19-16 = 3.

[0141] For example, the element at position (0,1) in the element value array of submatrix 2 (such as Fig.12 The original subscript of the element marked with "f" in the submatrix 2 is (3, 20), and the value of the element at position (0, 1) in the index array of submatrix 2 = 20-16 = 4. The value of the 0th element in the index vector of submatrix 2 (corresponding to the element in the 0th row of the element value array, such as e, f) = 3-0 = 3.

[0142] For example, the element at position (1,0) in the element value array of submatrix 2 (such as Fig.12 The original subscript of the element marked with "g" in the submatrix 2 is (7, 17), and the value of the element at position (1, 0) in the index array of submatrix 2 = 17-16 = 1. The value of the first element in the index vector of submatrix 2 (corresponding to the element in the first row of the element value array, such as g) = 7-0 = 7.

[0143] And so on, the index array and index vector of submatrix 2 are determined.

[0144] As mentioned above, the displacement value pair of submatrix 3 is (16,0), combined with Fig.11 and Fig.12 Understand, for example, the element at position (0,0) in the element value array of submatrix 3 (such as Fig.12 The original subscript of the element marked with "h" in the index vector of submatrix 3 is (16, 6), and the value of the element at position (0, 0) in the index array of submatrix 3 = 6-0 = 6. The value of the 0th element in the index vector of submatrix 3 (corresponding to the element in the 0th row of the element value array, such as h) = 16-16 = 0.

[0145] For example, the element at position (2,0) in the element value array of submatrix 3 (such as Fig.12 The original subscript of the element marked with "k" in the index vector of submatrix 3 is (18,3), and the value of the element at position (2,0) in the index array of submatrix 3 = 3-0 = 3. The value of the second element in the index vector of submatrix 3 (corresponding to the element in the second row of the element value array, such as k) = 18-16 = 2.

[0146] For example, the element at position (3,1) in the element value array of matrix 3 (such as Fig.12 The original subscript of the element marked with "o" in the index vector of submatrix 3 is (19,6), and the value of the element at position (3,1) in the index array of submatrix 3 = 6-0 = 6. The value of the third element in the index vector of submatrix 3 (corresponding to the element in the second row of the element value array, such as o) = 19-16 = 3.

[0147] And so on, the index array and index vector of submatrix 3 are determined.

[0148] As mentioned above, the displacement value pair of submatrix 4 is (16,16), combined with Fig.11 and Fig.12 Understand, for example, the element at position (0,1) in the element value array of submatrix 4 (such as Fig.12 The original subscript of the element marked with "y" in the index vector of submatrix 3 is (17, 18), and the value of the element at position (0, 1) in the index array of submatrix 3 = 18-16 = 2. The value of the 0th element in the index vector of submatrix 4 (corresponding to the element in the 0th row in the element value array, such as y) = 17-16 = 1.

[0149] For example, the element at position (1,1) in the element value array of submatrix 4 (such as Fig.12 The original subscript of the element marked with "w" in the submatrix 4 is (20, 19), and the value of the element at position (1, 1) in the index array of submatrix 4 is 19-16=3. The value of the first element in the index vector of submatrix 4 (corresponding to the element in the first row of the element value array, such as w) is 20-16=4.

[0150] And so on, the index array and index vector of submatrix 4 are determined.

[0151] It can be seen from the above design that slicing the original matrix can mainly optimize the subscript data of the elements, and split the global subscript data of the original matrix into displacement value pairs, index arrays and index vectors of sub-matrices. Those skilled in the art will know that when the scale of the original matrix is ​​large, the original global subscript data range is usually high-precision such as INT64 or INT32, and the amount of data is also relatively large. The subscript data range of each submatrix after slicing by the method of the embodiment of the present application will become smaller, and only a lower subscript precision is required, such as using INT16 or INT8 to completely include the subscript range, and each submatrix only needs to uniformly store a displacement value pair, and the amount of subscript data required to be stored in the entire submatrix can be greatly reduced.

[0152] The above describes the process of obtaining compressed data of each sub-matrix by compressing in the row direction. The following describes the process of obtaining compressed data of each sub-matrix by compressing in the column direction.

[0153] 2. Specify the direction as column direction.

[0154] Please note that no matter whether the compression direction is row direction or column direction, it does not affect the displacement value pairs of the submatrix, that is, the displacement value pairs of the determined submatrix are the same, and the determination method of the displacement value pairs of the submatrix can be referred to above, which will not be repeated here. Only the differences are explained below.

[0155] Fig.13 A schematic diagram of compressing a sub-matrix in a column direction provided in this embodiment is shown in FIG. Fig.13 Taking the submatrix 1 shown as an example, the submatrix 1 is compressed in the column direction to obtain the compressed data of the submatrix 1. The compressed data of the submatrix 1 includes the element value array and subscript data of the submatrix 1.

[0156] Among them, the element value array of submatrix 1 includes non-zero elements arranged in column order in submatrix 1, and the non-zero elements in the same column in the original matrix are still in the same column in the element value array, and there is no interval between the non-zero elements in the element value array. The compression process of obtaining the element value array may include: compressing the non-zero elements in submatrix 1 in the column direction (when there are full element columns in the submatrix, the full zero element column can be compressed as a whole), and then zero-filling is performed according to the maximum column length after compression, so as to obtain the element value array corresponding to the submatrix. The compression process of the element value arrays of the remaining submatrices is the same, and will not be repeated here.

[0157] The subscript data of submatrix 1 includes a displacement value pair, an index array, and an index vector of submatrix 1.

[0158] Among them, the value of the element in the index array of submatrix 1 and the row offset of submatrix 1 are used to indicate the original row number of the corresponding element in the element value array of submatrix 1. Specifically, as shown in Formula 3: the original row number of any element (recorded as the first element) in the element value array of submatrix 1 = the column offset of submatrix 1 + the value of the element corresponding to the first element in the index array of submatrix 1 (recorded as the second element). In simple terms, the original row number of a non-zero element = row offset + the value of the corresponding element in the index array.

[0159] Based on Formula 3, the value of any element in the index array of submatrix 1 = the original row number of the corresponding (position) element in the element value array of submatrix 1 - the row offset of submatrix 1. For example, see Fig.13 For example, the original row number of the element at position (0,1) in the element value array of submatrix 1 is 4, and the row offset of submatrix 1 is 0, then the value of the element at position (0,1) in the index array of submatrix 1 = 4-0 = 4. For another example, the original row number of the element at position (3,2) in the element value array of submatrix 1 is 7, and the row offset of submatrix 1 is 0, then the value of the element at position (3,2) in the index array of submatrix 1 = 7-0 = 7. For another example, the original row number of the element at position (5,5) in the element value array of submatrix 1 is 12, and the row offset of submatrix 1 is 0, then the value of the element at position (5.5) in the index array of submatrix 1 = 12-0 = 12. And so on.

[0160] The value of the element in the index vector of submatrix 1 and the column offset of submatrix 1 are used to indicate the original column number of the corresponding element in the element value array of submatrix 1. Specifically, as shown in Formula 4: the original column number of any element (recorded as the first element) in the element value array of submatrix 1 = the row offset of submatrix 1 + the value of the element corresponding to the first element (such as the second element) in the index vector of submatrix 1. In short, the original column number of a non-zero element = the column offset + the value of the corresponding element in the index vector.

[0161] Based on Formula 4, the value of any element in the index vector of submatrix 1 = the original column number of the corresponding row element in the element value array of submatrix 1 - the column offset of submatrix 1. The index vector can be a 1×m matrix, or an m×1 matrix. For example, see Fig.13 , assuming that the index vector of submatrix 1 is a 1×m matrix, for example: y = [y 0 y 1 …y m-1 ], m = the number of columns of the element value array of the submatrix. For example, the original column number of the 0th column element in the element value array of submatrix 1 is 0, and the column offset of submatrix 1 is 0. Then the 0th column element in the index vector of submatrix 1 (such as y 0) is 0-0=0. For another example, if the original column number of the first column element in the element value array of submatrix 1 is 1, then the first column element in the index vector of submatrix 1 (such as y 1 ) is 1-0=1. And so on. When submatrix 1 does not include a column of all zero elements, the value of the element in the index vector of submatrix 1 is the original column number of the corresponding row element in the element value array.

[0162] The above introduces two compression methods in compression direction. This application does not limit each matrix to use row compression or column compression. In practical applications, it can be determined whether to use row compression or column compression according to the needs of matrix multiplication operations. For example, the left matrix of sparse matrix multiplication (SpGEMM) (referring to one of the two matrices to be multiplied in SpGEMM) can use row compression, and the right matrix (referring to the other matrix of the two matrices to be multiplied in SpGEMM) can be stored using column compression, so as to achieve better locality and is also suitable for use in GPU and vector processor architectures.

[0163] It should be noted that the present application may also compress different sub-matrices of an original matrix in different directions, but generally, to improve processing efficiency, in step 903, the compression method of each sub-matrix may be the same, if in the row direction, then each sub-matrix of an original matrix is ​​compressed in the row direction. If in the column direction, then each sub-matrix of an original matrix is ​​compressed in the column direction.

[0164] It should also be noted that steps 901 to 903 are optional steps and are not steps that must be performed. For example, the computing device 800 may also obtain compressed data corresponding to each sub-matrix from other devices.

[0165] Step 904: for each sub-matrix, the arrays (such as element value arrays and index arrays) in the compressed data are respectively 2 ×N 2 The sub-blocks are used as units for tiling to obtain multiple small blocks corresponding to each sub-matrix.

[0166] Taking a sub-matrix as an example, the process of cutting the compressed data of the sub-matrix into small blocks may include: the element value array of the sub-matrix = with a size of M 2 ×N 2 The sub-block is cut into small blocks to obtain multiple small blocks (recorded as the second sub-block). The index array of the sub-matrix is ​​M in size. 2 ×N 2 The sub-block is cut into small blocks to obtain multiple small blocks (recorded as the third sub-block). 2 Not greater than M 1 A positive integer, N 2 is not greater than N1 A positive integer, M 2 ×N 2 Less than M 1 ×N 1 In one case, M 2 Take less than M 1 A positive integer, N 2 Take no more than N 1 A positive integer, or M 2 Take no more than M 1 A positive integer, N 2 Take less than N 1 A positive integer, that is, the size of the sub-block is usually smaller than the size of the element value array or the index array.

[0167] by Fig.12 Take the element value array shown as an example, Fig.14 A schematic diagram of cutting the element value array of each sub-matrix into small blocks provided in an embodiment of the present application, Fig.14 In the example, the sub-block size is M 2 ×N 2 =2×2, such as Fig.14 As shown, the processor 801 can cut each element value array into small blocks of 2×2 size in the row direction, so that each element value array is cut into multiple small blocks, and each small block has the same size (such as Fig.14 The size of the array is 2×2) and they do not overlap. Optionally, when the last element in the row or column direction of the element value array is less than 2×2, zero padding is performed to make it 2×2. For example, see Fig.14 At the bottom of the element value array of block2, tile22 is a small tile filled with zeros, wherein the zero-filled elements in the small tile are shown by the dotted box.

[0168] Similarly, processor 801 uses M as the index array of the sub-matrix. 2 ×N 2 The index array is cut into small blocks by sub-blocks to obtain multiple small blocks of the index array, each of which has the same size and does not overlap. For the effect of cutting the index array into small blocks, see Fig.14 The effect of cutting the element value array of the submatrix into small pieces is shown and will not be described in detail here.

[0169] Please understand, Fig.14The 2×2 sub-block size shown is for illustration only. The embodiment of the present application does not limit the sub-block size used for cutting into small blocks. The present embodiment also provides a method for determining the sub-block size, such as determining it according to the data bit width of a matrix operator such as a vector processor or a matrix accelerator. For example, if the length of the vector processor is 2, then it can be cut into small blocks based on 2×2 sub-blocks. For another example, if the length of the vector processor is 4, then it can be cut into small blocks based on 4*4 sub-blocks to adapt to the data bit width of the matrix operator. This is only an example of determining the sub-block size. The present embodiment can also apply other methods to determine the sub-block size in this step, and there is no specific limitation.

[0170] It should be noted that the above Figure 11-Figure 14 The element value array and index array shown are shown as examples of compression processing including zero padding. The compression processing in the embodiment of the present application may also not include zero padding, such as the element value array and the index array do not include zero elements, such as removing Figure 11-Figure 15 Remove the zero elements in the element value array and the index array, and then fill the small blocks with zeros when cutting the element value array and the index array without the zero elements into small blocks.

[0171] Step 905, with M 2 ×N 2 The sub-blocks are used as storage units, and the data of the small blocks corresponding to each sub-matrix are stored in the specified order.

[0172] Specifically, step 905 includes storing the element value array and subscript data of each submatrix, wherein when storing the element value array and the index array, M is used as the subscript data. 2 ×N 2 The sub-blocks are used as storage units, and the small blocks of data corresponding to each storage element value array and index array are stored in the specified order.

[0173] This embodiment provides multiple ways of storing small blocks:

[0174] Storage method 1:

[0175] by Fig.14 Taking the element value array shown as an example, this embodiment can select small blocks according to the row order. For example, in one implementation, for each small block included in multiple element value arrays belonging to the same sparse matrix, the sub-blocks are selected in sequence according to the row order between the small blocks. Optionally, the small blocks with all zero elements can be eliminated, that is, the small blocks with all zero elements are not stored, which will not be repeated below. Fig.15As shown, the order of selecting small blocks can be: tile00, tile01, tile02, tile10, tile11, tile12, tile13, tile20, tile21, tile22, tile30, tile31, tile40, ..., tile70, tile80, tile81, tile82, tile90, tile91, ..., tile121.

[0176] For each selected small block, the data of each small block is stored sequentially. For example, according to the selection order of the small blocks mentioned above, for tile00, the elements (0,0), element (0,1), element (1,0), and element (1,1) of tile00 are stored sequentially. Then, the elements (0,0), element (0,1), element (1,0), and element (1,1) of tile01 are stored sequentially. Then, the elements (0,0), element (0,1), element (1,0), and element (1,1) of tile02 are stored sequentially. Then, the elements (0,0), element (0,1), element (1,0), and element (1,1) of tile10 are stored sequentially, and so on.

[0177] In another embodiment, a sub-matrix is ​​taken as an object, and the small blocks corresponding to each sub-matrix are sequentially stored in row order. For example, Fig.15 First, the small blocks corresponding to submatrix 1 are stored, then the small blocks corresponding to submatrix 2 are stored, then the small blocks corresponding to submatrix 3 are stored, and finally the small blocks corresponding to submatrix 4 are stored. The small blocks in each submatrix can be stored sequentially or in parallel. In short, the small blocks in each submatrix are stored continuously, and the multiple small blocks corresponding to each submatrix can be selected according to the row order. Fig.15 , the selection order of small blocks can be: tile00, tile01, tile10, tile11, ..., tile70, tile02, tile12, tile13, tile22, tile80, tile81, tile90, ..., tile120, tile121, tile82, ..., tile91. Similarly, for each selected small block, the value of the element of each small block is stored in sequence. Please refer to the above related introduction, which will not be repeated here.

[0178] The small blocks corresponding to the index array are stored in the above manner. For ease of explanation, the small blocks corresponding to the element value data are recorded as the second sub-block, and the small blocks corresponding to the index array are recorded as the third small blocks.

[0179] In the present application, a plurality of second sub-blocks corresponding to a sub-matrix and a plurality of third sub-blocks have a mapping relationship, in which the plurality of second sub-blocks corresponding to the sub-matrix and the plurality of third sub-blocks correspond one-to-one, and the one-to-one correspondence means that two sub-blocks at the same position correspond to each other. For example, the second sub-block at row 0 and column 0 in the element value array of sub-matrix 1 (e.g. Fig.14 The third sub-block (tile00 in the index array of sub-matrix 1) at row 0 and column 0 Fig.14 Not shown, as noted as tile00'), the second sub-block (such as tile01) at the 0th row and 1st column in the element value array in submatrix 1 corresponds to the third sub-block (such as tile01') at the 0th row and 1st column in the array of blocks of submatrix 1, the second sub-block (such as tile10) at the 1st row and 0th column in the element value array corresponds to the third sub-block (such as tile10') at the 1st row and 0th column in the array of blocks of submatrix 1, and so on.

[0180] Further, the embodiment of the present application provides two methods, method 1: the second sub-block and the third sub-block are stored independently, for example, multiple second sub-blocks are stored in a storage space A, and multiple third sub-blocks are stored in a storage space B. According to the order of selecting the second sub-blocks in the above text, the arrangement order of the multiple second sub-blocks in the storage space A can be: tile00, tile01, tile02, tile10, tile11, tile12, tile13, tile20, tile21, tile22, tile30, tile31, tile40, ..., tile70, tile80, tile81, tile82, tile90, tile91, ..., tile121. The selection order of the third sub-blocks may be the same as the selection order of the second sub-blocks. For example, in storage space B, the arrangement order of multiple third sub-blocks may be: tile00', tile01', tile02', tile10', tile11', tile12', tile13', tile20', tile21', tile22', tile30', tile31', tile40', ..., tile70', tile80', tile81', tile82', tile90', tile91', ..., tile121'.

[0181] Method 2: The second sub-block and the third sub-block are stored alternately. For example, a second sub-block and a third sub-block corresponding to the second sub-block are taken as a storage object. The order of selecting the second sub-block mentioned above can be referred to, and the selected second sub-block and the third sub-block corresponding to the second sub-block are stored in sequence. For example, a storage order can be: tile00, tile00', tile01, tile01', tile02, tile02', tile10, tile10', tile11, tile11', tile12, tile12', and so on.

[0182] Specifically, taking computing device 800 as an example, the storage location of the above data can be memory 802, or a storage device outside computing device 800, or part of the data can be stored in memory 802 and the rest of the data can be stored in a storage device outside computing device 800, without specific limitation.

[0183] In the embodiment of the present application, based on the second sub-block and the third sub-block corresponding to the second sub-block, the displacement value pair of the sub-matrix and the index vector of the sub-matrix, the value of the corresponding element in the original matrix and the original subscript of the element can be restored.

[0184] Storage method 2:

[0185] Still Fig.14 Taking the element value array shown as an example, this embodiment can select the second sub-block according to the column order. For example, in one implementation, for each small block included in multiple element value arrays belonging to the same sparse matrix, the sub-blocks are selected sequentially according to the column order between the small blocks. Optionally, the small blocks with all zero elements can be eliminated, that is, the small blocks with all zero elements are not stored, which will not be repeated below. Fig.16 As shown, the order of selecting small blocks can be: tile00, tile10, tile20, tile30, tile40, tile50, tile60, tile70, tile80, tile90, tile100, tile110, tile120, tile01, tile11, tile21, tile31, ..., tile81, tile91, tile101, ..., tile121, tile02, tile12, tile22, tile82, tile91, tile13, tile83, tile84.

[0186] Similarly, in another implementation, a submatrix is ​​taken as an object, and the small blocks corresponding to each submatrix are sequentially stored in column order, as described above, and will not be repeated here. Regardless of the selection method, for each selected small block, the data of each small block is sequentially stored, as described above, and will not be repeated here.

[0187] The small blocks corresponding to the index array are stored sequentially in the above manner. The small blocks corresponding to the element value array and the small blocks corresponding to the index array can be stored serially or in parallel.

[0188] Through the above design, the original matrix is ​​cut into blocks, and each sub-matrix obtained after the cutting is compressed to obtain compressed data of each sub-matrix, and the element value array and index data in the compressed data are cut into small blocks to obtain multiple second sub-blocks, and multiple second sub-blocks are stored with the second sub-block as the storage unit. In the present application, the first sub-block is cut into multiple second sub-blocks, and the second sub-blocks of all zeros can be completely deleted. In this way, it can adapt to sparse matrices of arbitrary distribution, and a high compression rate can be maintained under any sparse matrix.

[0189] In addition, the present application can be used in conjunction with the data bit width of a dedicated hardware accelerator (such as a vector processor or a matrix processor, etc.) to cut into small blocks. For example, if the data bit width of the hardware accelerator is n, the first sub-block can be cut into small blocks according to the size of n×n sub-blocks, and the cut small blocks (i.e., the second sub-blocks) are used as storage units, and then stored in the row direction or column direction of the small blocks, which is convenient for memory access. At least one complete second sub-block can be read out in one data access, reducing the number of memory accesses during sparse matrix calculations. Since the lengths of all rows and columns of the second sub-block are consistent, it can provide a data access method that is more friendly to vector processors or matrix processors, and can achieve better locality for row-order or column-order accesses. It can be adapted to dedicated hardware accelerators with higher efficiency, which is conducive to improving the parallelism of sparse matrix calculations. On the one hand, one memory access can read multiple complete second sub-blocks, and the multiple second sub-blocks can be calculated in parallel by multiple dedicated hardware accelerators, which can improve multi-core parallelism. On the other hand, since a second sub-block can provide a dedicated hardware accelerator with sufficient data volume, it is more suitable for a dedicated hardware accelerator to accelerate calculations, which is beneficial to improving the intra-core parallelism of a single dedicated accelerator. For example, taking an nxn small block as a unit, such as n=16, that is, the small block size is 16x16, for a sparse matrix sparse matrix multiplication operation, assuming a 16x16 second sub-block A×16x16 second sub-block B, the present application can realize reading 16 groups of vectors of the second sub-block A and 16 groups of vectors of the second sub-block B through a vector instruction, and the vectors are aligned after being read out. The dedicated hardware accelerator can complete 256 16×1 vector inner product calculations in one shot. In this way, the dedicated hardware accelerator can reach a parallelism of 256, and the performance can be greatly improved.

[0190] In summary, the storage method provided in the embodiments of the present application can improve data locality, improve data compression rate, and enhance the parallelism of matrix calculations.

[0191] It is worth noting that the above is introduced using sparse matrices as an example. The original matrix in the embodiment of the present application can also be a dense matrix, that is, the dense matrix is ​​also suitable for the data format and storage method provided in this embodiment. In this way, the format can be unified and the calculation between sparse matrices and dense matrices can be accelerated, such as the multiplication of sparse matrices and dense vectors, sparse matrices and sparse vectors, sparse matrices and dense matrices, and sparse matrices and sparse matrices. This can widely improve the matrix compression rate, matrix operation parallelism and data locality in various scenarios.

[0192] Based on the same inventive concept as the method embodiment, the present application embodiment also provides a matrix storage device, which is used to perform the above Fig. 9 The method of the method embodiment. Fig.17 As shown, the device 1700 includes an acquisition module 1701, a processing module 1702, and a storage module 1703. Specifically, in the device 1700, each module is connected through a communication path. In an application scenario, the memory 802 stores an executable program code, and the processor 801 executes the executable program code to respectively implement the functions of the acquisition module 1701, the processing module 1702, and the storage module 1703, thereby implementing the matrix storage method provided in this embodiment.

[0193] The acquisition module 1701 is used to acquire a plurality of first sub-blocks corresponding to the original matrix, wherein the plurality of first sub-blocks are obtained by converting the original matrix into a matrix with a size of M. 1 ×N 1 The non-zero elements in each sub-matrix obtained after the slicing are compressed in the specified direction, where M 1 、N 1 is a positive integer; see Fig. 9 The description of steps 901 to 903 in the method embodiment will not be repeated here.

[0194] The processing module 1702 is used to process each first sub-block with a size of M 2 ×N 2 The blocks are cut into units of M to obtain multiple second sub-blocks, where M 2 Not greater than M 1 A positive integer, N 2 is not greater than N 1 A positive integer; see Fig. 9 The description of step 904 in the method embodiment will not be repeated here.

[0195] Storage module 1703 is used to sequentially store the values ​​of the elements in each second sub-block. Fig. 9 The description of step 905 in the method embodiment will not be repeated here.

[0196] In a possible implementation manner, the specified direction is a row direction;

[0197] The acquisition module 1701 is also used to obtain the subscript data of each first sub-block, and the subscript data is used to indicate the position of each element in the first sub-block in the original matrix; wherein the subscript data of each first sub-block includes a displacement value pair, an index matrix, and an index vector corresponding to the first sub-block; wherein the displacement value pair includes a first displacement value and a second displacement value, the first displacement value is used to indicate a first offset of the first row of the first sub-block relative to the starting row of the original matrix, and the second displacement value is used to indicate a second offset of the first column of the first sub-block relative to the starting column of the original matrix; the value of any element in the index matrix is ​​equal to the difference between the column number of the element corresponding to the element in the original matrix corresponding to the first sub-block and the second offset; the value of any element in the index vector is used to indicate the difference between the row number of the element corresponding to the element in the original matrix corresponding to the first sub-block and the first offset.

[0198] In a possible implementation manner, the specified direction is a column direction;

[0199] The acquisition module 1701 is also used to generate subscript data for each first sub-block, and the subscript data is used to indicate the position of each element in the first sub-block in the original matrix; wherein the subscript data for each first sub-block includes a displacement value pair, an index matrix, and an index vector corresponding to the first sub-block. The displacement value pair includes a first displacement value and a second displacement value, wherein the first displacement value is used to indicate the first offset of the first row of the first sub-block relative to the starting row of the original matrix, and the second displacement value is used to indicate the second offset of the first column of the first sub-block relative to the starting column of the original matrix; the value of any element in the index matrix is ​​equal to the difference between the row number of the element corresponding to the element in the original matrix corresponding to the first sub-block and the first offset; the value of any element in the index vector is used to indicate the difference between the column number of the element corresponding to the element in the original matrix corresponding to the first sub-block and the second offset.

[0200] In a possible implementation, the processing module 1702 is further configured to: perform a multiplication of the index matrix corresponding to each first sub-block with a size of M. 2 ×N 2 The storage module 1703 is further used to sequentially store the values ​​of the elements in each third sub-block.

[0201] In one possible implementation, for each first sub-block, multiple second sub-blocks obtained based on the first sub-block correspond one-to-one to multiple third sub-blocks obtained based on the index matrix corresponding to the first sub-block; and the order of storing the third sub-blocks is the same as the order of storing the second sub-blocks.

[0202] In one possible implementation, when the storage module 1703 sequentially stores the values ​​of the elements in each second sub-block, it is specifically used to: select each second sub-block by row or by column, and store the values ​​of the elements in each selected second sub-block by row, or, store the values ​​of the elements in each selected second sub-block by column.

[0203] In a possible implementation, each stored second sub-block includes at least one non-zero element; before sequentially storing the values ​​of the elements in each second sub-block, the storage module 1703 is further configured to: eliminate the second sub-block including all zero elements.

[0204] The present application also provides a computer program product including instructions. The computer program product may be a software or program product including instructions that can be run on a computing device or stored in any available medium. When the computer program product is run on at least one computing device, the at least one computing device executes the above Fig. 9 For the method of the embodiment, please refer to the relevant description above and will not be repeated here.

[0205] The present application also provides a computer-readable storage medium. The computer-readable storage medium may be any available medium that can be stored by a computing device or a data storage device that includes one or more available media. The available medium may be a magnetic medium (e.g., a floppy disk, a hard disk, a tape), an optical medium (e.g., a DVD), or a semiconductor medium (e.g., a solid-state hard disk). The computer-readable storage medium includes instructions that instruct the computing device to perform the above Fig. 9 The method implemented in the embodiment has been described above and will not be described again here.

[0206] Optionally, the computer-executable instructions in the embodiments of the present application may also be referred to as application code, which is not specifically limited in the embodiments of the present application.

[0207] Those of ordinary skill in the art will appreciate that the various digital numbers such as the first and second involved in this application are only for the convenience of description, and are not used to limit the scope of the embodiments of this application, and also represent the order of precedence. "And / or" describes the association relationship of the associated objects, indicating that there may be three relationships, for example, A and / or B, which can represent: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the associated objects before and after are in an "or" relationship. "At least one" refers to one or more. At least two refers to two or more. "At least one", "any one" or similar expressions refer to any combination of these items, including any combination of single items (individuals) or plural items (individuals). For example, at least one item (individuals, kinds) of a, b, or c can represent: a, b, c, ab, ac, bc, or abc, where a, b, c can be single or multiple. "Multiple" refers to two or more, and other quantifiers are similar. In addition, when the singular forms “a,” “an,” and “the” appear, they do not mean “one or only one,” but rather “one or more than one,” unless the context clearly dictates otherwise. For example, “a device” means one or more of such devices.

[0208] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware or any combination thereof. When implemented using software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the process or function described in the embodiment of the present application is generated in whole or in part. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions may be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, the computer instructions may be transmitted from a website site, computer, server or data center by wired (e.g., coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) mode to another website site, computer, server or data center. The computer-readable storage medium may be any available medium that a computer can access or a data storage device such as a server, data center, etc. that includes one or more available media integrated. The available medium may be a magnetic medium, (e.g., a floppy disk, a hard disk, a tape), an optical medium (e.g., a DVD), or a semiconductor medium (e.g., a solid-state drive (SSD)), etc.

[0209] The various illustrative logic units and circuits described in the embodiments of the present application can be implemented or operated by a general-purpose processor, a digital signal processor, an application-specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, a discrete gate or transistor logic, a discrete hardware component, or the design of any combination of the above functions. The general-purpose processor can be a microprocessor, and optionally, the general-purpose processor can also be any traditional processor, controller, microcontroller or state machine. The processor can also be implemented by a combination of computing devices, such as a digital signal processor and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a digital signal processor core, or any other similar configuration to implement.

[0210] The steps of the method or algorithm described in the embodiments of the present application can be directly embedded in the software unit executed by the hardware, the processor, or a combination of the two. The software unit can be stored in a RAM memory, a flash memory, a ROM memory, an EPROM memory, an EEPROM memory, a register, a hard disk, a removable disk, a CD-ROM or other storage media of any form in the art. Exemplarily, the storage medium can be connected to the processor so that the processor can read information from the storage medium and can write information to the storage medium. Alternatively, the storage medium can also be integrated into the processor. The processor and the storage medium can be arranged in an ASIC.

[0211] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0212] Although the present application has been described in conjunction with specific features and embodiments thereof, it is obvious that various modifications and combinations may be made thereto without departing from the spirit and scope of the present application. Accordingly, this specification and the drawings are merely exemplary illustrations of the present application as defined by the appended claims, and are deemed to have covered any and all modifications, variations, combinations or equivalents within the scope of the present application. Obviously, a person skilled in the art may make various modifications and variations to the present application without departing from the scope of the present application. Thus, if these modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is also intended to include these modifications and variations.

Claims

1. A matrix storage method, characterized in that: include: The original matrix is ​​cut into blocks of size M1×N1 to obtain a plurality of first sub-blocks, and the non-zero elements in each sub-block obtained after the cutting are compressed in a specified direction, where M1 and N1 are positive integers; Each first sub-block is cut into sub-blocks of a size of M2×N2 to obtain a plurality of second sub-blocks, wherein M2 is a positive integer not greater than M1, and N2 is a positive integer not greater than N1; The second sub-block is used as a storage unit to store the value of the element in each second sub-block.

2. The method according to claim 1, characterized in that The specified direction is a row direction; The method further comprises: Obtaining subscript data of each first sub-block, where the subscript data is used to indicate a position of each element in the first sub-block in the original matrix; The subscript data of each first sub-block includes a displacement value pair, an index matrix, and an index vector corresponding to the first sub-block; the displacement value pair includes a first displacement value and a second displacement value, the first displacement value is used to indicate a first offset of the first row of the first sub-block relative to the starting row of the original matrix, and the second displacement value is used to indicate a second offset of the first column of the first sub-block relative to the starting column of the original matrix; the value of any element in the index matrix is ​​equal to the difference between the column number of the element corresponding to the element in the original matrix corresponding to the first sub-block and the second offset; the value of any element in the index vector is used to indicate the difference between the row number of the element corresponding to the element in the original matrix corresponding to the first sub-block and the first offset.

3. The method according to claim 1, characterized in that The specified direction is a column direction; The method further comprises: Obtaining subscript data of each first sub-block, where the subscript data is used to indicate a position of each element in the first sub-block in the original matrix; The subscript data of each first sub-block includes a displacement value pair, an index matrix, and an index vector corresponding to the first sub-block. The displacement value pair includes a first displacement value and a second displacement value, wherein the first displacement value is used to indicate a first offset of the first row of the first sub-block relative to the starting row of the original matrix, and the second displacement value is used to indicate a second offset of the first column of the first sub-block relative to the starting column of the original matrix; the value of any element in the index matrix is ​​equal to the difference between the row number of the element corresponding to the element in the original matrix corresponding to the first sub-block and the first offset; the value of any element in the index vector is used to indicate the difference between the column number of the element corresponding to the element in the original matrix corresponding to the first sub-block and the second offset.

4. The method according to claim 2 or 3, characterized in that The method further comprises: The index matrix corresponding to each first sub-block is cut into blocks in units of sub-blocks of a size of M2×N2 to obtain a plurality of third sub-blocks; The values ​​of the elements within each third sub-block are stored sequentially.

5. The method according to claim 4, characterized in that For each first sub-block, a plurality of second sub-blocks obtained based on the first sub-block correspond one-to-one to a plurality of third sub-blocks obtained based on the index matrix corresponding to the first sub-block; The storage order of the third sub-block is the same as the storage order of the second sub-block.

6. The method according to any one of claims 1 to 5, characterized in that: The values ​​of the elements in each second sub-block are stored, including: Each second sub-block is selected by row or by column, and the values ​​of the elements in each selected second sub-block are stored by row, or the values ​​of the elements in each selected second sub-block are stored by column.

7. The method according to any one of claims 1 to 6, characterized in that: Each stored second sub-block includes at least one non-zero element.

8. A matrix storage device, characterized in that: The matrix calculation device includes an acquisition module, a processing module, and a storage module: The acquisition module is used to slice the original matrix into sub-blocks of size M1×N1 to obtain a plurality of first sub-blocks, and compress the non-zero elements in each sub-block obtained after the slicing in a specified direction, wherein M1 and N1 are positive integers; The processing module is used to cut each first sub-block into sub-blocks of a size of M2×N2 to obtain a plurality of second sub-blocks, wherein M2 is a positive integer not greater than M1, and N2 is a positive integer not greater than N1; The storage module is used to sequentially store the values ​​of the elements in each second sub-block.

9. The device according to claim 8, characterized in that The specified direction is a row direction; The acquisition module is further used to acquire subscript data of each first sub-block, where the subscript data is used to indicate the position of each element in the first sub-block in the original matrix; The subscript data of each first sub-block includes a displacement value pair, an index matrix, and an index vector corresponding to the first sub-block; the displacement value pair includes a first displacement value and a second displacement value, the first displacement value is used to indicate a first offset of the first row of the first sub-block relative to the starting row of the original matrix, and the second displacement value is used to indicate a second offset of the first column of the first sub-block relative to the starting column of the original matrix; the value of any element in the index matrix is ​​equal to the difference between the column number of the element corresponding to the element in the original matrix corresponding to the first sub-block and the second offset; the value of any element in the index vector is used to indicate the difference between the row number of the element corresponding to the element in the original matrix corresponding to the first sub-block and the first offset.

10. The device according to claim 8, characterized in that The specified direction is a column direction; The acquisition module is further used to generate subscript data for each first sub-block, where the subscript data is used to indicate the position of each element in the first sub-block in the original matrix; The subscript data of each first sub-block includes a displacement value pair, an index matrix, and an index vector corresponding to the first sub-block. The displacement value pair includes a first displacement value and a second displacement value, wherein the first displacement value is used to indicate a first offset of the first row of the first sub-block relative to the starting row of the original matrix, and the second displacement value is used to indicate a second offset of the first column of the first sub-block relative to the starting column of the original matrix; the value of any element in the index matrix is ​​equal to the difference between the row number of the element corresponding to the element in the original matrix corresponding to the first sub-block and the first offset; the value of any element in the index vector is used to indicate the difference between the column number of the element corresponding to the element in the original matrix corresponding to the first sub-block and the second offset.

11. The device according to claim 8 or 9, characterized in that The processing module is further used for: slicing the index matrix corresponding to each first sub-block into sub-blocks of a size of M2×N2 to obtain a plurality of third sub-blocks; The storage module is further used for sequentially storing values ​​of elements in each third sub-block.

12. The device according to claim 11, characterized in that For each first sub-block, multiple second sub-blocks obtained based on the first sub-block correspond one-to-one to multiple third sub-blocks obtained based on the index matrix corresponding to the first sub-block; the order of storing the third sub-blocks is the same as the order of storing the second sub-blocks.

13. The device according to any one of claims 8 to 12, characterized in that: When sequentially storing the values ​​of the elements in each second sub-block, the storage module is specifically used to: select each second sub-block by row or by column, and store the values ​​of the elements in each selected second sub-block by row, or store the values ​​of the elements in each selected second sub-block by column.

14. The device according to any one of claims 8 to 13, characterized in that Each stored second sub-block includes at least one non-zero element.

15. A computing device, characterized in that: The device includes a processor and a memory; The memory is used to store computer program instructions; The processor executes and calls the computer program instructions in the memory to perform the method according to any one of claims 1 to 8.

16. A computer-readable storage medium, characterized in that: When the computer-readable storage medium is executed by a storage device, the storage device executes the method according to any one of claims 1 to 8.

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