Basic input and output system updating method and device, electronic equipment and storage medium

Abstract

The invention provides a basic input and output system updating method and device, electronic equipment and a storage medium, and belongs to the technical field of computers.The method comprises the steps that a first flash memory block indicated by a start flag bit is determined, and a flash memory chip comprises the first flash memory block, a second flash memory block and the start flag bit; mirror image codes are stored in the first flash memory block and the second flash memory block, and the start flag bit is used for indicating the read flash memory block when the basic input and output system runs; updating the mirror image code in the second flash memory block based on a received updating instruction; and after the mirror image code in the second flash memory block is updated, updating the flash memory block indicated by the start flag bit into the second flash memory block. The basic input and output system updating method provided by the invention solves the technical problem of low stability of the basic input and output system in the updating process in the basic input and output system updating method in the related technology.

Description

Technical Field

[0001] The present invention relates to the field of computer technology, and in particular to a basic input and output system updating method, device, electronic equipment and storage medium. Background Art

[0002] The Basic Input / Output System (BIOS) is responsible for basic functions such as hardware initialization and self-test, system management and configuration, power management, and boot device selection. The BIOS is stored in a flash memory chip. If the server loses power during the BIOS update process, the integrity of the BIOS image file in the flash memory chip will be destroyed, making the system unable to boot normally.

[0003] It can be seen that the basic input and output system updating method in the related art has the technical problem of low stability of the basic input and output system during the updating process. Summary of the invention

[0004] The present invention provides a basic input-output system updating method, device, electronic device and storage medium, which are used to solve the technical problem that the basic input-output system updating method in the related art has low stability during the updating process.

[0005] The present invention provides a basic input / output system update method, wherein the mirror code of the basic input / output system is stored in a flash memory chip, and the method comprises the following steps: determining a first flash memory block indicated by a startup flag, wherein the flash memory chip comprises the first flash memory block, a second flash memory block and the startup flag, the first flash memory block and the second flash memory block both store the mirror code, and the startup flag is used to indicate the flash memory block read when the basic input / output system is running; updating the mirror code in the second flash memory block based on a received update instruction; and after the mirror code in the second flash memory block is updated, updating the flash memory block indicated by the startup flag to the second flash memory block.

[0006] According to a basic input / output system update method provided by the present invention, before determining the first flash memory block indicated by the startup flag, the method also includes: when the central processing unit is in a power-on startup state, controlling a complex programmable logic device to map the addressing address of the central processing unit on the first flash memory block; and controlling the central processing unit to run the mirror code in the first flash memory block.

[0007] According to a basic input / output system update method provided by the present invention, when the central processing unit is in a power-on startup state, before controlling the complex programmable logic device to map the addressing address of the central processing unit on the first flash memory block, the method also includes: when the system power-on pin is in a high level state, determining that the central processing unit is in the power-on startup state.

[0008] According to a basic input / output system update method provided by the present invention, before determining the first flash memory block indicated by the startup flag, the method further includes: logically partitioning the storage space of the flash memory chip to obtain the first flash memory block and the second flash memory block.

[0009] According to a basic input / output system update method provided by the present invention, after the mirror code in the second flash memory block is updated based on the received update instruction, the method further includes: judging whether the mirror code in the second flash memory block is updated successfully; if the mirror code in the second flash memory block fails to be updated, judging whether the central processing unit is in the power-on startup state; if the central processing unit is in the power-on startup state, performing a mirror code refresh step on the second flash memory block to obtain a refreshed second flash memory block, wherein the mirror code refresh step at least includes the following steps: a data erasing step, a mirror code data flashing step and a data verification step; if the central processing unit is not in the power-on startup state, marking the second flash memory block as a flash memory block to be refreshed, and the flash memory block indicated by the startup flag bit remains unchanged.

[0010] According to a basic input / output system update method provided by the present invention, when the central processing unit is not in the power-on startup state, after marking the second flash memory block as a flash memory block to be refreshed, the method further includes: judging whether the central processing unit has entered the power-on startup state; and when the central processing unit has entered the power-on startup state, executing the mirror code refresh step on the flash memory block to be refreshed.

[0011] According to a basic input / output system update method provided by the present invention, the updating of the mirror code in the second flash memory block based on the received update instruction includes: obtaining an update file, wherein the update file corresponds to the update instruction; erasing the mirror code in the second flash memory block; loading the update file, and writing the mirror code corresponding to the update file into the second flash memory block.

[0012] The present invention also provides a basic input / output system updating device, wherein the mirror code of the basic input / output system is stored in a flash memory chip, and the device comprises the following modules: a determining module, used to determine a first flash memory block indicated by a startup flag, wherein the flash memory chip comprises the first flash memory block, a second flash memory block and the startup flag, the first flash memory block and the second flash memory block both store the mirror code, and the startup flag is used to indicate the flash memory block read when the basic input / output system is running; an updating module, used to update the mirror code in the second flash memory block based on a received update instruction; and an executing module, used to update the flash memory block indicated by the startup flag to the second flash memory block after the mirror code in the second flash memory block is updated.

[0013] The present invention also provides an electronic device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the program, any one of the basic input / output system updating methods described above is implemented.

[0014] The present invention also provides a non-transitory computer-readable storage medium on which a computer program is stored. When the computer program is executed by a processor, the basic input and output system updating method described in any one of the above is implemented.

[0015] The present invention also provides a computer program product, comprising a computer program, wherein when the computer program is executed by a processor, the basic input and output system updating method described above is implemented.

[0016] The basic input-output system update method, device, electronic device and storage medium provided by the present invention store the mirror code of the basic input-output system in a flash memory chip; determine the first flash memory block indicated by the startup flag, wherein the flash memory chip includes a first flash memory block, a second flash memory block and a startup flag, the first flash memory block and the second flash memory block both store the mirror code, and the startup flag is used to indicate the flash memory block read when the basic input-output system is running; update the mirror code in the second flash memory block based on the received update instruction; after the mirror code in the second flash memory block is updated, update the flash memory block indicated by the startup flag to the second flash memory block; when the basic input-output system needs to be updated, Based on the startup flag, the first flash memory block that needs to run the image code is determined, and the second flash memory block is updated. If the update fails, for example, the server is powered off during the update process, the update will not be completed, the integrity of the image in the second flash memory block will be destroyed, and the use of the second flash memory block to run the image code cannot make the system boot and start normally; however, since the flash memory block indicated by the startup flag has not been updated and is still the first flash memory block, the system will use the first flash memory block to run the image code when it is powered on and restarted, and the system can start normally, thereby solving the technical problem of low stability of the basic input and output system during the update process in the basic input and output system update method in the related art. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the technical solutions in the present invention or the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced one by one below. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0018] Figure 1 This is one of the flow charts of the basic input and output system updating method provided by the present invention.

[0019] Figure 2 It is a structural schematic diagram of the flash memory chip provided by the present invention.

[0020] Figure 3 It is a hardware structure diagram of the basic input and output system updating method provided by the present invention.

[0021] Figure 4 This is the second flow chart of the basic input and output system updating method provided by the present invention.

[0022] Figure 5 It is a structural schematic diagram of a basic input and output system updating device provided by the present invention.

[0023] Figure 6It is a structural schematic diagram of the electronic device provided by the present invention. DETAILED DESCRIPTION

[0024] In order to make the purpose, technical solution and advantages of the present invention clearer, the technical solution of the present invention will be clearly and completely described below in conjunction with the drawings of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0025] It should be noted that in the description of the present invention, the terms "include", "comprise" or any other variant thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "include one..." do not exclude the existence of other identical elements in the process, method, article or device including the elements. The orientation or position relationship indicated by the terms "upper", "lower" and the like is based on the orientation or position relationship shown in the drawings, which is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation of the present invention. Unless otherwise clearly specified and limited, the terms "installed", "connected" and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be an indirect connection through an intermediate medium, or it can be a connection between the two elements. For those skilled in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0026] The terms "first", "second", etc. in the present invention are used to distinguish similar objects, and are not used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged under appropriate circumstances, so that the embodiments of the present invention can be implemented in an order other than those illustrated or described herein, and the objects distinguished by "first", "second", etc. are generally of the same type, and the number of objects is not limited. For example, the first object can be one or more. In addition, "and / or" means at least one of the connected objects, and the character " / " generally indicates that the objects associated with each other are in an "or" relationship.

[0027] The master-slave chip technology solution is a common design to improve system stability and reliability, especially in BIOS firmware. The solution usually involves two main components: the master BIOS chip (flash memory chip) and the backup BIOS chip. When the system is upgrading the BIOS firmware, if the flash memory is being erased or a new flash memory is being flashed, a power-off operation will destroy the integrity of the image file in the BIOS chip. If the master BIOS chip is damaged or there is a problem with the firmware, the system can automatically switch to the backup BIOS chip to ensure the reliability and stability of the system.

[0028] In the related art, since the hardware board path is designed with two-way flash memory chips, additional hardware equipment is required, which increases the hardware resource cost of the system design, and the redundant design of the main and standby BIOS flash memory chips increases the complexity of the system, including design, verification, testing and maintenance, which may increase development time and cost and introduce more potential failure points; at the same time, in many cases, it is often necessary to upgrade all firmware at once, including the main and standby firmware. If the server power is off during the BIOS update and upgrade process, the integrity of the BIOS image file in the flash memory chip will be destroyed, causing errors in the basic firmware of the device, making the system unable to start normally.

[0029] In order to at least solve some of the above problems, the following Figure 1-Figure 6 The present invention describes a basic input / output system updating method, device, electronic device and storage medium.

[0030] The basic input output system update method provided in this embodiment can be applied to the scenario of updating the basic input output system. The basic input output system update method in this embodiment can be executed by a server, which includes hardware such as a central processing unit and a flash memory chip, and the image code of the basic input output system is stored in the flash memory chip.

[0031] Figure 1 FIG. 1 is one of the flow charts of the basic input / output system updating method provided by the present invention, such as Figure 1 As shown, the image code of the basic input and output system is stored in the flash memory chip, and the method includes but is not limited to the following steps: Step 101, determine the first flash memory block indicated by the startup flag, wherein the flash memory chip includes a first flash memory block, a second flash memory block and a startup flag, the first flash memory block and the second flash memory block both store mirror codes, and the startup flag is used to indicate the flash memory block read when the basic input and output system is running.

[0032] The BIOS is a set of programs embedded in the flash memory chip on the computer motherboard. It is responsible for performing a series of initialization operations when the computer starts, such as hardware detection, configuration, and booting the operating system. The image code of the BIOS is a binary file representation of the BIOS program. It contains all the instructions and data of the BIOS and can be saved as a file. The image code can be used to update the BIOS. When the BIOS needs to be upgraded, the new image code can be downloaded and written into the flash memory chip of the motherboard through specific tools.

[0033] Figure 2 Schematic diagram of the structure of the flash memory chip provided by the present invention. Figure 2 As shown, the flash memory chip includes a first flash memory block (corresponding to Figure 2 FLASH block 1 in the second flash memory block (corresponding to Figure 2 The FLASH block 2) and the boot flag in the flash memory chip, the flash memory block is the data organization unit inside the flash memory chip, and a flash memory chip is composed of multiple flash memory blocks; the first flash memory block and the second flash memory block both store mirror codes, that is, the mirror codes in the first flash memory block and the second flash memory block can be mapped to the memory for execution by the central processing unit.

[0034] It can be understood that in this embodiment, two logical partitions are designed for the same flash memory chip as mirror storage partitions for the primary and standby BIOS, which can fully utilize the storage space of the redundant flash memory chips in the actual scenario and save one flash memory chip for redundancy, thereby saving hardware resources.

[0035] In this embodiment, the boot flag is used to indicate the flash memory block read when the basic input and output system is running, that is, the boot flag in the flash memory chip is a specific bit used to indicate whether the mirror code of the flash memory block in the chip can be used to start the computer. The boot flag can be set in the master boot sector of the flash memory chip.

[0036] Step 102: Update the mirror code in the second flash memory block based on the received update instruction.

[0037] The update instruction is an instruction obtained by the server for updating the basic input and output system, and the update instruction can be input by the user; the update steps of the mirror code in the second flash memory block can include but are not limited to the following steps: error repair, function enhancement, performance optimization, security update, compatibility update and user interface improvement.

[0038] It is understandable that when the server starts, the basic input and output system needs to call the mirror code in the first flash block. When the basic input and output system needs to be updated, the mirror code in the second flash block can be updated to avoid the mirror code in the first flash block being damaged due to update failure.

[0039] Step 103: After the mirror code in the second flash memory block is updated, the flash memory block indicated by the startup flag is updated to the second flash memory block.

[0040] After the mirror code in the second flash memory block is updated, the flash memory block indicated by the startup flag is updated to the second flash memory block, that is, when the server is powered on next time, the basic input and output system will call the mirror code in the second flash memory block indicated by the startup flag to perform the server initialization operation.

[0041] Through the embodiments provided by the present application, the first flash memory block indicated by the startup flag is determined, wherein the flash memory chip includes a first flash memory block, a second flash memory block and a startup flag, the first flash memory block and the second flash memory block both store mirror codes, and the startup flag is used to indicate the flash memory block read when the basic input and output system is running; the mirror code in the second flash memory block is updated based on the received update instruction; after the mirror code in the second flash memory block is updated, the flash memory block indicated by the startup flag is updated to the second flash memory block; the basic input and output system update method in the related art solves the technical problem of low stability of the basic input and output system during the update process, thereby improving the reliability of the basic input and output system during the update process.

[0042] As an optional solution, before determining the first flash memory block indicated by the startup flag bit, the method further includes: S11, when the central processing unit is in a power-on startup state, controlling the complex programmable logic device to map the addressing address of the central processing unit on the first flash memory block; S12, controlling the central processing unit to run the mirror code in the first flash memory block.

[0043] Figure 3 FIG. 1 is a schematic diagram of the hardware structure of the basic input / output system updating method provided by the present invention. Figure 3 As shown, the hardware structure of the basic input and output system updating method of the present embodiment in the server includes a central processing unit (CPU), a complex programmable logic device (CPLD) and a flash memory chip (corresponding to Figure 3FLASH in the CPU); the CPU is one of the core components of computer hardware, responsible for executing instructions in computer programs and processing data; a complex programmable logic device is a programmable logic device that contains multiple programmable logic modules and macro units and can implement complex logic functions; flash memory chips are used to store program codes run by the CPU, and the CPU reads the image code from the flash memory chip and executes it; complex programmable logic devices can be used to bridge the interface between the CPU and other peripheral devices, and complex programmable logic devices can be used to manage data transmission between the flash memory chip and the CPU.

[0044] When the central processing unit is in a power-on startup state, that is, when the server is powered on, the complex programmable logic device is controlled to map the addressing address of the central processing unit onto the first flash memory block, wherein the addressing address of the central processing unit refers to the address of the mirror code required to run the basic input and output system, and the address points to the firmware boot startup code in the first flash memory block.

[0045] Optionally, the addressing address of the central processing unit is a reset vector address.

[0046] The central processing unit is controlled to call and run the mirror code in the first flash memory block, so that the basic input and output system can correctly initialize the hardware after the server is powered on and help load the operating system.

[0047] Through this embodiment, after the server is powered on, the mirror code in the first flash memory block indicated by the boot flag is called to perform the boot initialization operation, which can improve the stability of the basic input and output system update method.

[0048] As an optional solution, when the central processing unit is in a power-on startup state, before controlling the complex programmable logic device to map the addressing address of the central processing unit on the first flash memory block, the method further includes: S21, when the system power-on pin is in a high level state, it is determined that the central processing unit is in a power-on startup state.

[0049] The system power-on pin (SYS_ON pin) is used to indicate the system power-on or startup status. When the system power-on pin is in a high level state, it is judged that the central processor is in the power-on startup state.

[0050] Specifically, in the design of a complex programmable logic device, a specific signal name, such as sys-on-signal, is assigned to the input corresponding to the SYS_ON pin; the logic of the complex programmable logic device is designed so that when the sys-on-signal detects a high level, the complex programmable logic device can recognize that the central processing unit is being powered on and started.

[0051] Through this embodiment, whether the central processing unit is in a power-on startup state is determined according to the state of the system power-on pin, so that the accuracy of the basic input and output system updating method can be improved.

[0052] As an optional solution, before determining the first flash memory block indicated by the startup flag bit, the method further includes: S31, logically partitioning the storage space of the flash memory chip to obtain a first flash memory block and a second flash memory block.

[0053] The storage space of the flash memory chip is logically partitioned to obtain a first flash memory block and a second flash memory block, and the mirror code of the basic input / output system is stored in the first flash memory block and the second flash memory block; it can be understood that through the steps of this embodiment, one flash memory chip can be used as two logical partitions, and there is no need to use two flash memory chips as the primary and backup mirror storage of the basic input / output system, so that the primary and backup mirror storage functions of the basic input / output system can be realized on one flash memory chip, thereby saving the hardware resources of the flash memory chip.

[0054] Through this embodiment, the hardware resource cost can be effectively saved, the complexity of the system can be reduced, and the development time and cost can be reduced.

[0055] As an optional solution, after updating the mirror code in the second flash memory block based on the received update instruction, the method further includes: S41, determining whether the mirror code in the second flash memory block is updated successfully; S42, in the case where the mirror code in the second flash memory block fails to be updated, determining whether the central processing unit is in a power-on startup state; S43, when the central processing unit is in a power-on state, performing a mirror code refresh step on the second flash memory block to obtain a refreshed second flash memory block, wherein the mirror code refresh step at least includes the following steps: a data erasing step, a mirror code data flashing step, and a data verification step; S44, when the central processing unit is not in a power-on startup state, marking the second flash memory block as a flash memory block to be refreshed, and the flash memory block indicated by the startup flag bit remains unchanged.

[0056] During the process of updating the mirror code in the second flash memory block, an update failure may occur, for example, the update failure is caused by a power failure of the server, or an error occurs during the update process.

[0057] In the case that the mirror code in the second flash memory block fails to update, it is determined whether the central processing unit is in a power-on startup state; that is, it is determined whether the update failure is caused by a power failure of the server.

[0058] When the central processing unit is in the power-on startup state, it means that the failure to update the mirror code in the second flash memory block is not caused by the power outage of the server. At this time, the server is still operating normally. Since the failure to update the mirror code in the second flash memory block may cause the mirror code to be damaged, the subsequent use of the mirror code in the second flash memory block to run the basic input and output system may cause the system to fail to start normally. Therefore, the mirror code refresh step can be performed on the second flash memory block to ensure the integrity and correctness of the mirror code in the second flash memory block.

[0059] The mirror code refresh step includes at least the following steps: a data erasing step, a mirror code data flashing step and a data verification step; specifically, the data erasing step includes: performing an erasing operation on the second flash memory block to ensure that the area is empty; the mirror code data flashing step includes: ensuring that the mirror code data to be written is correct and complete, and writing the mirror code data to the previously erased flash memory area. It should be noted that the mirror code written here is the mirror code contained in the second flash memory block before it is updated; the data verification step includes: reading the data just written from the second flash memory block, comparing the read data with the original mirror data, and ensuring that they are consistent.

[0060] When the central processing unit is not in the power-on startup state, it means that the failure to update the mirror code in the second flash memory block is caused by the power failure of the server. Therefore, the second flash memory block is marked as a flash memory block to be refreshed, and the mirror code refresh step is performed on the second flash memory block when the server is powered on next time. The flash memory block indicated by the startup flag remains unchanged, that is, the mirror code in the first flash memory block is still called when the server is powered on next time, so as to avoid the situation where the system cannot start normally.

[0061] Through this embodiment, the mirror code in the second flash memory block can be repaired in time when the mirror code in the second flash memory block fails to be updated, thereby effectively improving the reliability and stability of the basic input and output system update method.

[0062] As an optional solution, when the central processing unit is not in a power-on startup state, after marking the second flash memory block as a flash memory block to be refreshed, the method further includes: S51, determining whether the central processing unit has entered a power-on startup state; S52, when the central processing unit enters the power-on startup state, executing the mirror code refresh step for the flash memory block to be refreshed.

[0063] It should be noted that the method for determining whether the central processing unit has entered the power-on startup state has been described above and will not be repeated here.

[0064] When the central processing unit enters the power-on startup state, it means that the server is powered on again after the last power outage. At this time, the central processing unit runs the mirror code in the first flash memory block to execute the initialization steps of the basic input and output system. At the same time, the mirror code refresh step is executed on the flash memory block to be refreshed, that is, the second flash memory block is refreshed and repaired.

[0065] Through this embodiment, when the server is powered on again, the mirror code in the flash memory block to be refreshed is refreshed, thereby effectively improving the reliability and stability of the basic input and output system update method.

[0066] As an optional solution, updating the mirror code in the second flash memory block based on the received update instruction includes: S61, obtaining an update file, wherein the update file corresponds to the update instruction; S62, erasing the mirror code in the second flash memory block; S63, loading the update file, and writing the mirror code corresponding to the update file into the second flash memory block.

[0067] In this embodiment, the server needs to receive and identify update instructions. Here, the update instructions can come from network downloads, Universal Serial Bus (USB) interfaces, serial port communications, etc. The update instructions should include information about the content to be updated, the location, and possible versions.

[0068] In order to obtain the update file, it is necessary to parse the update instruction, that is, according to the received update instruction, parse out the specific information related to the update, including the name and location of the update file (such as the network address, the path in the USB device, etc.); according to the parsed information, download or read the update file from the specified location.

[0069] It should be noted that before using the update file for updating, the update file needs to be verified for integrity (such as checksum, signature verification, etc.) to ensure that the update file has not been tampered with during transmission or storage.

[0070] Performing an erase operation to clear the current mirror code in the second flash memory block can ensure that the writing of the new mirror code is not interfered by the old data.

[0071] Load the update file into the system memory, and write the image code in the update file into the erased second flash memory block; after the writing is completed, check whether the writing operation is successful, and optionally, verify by reading the written data to ensure that the new image code has been correctly stored in the second flash memory block; after the writing is successful, it can be confirmed that the image code in the second flash memory block has been updated.

[0072] Through this embodiment, the mirror code in the second flash memory block can be accurately updated, thereby improving the reliability of the basic input and output system update method in this embodiment.

[0073] Figure 4 This is the second flow chart of the basic input and output system updating method provided by the present invention, see Figure 4 The following describes the basic input / output system update method of the embodiment of the present application in conjunction with an optional example. In this optional example, the following steps may be included: Step 1: Start the upgrade process on the operating system (OS); start to execute the basic input and output system update method in this embodiment.

[0074] Step 2, specifying a flash memory block to be refreshed; after confirming the first flash memory block indicated by the start flag, confirming the flash memory block to be updated (the second flash memory block).

[0075] Step 3: data erasing, verification, and flashing; updating the mirror code in the second flash memory block.

[0076] Step 4, after the upgrade is completed, modify the startup flag and start at the new image position; after the image code in the second flash memory block is updated, the flash memory block indicated by the startup flag is updated to the second flash memory block.

[0077] Step 5: Restart to take effect; restart the server.

[0078] Step 6, the CPU addresses the flash memory block.

[0079] Step 7, the CPLD reads the startup flag bit; and determines the flash memory block indicated by the startup flag bit.

[0080] Step 8, the system boots and starts; calling the image code in the flash memory block indicated by the startup flag bit to execute the system initialization step.

[0081] It can be understood that through the above scheme, CPLD can be used to logically control the selection of the boot area on a flash memory chip. During the normal upgrade process, two logical partitions can be designed on the same flash memory chip as mirror storage partitions for the primary and standby BIOS. The storage space of the redundant flash memory chip in the actual scenario can be fully utilized, and a flash memory chip can be saved as redundancy, saving hardware resources. At the same time, in the event of a power outage in an abnormal scenario, if the upgrade process of the mirror code in the flash memory block is not completely upgraded successfully, the flash memory block indicated by the logical partition startup flag will not be updated. At this time, even if the power is abnormally restarted, the flash memory block indicated by the startup flag has not been updated, which will not affect the next startup, thereby ensuring the normal boot startup of the system the next time it is powered on after a power outage.

[0082] Figure 5 Schematic diagram of the basic input and output system update device provided by the present invention. Figure 5 As shown, the image code of the basic input and output system is stored in the flash memory chip, and the device includes but is not limited to the following modules: The determination module 501 is used to determine the first flash memory block indicated by the startup flag, wherein the flash memory chip includes a first flash memory block, a second flash memory block and a startup flag, the first flash memory block and the second flash memory block both store mirror codes, and the startup flag is used to indicate the flash memory block read when the basic input and output system is running; An updating module 502, configured to update the mirror code in the second flash memory block based on the received update instruction; The execution module 503 is used to update the flash memory block indicated by the startup flag bit to the second flash memory block after the mirror code in the second flash memory block is updated.

[0083] Through the embodiments of the present application, the first flash memory block indicated by the startup flag is determined, wherein the flash memory chip includes a first flash memory block, a second flash memory block and a startup flag, the first flash memory block and the second flash memory block both store mirror codes, and the startup flag is used to indicate the flash memory block read when the basic input and output system is running; the mirror code in the second flash memory block is updated based on the received update instruction; after the mirror code in the second flash memory block is updated, the flash memory block indicated by the startup flag is updated to the second flash memory block; the basic input and output system update method in the related art is solved, and the technical problem of low stability of the basic input and output system during the update process is solved, thereby improving the reliability of the basic input and output system during the update process.

[0084] It should be noted that the basic input / output system updating device provided by the present invention can execute the basic input / output system updating method of any of the above embodiments when it is specifically running, which will not be described in detail in this embodiment.

[0085] Figure 6 is a schematic diagram of the structure of the electronic device provided by the present invention, such as Figure 6As shown, the electronic device may include: a processor 610, a communication interface 620, a memory 630 and a communication bus 640, wherein the processor 610, the communication interface 620 and the memory 630 communicate with each other through the communication bus 640. The processor 610 may call the logic instructions in the memory 630 to execute the basic input and output system update method, the method comprising: determining the first flash memory block indicated by the startup flag, wherein the flash memory chip comprises a first flash memory block, a second flash memory block and a startup flag, the first flash memory block and the second flash memory block both store mirror codes, and the startup flag is used to indicate the flash memory block read when the basic input and output system is running; updating the mirror code in the second flash memory block based on the received update instruction; after the mirror code in the second flash memory block is updated, updating the flash memory block indicated by the startup flag to the second flash memory block.

[0086] In addition, the logic instructions in the above-mentioned memory 630 can be implemented in the form of a software functional unit and can be stored in a computer-readable storage medium when it is sold or used as an independent product. Based on such an understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art or the part of the technical solution, can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods of each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk, etc. Various media that can store program codes.

[0087] On the other hand, the present invention also provides a computer program product, which includes a computer program stored on a non-transitory computer-readable storage medium, the computer program including program instructions, and when the program instructions are executed by a computer, the computer can execute the basic input and output system update method provided by the above-mentioned embodiments, the method including: determining a first flash memory block indicated by a startup flag, wherein the flash memory chip includes a first flash memory block, a second flash memory block and a startup flag, the first flash memory block and the second flash memory block both store mirror codes, and the startup flag is used to indicate the flash memory block read when the basic input and output system is running; updating the mirror code in the second flash memory block based on the received update instruction; after the mirror code in the second flash memory block is updated, updating the flash memory block indicated by the startup flag to the second flash memory block.

[0088] On the other hand, the present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, is implemented to execute the basic input / output system update method provided in the above-mentioned embodiments, the method comprising: determining a first flash memory block indicated by a startup flag, wherein the flash memory chip comprises a first flash memory block, a second flash memory block and a startup flag, the first flash memory block and the second flash memory block both store mirror codes, and the startup flag is used to indicate the flash memory block read when the basic input / output system is running; updating the mirror code in the second flash memory block based on the received update instruction; after the mirror code in the second flash memory block is updated, updating the flash memory block indicated by the startup flag to the second flash memory block.

[0089] The device embodiments described above are merely illustrative, wherein the units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, i.e., they may be located in one place, or they may be distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the scheme of this embodiment. Those of ordinary skill in the art may understand and implement it without creative effort.

[0090] Through the description of the above implementation modes, those skilled in the art can clearly understand that each implementation mode can be implemented by means of software plus a necessary general hardware platform, or of course by hardware. Based on such an understanding, the above technical solution can essentially or in other words be embodied in the form of a software product that contributes to the prior art. The computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, a magnetic disk, an optical disk, etc., and includes a number of instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods of each embodiment or some parts of the embodiment.

[0091] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A basic input and output system updating method, characterized in that: The mirror code of the basic input and output system is stored in a flash memory chip, and the method comprises: Determine a first flash memory block indicated by a startup flag, wherein the flash memory chip includes the first flash memory block, the second flash memory block and the startup flag, the first flash memory block and the second flash memory block both store the mirror code, and the startup flag is used to indicate a flash memory block read when the basic input and output system is running; Updating the mirror code in the second flash memory block based on the received update instruction; After the mirror code in the second flash memory block is updated, the flash memory block indicated by the startup flag is updated to the second flash memory block.

2. The basic input and output system updating method according to claim 1, characterized in that: Before determining the first flash memory block indicated by the start flag bit, the method further includes: When the central processing unit is in a power-on startup state, controlling the complex programmable logic device to map the addressing address of the central processing unit onto the first flash memory block; The central processing unit is controlled to run the mirror code in the first flash memory block.

3. The basic input and output system updating method according to claim 2, characterized in that: In the case where the central processing unit is in a power-on startup state, before controlling the complex programmable logic device to map the addressing address of the central processing unit on the first flash memory block, the method further includes: When the system power-on pin is in a high level state, it is determined that the central processing unit is in the power-on startup state.

4. The basic input / output system updating method according to claim 1, characterized in that: Before determining the first flash memory block indicated by the start flag bit, the method further includes: The storage space of the flash memory chip is logically partitioned to obtain the first flash memory block and the second flash memory block.

5. The basic input and output system updating method according to claim 2, characterized in that: After updating the mirror code in the second flash memory block based on the received update instruction, the method further includes: Determining whether the mirror code in the second flash memory block is updated successfully; In the case where the mirror code in the second flash memory block fails to be updated, determining whether the central processing unit is in the power-on startup state; When the central processing unit is in the power-on startup state, a mirror code refresh step is performed on the second flash memory block to obtain a refreshed second flash memory block, wherein the mirror code refresh step at least includes the following steps: a data erasing step, a mirror code data flashing step, and a data verification step; When the central processing unit is not in the power-on startup state, the second flash memory block is marked as a flash memory block to be refreshed, and the flash memory block indicated by the startup flag remains unchanged.

6. The basic input and output system updating method according to claim 5, characterized in that: When the central processing unit is not in the power-on startup state, after marking the second flash memory block as a flash memory block to be refreshed, the method further includes: Determining whether the central processing unit has entered the power-on startup state; When the central processing unit enters the power-on startup state, the mirror code refreshing step is performed on the flash memory block to be refreshed.

7. The basic input and output system updating method according to any one of claims 1 to 6, characterized in that: The updating of the mirror code in the second flash memory block based on the received update instruction includes: Obtaining an update file, wherein the update file corresponds to the update instruction; Erasing the mirror code in the second flash memory block; The update file is loaded, and the image code corresponding to the update file is written into the second flash memory block.

8. A basic input and output system updating device, characterized in that: The mirror code of the basic input and output system is stored in a flash memory chip, and the device includes: A determination module, configured to determine a first flash memory block indicated by a startup flag, wherein the flash memory chip comprises the first flash memory block, a second flash memory block and the startup flag, the first flash memory block and the second flash memory block both store the mirror code, and the startup flag is used to indicate a flash memory block read when the basic input and output system is running; An update module, configured to update the mirror code in the second flash memory block based on the received update instruction; The execution module is used to update the flash memory block indicated by the startup flag bit to the second flash memory block after the mirror code in the second flash memory block is updated.

9. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein: When the processor executes the computer program, the basic input and output system updating method according to any one of claims 1 to 7 is implemented.

10. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the basic input and output system updating method according to any one of claims 1 to 7 is implemented.

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